open collaboration and ibm power systems draft version 25 · it is not just software that is moving...

Open Collaboration and IBM Power Systems John Banchy Rick Lebsack January, 2017

Open Collaboration and IBM Power Systems © Copyright International Business Machines Corporation 2017

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Introduction Disruptive change has always allowed organizations or individuals to redefine markets and to upset established industry paradigms and thought patterns. Amazon changed the way we purchase products; Uber changed the way we obtain transportation; Facebook, Twitter, Instagram and other social media companies have changed the way we interact with each other, and mobile devices have changed the way we live and do business. Information technology is also undergoing significant disruptive change including changes in the economics of chip development and manufacturing, the growth in new workload types such as big data, cognitive computing, and the Internet of Things (IoT), as well as changes in how information technology (IT) solutions are developed, brought to market, and deployed. In 2013, IBM along with Google, Mellanox, NVIDIA, and Tyan announced the OpenPOWER Foundation (OPF) as a collaborative, open server ecosystem. This open ecosystem and new approach to server development will allow organizations to respond more effectively to those disruptive changes. This paper will explore the forces leading up to the OpenPOWER Foundation; what it is, why it is well positioned to respond to the changes in technology, and give a high-level view of the outlook over the next couple of years. Beyond Moore’s Law In 1965 Gordon Moore, a co-founder of Intel, observed that the number of transistors per square area on an integrated circuit was doubling approximately every year. The early gains in density did slow a bit resulting in an actual doubling about every 18 to 24 months. His observation, now coined “Moore’s Law”, has been an axiom for the IT industry. The real ramification of Moore’s Law was economic not technical. The doubling of transistors on an integrated circuit delivered more transistors for a lower unit cost. The effect of lowering chip costs drove rapid growth in information technology capabilities which has benefited consumers of computing technology. Unfortunately, that economic trend is slowing. In the past, the ability to lower costs came primarily from shrinking chip lithography. While the number of transistors on a chip is still increasing, the costs to design a new chip, build the required chip fabrication facility, coupled with the impact of lower chip yields, are working against the benefit of shrinking the chip lithography. The on-line magazine Electric Engineering Times1 quoted Gartner as saying “the costs of manufacturing equipment needed for leading-edge semiconductor manufacturing are increasing at a rate between 7 percent and 10 percent per year, depending on the basic process……By 2020, current cost trends will lead to an average cost of between $15 billion and $20 billion for a leading-edge fab”. According to International Business Strategies in a PWC white paper2 the cost of a million gates going from 20nm to 14nm technology may actually be slightly higher, increasing from $0.0275 to $0.0278. As illustrated in Figure 1, this trend is going in the wrong direction.


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Figure 1 – Costs per Million Gates

The technical hurdles in building 5nm or smaller chips may be overcome, but the increased costs to design and manufacture those technologies may overshadow any increased technical benefits. It is likely that newer more “exotic” technologies beyond CMOS (as Mark Bohr, Intel Senior Fellow Logic Technology Development calls them) will eventually come along. That does not mean that these newer technologies will rapidly replace existing ones. Actual technology adoption is affected by many things including materials research, circuit design, computer system architecture, and the availability of software that can leverage the new architectures. Once the industry has picked an underlying new technology, changes in any one of these areas could take multiple years to materialize and if changes are spread across multiple areas it could take 15-20 years.3 Balancing these improvement costs is required to enable these changes while still delivering value to the consumer – which is getting harder to accomplish. Growth in New Workloads IT grew up around structured data often instantiated in relational and online analytical processing (OLAP) databases. The technology to collect and store data is now changing the very nature of the data being collected. It is estimated that approximately 80% of the world’s data is semi-structured (such as XML or JSON documents) and unstructured (including audio, images and log files). Previous analytics and hardware technologies could only provide limited insights from that data. To leverage these new sources of data, IT solutions must be able to rapidly sift through increasingly larger volumes of data. In a recent article by Forbes magazine4 many industry analysts predict big data and analytics software will grow by more than 50% over the next five years, prescriptive analytics will grow at a 22% compound annual growth rate, and both predictive and prescriptive analytics will represent 40% of net new investments in business intelligence and analytics by 2020.


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Analytics has moved from being simply a descriptive post-processing operation, to a real-time, integrated, predictive and prescriptive paradigm. There is also a significant shift towards cognitive computing where the machine learns from ingested data or even from other machines. This is confirmed in a Forbes5 article stating that by 2020, 50% of business analytics software will include prescriptive analytics delivered through cognitive computing technologies. Cognitive technologies and machine learning will make data ingestion and insight discovery much easier. They will allow computers to learn and adapt without being explicitly programmed for a task. Data is also being created by what is known as the Internet of Things (IoT). At its core, IoT refers to objects (or things) that have some degree of computing power and are interconnected over the internet. The idea of interconnecting instruments or machines is not unique to the late 20th Century. Consider the following quote by Nikola Tesla (primary inventor of alternating current) in an interview with Colliers magazine in 1926. "When wireless is perfectly applied the whole earth will be converted into a huge brain, which in fact it is, all things being particles of a real and rhythmic whole...and the instruments through which we shall be able to do this will be amazingly simple compared with our present telephone. A man will be able to carry one in his vest pocket." It is amazing to look at intelligent devices of the 21st Century and reflect on Tesla’s thinking – everything would be interconnected, constantly evaluating and communicating to us through something in our pocket. All this interconnected instrumentation and evaluation brings with it enormous amounts of data collection, storage and processing demands. For example, the latest passenger airplanes generate about 10 terabytes of data per engine during every half hour of operation.6 These new Cognitive and Internet of Things (IoT) technologies are creating a flood of data that will challenge traditional processing methods to make use of it. Solving those challenges will require high bandwidth capabilities coupled with what IBM is calling data-centric computing -- moving processing to data rather than data to processing.7 Open Collaboration In the mid-1960s, IBM developed the Houston Automatic Spooling Priority or HASP to satisfy the needs of the U.S. space program. It provided scheduling, control of job flow, spooling, and printer and punch card support. HASP was shipped with the machine as “free” source code and many customers, at the time, made enhancements to HASP by modifying and sharing the changed source code. Sharing source code was common at that time. The thinking changed in 1970’s and moved from free and open to monetized and proprietary. In 1998 the industry started a swing back towards open with the formation of the Open Source Initiative. In the past few years, the direction of many major organizations is increasingly towards exploiting open source software developed as sets of micro-services that are composed so that each service can be 'fit for purpose' rather than one size fits all. This approach can result in simpler code which can be advanced more rapidly than conventional monolithic, broad approaches.


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Per Gartner8, “by 2018, more than 70% of new in-house applications will be developed on an OSDBMS (open source database management system), and 50% of existing commercial RDBMS (relational database management system) instances will have been converted or will be in process.” It is not just software that is moving towards openness, business models are also moving towards increased collaboration to be competitive. A European survey done by A.T. Kearny found that 71% of respondents expected more than 25% of their revenues to be come through collaborative innovation by 2030 up from 62% in 2015.9 In a recent Forbes magazine interview, Doug Balog, IBM’s General Manager of Power Systems, reflected on IBM’s adoption of collaboration driven by the shifting competitive landscape. Balog noted that inter-company barriers are collapsing; companies are applying expertise across industries to deliver new solutions. He stated that collaboration creates new opportunities and greater value throughout the information technology industry by increasing the speed of innovation, responding quicker to customer needs resulting in new, mutually beneficial ways of working between companies and innovators.10 IBM’s adoption of collaboration is a good example of how large enterprises have expanded the open concept to more than software. It permeates all levels of business from development to deployment to customer support. The old saying “two heads are better than one” is never more true than when considering the rise of collaboration as a formal practice. The adoption of collaboration brings many “minds” together to accelerate innovation and maintain competitiveness which results in benefits for both producers and consumers of offerings. Hyperscale Data Centers With our ever-increasing dependence on IT technology to deliver products and services, the demands on the underlying IT infrastructure have been growing along with their costs. One approach to helping keep costs down is leveraging economies of scale by sharing hardware, software, people, and facilities across many consumers. This strategy is creating an industry which is increasingly dominated by large hyperscale data centers such as those run by Google, Rackspace, Facebook, Apple, Yahoo, Microsoft, and IBM. These data centers are expected to continue to grow in both size and importance. Intel forecasts that between 70 to 80% of all compute, storage, and network will exist in these type of data centers by 202511. To remain competitive, these companies must constantly look for new ways to lower costs and provide better services. Today the primary server architecture for these hyperscale data centers is based on Intel CPUs. Several of these providers (Google, Rackspace, IBM) have expressed an explicit interest in an alternative to Intel. They want competition and choice to lower costs, lower power consumption, and provide more innovation while better addressing new workload demands.


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The trend towards hyperscale also applies to specific markets or countries. China, as the world’s most populous country and second largest economy, is poised to become the second largest data center market by 2020.12 Their infrastructure demands could become even larger if eMarketer’s prediction that China will be the largest retail market in the world by the end of 201613 turns out to be true. Choice breeds competition which keeps prices down, quality high and drives innovation. Most organizations, whether they are businesses or governments, prefer choice. This idea of choice includes the desire for alternatives to Intel chip technology. This is taking root in China where, per a spokesperson for Suzhou PowerCore, the China POWER Technology Alliance, their goal is to “develop a processor technology that is locally controllable, and transform the server business in China into a 100% local stack, as an alternative to Intel". There are certainly several other reasons that countries are pursuing local control -- from data to compute -- including the many recent public security breaches.

OpenPOWER Foundation The creation of the OpenPOWER Foundation (OPF) in 2013 was a major business model shift for IBM -- going from designing and manufacturing proprietary chips and servers, to opening its designs to others. When creating OpenPOWER, the five initial members took a page from the highly successful ARM business model. The ARM processor has been one of the most successful processors in history having sold over 86 billion chips for cell phones, tablets, and Internet of Things (IoT) devices14. They have over 1100 licenses with over 300 companies. What is most interesting about ARM Holdings (now owned by SoftBank Group) is that it manufacturers no chips of its own, but rather designs and licenses its technology to a wide range of clients. ARM’s clients can either utilize existing designs, or with more advanced licenses, modify ARM’s design for their own needs. Companies like Apple, Samsung, Qualcomm, and NVIDIA are doing just that.

Since the announcement of OpenPOWER the ecosystem has grown steadily to over 275 members today (see Figure 2). One of the first actions of the OPF was for IBM to open the Power chip to other companies to buy and integrate it into their own offerings, as well as to allow them to modify Power’s design for their own uses.


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Figure 2 - OpenPOWER Membership Growth, Source: Calista Redmond, IBM

IBM and the other OpenPOWER members went even further than the ARM chip model and created an entire open ecosystem (Figure 3). Through the OPF there is widespread collaboration between system and system board designers, developers of I/O devices and hardware accelerators, and system and application software companies. IBM and its OpenPOWER collaborators are pursuing ways to get IT back on the economic curve known as Moore’s Law.

Figure 3 - OpenPOWER Collaboration

This business model has opened IBM’s current POWER8 chip design, unlike Intel, making this chip available so that other companies can acquire and/or modify it based on their needs. The Chinese company Suzhou PowerCore has done just that having licensed both the Power chip and the ability to modify it for the Chinese market. This has resulted in an OpenPOWER chip where the Suzhou PowerCore can control all aspects of the chip, the server, and every line of firmware code. The adoption of POWER by such a large market will not only increase the demand for


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POWER-based hardware technologies, but will also increase demand for POWER-based ISV software. Hardware Accelerators When price/performance improvements cannot be gained by simply shrinking the manufacturing process technology, other avenues need to be explored. One of those other avenues is the use of hardware accelerators. Hardware accelerators have been around for a long time and are present on all server architectures. When placed in servers, they typically appear in the form of PCIe cards that offload (or optimize) some specific function such as encryption or portions of the TCP/IP stack. The secret to successfully offloading work to an accelerator is simple: the benefit of the offload must be greater than the cost. Cost is measured as the additional CPU cycles incurred and latency added to move work off to an external card or device. One of the objectives of the OpenPOWER Foundation has been to lower the cost and improve the performance of applications by leveraging two primary classes of accelerators, FPGAs and GPUs. FPGAs, or Field Programmable Gate Arrays, are very lightweight re-programmable hardware devices. FPGAs can have their internal logic flow changed to solve specific problems. Thus, they can provide very low latency, low power offload. GPUs, or Graphic Processing Units (sometimes called GPGPUs or General Purpose Graphics Processing Units), have also been around for a while. They originally were designed for exactly what their name suggests, graphics processing. They are comprised of hundreds to thousands of light-weight cores that can-do work in parallel. GPUs can render high function graphics but they can also offload other kinds of workloads at very low costs. The largest technical challenge to exploiting FPGAs or GPUs is primarily the overhead and latency to push work off to these devices due to low-bandwidth, high-latency PCIe buses and software stacks. To achieve widespread adoption a joint effort between chip designers and FPGA or GPU companies was necessary. With the initial release of the POWER8 chip, IBM added a new accelerator capability called CAPI (Coherent Accelerator Processor Interface) to address the overhead (cost) of acceleration. The idea behind CAPI is to make an external PCIe card with an FPGA appear as another POWER8 processor on the memory bus. Rather than spending tens of thousands of instructions managing the data consistency (coherency) between the PCIe device and data in memory or cache, the adapter looks like it is another CPU on the system. The result is significantly lower overhead and less latency.


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Figure 4 - Highlevel CAPI Architecture One example of CAPI-exploitation is the use of CAPI-attached flash storage. The shorter path lengths of the CAPI attachment allows the flash storage to be treated as an extension of real memory rather than disk storage. POWER systems with this capability have demonstrated a 27:1 performance advantage on NOSQL workloads. IBM is not alone in looking to exploit FPGAs. After IBM introduced POWER8, Intel acquired Altera, an FPGA manufacturer and we can assume that they too intend to leverage FPGAs to lower the cost of computing. IBM has taken an open approach with its design by allowing any manufacturer of FPGAs or FPGA accelerated devices to participate through the CAPI interface. IBM’s design allows work originating on the POWER8 chip to be accelerated by a FPGA but it also allows work originating from an external device such as a storage array or network device to come directly through the FPGA to the POWER8 chip. An alternative design that integrates the FPGA only through the chip can significantly limit the applicable use cases. CAPI was OpenPOWER’s first open accelerator. IBM and its partners have gone further and the latest version of POWER8 includes a new capability called NVLink. NVLink allows an NVIDA GPU to talk directly to the POWER8 chip at very high bandwidth. This significantly opens an applications ability to exploit GPU acceleration.


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Figure 5 - POWER8 with NVLink

As shown in Figure 5, traditional PCIe Gen3 buses operate up to 32 GB per second. GPUs have traditionally attached via those PCIe buses. NVLink allows the GPU to attach directly to the POWER8 chip over links that are capable of 80 GB per second, 2.5 times faster than PCIe. There are many potential use cases for CAPI and NVLink. They include network acceleration, encryption offload, Monte Carlo simulations, speech recognition, JAVA acceleration, graphics processing, Hadoop and Spark acceleration, and machine learning just to name a few. A new class of database management systems that exploit the parallel processing capability of the GPUs are now available. By exploiting the thousands of processors available on the GPU. offerings such as Mapd and Kinetica enable real-time analysis of streaming data and large data sets at speeds not previously possible. OpenPOWER and the Open Compute Project Another example of open collaboration is the Open Compute Project (OCP) which was started by Facebook to help design and build more efficient software, servers and other components for large hyperscale data centers. IBM joined the Open Compute Project in January of 2014. In September of 2015 Rackspace announced the availability of an OpenPOWER/Open Compute server based upon POWER8 technology called Barreleye.15 Barreleye is just one of many examples of OpenPOWER technology coming to the market through OpenPOWER’s collaboration efforts.

The OCP and OPF are coming together based on an announcement that Google and Rackspace made at the April, 2016 OpenPOWER Summit. They described a joint project to develop a POWER9 based server to submit blueprints to the Open Compute Project compatible with the 48V Open Compute racks Google and Facebook are currently working on.

The system is codenamed Zaius and is targeted as a dual-socket POWER9 server with 32 DDR4 memory slots, two NVLink slots, three PCIe gen-4 x16 slots, and 44 cores. The high-speed NVLink will interconnect CPUs and NVIDIA GPU accelerators. As part of the Open Compute


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Project, these blueprints can then be used to build inexpensive open servers resulting in lower costs and hardware designed for hyper-scale computing requirements.

But Wait… There is “Moore” Recently at the Hot Chips conference in Cupertino California, IBM released details on its processor plans for the next generation of Power chips -- POWER9. IBM’s strategy is to make a family of chips where each member can be optimized for different use cases along with upping POWER’s ability to use off-chip accelerators. Both strategies are designed to keep POWER processors firmly on the Moore’s Law economic curve. POWER9 Family of Chips POWER9 will be the first Power chip to incorporate elements of the new POWER Instruction Set Architecture version 3 that was released in December of 2015. POWER9 incorporates a new way of designing chips that allows greater flexibility for IBM as well as 3rd party licensors of POWER technology. The cores themselves will be built using what IBM calls “super-slices”. Two super-slices will be combined to create an SMT4 core (four active threads) and four will be combined to create an SMT8 core (eight active threads). The new design will reduce the size of the instruction pipeline (how long it takes to execute an instruction) and provide better branch prediction. In addition to more flexible core design, POWER9 will provide variants with different connectivity to memory, off-chip accelerators, and other POWER9 chips to better support different workloads. Jeff Stuecheli, part of the Power hardware architecture team, talks about the IBM design choices (starting at minute 48:14) on a session available on YouTube. https://www.youtube.com/watch?v=YG-umQGbv08&feature=player_embedded Jeff indicates that in addition to building servers designed for high end mission critical workloads or large scale virtualization (two traditional POWER strengths), IBM will also have designs targeted at compute-optimized, storage-optimized, and cost-optimized workloads. The POWER9 family will include chips with 12 or 24 cores and 8 or 4 threads per core respectively. Memory will be able to attach directly (lower cost) or via a memory buffers (higher bandwidth). These two options will allow configurations to be optimized for workloads with different memory price points, as well as bandwidth and latency requirements. The external off-chip connectivity will also be extremely fast and flexible. POWER9 will include 48 lanes of PCIe Gen4 connectivity with an aggregate bandwidth of 192 Gb/s duplex bandwidth that can be either be used for traditional PCIe cards or CAPI 2.0 cards. CAPI 2.0 on PCIe Gen4 will run at approximately 2x the speed over 2x the number of signal paths for an overall bandwidth increase of about 4x over CAPI version 1.


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There will be a 16 Gb local SMP link designed to connect four POWER9 sockets together into a group. Lastly, there will be a new 48 lane 25Gb Bluelink connection providing 300 GB/s (yes bytes…) duplex bandwidth. That connection can be flexibly used for NVLink 2.0, OpenCAPI, or remote SMP connections between groups of four sockets. With the new Bluelink ports, the bandwidth between the POWER9 chips and the OpenCAPI or NVLink accelerators will be 7-10x higher depending upon the type of accelerator and the protocol. The extremely high bandwidth Bluelink connection will significantly improve the performance of off-chip accelerators.

Figure 6 - POWER9 Implementations

OpenCAPI Consortium The success of the POWER8 CAPI architecture has led to the creation of the OpenCAPI Consortium with an announcement by AMD, Dell EMC, Google, Hewlett Packard Enterprise, IBM, Mellanox Technologies, Micron, NVIDIA and Xilinx of an OpenCAPI specification to be delivered by December 2016. As discussed earlier, the adoption of accelerators comes with the requirement for high speed access to them. This is what the OpenCAPI specification will provide -- an open specification, high-speed path for different types of technologies including advanced memory, accelerators, networking and storage. Figure 7 illustrates a high-level architectural view of how the OpenCAPI interface will connect different components. This is a significant commitment to open collaboration because the members feel that they can deliver better, more timely products by working together. The plans are already in place with


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many technology companies announcing targets for introduction and deployment of OpenCAPI in their products including:16

• IBM plans to introduce POWER9-based servers that leverage the OpenCAPI specification in the second half of 2017. Additionally, IBM will enable members of OpenPOWER Foundation to introduce OpenCAPI enabled products in the second half 2017.

• Google and Rackspace’s new server under development, codenamed Zaius will leverage POWER9 processor technology and plans to provide the OpenCAPI interface in its design.

• Mellanox plans to enable the new specification capabilities in its future products. • Xilinx plans to support OpenCAPI enabled FPGAs.

Figure 7 - OpenCAPI

CAPI SNAP - The Simplest Way for Developers to Adopt CAPI Facilities for accelerating applications, such as CAPI, will offer significant cost and performance advantages over many traditional approaches by moving processing closer to data and reducing data coherency overhead. Developing applications that leverage FPGAs has traditionally been a challenge. At the October 2016 OpenPOWER Summit in Europe, IBM announced new collaborative framework called the CAPI Storage, Networking, and Acceleration Programming Framework, or the CAPI SNAP Framework. CAPI SNAP is a joint effort between IBM, Xilinx, Rackspace, Eiditicom, Reconfigure.io, Alpha-Data, and Nallatech to vastly simplify the effort to develop CAPI based applications. The CAPI SNAP framework will:

• Make it easy for developers to create new specialized algorithms for FPGA acceleration in high-level programming languages, like C++ and Go, instead of less user-friendly traditional FPGA programming languages.


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• Make FPGA acceleration more accessible to ISVs and other organizations to bring faster data analysis to their users.

• Leverage the OpenPOWER Foundation ecosystem to continually drive collaborative innovation.

• Simplify the calling API by only requiring a programmer to specify the source of the data (address in memory or location on disk, network, or external memory), the destination of the data (address or location) and the specific accelerated action to be performed. The framework will take care of moving the data to the accelerator and putting away the results.

The Road Ahead In November of 2014, IBM announced that the U.S. Department of Energy had awarded IBM contracts to develop and deliver the world’s most advanced “data centric” supercomputing systems at Lawrence Livermore and Oak Ridge National Laboratories.17 IBM’s new systems, using a “data centric” approach, puts computing power everywhere data resides minimizing data in motion and energy consumption. The selection of IBM, true to OpenPOWER, was a joint effort with technologies from IBM, Mellanox and NVIDIA. General POWER9 chips and servers are expected to start shipping in 2017 and will be part of the evolution of OpenPOWER. IBM continues to develop the Power architecture as illustrated in Figure 8. There are already development teams working on POWER10 designs building on the firm foundation of POWER9.

Figure 8 - IBM Power Chip Roadmap

The open source movement got a major lift in 1991 when Linus Torvalds released the Linux kernel as source code. In 2005 Linus released Git, a software version control system that would become the basis for GitHub. GitHub, with over 14 million users, has become a significant collaboration tool providing capabilities such as new feature requests, source code contributions, bug tracking, and wikis. The lesson of the open source movement is simple, by collaborating with others, the final product is better –- better quality, better function, and better time to value.


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The increased demand for workloads such as analytics, is driving the industry to look for affordable ways to service that demand. A go-it-alone approach based just upon improvements in chip lithography is unlikely to be successful. Similar to the open source software movement, it is going to take the joint efforts of many players to provide solutions that allow entities to collect, store, sift and analyze massive amounts of data from multiple sources to derive insight from non-obvious relationships. Hyperscale data centers will require solutions that can better leverage new memory and storage technologies to provide more consistent, lower latency response times while managing energy efficiently. Competition will drive these entities to look for ways to gain a competitive edge in the marketplace. Countries around the world will look for open solutions that allow them to better control their own destiny. IBM is approaching these challenges through its leadership in collaborative projects such as the OpenPOWER Foundation, the OpenCAPI Consortium, the Open Compute Project, the Apache Foundation, OpenStack, the OpenDaylight project, and the Hyperledger Project. IBM is developing products based upon open interfaces so any vendor can participate and work to improve the overall performance. IBM feels strongly that open collaboration is the best path for future success. Open collaboration will enable the innovation that the IT industry needs to address the challenges of large, and growing, volumes of untapped data to increase business value, lower costs and improve quality for everyone.

Acknowledgments We would like to thank Mark Dixon, Martin Dvorsky and Rich Bireta for their assistance and editing expertise with this document.


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References 1 “Semi industry fab costs limit industry growth”; www.eetimes.com/document.asp?doc_id=1264577 2 http://www.pwc.com/us/en/technology/publications/semiconductor-manufacturing-450-mm-wafer-transition.html 3 “Moore’s law: the future of SI microelectronics”; www.sciencedirect.com/science/article/pii/S1369702106715395 4 “Roundup of Analytics, Big Data & BI Forecasts And Market Estimates, 2016”;

http://www.forbes.com/sites/louiscolumbus/2016/08/20/roundup-of-analytics-big-data-bi-forecasts-and-market-estimates-2016/#1ae103a749c5

5 “Predictions For Big Data Analytics And Cognitive Computing In 2016”; http://www.forbes.com/sites/gilpress/2015/12/15/6-predictions-for-big-data-analytics-and-cognitive-computing-in-2016/#6e88b089409e

6 HarnessthePowerofBigData:TheIBMBigDataPlatform,https://www.flickr.com/photos/34547181@N00/19618432919 7 https://www.youtube.com/watch?feature=player_embedded&v=EpnSuFIJdwc 8 “Open Source: The New Data Center Standard”; http://imagesrv.gartner.com/media-

products/pdf/EnterpriseDB/EnterpriseDB-1-2E4E9TA.pdf 9 http://www3.weforum.org/docs/WEF_Collaborative_Innovation_report_2015.pdf 10 http://www.forbes.com/sites/ibm/2016/06/22/collaborative-innovation-is-the-future-of-information-

technology/#55b188bd583d 11 http://www.datacenterknowledge.com/archives/2016/04/22/intel-world-will-switch-to-scale-data-centers-by-2025/ 12 http://marketrealist.com/2016/09/ibms-strategy-compete-intel-data-center/ 13 http://www.emarketer.com/Article/China-Eclipses-US-Become-Worlds-Largest-Retail-Market/1014364 14 http://www.arm.com/about/company-profile/ 15 http://blog.rackspace.com/now-get-your-own-barreleye 16http://www-03.ibm.com/press/us/en/pressrelease/50792.wss17http://www-03.ibm.com/press/us/en/pressrelease/45387.wss


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© Copyright International Business Machines Corporation 2016 IBM, the IBM logo, and ibm.com, POWER8, Power Architecture, Power Systems, PowerVM, OpenPOWER are trademarks or registered trademarks of International Business Machines Corp., registered in many jurisdictions worldwide. Other product and service names might be trademarks of IBM or other companies. A current list of IBM trademarks is available on the Web at “Copyright and trademark information” at www.ibm.com/legal/copytrade.shtml. Intel is a registered trademark of Intel Corporation or its subsidiaries in the United States and other countries Other company, product, and service names may be trademarks or service marks of others. All information contained in this document is subject to change without notice. The products described in this document are NOT intended for use in applications such as implantation, life support, or other hazardous uses where malfunction could result in death, bodily injury, or catastrophic property damage. The information contained in this document does not affect or change IBM product specifications or warranties. Nothing in this document shall operate as an express or implied license or indemnity under the intellectual property rights of IBM or third parties. All information contained in this document was obtained in specific environments, and is presented as an illustration. The results obtained in other operating environments may vary. While the information contained herein is believed to be accurate, such information is preliminary, and should not be relied upon for accuracy or completeness, and no representations or warranties of accuracy or completeness are made. Note: This document contains information on products in the design, sampling and/or initial production phases of development. This information is subject to change without notice. Verify with your IBM field applications engineer that you have the latest version of this document before finalizing a design. You may use this documentation solely for developing technology products compatible with Power Architecture®. You may not modify or distribute this documentation. No license, express or implied, by estoppel or otherwise to any intellectual property rights is granted by this document.

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