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VLSI Interview Questions with Answers - 1

1. Why does the present VLSI circuits use MOSFETs instead of BJTs?

Answer

2. What are the various regions of operation of MOSFET? How are those

regions used?

Answer

3. What is threshold voltage?

Answer

4. What does it mean "the channel is pinched off"?

Answer

5. Explain the three regions of operation of a MOSFET.

Answer

6. What is channel-length modulation?

Answer

7. Explain depletion region.

Answer

8. What is body effect?

Answer

9. Give various factors on which threshold voltage depends.

Answer

10. Give the Cross-sectional diagram of the CMOS.

Answer

6 Comments

Labels: Interview Questions

Digital Design Interview Questions - All in 1

1. How do you convert a XOR gate into a buffer and a inverter (Use only one

XOR gate for each)?

Answer

2. Implement an 2-input AND gate using a 2x1 mux.

Answer

3. What is a multiplexer?

Answer

4. What is a ring counter?

Answer

5. Compare and Contrast Synchronous and Asynchronous reset.

Answer

6. What is a Johnson counter?

Answer

7. An assembly line has 3 fail safe sensors and one emergency shutdown

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switch.The line should keep moving unless any of the following conditions

arise:

(1) If the emergency switch is pressed

(2) If the senor1 and sensor2 are activated at the same time.

(3) If sensor 2 and sensor3 are activated at the same time.

(4) If all the sensors are activated at the same time

Suppose a combinational circuit for above case is to be implemented only

with NAND Gates. How many minimum number of 2 input NAND gates are

required?

Answer

8. In a 4-bit Johnson counter How many unused states are present?

Answer

9. Design a 3 input NAND gate using minimum number of 2 input NAND

gates.

Answer

10. How can you convert a JK flip-flop to a D flip-flop?

Answer

11. What are the differences between a flip-flop and a latch?

Answer

12. What is the difference between Mealy and Moore FSM?

Answer

13. What are various types of state encoding techniques? Explain them.

Answer

14. Define Clock Skew , Negative Clock Skew, Positive Clock Skew.

Answer

15. Give the transistor level circuit of a CMOS NAND gate.

Answer

16. Design a 4-bit comparator circuit.

Answer

17. Design a Transmission Gate based XOR. Now, how do you convert it to

XNOR (without inverting the output)?

Answer

18. Define Metastability.

Answer

19. Compare and contrast between 1's complement and 2's complement

notation.

Answer

20. Give the transistor level circuit of CMOS, nMOS, pMOS, and TTL inverter

gate.

Answer

21. What are set up time and hold time constraints?

Answer

22. Give a circuit to divide frequency of clock cycle by two.

Answer

23. Design a divide-by-3 sequential circuit with 50% duty circle.

Answer

24. Explain different types of adder circuits.

Answer

25. Give two ways of converting a two input NAND gate to an inverter.

Answer

26. Draw a Transmission Gate-based D-Latch.

Answer



27. Design a FSM which detects the sequence 10101 from a serial line

without overlapping.

Answer

28. Design a FSM which detects the sequence 10101 from a serial line with

overlapping.

Answer

29. Give the design of 8x1 multiplexer using 2x1 multiplexers.

Answer

30. Design a counter which counts from 1 to 10 ( Resets to 1, after 10 ).

Answer

31. Design 2 input AND, OR, and EXOR gates using 2 input NAND gate.

Answer

32. Design a circuit which doubles the frequency of a given input clock

signal.

Answer

33. Implement a D-latch using 2x1 multiplexer(s).

Answer

34. Give the excitation table of a JK flip-flop.

Answer

35. Give the Binary, Hexadecimal, BCD, and Excess-3 code for decimal 14.

Answer

36. What is race condition?

Answer

37. Give 1's and 2's complement of 19.

Answer

38. Design a 3:6 decoder.

Answer

39. If A*B=C and C*A=B then, what is the Boolean operator * ?

Answer

40. Design a 3 bit Gray Counter.

Answer

41. Expand the following: PLA, PAL, CPLD, FPGA.

Answer

42. Implement the functions: X = A'BC + ABC + A'B'C' and Y = ABC + AB'C using

a PLA.

Answer

43. What are PLA and PAL? Give the differences between them.

Answer

44. What is LUT?

Answer

45. What is the significance of FPGAs in modern day electronics?

(Applications of FPGA.)

Answer

46. What are the differences between CPLD and FPGA.

Answer

47. Compare and contrast FPGA and ASIC digital designing.

Answer

48. Give True or False.

(a) CPLD consumes less power per gate when compared to FPGA.

(b) CPLD has more complexity than FPGA

(c) FPGA design is slower than corresponding ASIC design.



(d) FPGA can be used to verify the design before making a ASIC.

(e) PALs have programmable OR plane.

(f) FPGA designs are cheaper than corresponding ASIC, irrespective of

design complexity.

Answer

49. Arrange the following in the increasing order of their complexity:

FPGA,PLA,CPLD,PAL.

Answer

50. Give the FPGA digital design cycle.

Answer

51. What is DeMorgan's theorem?

Answer

52. F'(A, B, C, D) = C'D + ABC' + ABCD + D. Express F in Product of Sum form.

Answer

53. How many squares/cells will be present in the k-map of F(A, B, C)?

Answer

54. Simplify F(A, B, C, D) = S ( 0, 1, 4, 5, 7, 8, 9, 12, 13)

Answer

55. Simplify F(A, B, C) = S (0, 2, 4, 5, 6) into Product of Sums.

Answer

56. The simplified expression obtained by using k-map method is unique.

True or False. Explain your answer.

Answer

57. Give the characteristic tables of RS, JK, D and T flip-flops.

Answer

58. Give excitation tables of RS, JK, D and T flip-flops.

Answer

59. Design a BCD counter with JK flip-flops

Answer

60. Design a counter with the following binary sequence 0, 1, 9, 3, 2, 8, 4

and repeat. Use T flip-flops.

Answer

44 Comments


Digital Design Interview Questions - 6

1. What is DeMorgan's theorem?

Answer

2. F'(A, B, C, D) = C'D + ABC' + ABCD + D. Express F in Product of Sum form.

Answer

3. How many squares/cells will be present in the k-map of F(A, B, C)?

Answer

4. Simplify F(A, B, C, D) = ( 0, 1, 4, 5, 7, 8, 9, 12, 13)

Answer

5. Simplify F(A, B, C) = (0, 2, 4, 5, 6) into Product of Sums.

Answer

6. The simplified expression obtained by using k-map method is unique.

True or False. Explain your answer.

Answer

7. Give the characteristic tables of RS, JK, D and T flip-flops.

Answer



8. Give excitation tables of RS, JK, D and T flip-flops.

Answer

9. Design a BCD counter with JK flip-flops

Answer

10. Design a counter with the following binary sequence 0, 1, 9, 3, 2, 8, 4

and repeat. Use T flip-flops.

Answer

1 Comments


Microprocessor Interview Questions - 5

1. Why are program counter and stack pointer 16-bit registers?

Answer

2. What happens during DMA transfer?

Answer

3. Define ISR.

Answer

4. Define PSW.

Answer

5. What are the execution modes available in x86 processors?

Answer

6. What is meant real mode?

Answer

7. What is protected mode?

Answer

8. What is virtual 8086 mode?

Answer

9. What is unreal mode?

Answer

10. What is the difference between ISR and a function call?

Answer

1 Comments


VLSI Interview Questions - 6

1. Why is NAND gate preferred over NOR gate for fabrication?

Answer

2. Which transistor has higher gain: BJT or MOSFET and why?

Answer

3. Why PMOS and NMOS are sized equally in a transmission gates?

Answer

4. What is SCR?

Answer

5. In CMOS digital design, why is the size of PMOS is generally higher than

that of the NMOS?

Answer

6. What is slack?

Answer



7. What is latch up?

Answer

8. Why is the size of inverters in buffer design gradually increased? Why not

give the output of a circuit to one large inverter?

Answer

9. What is Charge Sharing? Explain the Charge Sharing problem while

sampling data from a Bus?

Answer

10. What happens to delay if load capacitance is increased?

Answer

3 Comments



1. What is the size of flag register of 8086 processor?

Answer

2. How many pin IC 8086 is?

Answer

3. What is the Maximum clock frequency of 8086?

Answer

4. What is meant by instruction cycle?

Answer

5. What is Von Neumann architecture?

Answer

6. What is the main difference between 8086 and 8085?

Answer

7. What does EAX mean?

Answer

8. What type of instructions are available in instruction set of 8086?

Answer

9. How is Stack Pointer affected when a PUSH and POP operations are

performed?

Answer

10. What are SIM and RIM instructions?

Answer

1 Comments



1. How many bits processor is 8086?

Answer

2. What are the sizes of data bus and address bus in 8086?

Answer

3. What is the maximum addressable memory of 8086?

Answer

4. How are 32-bit addresses stored in 8086?

Answer

5. What are the 16-bit registers that are available in 8086?

Answer



6. What are the different types of address modes available in 8086?

Answer

7. How many flags are available in flag register? What are they?

Answer

8. Explain the functioning of IP (instruction pointer).

Answer

9. What are the various types of interrupts present in 8086?

Answer

10. How many segments are present in 8086? What are they?

Answer

0 Comments



1. Expand the following: PLA, PAL, CPLD, FPGA.

Answer

2. Implement the functions: X = A'BC + ABC + A'B'C' and Y = ABC + AB'C using

a PLA.

Answer

3. What are PLA and PAL? Give the differences between them.

Answer

4. What is LUT?

Answer

5. What is the significance of FPGAs in modern day electronics?

(Applications of FPGA.)

Answer

6. What are the differences between CPLD and FPGA.

Answer

7. Compare and contrast FPGA and ASIC digital designing.

Answer

8. Give True or False.

(a) CPLD consumes less power per gate when compared to FPGA.

(b) CPLD has more complexity than FPGA

(c) FPGA design is slower than corresponding ASIC design.

(d) FPGA can be used to verify the design before making a ASIC.

(e) PALs have programmable OR plane.

(f) FPGA designs are cheaper than corresponding ASIC, irrespective of

design complexity.

Answer

9. Arrange the following in the increasing order of their complexity:

FPGA,PLA,CPLD,PAL.

Answer

10. Give the FPGA digital design cycle.

Answer

2 Comments



1. Design 2 input AND, OR, and EXOR gates using 2 input NAND gate.

Answer

2. Design a circuit which doubles the frequency of a given input clock signal.

Answer



3. Implement a D-latch using 2x1 multiplexer(s).

Answer

4. Give the excitation table of a JK flip-flop.

Answer

5. Give the Binary, Hexadecimal, BCD, and Excess-3 code for decimal 14.

Answer

6. What is race condition?

Answer

7. Give 1's and 2's complement of 19.

Answer

8. Design a 3:6 decoder.

Answer

9. If A*B=C and C*A=B then, what is the Boolean operator * ?

Answer

10. Design a 3 bit Gray Counter.

Answer

4 Comments


Verilog Interview Questions - 3

1. How are blocking and non-blocking statements executed?

Answer

2. How do you model a synchronous and asynchronous reset in Verilog?

Answer

3. What happens if there is connecting wires width mismatch?

Answer

4. What are different options that can be used with $display statement in

Verilog?

Answer

5. Give the precedence order of the operators in Verilog.

Answer

6. Should we include all the inputs of a combinational circuit in the

sensitivity list? Give reason.

Answer

7. Give 10 commonly used Verilog keywords.

Answer

8. Is it possible to optimize a Verilog code such that we can achieve low

power design?

Answer

9. How does the following code work?

wire [3:0] a;

always @(*)

begin

case (1'b1)

a[0]: $display("Its a[0]");




default: $display("Its default")

endcase

end

Answer



10. Which is updated first: signal or variable?

Answer

7 Comments



This sections contains interview questions related to LOW POWER VLSI

DESIGN.

1. What are the important aspects of VLSI optimization?

Answer

2. What are the sources of power dissipation?

Answer

3. What is the need for power reduction?

Answer

4. Give some low power design techniques.

Answer

5. Give a disadvantage of voltage scaling technique for power reduction.

Answer

6. Give an expression for switching power dissipation.

Answer

7. Will glitches in a logic circuit cause power wastage?

Answer

8. What is the major source of power wastage in SRAM?

Answer

9. What is the major problem associated with caches w.r.t low power

design? Give techniques to overcome it.

Answer

10. Does software play any role in low power design?

Answer

1 Comments



1. How do you convert a XOR gate into a buffer and a inverter (Use only one

XOR gate for each)?

Answer

2. Implement an 2-input AND gate using a 2x1 mux.

Answer

3. What is a multiplexer?

Answer

4. What is a ring counter?

Answer

5. Compare and Contrast Synchronous and Asynchronous reset.

Answer

6. What is a Johnson counter?

Answer

7. An assembly line has 3 fail safe sensors and one emergency shutdown

switch.The line should keep moving unless any of the following conditions

arise:



(1) If the emergency switch is pressed

(2) If the senor1 and sensor2 are activated at the same time.

(3) If sensor 2 and sensor3 are activated at the same time.

(4) If all the sensors are activated at the same time

Suppose a combinational circuit for above case is to be implemented only

with NAND Gates. How many minimum number of 2 input NAND gates are

required?

Answer

8. In a 4-bit Johnson counter How many unused states are present?

Answer

9. Design a 3 input NAND gate using minimum number of 2 input NAND

gates.

Answer

10. How can you convert a JK flip-flop to a D flip-flop?

Answer

13 Comments



1. Why is the number of gate inputs to CMOS gates (e.g. NAND or NOR

gates)usually limited to four?

Answer

2. What are static and dynamic power dissipation w.r.t to CMOS gate?

Answer

3. Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes (a)

with increasing Vgs (b) considering Channel Length Modulation.

Answer

4. Which is fastest among the following technologies: CMOS, BiCMOS, TTL,

ECL?

Answer

5. What is a transmission gate, and what is its typical use in VLSI?

Answer

6. Draw the cross section of nMOS or pMOS.

Answer

7. What should be done to the size of a pMOS transistor inorder to increase

its threshold voltage?

Answer

8. Explain the various MOSFET Capacitances and their significance.

Answer

9. On what factors does the resistance of metal depend on?

Answer

10. Draw the layout a CMOS NAND gate.

Answer

1 Comments



1. Explain the voltage transfer characteristics of a CMOS Inverter.

Answer

2. What should be done to the size of a nMOS transistor in order to increase

its threshold voltage?

Answer



3. What are the advantages of CMOS technology?

Answer

4. Give the expression for CMOS switching power dissipation.

Answer

5. Why is static power dissipation very low in CMOS technology when

compared to others?

Answer

6. What is velocity saturation? What are its effects?

Answer

7. Why are pMOS transistor networks generally used to produce high signals,

while nMOS networks are used to product low signals?

Answer

8. Expand: DTL, RTL, ECL, TTL, CMOS, BiCMOS.

Answer

9. On IC schematics, transistors are usually labeled with two, or sometimes

one number(s). What do each of those numbers mean?

Answer

10. How do you calculate the delay in a CMOS circuit?

Answer

2 Comments



1. Explain the various MOSFET capacitance and give their significance.

Answer

2. What is the fundamental difference between a MOSFET and BJT ?

Answer

3. What is meant by scaling in VLSI design? Describe various effects of

scaling.

Answer

4. What is early effect?

Answer

5. Compare and contrast analog and digital design.

Answer

6. What are various types of the number notations? Explain them.

Answer

7. Why are most interrupts active low?

Answer

8. Which is better: synchronous reset or asynchronous reset signal?

Answer

9. What is meant by 90nm technology?

Answer

10. Compare enhancement and depletion mode devices.

Answer

0 Comments



1. What are the differences between a flip-flop and a latch?

Answer



2. What is the difference between Mealy and Moore FSM?

Answer

3. What are various types of state encoding techniques? Explain them.

Answer

4. Define Clock Skew , Negative Clock Skew, Positive Clock Skew.

Answer

5. Give the transistor level circuit of a CMOS NAND gate.

Answer

6. Design a 4-bit comparator circuit.

Answer

7. Design a Transmission Gate based XOR. Now, how do you convert it to

XNOR (without inverting the output)?

Answer

8. Define Metastability.

Answer

9. Compare and contrast between 1's complement and 2's complement

notation.

Answer

10. Give the transistor level circuit of CMOS, nMOS, pMOS, and TTL inverter

gate.

Answer

1 Comments


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