n301 von neumann architecture

CSCI N301:CSCI N301: Fundamental Computer Fundamental Computer Science ConceptsScience Concepts

Copyright Copyright ©2004 ©2004 Department of Computer & Information ScienceDepartment of Computer & Information Science

Von Neumann ArchitectureVon Neumann Architecture

N301: Fundamental Computer Science ConceptsN301: Fundamental Computer Science ConceptsCopyright Copyright ©2004 ©2004 Department of Computer & Information ScienceDepartment of Computer & Information Science

GoalsGoals

• Understand how the von Neumann Understand how the von Neumann architecture is constructed. architecture is constructed.

• Understand how the von Neumann Understand how the von Neumann architecture works.architecture works.

• Understand how to program in basic a Understand how to program in basic a assembly language.assembly language.


Where Are We?Where Are We?

• We have spent several weeks now, building our We have spent several weeks now, building our understanding of computer organization.understanding of computer organization.

• We started with transistors, moved up a level to We started with transistors, moved up a level to gates, and then up a level to circuits.gates, and then up a level to circuits.

• Our next step is a key one: we will combine Our next step is a key one: we will combine circuits together to build functional units of circuits together to build functional units of computer operation.computer operation.


Ladder of AbstractionLadder of Abstraction

• It is worth reminding ourselves how we got here:It is worth reminding ourselves how we got here:– Climbing up the ladder of abstraction, the process is Climbing up the ladder of abstraction, the process is

to take the functional units of one level, combine to take the functional units of one level, combine them, and move this combined unit to the next unit of them, and move this combined unit to the next unit of abstractionabstraction

– As we move to this new level, the level of sub-As we move to this new level, the level of sub-components, we need to remember that this level is components, we need to remember that this level is built from the components of previous levelsbuilt from the components of previous levels


Sub-ComponentsSub-Components

• At the onset, computers required hardware At the onset, computers required hardware changes to work on new problems; some changes to work on new problems; some historians say that this early stage of historians say that this early stage of “programming” was wiring.“programming” was wiring.

• Clearly, requiring hardware changes with each Clearly, requiring hardware changes with each new programming operation was time-new programming operation was time-consuming, error-prone, and costlyconsuming, error-prone, and costly

• If you recall from the movie If you recall from the movie The Machine That The Machine That Changed the WorldChanged the World, one of the key contributors , one of the key contributors to computer evolution was John von Neumannto computer evolution was John von Neumann


The Stored Program ConceptThe Stored Program Concept

• Von Neumann’s proposal was to store the program Von Neumann’s proposal was to store the program instructions right along with the datainstructions right along with the data

• This may sound trivial, but it represented a profound This may sound trivial, but it represented a profound paradigm shiftparadigm shift

• The stored program concept was proposed about fifty The stored program concept was proposed about fifty years ago; to this day, years ago; to this day, it is the it is the fundamentalfundamental architecture architecture that fuels computers.that fuels computers.

• Think about how amazing that is, given the short shelf Think about how amazing that is, given the short shelf life of computer products and technologies…life of computer products and technologies…


The Stored Program Concept and its The Stored Program Concept and its ImplicationsImplications

• The Stored Program concept had several The Stored Program concept had several technical ramifications:technical ramifications:– Four key sub-components operate together to make Four key sub-components operate together to make

the stored program concept workthe stored program concept work– The process that moves information through the sub-The process that moves information through the sub-

components is called the “fetch execute” cyclecomponents is called the “fetch execute” cycle– Unless otherwise indicated, program instructions are Unless otherwise indicated, program instructions are

executed in sequential orderexecuted in sequential order


Four Sub-ComponentsFour Sub-Components

• There are four sub-components in von Neumann There are four sub-components in von Neumann architecture:architecture:– MemoryMemory

– Input/Output (called “IO”)Input/Output (called “IO”)

– Arithmetic-Logic UnitArithmetic-Logic Unit

– Control UnitControl Unit

• While only 4 sub-components are called out, there is a 5While only 4 sub-components are called out, there is a 5 thth, , key player in this operation: a bus, or wire, that connects key player in this operation: a bus, or wire, that connects the components together and over which data flows from the components together and over which data flows from one sub-component to anotherone sub-component to another

• Let’s look at each sub-component in more detail …Let’s look at each sub-component in more detail …


MemoryMemory

• As you already know, there are several As you already know, there are several different flavors of memorydifferent flavors of memory

• Why isn’t just one kind used?Why isn’t just one kind used?

• Each type of memory represents Each type of memory represents cost/benefit tradeoffs between capability cost/benefit tradeoffs between capability and cost …and cost …


Memory Types: RAMMemory Types: RAM

• RAM is typically volatile memory (meaning it doesn’t RAM is typically volatile memory (meaning it doesn’t retain voltage settings once power is removed)retain voltage settings once power is removed)

• RAM is an array of cells, each with a unique addressRAM is an array of cells, each with a unique address• A cell is the minimum unit of access. Originally, this was A cell is the minimum unit of access. Originally, this was

8 bits taken together as a byte. In today’s computer, 8 bits taken together as a byte. In today’s computer, word-sized cells (16 bits, grouped in 4) are more typical.word-sized cells (16 bits, grouped in 4) are more typical.

• RAM gets its name from its access performance. In RAM RAM gets its name from its access performance. In RAM memory, theoretically, it would take the same amount of memory, theoretically, it would take the same amount of time to access any memory cell, regardless of its time to access any memory cell, regardless of its location with the memory bank (“random” access).location with the memory bank (“random” access).


Memory Types: ROMMemory Types: ROM

• It gets its name from its cell-protection feature. It gets its name from its cell-protection feature. This type of memory cell can be read from, but This type of memory cell can be read from, but not written to.not written to.

• Unlike RAM, ROM is non-volatile; it retains its Unlike RAM, ROM is non-volatile; it retains its settings after power is removed. settings after power is removed.

• ROM is more expensive than RAM, and to ROM is more expensive than RAM, and to protect this investment, you only store critical protect this investment, you only store critical information in ROM …information in ROM …


Memory Types: RegistersMemory Types: Registers

• There is a third, key type of memory in There is a third, key type of memory in every computer – registers.every computer – registers.

• Register cells are powerful, costly, and Register cells are powerful, costly, and physically located close to the heart of physically located close to the heart of computing.computing.

• We will see later that among the registers, We will see later that among the registers, several of them are the main participants several of them are the main participants in the fetch execute cycle.in the fetch execute cycle.


Memory Types: OtherMemory Types: Other

• Modern computers include other forms of Modern computers include other forms of memory, such as cache memory.memory, such as cache memory.

• Remember, memory types exist at different Remember, memory types exist at different trade offs.trade offs.

• The study of memory organizations and access The study of memory organizations and access schemes is an innovative one within Computer schemes is an innovative one within Computer Science. In your life time, you should expect to Science. In your life time, you should expect to see numerous innovations in memory types and see numerous innovations in memory types and capabilities.capabilities.


What’s Up with MemoryWhat’s Up with Memory

• Regardless of the type of memory, several concepts Regardless of the type of memory, several concepts apply in this key component.apply in this key component.

• Cell size or cell width: a key concept within memory is Cell size or cell width: a key concept within memory is how many individual memory cells (which we now know how many individual memory cells (which we now know are switches!) are addressed at a time.are switches!) are addressed at a time.

• At a minimum, this is a byte (8 bits) in today’s At a minimum, this is a byte (8 bits) in today’s computers, but to support all data types and operations, computers, but to support all data types and operations, cell size can be larger (a word, for instance, at 16 bits).cell size can be larger (a word, for instance, at 16 bits).



• Cell address and contents: another key concept Cell address and contents: another key concept is to recognize that all cells have an address, is to recognize that all cells have an address, and can contain data contents.and can contain data contents.

• The cell address is a label (like a zip code) that The cell address is a label (like a zip code) that identifies a particular cell.identifies a particular cell.

• The cell contents are whatever data is stored at The cell contents are whatever data is stored at a given address location.a given address location.



• Two other key concepts in the study of memory Two other key concepts in the study of memory are memory size and address space.are memory size and address space.

• Memory size refers to the number of Memory size refers to the number of addressable cells – how many different memory addressable cells – how many different memory locations a computer has.locations a computer has.

• Address space refers to the range of Address space refers to the range of addressable cell labels. Cell labels begin with addressable cell labels. Cell labels begin with the number 0. So, if you had a computer with 2the number 0. So, if you had a computer with 2nn memory size, its address space would be 2memory size, its address space would be 2nn -1. -1.



• Don’t forget that the memory labels are Don’t forget that the memory labels are themselves binary numbers!themselves binary numbers!

• One of the special registers we talked about One of the special registers we talked about earlier is a register whose job it is to hold earlier is a register whose job it is to hold address locations.address locations.

• Engineers need to know how big to make this Engineers need to know how big to make this register, so that it could hold the address of any register, so that it could hold the address of any given memory location, even the one with the given memory location, even the one with the biggest address.biggest address.



• The special register is called the MAR – the The special register is called the MAR – the machine address registermachine address register..

• For a machine with 2For a machine with 2nn address cells, the MAR address cells, the MAR must be able to hold a number 2must be able to hold a number 2nn - 1 big. - 1 big.


Memory OperationsMemory Operations

• Two basic operations occur within this Two basic operations occur within this subcomponent: a subcomponent: a fetch operationfetch operation, and a , and a storestore..

• The fetch operation:The fetch operation:– A cell address is loaded into the MAR.A cell address is loaded into the MAR.– The address is decoded, which means that thru The address is decoded, which means that thru

circuitry, a specific cell is located.circuitry, a specific cell is located.– The data contents contained within that cell is copied The data contents contained within that cell is copied

into another special register, called a into another special register, called a Machine Data Machine Data Register (MDR)Register (MDR)..

– Note that this operation is non-destructive – that is, Note that this operation is non-destructive – that is, the data contents are copied, but not destroyed.the data contents are copied, but not destroyed.


Memory OperationsMemory Operations

• The second memory operation is called a The second memory operation is called a storestore..– The fetch is like a read operation; the store is like a The fetch is like a read operation; the store is like a

write operationwrite operation– In the store, the address of the cell into which data is In the store, the address of the cell into which data is

going to be stored is moved to the MAR and decoded.going to be stored is moved to the MAR and decoded.– Contents from yet another special register, called an Contents from yet another special register, called an

accumulatoraccumulator, are copied into the cell location (held in , are copied into the cell location (held in the MAR).the MAR).

– This operation is destructive, meaning that whatever This operation is destructive, meaning that whatever data was originally contained at that memory location data was originally contained at that memory location is overwritten by the value copied from the is overwritten by the value copied from the accumulator.accumulator.


I/O: Input and OutputI/O: Input and Output

• There is both a human-machine interface and a There is both a human-machine interface and a machine-machine interface to I/O.machine-machine interface to I/O.– Examples of the human-machine interface include a keyboard, Examples of the human-machine interface include a keyboard,

screen or printer.screen or printer.– Examples of the machine-machine interface include things like Examples of the machine-machine interface include things like

mass storage and secondary storage devices.mass storage and secondary storage devices.

• Input and output devices are the least standardized of Input and output devices are the least standardized of the various sub-components, which means that you have the various sub-components, which means that you have to pay extra special attention to make certain that your to pay extra special attention to make certain that your input or output devices are compatible with your input or output devices are compatible with your machine.machine.


The ALUThe ALU

• The third component in the von Neumann The third component in the von Neumann architecture is called the Arithmetic Logic Unit.architecture is called the Arithmetic Logic Unit.

• This is the subcomponent that performs the This is the subcomponent that performs the arithmetic and logic operations for which we arithmetic and logic operations for which we have been building parts.have been building parts.

• The ALU is the “brain” of the computer.The ALU is the “brain” of the computer.


The ALUThe ALU

• It houses the special memory locations, called It houses the special memory locations, called registers, of which we have already considered.registers, of which we have already considered.

• The ALU is important enough that we will come The ALU is important enough that we will come back to it later, For now, just realize that it back to it later, For now, just realize that it contains the circuitry to perform addition, contains the circuitry to perform addition, subtraction,multiplication and division, as well as subtraction,multiplication and division, as well as logical comparisons (less than, equal to and logical comparisons (less than, equal to and greater than).greater than).


Control UnitControl Unit

• The last of the four subcomponents is the Control Unit.The last of the four subcomponents is the Control Unit.• The control unit is the work horse that drives the fetch The control unit is the work horse that drives the fetch

and execute cycle.and execute cycle.• Remember we said that in memory, a cell address is Remember we said that in memory, a cell address is

loaded into the MAR – it is the control unit that figures loaded into the MAR – it is the control unit that figures out which address is loaded, and what operation is to be out which address is loaded, and what operation is to be performed with the data moved to the MDR.performed with the data moved to the MDR.

• We will come back and look in detail at how the Control We will come back and look in detail at how the Control Unit performs this task.Unit performs this task.


Stored Program ConceptStored Program Concept

• We saw that it was von Neumann’s We saw that it was von Neumann’s organizational scheme that was adopted in organizational scheme that was adopted in computer architecture. computer architecture.

• This architecture was largely driven by the This architecture was largely driven by the decision to store program code along with data.decision to store program code along with data.

• Once this decision was made, several by-Once this decision was made, several by-product engineering requirements emerged.product engineering requirements emerged.


Engineering NeedsEngineering Needs

• We indicated that for cost/benefit reasons, data and We indicated that for cost/benefit reasons, data and program instructions are translated into binary form and program instructions are translated into binary form and stored in RAM.stored in RAM.

• As the information is needed, it is moved to the high As the information is needed, it is moved to the high speed, costlier registers where it is processed.speed, costlier registers where it is processed.

• This process occurs in a cycle: fetch information to the This process occurs in a cycle: fetch information to the registers, and execute it there, fetch the next information registers, and execute it there, fetch the next information from the registers, and execute it, etc.from the registers, and execute it, etc.

• The cycle is referred to as the “fetch execute” cycle.The cycle is referred to as the “fetch execute” cycle.


Engineering NeedsEngineering Needs

• Once we know on which data we should be working, we know how Once we know on which data we should be working, we know how to build circuitry to perform processing operations. (We can add, to build circuitry to perform processing operations. (We can add, subtract, divide and compare).subtract, divide and compare).

• One of the things we glossed over in our first discussion, however, One of the things we glossed over in our first discussion, however, is how we figure out what data to be working on, and exactly which is how we figure out what data to be working on, and exactly which operation to performoperation to perform

• Specifically, this is what we need to be able to do:Specifically, this is what we need to be able to do:– Build a circuit that will allow us to take whatever number is in the Build a circuit that will allow us to take whatever number is in the

MAR, and use this number to access a specific memory cell.MAR, and use this number to access a specific memory cell.– Build a circuit that will allow us to choose which data results Build a circuit that will allow us to choose which data results

should be placed in the MDR.should be placed in the MDR.

• This magic happens in the Control UnitThis magic happens in the Control Unit


Choosing a Memory LocationChoosing a Memory Location

• Let’s tackle the initial requirement first: how do we Let’s tackle the initial requirement first: how do we determine which address location holds the data on determine which address location holds the data on which we need to operate.which we need to operate.

• Remember we said that there is a special register, Remember we said that there is a special register, called the MAR that holds an address -- a binary called the MAR that holds an address -- a binary number.number.

• We need some circuitry to read that number, and We need some circuitry to read that number, and based on its value, find exactly the correct address based on its value, find exactly the correct address location to read.location to read.

• The circuit is called a decoder …The circuit is called a decoder …


Decoder CircuitsDecoder Circuits

• The MAR is connected to a decoder The MAR is connected to a decoder circuit.circuit.

• This circuitry will identify the correct This circuitry will identify the correct memory cell.memory cell.

• Let’s figure out how this works …Let’s figure out how this works …


Decoder CircuitsDecoder Circuits

• Initially, think about the decoder circuit as Initially, think about the decoder circuit as a black box.a black box.

• Going into the black box are N input lines, Going into the black box are N input lines, (which emerge from the MAR).(which emerge from the MAR).

• Going out of the black box are 2Going out of the black box are 2n n output output lines (with each output line connecting to a lines (with each output line connecting to a specific memory cell in RAM).specific memory cell in RAM).


Decoder Circuit: An ExampleDecoder Circuit: An Example

• Let’s start small: imagine a computer with Let’s start small: imagine a computer with 4 memory cells in RAM, where our formula 4 memory cells in RAM, where our formula now is: 2now is: 2nn, thus n = 2 so that 2, thus n = 2 so that 2nn=4.=4.

• The MAR will need to be N cells big, and The MAR will need to be N cells big, and the biggest number it would have to hold is the biggest number it would have to hold is the address range, 2the address range, 2nn-1=3.-1=3.

• Let’s build the decoder circuit …Let’s build the decoder circuit …


First, the Problem StatementFirst, the Problem Statement

• Design a circuit with 2 input lines (a, b) Design a circuit with 2 input lines (a, b) and 4 output lines (dand 4 output lines (d00,d,d11,d,d22,d,d33))

• The output lines are uniquely high if and The output lines are uniquely high if and only if the following conditions are met:only if the following conditions are met:– dd0 0 is high IFF both inputs are lowis high IFF both inputs are low

– dd11 is high IFF a is low and b is high is high IFF a is low and b is high

– dd22 is high IFF a is high and b is low is high IFF a is high and b is low

– dd33 is high IFF both a and b are high is high IFF both a and b are high


Next, the Truth TableNext, the Truth Table

INPUT LINESINPUT LINES OUPUT LINESOUPUT LINES

aa bb dd00 dd11 dd22 dd33

00 00 11 00 00 00

00 11 00 11 00 00

11 00 00 00 11 00

11 11 00 00 00 11


Next, the Boolean Sub-ExpressionsNext, the Boolean Sub-Expressions

• For those places in our output chart with For those places in our output chart with high values (1’s), we have the following high values (1’s), we have the following a,b input conditions:a,b input conditions:– dd00 = ~a * ~b = ~a * ~b

– dd11 = ~a * b = ~a * b

– dd22 = a * ~b = a * ~b

– dd33 = a * b = a * b


Circuit Diagram – Decoder Circuit Circuit Diagram – Decoder Circuit

aaaa bbbb

dd00dd00

dd11dd11

dd22dd22

dd33dd33

To

the M

DR

To

the M

DR

To

the M

DR

To

the M

DR

MARMARMARMAR


Decoder Circuit ExampleDecoder Circuit Example

• Assume the contents of the MAR are 01.Assume the contents of the MAR are 01.• Which line would fire? Which line would fire?

– Remember the Boolean expression:Remember the Boolean expression:(~a (~a • b)• b)

• This would cause the d1 line to fire, which in turn This would cause the d1 line to fire, which in turn is connected to the d1 memory location.is connected to the d1 memory location.

• The d1 memory location is read non-The d1 memory location is read non-destructively, and a copy of its contents (let’s destructively, and a copy of its contents (let’s assume the contents equal 61), is copied to the assume the contents equal 61), is copied to the MDR.MDR.


Circuit Diagram – Decoder Circuit Circuit Diagram – Decoder Circuit

aaaa bbbb

dd00dd00

dd11dd11

dd22dd22

dd33dd33

6161 6161

MARMARMARMAR


4 * 16 decoder4 * 16 decoder


Scaling IssueScaling Issue

• We have built a viable decoder circuit, and illustrated We have built a viable decoder circuit, and illustrated how this control circuit could perform in translating how this control circuit could perform in translating between the address label contained in the MAR and between the address label contained in the MAR and obtaining contents of the referenced location.obtaining contents of the referenced location.

• At some point, however, the model isn’t scaleable – too At some point, however, the model isn’t scaleable – too much space required for a linear layout.much space required for a linear layout.

• Computers utilize a 2-dimensional approach in decoder Computers utilize a 2-dimensional approach in decoder operation, using a row/column MAR addressing scheme operation, using a row/column MAR addressing scheme to identify specific address locations.to identify specific address locations.

• A 2-D grid is illustrated on the next slide …A 2-D grid is illustrated on the next slide …


2-D Memory 2-D Memory AccessAccess


2-D Memory Operation2-D Memory Operation


One Problem SolvedOne Problem Solved

• Well, we have figured out how to use Well, we have figured out how to use circuitry to decode the contents of the circuitry to decode the contents of the MAR to identify a specific memory MAR to identify a specific memory location.location.

• We still need to figure out how to interpret We still need to figure out how to interpret the results of the ALU circuitry to load a the results of the ALU circuitry to load a correct process answer into the MDR.correct process answer into the MDR.


Multiplexor CircuitsMultiplexor Circuits

• Remember, we said that the ALU actually Remember, we said that the ALU actually performs all operational processing on 2 given performs all operational processing on 2 given inputs. inputs.

• Thus, if the inputs are 4 and 2, calculations for 4 Thus, if the inputs are 4 and 2, calculations for 4 + 2, 4 * 2, 4-2, 4 >= 2, etc. are all performed in + 2, 4 * 2, 4-2, 4 >= 2, etc. are all performed in parallel.parallel.

• What we need to be able to do is to select the What we need to be able to do is to select the correct answer from among all those calculated.correct answer from among all those calculated.


Multiplexor CircuitsMultiplexor Circuits

• A multiplexor is a circuit with 2A multiplexor is a circuit with 2nn input lines input lines and 1 output line.and 1 output line.

• The function is serves is to select exactly The function is serves is to select exactly one of its input lines and copy the binary one of its input lines and copy the binary value on that input line to its single output value on that input line to its single output line.line.


Multiplexor MagicMultiplexor Magic

• The multiplexor chooses the correct input line to pass thru to The multiplexor chooses the correct input line to pass thru to the output line by using a second set of N lines called selector the output line by using a second set of N lines called selector lines.lines.

• So, the total number of input lines in a multiplexor are 2So, the total number of input lines in a multiplexor are 2n n + N.+ N.

• The first set of input lines are numbered from 0 to 2The first set of input lines are numbered from 0 to 2nn-1, while -1, while the selector lines are numbered from 0 to N, such that there is the selector lines are numbered from 0 to N, such that there is exactly one selector line for each input line.exactly one selector line for each input line.

• Each selector line can be set to either a 1 or a 0.Each selector line can be set to either a 1 or a 0.

• Thus, the binary number that appears on the selector lines Thus, the binary number that appears on the selector lines can be interpreted as the identification number of the input can be interpreted as the identification number of the input line to be passed thru.line to be passed thru.


Multiplexor CircuitMultiplexor Circuit


Where We’ve BeenWhere We’ve Been

• We have been touring the von Neumann We have been touring the von Neumann architecture of 4 sub-components.architecture of 4 sub-components.

• We have figured out how to build the appropriate We have figured out how to build the appropriate circuitry to perform arithmetic and logic circuitry to perform arithmetic and logic operations on the data contained at specific operations on the data contained at specific memory locations.memory locations.

• What we don’t know how to do is to figure out What we don’t know how to do is to figure out which arithmetic or logic operations need to be which arithmetic or logic operations need to be performed and in what order.performed and in what order.


The Control UnitThe Control Unit

• The mastermind behind these final pieces of our The mastermind behind these final pieces of our operational model is the Control Unitoperational model is the Control Unit

• It is the Control Unit that fuels the stored It is the Control Unit that fuels the stored program conceptprogram concept

• To do its job, the Control Unit has several toolsTo do its job, the Control Unit has several tools– Special memory registersSpecial memory registers– ““Wired” understanding of an Instruction SetWired” understanding of an Instruction Set


ToolsetToolset

• Let’s look at the toolset first, and then how it is Let’s look at the toolset first, and then how it is deployeddeployed

• Special Memory RegistersSpecial Memory Registers– The Control Unit must keep track of where it is within The Control Unit must keep track of where it is within

a program, and what it should do nexta program, and what it should do next– Two special registers are used to accomplish this:Two special registers are used to accomplish this:

• A program counter, typically referred to as a PC, holds the A program counter, typically referred to as a PC, holds the address of the NEXT instruction to be executedaddress of the NEXT instruction to be executed

• An instruction register, typically referred to as an IR, holds an An instruction register, typically referred to as an IR, holds an instruction fetched from memoryinstruction fetched from memory


Toolset (Two)Toolset (Two)

• Along with the special registers, the Along with the special registers, the Control Unit utilizes special circuitry, called Control Unit utilizes special circuitry, called an instruction decoderan instruction decoder

• The instruction decoder is a typical The instruction decoder is a typical decoder circuit, and its purpose is to read decoder circuit, and its purpose is to read an instruction from the IR, and activate the an instruction from the IR, and activate the appropriate circuit lineappropriate circuit line


How this WorksHow this Works

• Remember, we are trying to figure out how Remember, we are trying to figure out how the stored program concept works.the stored program concept works.

• In this model, the program and the data In this model, the program and the data upon which it operates are stored in upon which it operates are stored in memory locations.memory locations.

• We know how to encode the data.We know how to encode the data.• We need to learn how to encode the We need to learn how to encode the

programming instructions.programming instructions.


The Instruction SetThe Instruction Set

• At the heart of all programming are a few, At the heart of all programming are a few, building block instructions.building block instructions.

• The set of instructions is remarkably small, and The set of instructions is remarkably small, and particular to a given processor.particular to a given processor.

• The power of the instruction set is that by The power of the instruction set is that by identifying a definite, bounded, simple task, an identifying a definite, bounded, simple task, an instruction can be executed with appreciable instruction can be executed with appreciable speed – typically within a few billionths of a speed – typically within a few billionths of a second.second.


In Binary (Of Course!)In Binary (Of Course!)

• The instruction set is something like the The instruction set is something like the ASCII alphabet encoding scheme.ASCII alphabet encoding scheme.

• The specific instructions are given unique The specific instructions are given unique binary codes.binary codes.

• Obviously, the IR must be big enough to Obviously, the IR must be big enough to hold any instruction within the numbered hold any instruction within the numbered set.set.


Sample InstructionsSample Instructions

• Instructions fall into several main categories: data transfer, Instructions fall into several main categories: data transfer, arithmetic, comparisons, and branchingarithmetic, comparisons, and branching

• Some typical instructions might include:Some typical instructions might include:– LoadLoad– StorehStoreh– MoveMove– AddAdd– CompareCompare– BranchBranch– HaltHalt

• Each of these instructions would be given a unique code, such as Each of these instructions would be given a unique code, such as 000, 001, 010, etc.000, 001, 010, etc.


Sample Instruction FormatSample Instruction Format

• The format of a typical instruction is in The format of a typical instruction is in machine code, and looks something like machine code, and looks something like this:this:

Operation Operation CodeCode

Address Address Field 1Field 1

Address Address Field 2Field 2

Etc.Etc.


Interpreting an InstructionInterpreting an Instruction

• Imagine a machine with an instruction set Imagine a machine with an instruction set of 8 individual instructions, numbered from of 8 individual instructions, numbered from 000 to 111.000 to 111.

• Our IR would need to be 3 bits big.Our IR would need to be 3 bits big.

• More realistically, a modern pc today is More realistically, a modern pc today is likely to have 30-50 instructions,but we will likely to have 30-50 instructions,but we will keep our model simple.keep our model simple.


Typical InstructionsTypical Instructions

• Imagine the following instructionImagine the following instruction– 100 01010 10011100 01010 10011

• Let’s say the 100 means to perform an ADD operation.Let’s say the 100 means to perform an ADD operation.• The 01010 would refer to the address location of the first The 01010 would refer to the address location of the first

data element to be added.data element to be added.• The 10011 would refer to the address location of the The 10011 would refer to the address location of the

second data element to be added.second data element to be added.• So… this instruction would mean: Add the contents of So… this instruction would mean: Add the contents of

address location 01010 to 10011.address location 01010 to 10011.


Following the Fetch Execute CycleFollowing the Fetch Execute Cycle

• Let’s trace an execution cycleLet’s trace an execution cycle• To make the trace more manageable, we will To make the trace more manageable, we will

manipulate instructions whose format has the manipulate instructions whose format has the instruction itself in abbreviated words instead of instruction itself in abbreviated words instead of binary codesbinary codes

• Remember, though, that the instruction set Remember, though, that the instruction set entries are really encoded into binary format just entries are really encoded into binary format just like everything else!like everything else!


Fetch, Decode, ExecuteFetch, Decode, Execute

• Imagine that you have written a computer Imagine that you have written a computer program that has been translated into a set of program that has been translated into a set of machine language instructions and placed into machine language instructions and placed into memorymemory

• Each instruction will pass through three phases: Each instruction will pass through three phases: fetch, decode and executefetch, decode and execute

• These 3 steps will be repeated, over and over These 3 steps will be repeated, over and over for every instruction until a HALT instruction is for every instruction until a HALT instruction is reached (or a fatal error occurs)reached (or a fatal error occurs)

• Let’s step through the cycleLet’s step through the cycle


Phase One: FetchPhase One: Fetch

• The Control Unit gets the next instruction from The Control Unit gets the next instruction from memory and moves it into the Instruction Register memory and moves it into the Instruction Register (IR)(IR)

• This is accomplished by the following steps:This is accomplished by the following steps:– The address in the Program Counter (PC) is moved to The address in the Program Counter (PC) is moved to

the MARthe MAR– A fetch is initiated, which brings the contents of the cell A fetch is initiated, which brings the contents of the cell

referenced by the PC to the MDRreferenced by the PC to the MDR– Move the instruction from the MDR to the Instruction Move the instruction from the MDR to the Instruction

Register (IR) for decodingRegister (IR) for decoding– Increment the PC to point to the next instructionIncrement the PC to point to the next instruction


Phase Two: DecodePhase Two: Decode

• The operation code portion of the contents The operation code portion of the contents of the instruction register is read from the of the instruction register is read from the IRIR

• The binary number is fed to a decoder The binary number is fed to a decoder circuit, which activates the appropriate circuit, which activates the appropriate circuitry for the operationcircuitry for the operation


Phase Three: Execution PhasePhase Three: Execution Phase

• Once the decoder identifies what operational circuitry should be Once the decoder identifies what operational circuitry should be activated, the particular instruction set member is executedactivated, the particular instruction set member is executed

• Here is a typical series of steps carried out to perform a LOAD Here is a typical series of steps carried out to perform a LOAD operation (which moves contents from main memory to a register)operation (which moves contents from main memory to a register)– Send the address held in the IR to the MARSend the address held in the IR to the MAR– Fetch the contents of the cell whose address is now in the MAR Fetch the contents of the cell whose address is now in the MAR

and place the contents into the MDRand place the contents into the MDR– Copy the contents of the MDR into some designated registerCopy the contents of the MDR into some designated register

• Obviously, each instruction set member will require a unique series Obviously, each instruction set member will require a unique series of steps to be carried outof steps to be carried out


Completing a ProgramCompleting a Program

• When one instruction has been executed, the When one instruction has been executed, the fetch execute cycle moves to the next addressfetch execute cycle moves to the next address

• It can do this because the PC was incremented It can do this because the PC was incremented to reflect the address location of the next to reflect the address location of the next executable addressexecutable address

• In this way, a series of machine level instructions In this way, a series of machine level instructions can be executed, one at a timecan be executed, one at a time


Why Not Quit Here?Why Not Quit Here?

• We could, actuallyWe could, actually

• The process we just outlined is a fairly The process we just outlined is a fairly accurate description of how early accurate description of how early programming occurredprogramming occurred

• Programmers wrote lines of code that Programmers wrote lines of code that looked something like this:looked something like this:– 010 11001101 01010111010 11001101 01010111


Too Error ProneToo Error Prone

• As you can imagine, writing computer programs As you can imagine, writing computer programs in machine language was time-consuming and in machine language was time-consuming and error proneerror prone

• The short cut that we took in our example – The short cut that we took in our example – substituting English like abbreviations for the substituting English like abbreviations for the operation codes – was soon adopted by operation codes – was soon adopted by computer programmers, and the era of assembly computer programmers, and the era of assembly language coding was ushered inlanguage coding was ushered in

• We will look at this next level of abstraction in We will look at this next level of abstraction in our next lectureour next lecture


Questions?Questions?

n301 von neumann architecture

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