mvjce ece 6 sem

Upload: suresh-akkole

Post on 04-Apr-2018

232 views

Category:

Documents


0 download

TRANSCRIPT

  • 7/30/2019 Mvjce Ece 6 Sem

    1/51

  • 7/30/2019 Mvjce Ece 6 Sem

    2/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 2 MVJCE

    06EC-61 DIGITAL COMMUNICATION

  • 7/30/2019 Mvjce Ece 6 Sem

    3/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 3 MVJCE

    SYLLABUS

    Sub Code : 06EC61 I A Marks: 25Hours / Week: 4 Exam Marks: 100Total Hours: 52 Exam Hours: 03

    PART AUNIT1

    Introduction: Review of basics of probability, spectrum of elementary signals convolution, Signalsand their sources, basic signal processing operations in digitalcommunication. Sampling Principles:Sampling Theorem, quadrature sampling of Band pass signal, reconstruction of a messagefrom itssamples, signal distortion in sampling. ` 07 Hrs

    UNIT2Practical aspects of sampling and signal recovery . PAM, TDM, Waveform Coding Techniques,

    PCM, Channel noise and error probability. Quantization noise and SNR,robust quantization. 07 Hrs

    UNIT3DPCM, DM, coding speech at low bit rates, applications. Base-Band Shaping for DataTransmission, Discrete PAM signals, power spectra of discrete PAM signals. 06 Hrs

    UNIT4ISI, Nyquists criterion for distortion less base-band binary transmission, correlative coding , eyepattern, base-band M-ary PAM systems, adaptivc equalization for data transmission. 06 Hrs

    PART BUNIT 5

    Digital Modulation Techniques: Digital Modulation formats, Coherent binary modulation

    techniques, Coherent quadrature modulation techniques. Non-coherent binary modulationtechniques, Comparison of Binary and Quarternary Modulation techniques. Mary ModulationTechniques. 07 Hrs

    UNIT 6Effect of ISI, Bit versus Symbol error probability, detection and estimation, Gram- SchmidtOrthogonalization procedure, geometric interpretation of signals, response of bank of correlators tonoisy input. 06Hrs

    UNIT 7Detection of known signals in noise, probability of error, correlation receiver, matched filterreceiver, detection of signals with unknown phase in noise, estimation: concept and criteria,maximum likelihood estimation. 06 Hrs

    UNIT 8

    Spread Spectrum Modulation: Pseudo noisesequences, notion of spread spectrum, directsequence spread coherent binary PSK, signalspace dimensionality and processing gain, frequencyhop spread spectrum, applications 07 Hrs

    Text Book:1. Simon Haykin, Digital communications, JohnWiley,2003.

    ReferenceBooks:1.K.Sam Shanmugam, Digital and analog communication systems, John Wiley, 1996.2.Simon Haykin, An introduction to Analog and Digital Communication, John Wiley, 2003

  • 7/30/2019 Mvjce Ece 6 Sem

    4/51

  • 7/30/2019 Mvjce Ece 6 Sem

    5/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 5 MVJCE

    34 Coherent quadrature modulation techniques

    35 Quadrature QPSK

    36 Non-coherent binary modulation techniques: ASK,FSK

    37 DPSK

    38 Problems

    Unit 639 Detection and estimation of signals

    40 Model of DCS

    41 Gram-Schmidt Orthogonalization procedure

    42 Geometric interpretation of signals

    43 Response of bank of correlators to noisy input

    44 Problems

    45 Problems

    Unit 746 Detection of known signals in noise

    47 Correlation receiver

    48 Matched filter receiver: o/p signal to noise ratio of matched filter

    49 Properties of matched filters

    50 Detection of signals with unknown phase in noise

    51 Problems

    52 Revision& problems

    Unit 8 :Spread Spectrum Modulation

    53 Spread Spectrum Modulation

    54 Properties of ML Sequence55 Pseudo noise sequences

    56 Notion of spread spectrum

    57 Direct sequence spread spectrum

    58 Coherent binary PSK

    59 Frequency hop spread spectrum,

    60 Applications : CDMA,

    61 Multipath suppression Range detection using DSSP

    62 Problems, Revision

    TEXT BOOK:

    1. Digital communications, Simon Haykin, John Wiley, 2003.REFERENCE BOOKS:

    1. Digital and analog communication systems & An introduction to Analog and DigitalCommunication, K. Sam Shanmugam, John Wiley, 1996. 2.Simon Haykin, John Wiley,

    2003Digital communications - Bernard Sklar: Pearson education 2007

  • 7/30/2019 Mvjce Ece 6 Sem

    6/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 6 MVJCE

    QUESTION BANK

    01 a. Explain the essential and non-essential features of a digital communication system

    b. State and prove Sampling theorem for low pass signalsc. Explain TDM system with neat block diagram.

    02 a. Derive an expression for signal to quantization noise power ratio in a PCM systemb. With neat block diagram explain Differential pulse code modulation.c. Prove that each bit in the code word of a PCM system contributes 6 dB to the signal to

    noise ratio03 a. What is Inter symbol Interference and Explain the ideal solution for ISI?

    b. Explain with neat Block diagram Delta Modulation systemsc. A Delta modulation system is designed to operate at 5 times the Nyquist rate for a

    signal with a 3-Khz Bandwidth. The Quantizing step size is 250 mi. Determine the maximum amplitude of a 1-KHZ input sinusoid for which the

    delta modulator does not show slope overload.

    ii. Determine the post-filtered output SNR for the signal of Part (i)04 a. Explain the desirable propertied of line code

    b. What is an Equalizer? Explain an adaptive equalizer?c. Design a binary base band PAM system to transmit data at a rate of 3600 bits/sec

    with a bit error probability less than 10 4. The channel response is given byHc(f) = 10 2 for |f| < 24000 else where

    The noise power spectral density is Gn (f) = 10 4 Watt/HZ05 a. The data stream 001101001 is applied to the input of a duo binary system. Construct

    the duo binary encoder output and corresponding receiver output, without a precoderb. Briefly explain the application of Digital modulation techniquesc. Explain coherent binary PSK with block diagrams of transmitter and receiver

    06 a. Explain QPSK transmitter and receiver with neat block diagramsb. Briefly explain the properties of matched filterc. A bipolar signal S(t) is a +1 V or 1 V pulse during the interval (0,T). Additive white

    Guassian noise of n/2 = 10 5 W/HZ is added to the signal. Determine the maximumbit rate that can a be sent with Pe

  • 7/30/2019 Mvjce Ece 6 Sem

    7/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 7 MVJCE

    06EC-62: MICROPROCESSOR

  • 7/30/2019 Mvjce Ece 6 Sem

    8/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 8 MVJCE

    SYLLABUS

    Sub Code: 06EC62 I A Marks: 25Hours / Week: 05 Exam Hours: 03Total Hours: 52 Exam Marks: 100

    PART AUNIT 1

    The 8086/8088 Processors: A historical background, The microprocessor-based personalcomputer system. Register organization of 8086, Architecture, Signal Description of 8086, Physicalmemory organization, General Bus operation, I/O Addressing Capability, Special ProcessorActivities. 06 Hrs

    UNIT 2Minimum Mode 8086 System and Timing, Maximum Mode 8086 System and Timing, The 8088

    processor. 8086/8088 Instruction Set And Assembler Directives, Machine Language InstructionFormats, Addressing Modes of 8086. 06Hrs

    UNIT 3Instruction set of 8086, Assembler Directives and Operators. The Art of Assembly LanguageProgramming With 8086/8088: Few Machine Level Programs,Machine Coding the Programs. 07 Hrs

    UNIT 4Programming With an Assembler, Assembly Language Example Programs. 07 Hrs

    PART BUNIT 5

    Modular Programming, Data Conversion and Interrupts: Modular programming, Using the keyboard

    and video display, data conversions. Basic interrupts processing,Hardware Interrupts 06 Hrs

    UNIT 6Expanding the interrupt structure, Interrupt examples, Arithmetic Coprocessor (8087),Data formats for the arithmetic coprocessor, The 80X87 architecture. 06 Hrs

    UNIT 7Instruction set, Programming with the arithmetic coprocessor. Bus Interface, The80386, 80486 And Pentium Processors, The peripheral component interconnect (PCI) bus, theparallel printer interface (LTP), The universal serial bus (USB). 06 Hrs

    UNIT 8

    Introduction to the 80386 microprocessor, Special 80386 registers, Introduction to the80486 microprocessor, Introduction to the Pentium microprocessor. 08 Hrs

    Textbooks:1. The intel microprocessor, architecture, programming and interfacing-Barry B. Brey,6e, Pearson education / PHI, 2003

    Reference books:1.Microprocessor and interfacingprogramming & hardware, Douglas Hall, 2e TMH, 19912.Microcomputer systems-The 8086 / 8088 family Y.C. Liu and G. A. Gibson, 2E PH 2003

  • 7/30/2019 Mvjce Ece 6 Sem

    9/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 9 MVJCE

    LESSON PLAN

    Class: VI semester Subject code: 06EC62

    Subject: MICROPROCESSORHours Topics to be covered

    Part A

    UNIT 1: 8086 PROCESSORS

    1 Introduction, Historical background,

    2 The microprocessor based personal computer system,

    3 8086 CPU Architecture,

    4 8086 CPU Architecture,

    5 Machine language instructions,

    6 Machine language instructions,

    7 Instruction execution timing,

    8 Instruction execution timing,

    9 The 8086.

    UNIT 2:INSTRUCTION SET OF 8086

    10 Instruction set of 8086:Assembler instruction format,

    11 Data transfer, Arithmetic, Branch type

    12 Data transfer, Arithmetic, Branch type

    13 Loop, NOP & HALT,

    14 Flag manipulation, logical and shift and rotate instructions

    15 Illustration of these instructions with example programs,

    16 Illustration of these instructions with example programs

    17 Directives and operatorsUNIT 3:BYTE AND STRING MANIPULATION:

    18 Byte and String Manipulation:String instructions,

    19 String instructions,

    20 REP Prefix, Table translation

    21 Number format conversions

    22 Procedures

    23 Macros

    24 Programming using keyboard and video display

    UNIT 4:8086 INTERRUPTS:

    25 8086 Interrupts:8086 Interrupt responses26 8086 Interrupt responses

    27 Hardware interrupt

    28 Applications,

    29 Software interrupts

    30 Applications.

    31 Interrupt examples

    PART - B

    UNIT 5: 8086 INTERFACING:

    32 8086 Interfacing:Interfacing microprocessor to keyboard

  • 7/30/2019 Mvjce Ece 6 Sem

    10/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 10 MVJCE

    Hours Topics to be covered

    33 Interfacing microprocessor to keyboard

    34 Keyboard types, keyboard circuit connections and interfacing,

    35 Software keyboard interfacing,

    36 Keyboard interfacing with hardware

    37Interfacing to alphanumeric displays (interfacing LED displays tomicrocomputer

    38 Interfacing a microcomputer to a stepper motor

    UNIT 6: 8086 BASED MULTIPROCESSING SYSTEMS:

    39 8086-based Multiprocessing Systems:Coprocessor configurations

    40 Coprocessor configurations

    41 The 8087 numeric data processor: data types

    42 data types

    43 Processor architecture,44 Instruction set

    45 Examples.

    UNIT 7: SYSTEM BUS STRUCTURE:

    46 System Bus Structure:Basic 8086 configurations:

    47 Minimum mode,

    48 Maximum mode

    49 Bus Interface

    50 Peripheral component interconnect (PCI) bus

    51 Peripheral component interconnect (PCI) bus

    52 The parallel printer interface (LTP),

    53 The universal serial bus (USB).

    UNIT 8: 80386, 80486 AND PENTIUM PROCESSORS

    54 80386, 80486 And Pentium Processors:

    55 Introduction to the 80386 microprocessor,

    56 Special 80386 registers,

    57 Introduction to the 80486 microprocessor

    58 Introduction to the 80486 microprocessor

    59 Registers,

    60 Introduction to the Pentium microprocessor

    61 Introduction to the Pentium microprocessor

    62 Registers,TEXT BOOKS:1. Microcomputer systems-The 8086 / 8088 Family Y.C. Liu and G. A. Gibson, 2E PHI -20032. The Intel Microprocessor, Architecture, Programming and Interfacing- Barry B. Brey, 6e,Pearson Education / PHI, 2003REFERENCE BOOKS:1. Microprocessor and Interfacing- Programming & Hardware, Douglas hall, 2e TMH, 19912. Advanced Microprocessors and Peripherals - A.K. Ray and K.M. Bhurchandi, TMH, 20013. 8088 and 8086 Microprocessors - Programming, Interfacing, Software, Hardware & Applications- Triebel and Avtar Singh, 4e, Pearson Education, 2003

  • 7/30/2019 Mvjce Ece 6 Sem

    11/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 11 MVJCE

    QUESTION BANK

    01 a. Explain the internal architecture of 8086 Microprocessor

    b. Explain the flag register format in detailc. What are the advantages of memory segmentation? Explain how the physical address

    is generated02 a. Explain primitive string instructions available in 8086

    b. Explain the following instructions (i) LEA (ii) PUSH (iii) NEGc. Write an assembly language program to reverse a given string stored in memory

    03 a. Write short notes on intrasegment and intersegment addressingb. Explain with examples the near and far call and return instructionsc. Write an ALP to merge two arrays having ten elements each. Assume arrays are in

    ascending order04 a. How printer and processor communicate using INTR interrupt

    b. Determine from which memory address Interrupt Service Subroutine address, when

    INT21H is executedc. How does main processor knows Co- processor is busy. Which processor fetches the

    instruction from memoryd. What are macros? How it differs from a subroutine explain with an example

    05 a. Write an 8086 ALP using assembler directives for BCD to Binary Conversion. InputBCD number from key board and display the Binary Number on VDU/CRT

    b. With a block diagram explain how odd and even memory banks are connected to theMicroprocessor

    c. Give the formats of status and control registers in the configuration memory06 a. Give the control pins that are used when 8086 operates in maximum mode and its

    functionsb. Sketch the block diagram showing basic 8086 minimum mode systems. Explain

    function of 8282 latches and 8286 transceiverc. Explain the functions of following pins in 8086

    i) NMI ii) TEST iii) BHE iv) DT/R v) DEN vi) QSo QS107 a. Describe 80386 flag register with significance of each and every bit in detail. How

    does it differs from 8086b. Explain the addressing modes with supported by 80386c. Draw and explain the architecture of 80486

    08 Write a short notes on any four:Micro processor based personal computer systemThe universal serial bus (USB)Clock Generator (8284A)Pentium Microprocessor

    Arithmetic Co processor09 a. How memory is organized. How a word can be accessed if it is stored in: Even

    address Boundary, Odd address Boundaryb. Explain Intra and Inter segment addressingc. Specify the different instruction format with examples

  • 7/30/2019 Mvjce Ece 6 Sem

    12/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 12 MVJCE

    10 a. Explain the following instructions: XCHG, TEST, LOOPZ, SARb. Write an ALP to find a square of a given no: using look up table

    c. What are assembler directives? Explain the following directives: DW, EQU, Macro-ENDM

    11 a. How instructions are classified? Explain in detail selective based index addressingb. Write an assembly language program to find the average of 10 data words stored in

    the memoryc. Explain with an example the multiply and divide instructions

    12 a. What is interrupt vector table? What are the physical address and the length ofinterrupt byte?

    b. What are dedicated and resourced interruptsc. What is priority? Explain which interrupt has highest priority in 8086d. Explain the internal architecture of 8087

    13 a. Explain the HOLD response sequence in the minimum mode of 8086 with the help of

    timing diagramb. Explain how 8086 and 8087 co-operatre in executing an instruction. Show how they

    are connectedc. Explain 8087 data types

    14 a. Explain the features of PCI Bus. Describe PCI Bus Structureb. Give the details of the USB connector with the help of diagramc. What is dynamic bus sizing in 80386?. What is the hardware support required? Show

    the scheme to implement it15 a. Draw and explain the block diagram of Pentium Processor

    b. Explain the nonburst read cycle on 80486with the help of timing Diagramc. List and explain different registers in 80386

    16 Write short notes on any four:

    Data types supported by 80386Memory system of 80486

    Pentium I/O system

    Assembler directives

    Instruction format

  • 7/30/2019 Mvjce Ece 6 Sem

    13/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 13 MVJCE

    06EC-63: ANALOG AND MIXED MODE VLSI DESIGN

  • 7/30/2019 Mvjce Ece 6 Sem

    14/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 14 MVJCE

    SYLLABUS

    Sub Code: 06EC63 I A Marks: 25Hours / Week: 05 Exam Hours: 03Total Hours: 52 Exam Marks: 100

    UNIT 1Data converter fundamentals: Analog versus Digital Discrete Time Signals, Converting Analog

    Signals to Data Signals, Sample and Hold Characteristics, DAC Specifications, ADC

    Specifications, Mixed-Signal Layout Issues. 06Hours

    UNIT 2Data Converters Architectures: DAC Architectures, Digital Input Code, Resistors String, R-2R

    Ladder Networks, Current Steering, Charge Scaling DACs, Cyclic DAC, Pipeline DAC, ADCArchitectures, Flash, 2-Step Flash ADC, Pipeline ADC, Integrating ADC, Successive

    Approximation ADC. 14Hours

    UNIT 3Non-Linear Analog Circuits: Basic CMOS Comparator Design (Excluding Characterization),

    Analog Multipliers, Multiplying Quad (Excluding Stimulation), Level Shifting (Excluding Input

    Level Shifting For Multiplier). 06Hours

    PART B

    UNIT 4:

    Data Converter SNR: Improving SNR Using Averaging (Excluding Jitter & Averaging onwards),Decimating Filters for ADCs (Excluding Decimating without Averaging onwards), Interpolating

    Filters for DAC, B and pass and High pass Sync filters. 06Hours

    UNIT 5Su-Microns CMOS circuit design: Process Flow, Capacitors and Resistors,

    MOSFET Switch (upto Bidirectional Switches), Delay and adder Elements,Analog Circuits MOSFET Biasing (upto MOSFET Transition Frequency).

    14Hours

    UNIT 6

    OPAmp Design (Excluding Circuits Noise onwards 06Hours

    TEXT BOOK:

    1. Design, Layout, Stimulation ,R. Jacaob Baker, Harry W Li, David E Boyce, CMOS Circuit,PHI Edn, 2005

    2. CMOS- Mixed Signal Circuit Design ,R. Jacaob Baker, (Vol ll of CMOS: Circuit Design,Layout and Stimulation), IEEE Press and Wiley Interscience, 2002.

    REFERENCE BOOKS:

    1. Design of Analog CMOS Integrated Circuits, B Razavi, First Edition, McGraw Hill,2001.2. CMOS Analog Circuit Design, P e Allen and D R Holberg, Second Edition, Oxford University

    Press,2002.

  • 7/30/2019 Mvjce Ece 6 Sem

    15/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 15 MVJCE

    LESSON PLAN

    Class: VI semester Subject code: 06EC63

    Subject: ANALOG AND MIXED MODE VLSI DESIGNHours Topics to be covered

    Part A

    Unit 1- Data converter fundamentals

    1 Analog versus Digital Discrete Time Signals

    2 Analog versus Digital Discrete Time Signals

    3 Converting Analog Signals to Data Signals

    4 Sample and Hold Characteristics

    5 Sample and Hold Characteristics

    6 DAC Specifications

    7 ADC Specifications

    8 ADC Specifications

    9 Mixed-Signal Layout Issues

    UNIT 2 - Data Converters Architectures

    10 DAC Architectures

    11 Digital Input Code

    12 Resistors String

    13 R-2R Ladder Networks

    14 Current Steering

    15 Charge Scaling DACs

    16 Cyclic DAC

    17 Pipeline DAC18 ADC Architectures

    19 ADC Architectures

    20 Flash

    21 2-Step Flash ADC

    22 Pipeline ADC

    23 Integrating ADC

    24 Successive Approximation ADC

    25 Successive Approximation ADC

    UNIT 3 - Non-Linear Analog Circuits

    26 Basic CMOS Comparator Design (Excluding Characterization)27 Analog Multipliers

    28 Analog Multipliers

    29 Multiplying Quad (Excluding Stimulation)

    30 Multiplying Quad (Excluding Stimulation)

    31 Level Shifting (Excluding Input Level Shifting For Multiplier).

    32 Level Shifting (Excluding Input Level Shifting For Multiplier).

    PART B

    UNIT4 - Data Converter SNR

    33 Improving SNR Using Averaging (Excluding Jitter & Averaging onwards)

  • 7/30/2019 Mvjce Ece 6 Sem

    16/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 16 MVJCE

    Hours Topics to be covered

    34 Improving SNR Using Averaging (Excluding Jitter & Averaging onwards)

    35Decimating Filters for ADCs (Excluding Decimating without Averagingonwards)

    36Decimating Filters for ADCs (Excluding Decimating without Averagingonwards)

    37 Interpolating Filters for DAC

    38 Interpolating Filters for DAC

    39 Band pass and High pass Sync filter

    40 Band pass and High pass Sync filters

    UNIT 5-Su-Microns CMOS circuit design

    41 Process Flow

    42 Process Flow

    43 Capacitors and Resistors

    44 Capacitors and Resistors

    45 MOSFET Switch (upto Bidirectional Switches)

    46 MOSFET Switch (upto Bidirectional Switches)

    47 MOSFET Switch (upto Bidirectional Switches)

    48 MOSFET Switch (upto Bidirectional Switches)

    49 Delay and adder Elements

    50 Delay and adder Elements

    51 Delay and adder Elements

    52 Delay and adder Elements

    53 Analog Circuits MOSFET Biasing (upto MOSFET Transition Frequency)

    54 Analog Circuits MOSFET Biasing (upto MOSFET Transition Frequency)55 Analog Circuits MOSFET Biasing (upto MOSFET Transition Frequency)

    56 Analog Circuits MOSFET Biasing (upto MOSFET Transition Frequency)

    UNIT 6-OP Amp Design

    57 OPAmp Design (Excluding Circuits Noise onwards)

    58 OPAmp Design (Excluding Circuits Noise onwards)

    59 OPAmp Design (Excluding Circuits Noise onwards)

    60 OPAmp Design (Excluding Circuits Noise onwards)

    61 OPAmp Design (Excluding Circuits Noise onwards)

    62 OPAmp Design (Excluding Circuits Noise onwards)

    TEXT BOOKS:1. Design, Layout, Stimulation ,R. Jacaob Baker, Harry W Li, David E Boyce, CMOS

    Circuit, PHI Edn, 2005

    2. CMOS- Mixed Signal Circuit Design ,R. Jacaob Baker, (Vol ll of CMOS: Circuit Design,Layout and Stimulation), IEEE Press and Wiley Interscience, 2002

    REFERENCE BOOKS:1. Design of Analog CMOS Integrated Circuits, B Razavi, First Edition, McGraw

    Hill, 2001.

    2. CMOS Analog Circuit Design, P e Allen and D R Holberg, Second Edition, Oxford

    University Press, 2002.

  • 7/30/2019 Mvjce Ece 6 Sem

    17/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 17 MVJCE

    MODEL QUESTION PAPER

    1 Draw the schematic of a 3 bit ADC based on pipeline algorithmic architecture.Assume that VREF = 8V and the input sampled voltage is 5V. Write the equivalent

    digital word for the sampled voltage at the above mentioned 3-bit ADC output and

    explain its operation. Also verify the result.

    2. Explain the operation of a 3-bit successive approximation ADC assuming referencevoltage of 5V and input sampled voltage of 3V

    3. Draw the schematic diagram for a 2-bit voltage scaling DAC and explain its operationassuming VREF = 5V and the digital input code of 01. What are the advantages and

    disadvantages of such DACs ?

    4. Explain the following parameters for a DAC i) Full Scale5. ii) Dynamic range iii) rms quantization noise iv) Signal-to-noise ratio6. Derive the expression for SNR in dB for a DAC

    7. Explain why an anti-aliasing filter is used in an ADC. What is the constraint on thebandwidth of the same filter? What is meant by Bennets criteria for characterizingquantization noise in an ADC?

    8. If the input signal of ADC is a sine wave, with peak-to-peak value equal to thereference (Vref) value of the converter, compute the SNR value of the ADC.

    9. The measured SNR of a 16-bits ADC is 88 dB. What is the effective number of bits(ENOB) of this ADC?

    10.Draw the transfer curve of a 3-bits ADC (showVrefalso) and its quantization errorcurve.

    11.Write the number of input combinations, values for 1 LSB, the percentageaccuracy, and the full-scale voltage generated for 3-bit and 8-bit DAC. Assume Vref =

    8 Volts

    12.13.Compute the Differential-Non-Linearly (DNL) of a 3-bits non-ideal DAC whosetransfer curve is given here. (Figure marked as 28.21)

  • 7/30/2019 Mvjce Ece 6 Sem

    18/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 18 MVJCE

    14.Find the resolution of a DAC if the output voltage is desired to change in 1 mV incrementswhile using a reference voltage of 5 Volts

    15.Write thermometer codes for decimal numbers 0 to 7. Which DAC architecture usesthermometer code?16.IfVref = 10 Volts, what will be the resistor vale, if the maximum power dissipationof a resistor string DAC is restricted to 10 mW.

    17.When input decimal value is 510, show which switches will be closed in thealternative resistor string DAC, and accordingly, what will be the output analog

    voltage?18.Write down all the components necessary for 3-bit R-2R ladder DAC?19.Show which switches will be closed for a pipeline DAC if the input is 110020.What is the equation of a pipeline DAC? Draw a Cyclic DAC structure.

    21.Write binary and gray codes for decimal numbers from 0 to 7

    22.Draw both resistor string DAC diagrams (assume there are 8 resistors). What arethe advantages of alternative resistor string structure?

    23.Draw 3-bit R-2R DAC. Node voltages are to be shown. Order of bits (MSB to LSB)

    must be correct. Take Vref = 10Volts, input bits = 001, Rf= 2 K and R = 1K.24.Draw a 3-bits pipeline DAC.25.Draw a cyclic DAC. What are advantages and disadvantages of cyclic and pipeline26.DAC architectures?

  • 7/30/2019 Mvjce Ece 6 Sem

    19/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 19 MVJCE

    06EC-64: Antennas and Propagation

  • 7/30/2019 Mvjce Ece 6 Sem

    20/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 20 MVJCE

    SYLLABUS

    Sub Code: 06EC64 I A Marks: 25

    Hours / Week: 04 Exam Hours: 03Total Hours: 52 Exam Marks: 100

    PART A Unit 1Antenna Basics: Introduction, basic Antennaparameters, patterns, beam area, radiation intensity,beam efficiency, diversityand gain, antenna apertures, effective height, bandwidth, radiation,efficiency, antenna temperature and antenna filed zones.Text 1: Articles -2.1 to 2.7, 2.9, 2.10, 2.12, 2.13. 08 HrsReference book: Articles 2.11, 2.14, 2.18.

    Unit 2Point Sources and Arrays: Introduction, point sources, power patterns, power theorem, radiationintensity, filed patterns, phase patterns. Array of two isotropic point sources, non isotropic but

    similar point sources, principlesof pattern multiplication, examples of pattern synthesis by patternmultiplication, nonisotropic point sources, broad side array with non unipolar amplitude distribution,broad side vs end fire array, direction of maxima fire arrays of n isotropic point sources of equalamplitude and spacing.Text 1: Articles 4.1 to 4.15, 4.24, 4.25 10 Hrs

    Unit 3Electric dipoles and thin linear antennas: Introduction, short electric dipole, fields of a short dipole,radiation resistance of shortdipole, radiation resistances of lambda/2 Antenna, thin linear antenna,micro strip arrays, low side lobe arrays, long wire antenna, folded dipole antennas.Text 1: Articles 5.1 to 5.6, 5.22 to 5.24, 5.27 and 11.3 06 HrsPART B

    Unit 4

    Loop, solt, patch and horn antenna: Introduction, small loop, comparision of far fields of small loopand short dipole, loop antenna general case, far field patterns of circular loop, radiation resistance,directivity, slot antenna, Balinets principle and complementary antennas, impedence ofcomplementary and slot antennas, patch antennas, horn antennas, rectangular hornantennas.Text 1: Articles 6.1 to 6.8, 6.12, 6.14 to 6.16, 6.18 to 6.20. 08 Hrs

    Unit 5Antenna Types: Helical Antenna, Yagi-Uda array, corner reflectors, parabolic reflectors, logperiodic antenna, lens antenna, antenna for special applications sleeve antenna, turnstileantenna, omni directional antennas, antennas for satellite antennas for ground penetrating radars,embedded antennas, ultra wide band antennas, plasma antenna.Text 1: Selected Articles from chapters 7,8,9, 14, and 17(Note: no derivations for the these

    topics in this section) 08 HrsUnit 6

    Radio Wave Propagation: Introduction, Ground wave propagation, free space propagation, groundreflection, surface wave, diffraction. Troposphere Wave Propagation: troposcophic scatter,Ionosphere propagation, electrical properties of the ionosphere, effects of earths magnetic field.Text 2: Articles 8.1, 8.2 12 HrsText book:1. John D.Krauss, Antennas, II edition, McGraw-Hill International edition, 1988.2. Harish and Sachidananda: Antennas and Wave Propagation Oxford Press 2007

    1. C A Balanis, Antenna Theory Analysis and Design 2nd ED, John Wiely, 1997

  • 7/30/2019 Mvjce Ece 6 Sem

    21/51

  • 7/30/2019 Mvjce Ece 6 Sem

    22/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 22 MVJCE

    Text book:

    1. John D.Krauss,Antennas,II edition, McGraw-Hill International edition, 1988.2. Harish and Sachidananda: Antennas and Wave PropagationOxford Press 2007

    Reference Books:

    1. C A Balanis,Antenna Theory Analysis and Design2nd ED, John Wiely, 19972. Sineon R Saunders, Antennas and Propagation for Wireless Communication Systems,John Wiley,3. G SN Raju: Antennas and wave propagation ,Pearson Education 2005

    UNIT- IV & V31 Loop, solt, patch and horn antenna: Introduction

    32 Small loop, comparision of far fields of small loop and short dipole

    33 Loop antenna general case

    34 Far field patterns of circular loop

    35 Radiation resistance, directivity

    36 Slot antenna

    37 Balinets principle and complementary antennas

    38 Impedance of complementary and slot antennas

    39 patch or microstrip antennas

    40 Horn antennas , rectangular horn Antennas

    UNIT- VI41 Antenna Types: Helical Antenna

    42 Practical design considerations for the monofilar axial mode helical antenna

    43 Yagi-Uda array , corner reflectors

    44 parabolic reflectors

    45 Log periodic antenna, lens antenna,

    46Antenna for special applications sleeve antenna,

    Turnstile antenna

    47 Omni directional antennas, antennas for satellite

    48 Antennas for ground penetrating radars, embedded antennas,

    49 Ultra wide band antennas, plasma antenna.

    UNIT- VII & VIII50 Radio Wave Propagation: Introduction

    51 Ground wave propagation

    52 Ground wave propagation

    53 Free space propagation

    54 Ground reflection,

    55 Surface wave, diffraction

    56 Diffraction

    57 Troposphere Wave Propagation

    58 Troposcophicscatter

    59 Ionosphere propagation,60 Electrical properties of the ionosphere

    61 Effects of earths Magnetic field

    62 Effects of earths Magnetic field

  • 7/30/2019 Mvjce Ece 6 Sem

    23/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 23 MVJCE

    QUESTION BANK

    01 a. Define the following quantities as referred to an antenna.

    i. Radiation pattern.ii. Directivityiii. Radiation resistanceiv. Effective aperture

    b. Explain antenna field zonesc. Explain shape impedance considerations in antennas

    02 a. Derive the expressions for the far field components of a /2 dipole , starting with theexpressions for the short dipole

    b. Show that the radiation resistance of a /2 dipole is 73 ohms03 a. State power theorem and mention its applications with respect to antennas

    b. Give the description of loop antennasc. With an example explain the principle of pattern multiplication

    04 a. Give a brief description of antennas for ground penetrating Radarb. Explain the working principle of Yagi-Uda antennac. Explain the working principle of log periodic antennas

    05 a. Explain the working principle of slot antennasb. Give a brief account of antennas used for special applications

    06 a. Derive the expression for field strength due to space wave, in terms of the heights oftransmitting and receiving antennae and field strength at unit distance. Plot thevariation of field strength as a function of distance

    b. Calculate the radio horizon for 100 meters transmitting antenna and a receiverantenna of 25 meters. Derive the formula you would use

    07 a. Find MUF for a layer with Nmax = m1012/m3, h = 450 km and D = 1500. Derive the

    formula usedb. Explain the regular and irregular variations on ionosphere in detail

    08 Explain the following

    Tropospheric scattering

    Duct propagationSlot antennas

    Embedded antennas

  • 7/30/2019 Mvjce Ece 6 Sem

    24/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 24 MVJCE

    06EC-65INFORMATION AND THEORY CODING

  • 7/30/2019 Mvjce Ece 6 Sem

    25/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 25 MVJCE

    SYLLABUSSub Code: 06EC65 I A Marks: 25

    Hours / Week: 04 Exam Hours: 03Total Hours: 52 Exam Marks: 100

    PART AUnit 1: Information Theory: Introduction, Measure of information, Average information content ofsymbols in long independent sequences, Average information content of symbols in longdependent sequences. Mark-off statisticalmodel for information source, Entropy and informationrate of mark-off source.Text1: Chapter 4: 4.1 and 4.2. 06Hrs

    Unit 2 :Source Coding: Encoding of the source output, Shannons encoding algorithm. Communication

    Channels, Discrete communication channels, Continuous channels.Text 1: Chapter 4: 4.3 to 4.6 06Hrs

    Unit 3 :Fundamental Limits on Performance: Source coding theorem,, Huffman coding, Discrete memoryless Channels, Mutual information, Channel Capacity.Text 2: Chapter 2: 2.3 to 2.6 06 Hrs

    Unit 4 :Channel coding theorem , Differential entropy and mutual information for continuous ensembles,Channel capacity Theorem .

    Text 2 : Chapter 2: 2.7 to 2.9 06Hrs

    PART-BUnit 5 :Introduction to Error Control Coding , Introduction, Types of errors, examples, Types of codesLinear Block Codes: Matrix description, Error detection and correction, Standard arrays and tablelook up for decoding.Text 1: Chapter 9: 9.1 and 9.2 07HrsUnit 6 :Binary Cycle Codes, Algebraic structures of cyclic codes, Encoding using an (n-k) bit shift register,Syndrome calculation. BCH codes.

    Text 1: Chapter 9: 9.3 06Hrs

    Unit 7 :RS codes, Golay codes, Shortened cycliccodes, Burst error correcting codes. Burst andRandom Error correcting codes. ConvolutionCodes, Time domain approach.Transform domainapproach.Text 2: Chapter 8: 8.4 , 8.5 and Text 1: Chapter 9. 9.4 and 9.5 07 HrsUnit 8:Systematic Convolution codes, Maximum likelihood decoding of Convolution codes Vitrebialgorithm Distance properties of convolutional codes Sequential decoding.

  • 7/30/2019 Mvjce Ece 6 Sem

    26/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 26 MVJCE

    LESSON PLANClass: VI Semester Subject code: 06EC65

    Subject: INFORMATION AND THEORY CODINGHours Topics to be covered

    PART A

    UNIT-I Information Theory

    1 Introduction

    2 Measure of Information

    3 Average information content of symbols in long independent sequences,

    4 Average information content of symbols in long independent sequences,

    5 Average information content of symbols in long dependent sequences.

    6 Mark-off statistical model for information source,

    7 Mark-off statistical model for information source,

    8 Entropy and information rate of mark-off source

    UNIT- II Source Coding

    9 Encoding of the source output,

    10 Encoding of the source output,

    11 Shannons encoding algorithm.

    12 Communication Channels

    13 Problems

    14 Discrete communication channels.

    15 Continuous channels

    UNIT- III Fundamental Limits on Performance

    16 Source coding theorem17 Huffman coding

    18 Discrete memory less Channels

    19 Problems

    20 Mutual information,

    21 Mutual information,

    22 Problems

    23 Channel Capacity

    UNIT- IV Channel coding

    24 Channel coding theorem

    25 Problems26 Differential entropy

    27 Problems

    28 Mutual information for continuous ensembles

    29 Mutual information for continuous ensembles

    30 Problems

    31 Channel capacity Theorem

    PART B

    UNIT V Introduction to Error Control Coding

    32 Introduction, Types of errors

  • 7/30/2019 Mvjce Ece 6 Sem

    27/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 27 MVJCE

    Hours Topics to be covered

    33 examples

    34 Types of codes Linear Block Codes:

    35 Types of codes Linear Block Codes:

    36 Matrix description

    37 Error detection and correction,

    38 Standard arrays and table look up for decoding

    UNIT VI Binary Cycle Codes

    39 Binary Cycle Codes,

    40 Binary Cycle Codes,

    41 Algebraic structures of cyclic codes

    42 Problems

    43 Encoding using an (n-k) bit shift register

    44 Encoding using an (n-k) bit shift register45 Problems

    46 Syndrome calculation.

    47 BCH codes.

    UNIT-VII

    48 RS codes,

    49 Golay codes

    50 Shortened cyclic codes,

    51 Burst error correcting codes

    52 Burst and Random Error correcting codes

    53 Convolution Codes,54 Time domain approach

    55 Transform domain approach

    UNIT-VIII

    56 Systematic Convolution codes

    57 Problems

    58 Maximum likelihood decoding of Convolution codes

    59 Maximum likelihood decoding of Convolution codes

    60 Problems

    61Vitrebi algorithm Distance properties of convolution codes Sequentialdecoding

    62 Problems

    Text Books:1. K. Sam Shanmugam, Digital and analog communication systems, John Wiley, 1996.2. Simon Haykin, Digital communication, John Wiley, 2003.Reference Book:1. Ranjan Bose, ITC and Cryptography, TMH, 2002 (reprint 2007)2. Glover and Grant; Digital Communications Pearson Ed. 2nd Ed 2008

  • 7/30/2019 Mvjce Ece 6 Sem

    28/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 28 MVJCE

    QUESTION BANK

    01 a. Define: Self Information, Average Information, Information rateb. Discuss the dependence of entropy on the probability of the message for a discrete

    memory less sourcec. A black and white TV picture consists of 525 lines of picture information each line

    consist of 525 lines of picture elements and each element can have 256 brightnesslevels. Pictures are repeated at the rate of 30/sec. Calculate average rate ofinformation conveyed by a TV set to the viewer

    d. List the various property of entropy02 a. Show that an nth extension of a source, H(Sn) = nH(S)

    b. Find the channel capacity of a BEC channelc. List the important properties of mutual information

    03 a. A discrete memory less source produces two symbols A & B with probability P(A) = ,

    P(B) = .Find the symbols of the third extension of the source and hence show H(S3

    )= 3H(S

    b. What are the important properties of codes? Illustrate with examplec. For the source given below

    S S1 S2 S3 S4 S5 S6 S7 S8

    P 0.2

    0.2

    0.20.1

    0.1

    0.10.05

    0.05

    Construct a suitable code using Shannons Algorithm. Also find efficiency of coding04 a. For a channel whose matrix is given below

    Y1 Y2 Y3

    X10.

    8

    0.

    20

    X20.1

    0.8

    0.1

    X3 00.2

    0.8

    Rs = 10,000/sec.Find H (x) , H (y), H(y/x), H (x/y), I (x, y) and capacity given the source probability areP(x1)=1/2, P(x2)=P(x3)=1/4

    b. Determine the differential entropy H (x) of the uniformly distributed random variable Xwith pdf

    a-1, 0

  • 7/30/2019 Mvjce Ece 6 Sem

    29/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 29 MVJCE

    06 a. Why do we need error control coding? Explain with an exampleb. Consider the (7,4) linear block code whose generator matrix is

    G =

    0 0 0 0 0 1 10 1 0 1 1 1 10 0 1 1 1 1 00 0 0 0 0 1 1

    Find all the code vectors, Find the minimum weight of the code, Draw the encodercircuit, Find the parity check matrix

    07 a. A (15,5) linear cyclic code has a generator polynomial g(x) = 1+x+x2+x4+x5+x8+x10Draw the block diagrams of an encoder and syndrome

    calculator for this code.Find the code polynomial for the message polynomial D(x)=

    1+x2+x4 in the systematic form.Is V (x) = 1+x4+x6+x8+x14 a code polynomial? If not find the

    syndrome of V(x).b. Write a note an Golay codes

    08 Consider the convolution encoder given below

    Construct the code tree for the same.Find the generator polynomial for the encoder and hence find the output

    sequence for (10110)Verify answer in ii. Using the code tree

    09 a. Define information for a message. Justify the use of logarithmic. Measure forinformation

    b. A card is drawn from a dele of playing cards.

    You are informed the card you draw is a spade. How much informationdid you receive?

    How much information do you receive if you are told that the card youdrew is an ace?

    How much information do you receive if you are told that the card youdrew is an ace of spades?

    Is the information content of the messages ace of spades, the sum of

    the information content of message spade and acec. A source produces two symbols A and B with probability P and (1-P) respectively.

    Find the entropy of the source. Plot the variation of the entropy versus P. When theentropy will be maximum and what is its value?

  • 7/30/2019 Mvjce Ece 6 Sem

    30/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 30 MVJCE

    09 d. The probability of occurrence of various letters of the English alphabet is given below.

    A 0.081 J 0.01 S 0.066B 0.016 K 0.005 T 0.096C 0.032 L 0.040 U 0.031D 0.037 M 0.022 V 0.009E 0.124 N 0.072 W 0.020F 0.023 O 0.079 X 0.002G 0.016 P 0.023 Y 0.019H 0.051 Q 0.002 Z 0.001I 0.072 R 0.060

    Which letter conveys maximum amount of information?

    Which letter conveys minimum amount of information?

    What are those values?10 a. Consider an information source modeled by a discrete ergodic. Markov randomprocess whose graph is given in fig Below

    P(1)=P(2)=1/2

    A 1 C=1/4 2 B

    3/4 C=1/4 Find the entropy of each state.

    Find the entropy of source H

    Find G1, G2 and G3.b. List the various important properties of codesc. Consider the four codes listed below

    Symbol Code-I Code-II Code-III Code-IVS0 0 0 0 00

    S1 10 01 01 01S2 110 001 001 10S3 1110 0010 110 110S4 1111 0011 111 111

    Two of these codes are prefix codes. Identify them and construct the decision tree for

    one of them

  • 7/30/2019 Mvjce Ece 6 Sem

    31/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 31 MVJCE

    11 a. A source produces two symbols A and B with probability of 1/16 and 15/16respectively. Construct a suitable binary code such that the efficiency of coding is at

    least 70%.b. An information source produces sequences of independent symbols having the

    following probability.

    A B C D E F G H

    1/31/27

    1/91/54

    1/27

    1/9 1/54 1/3

    Construct the Huffman ternary code.

    Find the code efficiency and redundancyc. Show that I (x, y)>=0

    12 a. Determine H(x),H(y), H(x/y),H(y/x)and I(x,y) for the channel whose JPM is given

    below

    P (X, Y) =

    0.2 0 0.2 0

    0.1 00.03

    0

    0 0.03 0 0.20.04

    0.1 0 0

    0 00.03

    0.25

    b. Derive the expression for the capacity of a binary symmetric channelc. Find the capacity of the channel whose matrix is (from the defining equation)

    0.8 0.20.1 0.9

    13 a. State and prove Shannons Hartley lawb. An analog signal has a 4Khz bandwidth. The signal is sampled at twice the Nyquist

    rate and each sample is quantized into one of 256 equally probable levels.

    What is the information rate of this source?

    Can the output of this source be transmitted without errorsover a Gaussian channel with a bandwidth of 50Khz and S/N ratio of 23db?

    What will be the bandwidth requirements of an analogchannel for transmitting the output of the source without errors if S/N ratio is 10db?

    c. Two binary channels are cascaded as shown in the fig

    Find the overall channel matrix and joint probability matrix, if the i/p symbols areequiprobable. Also find H (z),H (z/x),H (x, z).

  • 7/30/2019 Mvjce Ece 6 Sem

    32/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 32 MVJCE

    14 a. Prove GHT =0 where G and H are the generator and parity check matrices of linearblock code

    b. The parity check bits of a (8,4) linear block code generated using the relations.C5 = d1+d2+d4C6 = d1+d2+d3C7 = d2+d3+d4

    Where are d1, d2, d3, d4 are message bits. FindThe minimum weight of this code.Error correcting capabilities of this code.

    The generator and parity check matrix.

    Show with an example that this code can detect threeerrors

    c. Write a brief note on Standard array15 a. Consider (7,4) Hamming code generated using g(x)=1+x2+x3. Determine G and H

    matrix of the expurgated Hamming code generated by g1(x)=(1+x)g(x).Derive thesyndrome calculator for the same and hence determine the syndrome for themessage sequence 0111110.Draw the encode diagram

    b. Write short notes on: i. BCH codes, ii. Reed Solomon codesc. Consider the (3,1,2) convolution code with impulse response g(1) = (110),g(2) =

    (101), and g(3) = (111),

    Draw the encode block diagram.

    Find the generator matrix.

    Find the code word corresponding to the informationsequence (11101)

    Draw the code tree

  • 7/30/2019 Mvjce Ece 6 Sem

    33/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 33 MVJCE

    06EC661 PROGRAMMING IN C++

  • 7/30/2019 Mvjce Ece 6 Sem

    34/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 34 MVJCE

    PROGRAMMING IN C++

    Sub Code : 06EC-661 IA Marks : 25

    Hours /Week :4 Exam Hours: 3

    Total Hour : 52 Exam Marks :100PART - A

    UNIT 1: C++, AN OVERVIEW: Getting started, the C++ program, Preprocessor Directives,

    The Built-In Array Data Type, Dynamic Memory Allocation and Pointers, An Object based

    Design, An Object-Oriented Design, An Exception based Design, An array.

    6 Hours

    UNIT 2: THE BASIC LANGUAGE: Literal Constant, Variables, Pointer Type, String

    Types, const Qualifier, Reference Types, the bool type, Enumeration types, Array types. The

    vector container type.

    6 Hours

    UNIT 3: OPERATORS: Arithmetic Operators, Equality, Relational and Logical operators,

    Assignment operators, Increment and Decrement operator, The conditional Operator, Bitwise

    operator, bitset operations. Statements: if, switch, for Loop, while, break, goto, continue

    statements.

    10 Hours

    UNIT 4: FUNCTIONS: Prototype, Argument passing, Recursion and linear function.

    4 Hours

    PART - B

    UNIT 5: EXCEPTION HANDLING: Throwing an Exception, Catching an exception,Exception Specification and Exceptions and Design Issues.

    6 Hours

    UNIT 6: CLASSES: Definition, Class Objects, Class Initailization, Class Constructior, The

    Class Destructor, Class Object Arrays And Vectors.

    6 Hours

    UNIT - 7

    Overload Operators, Operators ++ and --, Operators new and delete.

    7 Hours

    UNIT - 8

    Multiple Inheritances, public, private & protected inheritance, Class scope under Inheritance.

    6 Hours

    TEXT BOOK:

    1. C++ Primer, S. B. Lippman & J. Lajoie, 3rd Edition, Addison Wesley, 2000.

    REFERENCE BOOKS:

    1. C++ Program Design: An Introduction to Programming and Object- Oriented

    Design. Cohoon and Davidson, 3

    rd

    Edn. TMH publication. 2004.2. Object Oriented Programming using C++, R. Lafore, Galgotia Publications,2004.

  • 7/30/2019 Mvjce Ece 6 Sem

    35/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 35 MVJCE

    LESSON PLAN

    Semester: VI Subject code: 06EC661

    Subject: PROGRAMMING IN C++

    Hours Topics to be covered

    Part A

    Unit 1- C++, AN OVERVIEW

    1 Introduction: Getting started, the C++ program

    2 Preprocessor Directives

    3 Preprocessor Directives

    4 The Built-In Array Data Type

    5 Dynamic Memory Allocation and Pointers

    6 An Object based Design7 An Object-Oriented Design

    8 An Exception based Design, An array

    UNIT 2 - THE BASIC LANGUAGE

    9 Literal Constant, Variables

    10 Pointer Type, String Types

    11 Const Qualifier

    12 Reference Types

    13 The bool type

    14 Enumeration types

    15 Array types16 The vector container type

    UNIT 3 - OPERATORS

    17 Arithmetic Operators, Equality

    18 Relational and Logical operators

    19 Assignment operators

    20 Increment and Decrement operator

    21 The conditional Operator

    22 The conditional Operator

    23 Bit wise operator

    24 Bit set operations25 Statements: if, switch

    26 For Loop, while

    27 Break, go to

    28 Continue statements

    UNIT4 - FUNCTIONS

    29 Function Prototype

    30 Function Prototype

    31 Argument passing

    32 Recursion function

    33 Recursion function34 Linear function

  • 7/30/2019 Mvjce Ece 6 Sem

    36/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 36 MVJCE

    Hours Topics to be covered

    PART BUNIT 5- EXCEPTION HANDLING

    35 Throwing an Exception

    36 Catching an exception

    37 Catching an exception38 Exception Specification

    39 Exceptions and Design Issues

    40 Exceptions and Design Issues

    UNIT 6- CLASSES

    41 Definition of a Class

    42 Class Objects

    43 Class Objects

    44 Class Initialization

    45 Class constructor

    46 The class destructor

    47 Class Object Arrays

    48 Class Object Arrays & Vectors

    UNIT 7

    49 Overload Operators

    50 Overload Operators

    51 Operators ++ and --

    52 Operators ++ and --

    53 Operators new and delete

    54 Operators new and delete

    55 Programs56 Programs

    UNIT 8

    57 Multiple Inheritances

    58 Public inheritance

    59 Private inheritance

    60 Protected inheritance

    61 Class scope under Inheritance

    62 Programs

    TEXT BOOK:1. C++ Primer, S. B. Lippman & J. Lajoie, 3rd Edition, Addison Wesley, 2000.

    REFERENCE BOOKS:

    1. C++ Program Design: An Introduction to Programming and Object- Oriented Design .

    Cohoon and Davidson, 3rd

    Edn. TMH publication. 2004.

    2. Object Oriented Programming using C++, R. Lafore, Galgotia Publications, 2004.

  • 7/30/2019 Mvjce Ece 6 Sem

    37/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 37 MVJCE

    Model Question Paper

    1. With example, explain the data types & variables in C++

    2. With suitable example, explain the difference between const modifier & # definestatement

    3. State & explain the format for if-else & switch statement.

    4. Write a C++ program using if-else if-else statement to check the given number ispositive, negative or zero.

    5. Explain the ternary operation used in C++.

    6. Explain the function of pointers, address operator & indirection operator with suitableexample.

    7. What are the 3 required statements for every function in C++.

    8. Write a C++ program to add the values from 1 to N using function statement.

    9. Explain call by value; call by reference parameter passing method with an example toeach.

    10.Explain with example how one-dimensional array is passed to function.

    11.Explain the structures declaration and accessing structure elements in C++.

    12.What is meant by enumerated data types? Explain with example.

    13.What are the principles required for object oriented language? Explain any four.

    14.Explain the format for class constructor function & class destructors function.

    15.Explain the terms private, public, and class member & access specifiers with reference toclass declaration in C++.

    16.Explain C++ string classes & C++ numeric classes

    17.Write short notes on the following:

    Operators in C++

    Local, Static & Global variable

    Structure within structure

    Base class & derived class.

    18.What is an Exception handling? Explain the concept of throwing an exception &catching an exception.

  • 7/30/2019 Mvjce Ece 6 Sem

    38/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 38 MVJCE

    06EC-662: SATELLITE COMMUNICATION

  • 7/30/2019 Mvjce Ece 6 Sem

    39/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 39 MVJCE

    SATELLITE COMMUNICATION

    Sub Code : 06EC-662 IA Marks : 25

    Hours /Week: 4 Exam Hours: 3

    Total Hour: 52 Exam Marks: 100

    PART AUnit 1 03 Hours

    Over view of Satellite Systems: Introduction, frequency allocation, INTEL Sat.

    Unit 2 10 Hours

    Orbits: Introduction, Kepler laws, definitions, orbital element, apogee and perigee heights, orbit

    perturbations, inclined orbits, calendars, universal time, sidereal time, orbital plane, local mean

    time and sun synchronous orbits, Geostationary orbit: Introduction, antenna, look angles, polar

    mix antenna, limits of visibility, earth eclipse of satellite, sun transit outage, leandiag orbits.

    Unit 3 08 HoursPropagation impairments and space link: Introduction, atmospheric loss, ionospheric effects,

    rain attenuation, other impairments. Space link: Introduction, EIRP, transmission losses, link

    power budget, system noise, CNR, uplink, down link, effects of rain, combined CNR.

    Unit 4 06 Hours

    Space Segment: Introduction, power supply units, altitude control, station keeping, thermal

    control, TT&C, transponders, antenna subsystem.

    Unit 5 and 6 03 Hours

    Earth Segemnt: Introduction, receive only home TV system, out door unit, indoor unit, MATV,CATV, Tx Rx earth station. Interference and Satellite access: Introduction, interference

    between satellite circuits, satellite access, single access, pre-assigned FDMA, SCPC (spadesystem), TDMA, pre-assigned TDMA, demand assigned TDMA, down link

    analysis, comparison of uplink power requirements for TDMA & FDMA, on board signal

    processing satellite switched TDMA. 08 Hours

    Unit 7 and 8 1 0 Hours

    DBS, Satellite mobile and specialized services: Introduction, orbital spacing, power ratio,

    frequency and polarization, transponder capacity, bit rates for digital TV, satellite mobile

    services, USAT, Radar Sat, GPS, orb communication and iridium.

    TEXT BOOK:1. Dennis Roddy, Satellite Communications, 4th Edition, McGraw-Hill International edition,

    2006

    REFERENCES:

    1. Timothy Pratt, Charles Bostian and Jeremy Allnutt, SatelliteCommunications, 2nd Edition,John Wiley & Sons, 2003

    2.W.L. Pitchand, H.L. Suyderhoud, R.A. Nelson, Satellite Communication Systems engineering,2nd Ed., Pearson Education., 2007

  • 7/30/2019 Mvjce Ece 6 Sem

    40/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 40 MVJCE

    LESSON PLAN

    Class: VI semester Subject code: 06EC662

    Subject: SATELLITECOMMUNICATION

    Hours Topics to be covered

    Unit I

    1 Over view of Satellite Systems: Introduction

    2 frequency allocation

    3 INTEL Sat.

    Unit II

    4 Orbits: Introduction, Kepler laws, definitions

    5 Orbital element, apogee and perigee heights6 Orbit perturbations, inclined orbits, calendars,

    7 Universal time, sidereal time

    8 Orbital plane, local mean time and sun synchronous orbits,

    9 Geostationary orbit: Introduction

    10 Antenna, look angles, ,

    11 polar mix antenna

    12 Limits of visibility,.

    13 earth eclipse of satellite

    14 Sun transit outage, leandiag orbits

    Unit III

    15 Propagation impairments and space link: Introduction

    16 atmospheric loss,

    17 ionospheric effects

    18 rain attenuation, other impairments.

    19 Space link: Introduction,.

    20 EIRP, transmission losses

    21 link power budget

    22 link power budget

    23 system noise, CNR

    24 uplink, down link

    25 effects of rain, combined CNRUnit IV

    26 Space Segment: Introduction.

    27 power supply units

    28 altitude control, station keeping

    29 thermal control

    30 TT&C

    31 transponders, antenna subsystem

  • 7/30/2019 Mvjce Ece 6 Sem

    41/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 41 MVJCE

    Unit V & VI

    32 Earth Segment: Introduction

    33 receive only home TV system,

    34 receive only home TV system35 out door unit, indoor unit,

    36 MATV

    37 CATV

    38 Tx Rx earth station

    39 Interference and Satellite access: Introduction

    40 interference between satellite circuits,

    41 satellite access, single access

    42 pre-assigned FDMA,

    43 SCPC (spade system),

    44 TDMA, pre-assigned TDMA

    45 pre-assigned TDMA

    46 demand assigned TDMA

    47 down link analysis,

    48 Comparison of uplink power requirements for TDMA & FDMA,

    49 on board signal processing satellite switched TDMA.

    Unit VII & VIII50 DBS

    51 Satellite mobile and specialized services: Introduction

    52 orbital spacing

    53 frequency and polarization

    54 frequency and polarization55 transponder capacity

    56 bit rates for digital TV

    57 satellite mobile services

    58 Radar Sat,

    59 GPS

    60 orb communication and iridium

    61 Revision Unit I

    62 Revision Unit II

  • 7/30/2019 Mvjce Ece 6 Sem

    42/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 42 MVJCE

    MODEL QUESTION PAPER

    1. a. Explain the Keplers law of Planetary motion. How are they applicable to thegeostationary satellite.

    b. Define the following terms

    (i) Eccentricity(ii) Time of Perigee(iii) Right ascension of ascending node(iv) Argument of perigee

    c. Calculate the radius of a circular orbit for which the period is 1 day.

    2. a. What are orbital perturbations? Explain in brief.b. Explain the Importance of Satellite stabilization. Briefly describes the three axis

    method of satellite stabilization.

    c. Describe the tracking, telemetry, command and monitoring facilities of a satellite

    communication system.

    3. a. Compare TDMA, FDMA, and CDMA.b. Explain DS- SS CDMA with the help of a neat block diagram and waveforms.

    4. a. Briefly discuss the various types of orbits used in satellite communicationb. Why is it optimum in terms of launch energy requirements to do the following

    (i) Launch a satellite towards the east.(ii) Launch a satellite from the equator.

    c. Describe the effect of radiation on satellite.

    5. a. With the help of neat block diagram explain a DBS- TV receiver?b. Explain why a minimum of 4 satellite must be visible at an earth station utilizing the

    GPS system for position determination?

    c. Write an explanatory note on GPS receivers and codes.

    6. Write short notes ona. Look angle determination.b. Transpondersc. System noise temperature.d. LEOs

    7. Write short notes ona. VSAT Earth Stationb. FM TV networks using direct broad-cast from satellite.c. Error detection and control using ARQ schemes in satellite links.

    8. a. Distinguish between geo-synchronous orbit and geo-stationary orbit.b. What is the cause of third order inter modulation products in FDM FM FDMA.

    c. what is the significance of G/T of a satellite link ? Discuss how it can be optimized.

    9. a. For a satellite define the following(i) Apogee and Perigee points

    (ii) Mean and True anomaly.

    b. Explain about Bent - type transponders.

  • 7/30/2019 Mvjce Ece 6 Sem

    43/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 43 MVJCE

    c. A satellite is in a 322 km high circular orbit. Determine

    (i) Orbital angular velocity in radius per second.(ii) Orbital period in minutes, and(iii) Orbital velocity in meters per second

    [Note : Assume the average radius of the earth is 6378.137 km and Keplers constant has

    the value 3.986 x 105 km3/ s2]

    10.a. Discuss signal generation in GPS satellite.b. Explain the following

    (i) Power Subsystem(ii) Demand Access and Fixed Access in FDMA with example.

  • 7/30/2019 Mvjce Ece 6 Sem

    44/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 44 MVJCE

    06EC667: Digital Systems Design Using VHDL

  • 7/30/2019 Mvjce Ece 6 Sem

    45/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 45 MVJCE

    Digital Systems Design Using VHDL

    Sub Code : 06EC-667 IA Marks : 25

    Hours /Week :4 Exam Hours: 3

    Total Hour : 52 Exam Marks :100

    PART-A

    Unit 1Introduction: VHDL description of combinational networks, Modeling flip-flops using VHDL,

    VHDL models for a multiplexer, Compilation and simulation of VHDL code, Modeling a

    sequential machine, Variables, Signals and constants, Arrays, VHDL operators, VHDL

    functions, VHDL procedures, Packages and libraries, VHDL model for a counter.

    Unit 2Designing With Programmable Logic Devices: Read-only memories, Programmable logic arrays

    (PLAs), Programmable array logic (PLAs), Other sequential programmable logic devices

    (PLDs), Design of a keypad scanner.

    Unit 3Design Of Networks For Arithmetic Operations: Design of a serial adder with accumulator,

    State graphs for control networks, Design of a binary multiplier, Multiplication of signed binary

    numbers, Design of a binary divider.

    Unit 4

    Digital Design with Sm Charts: State machine charts, Derivation of SM charts, Realization of

    SM charts. Implementation of the dice game, Alternative realization for SM charts using

    microprogramming, Linked state machines.

    PART-B

    Unit 5Designing With Programmable Gate Arrays And Complex Programmable Logic Devices: Xlinx

    3000 series FPGAs, Designing with FPGAs, Xlinx 4000 series FPGAs, using a one-hot state

    assignment, Altera complex programmable logic devices (CPLDs), Altera FELX 10K series COLDs.

    Unit 6Floating-Point Arithmetic: Representation of floating-point numbers, Floating-point

    multiplication, Other floating-point operations.

    Unit 7Additional Topics In VHDL: Attributes, Transport and Inertial delays, Operator overloading,

    Multivalued logic and signal resolution, IEEE-1164 standard logic, Generics, Generate

    statements, Synthesis of VHDL code, Synthesis examples, Files and Text IO.

    Unit 8VHDL Models For Memories And Buses: Static RAM, A simplified 486 bus model, Interfacing

    memory to a microprocessor bus.

    Text Books:

    1. Charles H. Roth. Jr:, Digital Systems Desgin using VHDL, Thomson Learning, Inc, 9th

    reprint,

    2006.

    Reference Books:

    1. Stephen Brwon & Zvonko Vranesic, Fundamentals of Digital Logic Design with VHDL, Tata

    McGrw-Hill, New Delhi, 2nd edn, 2007

    2. Mark Zwolinski, Digital System Design with VHDL, 2 edn, Pearson Edn., 2004

    3. Volnei A Pedroni, Circuit Design with VHDL. PHI, 2004

  • 7/30/2019 Mvjce Ece 6 Sem

    46/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 46 MVJCE

    LESSON PLANClass: VI semester Subject code: 06EC667Subject: Digital Systems Design Using VHDL

    Hours Topics to be covered

    Part AUNIT 1: Introduction

    1 Introduction to VHDL

    2 VHDL description of combinational networks

    3 Modeling flip-flops using VHDL

    4 VHDL models for a multiplexer

    5 Compilation and simulation of VHDL code

    6 Modeling a sequential machine

    7 Variables, Signals and constants, Arrays, VHDL operators

    8 VHDL functions

    9 VHDL procedures10 Packages and libraries

    11 VHDL model for a counter

    UNIT 2: Designing With Programmable Logic Devices

    12 Read-only memories

    13 Programmable logic arrays (PLAs)

    14 Programmable array logic (PLAs)

    15 Other sequential programmable logic devices (PLDs)

    16 Design of a keypad scanner

    17 Design of a keypad scanner

    UNIT 3: Design Of Networks For Arithmetic Operations18 Design of a serial adder with accumulator

    19 State graphs for control networks

    20 Design of a binary multiplier

    21 Multiplication of signed binary numbers Design of a binary divider

    22 Multiplication of signed binary numbers Design of a binary divider

    UNIT 4: Digital Design with Sm Charts

    23 State machine charts

    24 Derivation of SM charts

    25 Realization of SM charts

    26 Implementation of the dice game27 Alternative realization for SM charts using microprogramming

    28 Linked state machines

    29 Linked state machines

    PART B

    UNIT 5: Designing With Programmable Gate Arrays And Complex ProgrammableLogic Devices (6 Hrs)

    30 Xlinx 3000 series FPGAs

    31 Designing with FPGAs

    32 Xlinx 4000 series FPGAs

    33 Using a one-hot state assignment

    34 Altera complex programmable logic devices (CPLDs)

    35 Altera FELX 10K series COLDs

  • 7/30/2019 Mvjce Ece 6 Sem

    47/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 47 MVJCE

    UNIT 6: Floating-Point Arithmetic

    36 Representation of floating-point numbers

    37 Floating-point multiplication

    38 Floating-point multiplication

    39 Other floating-point operations (addition)

    40 Other floating-point operations (subtraction)

    41 Other floating-point operations (division)

    UNIT 7: Additional Topics In VHDL

    42 Attributes, Transport and Inertial delays,

    43 Operator overloading

    44 Multivalued logic and signal resolution

    45 IEEE-1164 standard logic

    46 Generics

    47 Generate statements

    48 Synthesis of VHDL code, Synthesis examples

    49 Files and Text IO

    UNIT 8: VHDL Models For Memories And Buses

    50 Static RAM

    51 A simplified 486 bus model

    52 A simplified 486 bus model

    53 Interfacing memory to a microprocessor bus.

    54 Interfacing memory to a microprocessor bus.

    55 Interfacing memory to a microprocessor bus.

    56 Review of Chapter 1

    57 Review of Chapter 2

    58 Review of Chapter 3

    59 Review of Chapter 460 Review of Chapter 5

    61 Review of Chapter 6

    62 Review of Chapter 7 & 8

    Text Books:

    1. Charles H. Roth. Jr:, Digital Systems Desgin using VHDL, Thomson Learning, Inc, 9 threprint, 2006.

    Reference Books:

    1. Stephen Brwon & Zvonko Vranesic, Fundamentals of Digital Logic Design with VHDL,Tata McGrw-Hill, New Delhi, 2nd edn, 20072. Mark Zwolinski, Digital System Design with VHDL, 2 edn, Pearson Edn., 20043. Volnei A Pedroni, Circuit Design with VHDL. PHI, 2004

  • 7/30/2019 Mvjce Ece 6 Sem

    48/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 48 MVJCE

    06ECL-67: Advanced Communication Lab

  • 7/30/2019 Mvjce Ece 6 Sem

    49/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 49 MVJCE

    LIST OF EXPERIMENTS

    1. TDM of two band limited signals.

    2. ASK and FSK generation and detection

    3. PSK generation and detection

    4. DPSK generation and detection

    5. QPSK generation and detection

    6. PCM generation and detection using a CODEC Chip

    7. Measurement of losses in a given optical fiber ( propagation loss, bending loss, coupling

    loss ) and numerical aperture

    8. Analog and Digital (with TDM) communication link using optical fiber.

    9. Measurement of frequency, guide wavelength , power, VSWR and attenuation ina microwave test bench

    10. Measurement of directivity and gain of antennas: Standard dipole (or printed dipole),

    microstrip patch antenna and Yagi antenna(printed).

    11. Determination of coupling and isolation characteristics of a stripline (or microstrip)

    directional coupler

    12. (a) Measurement of resonance characteristics of a microstrip ring resonator and

    determination of dielectric constant of the substrate. (b) Measurement of power division and

    isolation characteristics of a microstrip 3 dB power divider.

  • 7/30/2019 Mvjce Ece 6 Sem

    50/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    PAGE 50 MVJCE

    06ECL-68: Microprocessor Lab

  • 7/30/2019 Mvjce Ece 6 Sem

    51/51

    ELECTRONICS AND COMMUNICATION ENGINEERING VI SEMESTER COURSE DIARY

    Programs involving

    1) Data transfer instructions like:

    i] Byte and word data transfer in different addressing modes.

    ii] Block move (with and without overlap)iii] Block interchange

    2) Arithmetic & logical operations like:

    i] Addition and Subtraction of multi precision nos.

    ii] Multiplication and Division of signed and unsigned Hexadecimal nos.

    iii] ASCII adjustment instructions

    iv] Code conversions

    v] Arithmetic programs to find square cube, LCM, GCD, factorial

    3) Bit manipulation instructions like checking:

    i] Whether given data is positive or negative

    ii] Whether given data is odd or even

    iii]Logical 1s and 0s in a given data

    iv] 2 out 5 code

    v] Bit wise and nibble wise palindrome

    4) Branch/Loop instructions like:

    i] Arrays: addition/subtraction of N nos. Finding largest and smallest nos.

    Ascending and descending order

    ii] Near and Far Conditional and Unconditional jumps, Calls and Returns

    5) Programs on String manipulation like string transfer, string reversing, searching

    for a string, etc.

    6) Programs involving Software interrupts Programs to use DOS interrupt INT 21h

    Function calls for Reading a Character from keyboard, Buffered Keyboard input,

    Display of character/ String on console

    II) Experiments on interfacing 8086 with the following interfacing modules through

    DIO (Digital Input/Output-PCI bus compatible) card

    a) Matrix keyboard interfacing

    b) Seven segment display interface

    c) Logical controller interface

    d) Stepper motor interface

    III) Other Interfacing Programs