mram_presentation

MRAM:Exploration of potential advantages and challenges of magnetic

memories for the design of future digital systems

Paolo Vinella, Graduate Student, University of Illinois at Chicago - [email protected]

My focus on MRAM

• MRAM the main topic of my research Thesis for graduation at UIC (Electronic Engineering, ECE Dept.)

• Thesis proposal by Prof. Rao in Sept. 2014

• A challenging topic, considering my interest into high-speed and low-power digital computer systems

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Computer System = Information Processing

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Performance Limits = Bottlenecks

• Embedded CPU memory fast but small

• Most of the time the processor waits (NOPs) for new data to be loaded into its registers

• Outer data present in slower memory systems, like DRAM, which may in turn need to load data from other slower memory devices like hard drives

• Several bottlenecks while retrieving and storing back data limit overall system performance

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Current memory tech: none is best!• CACHE (SRAM): small and fast, but volatile and expensive

• MAIN MEMORY (DRAM): dense and less expensive, but slower and volatile

• SECONDARY STORAGE (FLASH): denser, non-volatile and less expensive, but far slower and not long-term reliable (for ex., floating gate degradation issues)

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DREAM-MEMORY: an unique, universal, fast memory technology applicable to all levels, combining only the advantages of current

memories at little cost and extra design effort

A DREAM?

Power & Memory: careful considerations• STATIC POWER: needed to keep the system ON

• DYNAMIC POWER: due to tasks running on the hardware system

• STAND-BY POWER: reduced power state (sleeping mode)

• LEAKAGE POWER: unwanted causes information loss (-> use refresh)

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DREAM-MEMORY: not power hungry, friendly to low-power states (capability to retain data at small or no power on!)

ITRS Issue 2013: Predictions and Trends• ITRS is a committee defining standard for an International Technology Roadmap for

Semiconductors

• Near Term 2013-2020: CMOS scaling, endurance, noise margin, and reliability requirements, solve memory latency gap in systems

• Long-Term 2021-2028:

identification and implementation of new memory structures

DRAM and SRAM replacement solutions

implementing non-charge-storage type of NVM cost effectively

low-cost, high-density, low-power, fast-latency memory for large systems

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MRAM: that dream could become true…

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MRAM stands for “Magnetic Random Access Memory” and is a new class of digital memory devices to store data playing with magnetic field

effects on ferromagnetic materials

MagnetismJust a simple introduction on magnetic principles behind MRAM technology…

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Electromagnetism: where, when and why• Due to electron spin and orbital motion around nucleus

• Electron behaves as a tiny bar magnet, thus its motion can be described as a very small current loop crossed by a current, generating a magnetic field

• M is the magnetic dipole moment per unit volume, and expresses the natural magnetization of a material

• Apply a magnetic field H to a material: it responds with a magnetic induction B:

• µ>>1: ferromagnetic material: above the Curie temperature, for example 770°C for Fe, it looses this property.

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B!"= µ0 (H

!"!+M! "!)

M

Magnetism: key point for MRAM• It is all about controlling the magnetization direction of a ferromagnetic layer

(“switching”)

• Easy axis: the axis along the magnetization M tends to align (along crystallographic directions). This phenomena is called anisotropy

• Stoner-Wohlfarth Model: used to find the rotation angle of M wrt the easy axis when an external magnetic field is applied to a ferromagnetic layer:

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E = 0.5HKMS sin2(θ )−MSH cos(α −θ )

We need stable condition (permanent switching!)

Reversible Rotation: Ms comes back after H!"

removed

Irreversible Rotation: Ms keeps new orientation even after H!"

removed

a threshold pointd 2εdθ 2 =

< 0 := 0 :> 0 :

⎧⎨⎪

⎩⎪

Magnetoresistance effects• ANISOTROPIC MAGNETORESISTANCE (1856): R = f (θ J,M)

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(a) External field applied → PARALLEL → RLOW (b) No field applied → ANTIPARALLEL → RHI

• (GIANT) TUNNELING MAGNETORESISTANCE (TMR Ratio) (1975): FM//OXIDE//FM (“MTJ”)

• GIANT MAGNETORESISTANCE - GMR (1988, Nobel in 2007): FM//NM//FM layerFMNMFM

FMNMFM

Nowadays, near TMR=500% at room

temperature!

“Pinned layer” (fixed direction) + Oxide + “Free layer” (able to switch magnetization)

Use THIN films for abrupt P/AP

transition

MTJ as memory element!

• Binary resistor (LOW or HIGH)

• Can be used to associate “0” (low) or “1” (high): MEMORY!

• Read: current sense or voltage sense to determine the state

• Write: depends on technology!

Field MRAM: written with a magnetic field stimulating the top layer;

STT-MRAM: written by a current flowing through the device.

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Memory tech: state-of-the-art comparison

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Field MRAM

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Basic circuit & write• Basic memory idea (BL / WL):

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• 1T-1MTJ configuration - Write: two orthogonal magnetic fields, generated by currents crossing a write word line and the bit line

Schemes from Magnetic Memory: Fundamentals and Technology, Cambridge Press.

Reading• Current sensing: apply a voltage to the cell and read its current (MOST COMMON); • Voltage sensing: apply a current and measure the current. • In both cases, a sense amplifier is needed to detect the digital level (0 or 1) • In both cases, the cell is compared against reference cell (different methods: twin cell,

external reference cell, self-reference)

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• Example of current sensing with external reference cell:

Scheme from Magnetic Memory: Fundamentals and Technology, Cambridge Press.

More on writing• Two perpendicular magnetic fields: along the easy axis and the “hard axis” (the perpendicular one):

Easy axis enough for permanent switching However, use in conjunction with hard axis field which allows to decrease the amplitude of magnetic field needed along easy axis (less current required)

• Astroid mode: classical writing method

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Reversible Rotation Area

Irreversible Rotation Area

Schemes from Design Considerations for MRAM, T.M. Maffit at al., IBM J. RES. & DEV. VOL. 50 .

Warnings and Remarks on Field MRAM• Keep reading voltage <= 200-300mV (otherwise TMR decreases)

• Write currents typically of few mA

• Need of a reliable production process: spread of MTJ’s TMR ratios must not spread too much, and RHI and RLOW distributions must not overlap!

• Previous restriction imposes a limitation in memory size (array length)

• Also standard deviation of conductance of sense amplifier must be small

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Issues of Field MRAM• Writing power (high): to reduce writing currents, improve write line materials (use a

ferromagnetic material which amplifies the generated magnetic field)

• Write margin: ability to reliable write a cell without disturbing others. Reduced by:

1. Half-select disturbs: half-selected cells may switch! Measured by BER, half-selected bit error rate probability. On the contrary, to keep the write-fail rate low, applied field to cell to write is much higher than Astroid boundary: BER issue is not really negligible!

2. Stray field problem: nearby cells may suffer magnetic field generated by nearby cells

3. Statistical spread of the Astroid: depends a LOT on MTJs’ shape!

4. Variability of applied field (depends on CMOS parameters, supply voltage, wires resistance)

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Improve write margin: towards Toggle-Mode MRAM• Segmented write: split the word line in small segments, allows to increase the

word line current and relax the bit line current;

• Asymmetrical MJT shape: to improve switching characteristic, play on shape

• Better solution “Toggle-Mode MRAM”: rotate MTJ 45° + add antiferromagnet to both layers

• Not Astroid but “spin-flop” field: use a field (along x and y) greater than a determined threshold so that the two magnetizations scissor along the direction of the applied field

• One polarity currents now required: simplified design

• Half-selected cells much more immune to disturbance

• No net magnetization => no stray-field problems

21Scheme from Magnetic Memory: Fundamentals and Technology, Cambridge Press.

STT-MRAM

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A new approach: SPINTRONIC!• Not a set of perpendicular magnetic fields simply a current flowing through the device realizes

switching 0 <-> 1

• Basic principle more recent: SPINTRONIC! “Spin-torque transfer” discovered only in 1996

• Current seen as a set of spin-up and spin-down electrons, which flowing through a ferromagnet is subject to interesting alterations

• Polarization can change populations of spin-up and spin-down electron

• INTERESTING PART: a polarized current (106 - 107 A/cm2) can switch the magnetization itself! “SPIN-TORQUE TRANSFER” effect

• Applied first to GMR and then to MTJs

• Great results (at least on the paper…)

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Basic understanding (don’t worry, no theory here!)• Application to GMR stack: ferromagnet acts as a polarization filter changing

densities of spin-up and spin down electrons. Single layer vs multilayer:

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M1 fixed (pinned): minority-spin electrons

reflected back!Scheme from Magnetic Memory: Fundamentals and Technology, Cambridge Press.

It works also on MTJs!• A simplified view of the phenomena:

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• Careful with reliability: dielectric breakdown. Write current two order of magnitudes larger than current through Field-MRAM MTJ, while resistance is two order of magnitudes lower!

• With time, dielectric gets much stressed and tunneling current may increase gradually.


How beautiful can STT-RAM be?• STT-RAM has all the characteristics of a universal memory:

Non-volatile

Highly scalable

Low power consumption

SRAM read/write speed

Unlimited endurance

DRAM & Flash density

Multi-level cell capability

26Source: Latest Advances and Future Prospects of STT-RAM, Alexander Driskill-Smith, © 2010 Grandis Corporation

Advantages over conventional MRAM (1)


Advantages over conventional MRAM (2)


Fancy vs Reality…


A growing worldwide interest…


STT-RAM basic memory cell

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Digital Applications of MRAM

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Ready for the MRAM era?• A new field yet to be explored completely

• Gives birth to new concepts and idea of digital circuits

• Allows to forge “combinational” and “sequential” logics

• “Compute and store” in-logic - what is that?

• Extremely recent developments (nothing relevant prior to 2000): no unified literature, no global view, but huge research interests

• Lots of challenges to be addressed

• Sometimes, require a complete rethinking over the traditional approach towards digital circuits design!

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Unbalanced Flip-Flop• Flip-Flop review: basic idea is two cross-coupled inverters…

remember?

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Unbalanced Flip-Flop (cont’d)• MTJ magnetic flip-flop enables new interesting property:

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It’s RUNTIME RECONFIGURABLE!


Unbalanced Flip-Flop (cont’d)• MTJs programmed in complementary state (0 and 1 or 1 and 0)

• Programming happens when wclk_b=0

• Then, input=1 => current flows from Qn7 to Qn4

• Read=1 triggers metastability, then F-F relaxes to an (updated) memory state, varied thanks to the value stored in the MTJs!

• Programming can be done at any time, even when the F-F is running! In fact, the MTJs won’t change the F-F state until another Read is applied!

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Non-volatile Multiplexer• Main idea: output can be either input data or a fixed value that is

pre-determined by the MTJ states, thus stored within logic


MTJ data register• Make a data register non-volatile thanks to MTJs

• Classic SRAM data register is a master + slave F-F combination

• Just replace one of the two (the slave) with an MTJ F-F!

• Can reach up to 3.5GHz with supply voltage of just 1.2V!


SoC Power Reduction• To reduce power of SoC, lower the power supply Vcc of logic part

which is in stand-by

• Unfortunately, if this part is a memory element, the SNR increases and stored data may be altered

• Need of use two sets of power supply: one for the combinational part, another for the registers

• During standby, lower ONLY the Vc (combinational) part…

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• Solution: exploit MTJ memory non-volatile property

• Use MTJs as registers, thus voltage can drop to zero without any data loss


Runtime reconfigurable electronic systems• FPGA application

• Identify memory in FPGA: Configurable logic blocks (CLB), look-up tables (LUT) and interconnections

• Replace with MTJ idea:

1. CLB: use MTJ register;

2. LUT: forge memory and MUX part within the MTJ MUX idea

3. Interconnections: use MRAM to save statues (will survive at power off)

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New papers are constantly published with possible ideas of MTJ applications, as extension of the ideas proposed in this presentation or revolutionizing other digital fields

(for example, CAM in the CPU or in specialized SoC devices,…)

… and many more!

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mram_presentation

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