modeling of devices for power amplifier...

©Agilent Technologies 2004

Modeling of Devices for Power Amplifier Applications

David E. RootMasaya IwamotoJohn Wood

Agilent Worldwide Process and Technology CentersSanta Rosa, CA USA

Contributions from

Jonathan ScottAlex Cognata

Root et al 2004 UCSD Power Amplifier Workshop

Presentation Outline

• Introduction• Nonlinear Charge Modeling• Electro-Thermal Modeling• Advanced Measurements• Mathematical CAD Techniques • Summary & Conclusions


Power Amplifier Requirements and Modeling Implications

Linearity: Harmonic and Intermodulation Distortion; ACPR; AM-AM; AM-PM

Efficiency: PAE; Fundamental Output Power; Self-biasingModeling Challenges from device physics (III-V transport), complex signals, multiple time-scale dynamics, and the wide variety of device designs in many material systemsAccuracy over bias, frequency, and temperature; powerPerspective for this talk:

Modeling of III-V HBTs & HEMTs for circuit simulationPrimarily from CAD perspective


Nonlinear Charge Modeling: MOTIVATIONFET models with same I-V eq.s but different charge eq.s [2]

IM3

[ dBm

]

0Model A = 1 /

jCV φ−

Model B = Modified Statz Model (1987)

Charge model is critical for distortion simulationContour

Model C = "Agilent (HP) FET Model" (1991) = C dV⋅∫


Charge Modeling Problem for Circuit SimulationSpecify two (e.g. Gate and Drain) charge functions, Qi, ,i=G,D such that:

( ( ), ( ))( ) ( ( ), ( )) i GS DSi i GS DS

dQ V t V tI t I V t V tdt

= +Can calculate charge function from physics (in theory) [6]. “Inverse modeling” alternative (not just table-based):Relate model functions to small-signal data and equivalent ckt.

intIm( )G G

GS DS

D D

GS DS

GS GD GD

m GD DS GD

Q QV VYQ QV V

C C CC C C C

ω

∂ ∂⎡ ⎤⎢ ⎥∂ ∂⎢ ⎥= =∂ ∂⎢ ⎥

⎢ ⎥∂ ∂⎣ ⎦+ −⎡ ⎤

⎢ ⎥− +⎣ ⎦

DS

GCGS CGD

Cm

CDS

data Derivatives of model function


Measured Bias-Dependent FET Gate Capacitances

VDS 5.00.0

400fF

0.0VDS 5.00.0

160fF

20fF

CGDCGSVgs=+0.5

Vgs=-1.5Vgs=-1.5

Vgs=+0.5

0.25um PHEMT

DS

GCGS CGD

Cm

CDS

The measured data cannot be modeled by two, two-terminal nonlinear capacitorsA single QG function must model both CGS and CGD


A model QG function consistent w. SS data exists if and only if( )meas meas meas

GS GD GD

DS GS

C C CV V

∂ + −∂=

∂ ∂This is a constraint on

pairs of independently measured Y– parameters (or S-parameters)pairs of “measured” device capacitances (attached to gate node)

This is the modeling principle of Terminal Charge Conservation

(D. Root 2001 ISCAS Short Course)(1)

The prescription for model charge calculation is, then:model [( ) ]

GS GD GD

meas meas measG GS DS

contour

Q C C dV C dV= + −∫(2)

Similar conditions to (1) and (2) can be written at the drain

Measured FET data are very consistent with (1) at gateSomewhat less consistent at drain


Why not use independently measured capacitances?

( ) ( ( ), ( ))( ) ( )( ( ), ( )) ( ( ), ( ))

GS GD

G G GS DS

meas measGS GDGS DS GS DS

I t I V t V tdV t dV tC V t V t C V t V t

dt dt

= +

+

freqω 2ω

IG

freqω 2ω

IG

This model will fit bias-dependent capacitances perfectlyBUT: It can be shown the capacitance terms yielda spectrum with a DC component!

Terminal Charge Conserving capacitances do not produce a DC component

Enforcing Terminal Charge Conservation is a modeling trade-off. It is not physical charge cons. (KCL)

Root RAWCON98


m1indep(m1)=2PAE_contours_p=0.318 / 89.811level=77.159945, number=1impedance = Z0 * (0.818 + j0.579)

m2indep(m2)=3Pdel_contours_p=0.603 / 156.285level=26.261844, number=1impedance = Z0 * (0.258 + j0.197)

indep(PAE_contours_p) (0.000 to 40.000)

PA

E_c

onto

urs_

pm1

indep(Pdel_contours_p) (0.000 to 50.000)

Pde

l_co

ntou

rs_p

m2

freq (1.000GHz to 1.000GHz)

untit

led4

..S

(1,1

)un

title

d4..

S(3

,3)

Maximum Power-AddedEfficiency, %

77.26

Maximum PowerDelivered, dBm

26.27

PAE (thick) and Delivered Power (thin) Contours

Measured Maximum Pout

Simulated PAE Contours

Simulated Pout Contours

Measured Maximum PAE

Example: EPHEMT Large-Signal Model [24]Analytic I-V, table-based charge and gate current, + self-heating

Simulated EPHEMT Load-Pull contours for Pmax & PAE.

Max PAE: 77.26% meas. 77.16% simulated.Max Power: 26.26 dBm measured and simulated


Terminal Charge Conservation and III-V HBT Modeling [4]

Intrinsic common-emitter HBT Y-parameters are of the form:

intIm( )BB BB BB BB BB BB

m CEBE CE BC C BC C B B m B B CE

CC CC CC CC CC CC C C m C C CEm CE

BE CE BC C BC C

Q Q Q Q Q Qg gV V V I V I C g C gYQ Q Q Q Q Q C g C gg gV V V I V I

τ τω τ τ

∂ ∂ ∂ ∂ ∂ ∂⎡ ⎤ ⎡ ⎤+ − +⎢ ⎥ ⎢ ⎥∂ ∂ ∂ ∂ ∂ ∂ ⎡ ⎤+ ⋅ − + ⋅⎢ ⎥ ⎢ ⎥= = = ⎢ ⎥∂ ∂ ∂ ∂ ∂ ∂⎢ ⎥ ⎢ ⎥ + ⋅ − + ⋅⎣ ⎦+ − +⎢ ⎥ ⎢ ⎥∂ ∂ ∂ ∂ ∂ ∂⎣ ⎦ ⎣ ⎦

Where:( )

21 22Im( )CCC

C m CE

Q Y YI g g

τω

∂ += =

∂ +21Im( )CC

C C mBC

Q YC gV

τω

∂= = − ⋅∂

C C

BC C

CV Iτ∂ ∂

=∂ ∂

Necessary and Sufficient ConditionsFor model QCC consistent with ss data:

QCC can then be constructed directly from data by:

[ ]CC C BC C Ccontour

Q C dV dIτ= +∫

III-V HBT Base-Collector Delay / Capacitance model [4]Measured base-collector transit time

CC C BC C CQ C dV dIτ= +∫

Shape of delay (before Kirk effect) related to velocity-field curves

( ( , ) )difQ V I Iτ≠ ⋅

C C

BC C

CV Iτ∂ ∂

=∂ ∂

“Capacitance cancellation”effect in III-V HBTs follows

-


Device data, model equations, and physics consistent


GaAs HBT power cell (“2x20 quad-emitter” device):(4x2x20) fT & CBC vs. IC

10 20 30 40 500 60

5

10

15

20

25

30

35

0

40

Ic (mA)

ft (

GH

z)

10 20 30 40 500 60

1E-13

2E-13

3E-13

4E-13

0

5E-13

Ic (mA)C

bc

(Fa

rad

s)

VCE=0.5 to 3V w/0.5V per stepMeasurementsSimulations [25]

Accurate charge model necessary to fit both fT and CBC, simultaneously over wide range of bias.

Si-based models do not fit this behavior well, generally


GaAs HBT power cell (“2x20 quad-emitter” device):S-parameters: 0.5-25.05 GHz

freq (500.0MHz to 25.05GHz)

S21

& S

12

freq (500.0MHz to 25.05GHz)

S11

& S

22

S21/25

S12•10S11

S22

MeasurementsSimulations

VCE=1,2,3VJC=0.05mA/µm2


Nonlinear Charge Modeling: Bias-Dependent IM3 of III-V HBTs [4]

VCE VCE

Measured fTSimulated fT

fT related to ττ modeled by Q

Charge model is critical for distortion simulationIc (A)0.0010.0020.0030.0040.0050.0060.0070.0080.000 0.009

Pout

IM3 VCE=2 to 4.5V

Measured Pout, IM3Simulated Pout, IM3

-80

-70

-60

-50

-40

-30

-20

-10

0

0 0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008 0.009

Ic (A)

Pow

er (d

Bm

)

IM3

Pout


6x(2x14)µm2 InGaP/GaAs HBT cell:AM-AM and AM-PM distortions

0

2

4

6

8

10

12

14

16

-35 -30 -25 -20 -15 -10 -5 0 5 10

Input Power (dBm)

Gai

n (d

Bm

)

88

89

90

91

92

93

94

95

96

Phas

e (d

egre

es)

Good collector charge model critical foraccurate AM-AM and AM-PM

Symbols: MeasurementSolid lines: Simulation

VCE=3.5VJC=0.12mA/µm2

Frequency=5GHzRL=50Ω


Dynamic electro-thermal (self-heating) modelAlgebraic perspective

T(t) is a dynamical variable

( ) ( ( ) ( ), ( ), )c c be ceI t I V t V T tt=

( ) ( ( ), ( , , ),( ) ( ))tc tc bc c be ceQ t Q V t I V t TV T t=Charge due to transit delay is a function of temperatureTemperature evolution equation based on dissipated power

TH C CEdT T R I Vdt

τ + ∆ = simplified

T(t) calculated by the simulator self-consistently


Dynamic electro-thermal (self-heating) model [25]

Currents, Voltages, and T(t) calculated by the simulator self-consistentlyusing coupled electrical and thermal equivalent circuits

2-pole thermal circuit used. Collapsible to single node.

deltaTTT ambdev +=

Tdev=device junction temperatureTamb=device ambient (backside) temperature


Self-heating model (static case)

1.1

1.2

1.3

1.4

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0VCE (Volts)

V BE

(Vol

ts)

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0VCE (Volts)

J C (m

A/ µ

m2 )

MeasurementSelf-heating model [25]

Isothermal model


1 2 3 4 5 6 7 8 90 10

100

200

300

400

0

500

Vce (Volts)

de

ltaT

(K

elv

in)

Thermal Coupling: Current Collapse Instability Simulated with III-V HBT Model [25]

•Thermal node allows interactions between devices. •Temp limited for convergence (but see [11])•Realistic thermal constitutive relations required [10]

HBT1HBT2

delT2delT1

RRth_shnt2

RRth_shnt1

RRthx

AgilentHBT_NPN_ThHBT2SelfTmod=1

th

I_ProbeIcct

I_ProbeIcc2

I_ProbeIcc1

AgilentHBT_NPN_ThHBT1SelfTmod=1

th

V_DCSRC1Vdc=VCE

I_DCSRC2Idc=IBB

thermal network

HBT2HBT1

IcctHBT1HBT2

1 2 3 4 5 6 7 8 90 10

100

200

300

0

400

Vce (Volts)

Icct

, Ic

c1,

Icc2

(m

A)


Dynamic electro-thermal III-V HBT Model Low Freq. S-parameters and Pulse Response Measured/Simulated

Comparison of different thermal equivalent circuits in Linear (s-parameter) and Transient (time-domain) cases

1E4 1E5 1E6 1E7 1E81E3 1E9

24

25

26

27

23

28

Frequency (Hz)

S21

(dB

)

Extrapolationof measured

Mag(S21) vs. Frequency1-poleMeasured2-poles

No thermal 0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

16.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2time (msec)

I C (m

A)

Pulsed IC vs. time

No thermal1-pole

2-polesMeasured

Two poles are more accurate than one [8].Compromise between speed and accuracy (SPICE).Distributed models can be used for HB analysis [7].


6x(2x14)µm2 InGaP/GaAs HBT cell:Electro-thermal Model Simulates PAE & IDC Accurately

0.0

10.0

20.0

30.0

40.0

50.0

-15.0 -10.0 -5.0 0.0 5.0 10.0 15.0 20.0

Output Power (dBm)

PAE

(%)

10.0

20.0

30.0

40.0

50.0

60.0

I DC (m

A)


Frequency=5GHzRL=50ΩSimulation: 1-tone HB



6x(2x14)µm2 InGaP/GaAs HBT cell:ACPR & PAE vs. Output Power

-80.0

-70.0

-60.0

-50.0

-40.0

-30.0

2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0

Output Channel Power (dBm)

AC

PR (d

Bc)

0.0

20.0

40.0

60.0

80.0

100.0

PAE

(%)


Frequency=1.9GHzRL=50ΩModulation: IS-95 Rev. LinkSimulation: Envelope



Advanced Measurements

Essential forModel DevelopmentModel ValidationDevice characterization for technology development

Can not always infer dynamic large-signal behavior from only static (DC) or linear (S-parameter) data

Preferred for characterizing limiting behavior (e.g. breakdown)


GaN Devices

1 mm 10 fingers

GaN on Si

fT ~ 30GHz

Pulse width 2us

Pulsed measurements provide much more datathan can be measured under static (DC) conditions


Pulsed data on III-V HBTCurrent dependence of breakdown [15]

5x2x14 CE GaAs HBT

fT ~ 60GHz

Pulse width 1us

Can observe and extract breakdown parameters


Pulsed Bias Measurements

Same 0.25um PHEMT device

Soak time ~20 ms Pulse width ~200 ns “Iso-dynamic”

Can use to separate thermal and trapping effects


Vector Nonlinear Network Analyzer (VNNA) Measurements:Breakdown Current

Time (ns)

Biased wellbelow pinch-off

Measure device under conditions of actual use.Examine reliability under these conditions.


Vector Nonlinear Network Analyzer (VNNA) Measurements: Forward Gate Current

Time (ns)

Biased less negativelythan before

Measure device under conditions of actual use.Forward gate current in pHEMTs is complicated.


Vector Nonlinear Network Analyzer (VNNA) Measurements: Phase of device intermodulation versus bias

measuredSimulatedAgilentHBT



• Introduction• Nonlinear Charge Modeling• Electro-Thermal Modeling• Advanced Measurements• Mathematical CAD Techniques• Summary & Conclusions


Table-Based Model LimitationNaive simulator interpolation -> poor distortion

Vd

IP3(dBM)

-1.4

-1.0

P=-20dBm

Voltage Swing

Vgs

Vds0.06V

-0.6

Vd

IP3(dBM)

(a) Vg=-1V Power=-10dBm0.2V

P=-10dBmVgs

Vds

-0.6

-1.4

-1.0

(b) Vg=-1V Power=-20dBm

Si NJFET2-tones @ 100MHz (+1MHz)

Table Model

Null in third derivative of spline w.r.t. Vgs (2nd axis) with symmetrical data points

Interpolation model is better when signal size ~ data spacing


Artificial Neural Networks

A NN is a parallel processor made up of simple, interconnected processing units, called neurons, with weighted connections.

baxwsvxxFI

i

K

kikkiiK +⎟⎠

⎞⎜⎝

⎛+=∑ ∑

= =1 11 ),...,(

sigmoidweights biases

x1

...

xk

• Universal Approximation Theorem: Fit “any” nonlinear function of any # of variables• Infinitely differentiable: good for distortion.• Easy to train (fit) using standard third-party tools (MATLAB)


Artificial Neural Networks: Excellent, smooth fit.Better than simple table-based models

+ Measured data Blue Lines ANN fit


Adjoint Neural Network [21]Constructing FET gate charge, Qg, given ( )11 12Im , Immeas measY Y

Experimental validation of terminal chargeconservation at the gate for GaAs pHEMT

g

ds

QV

∂

∂

VdsVds

g

gs

QV∂

∂

11ImYω 12ImY

ω

( , )gg gs dsC V V( , )gd gs dsC V V−

X measured___ modeled


Summary and Conclusions

• Charge Modeling shown to be critical for simulating PA FoMs• Terminal Charge Conservation modeling principle discussed in detail. • Two-dimensional FET capacitances• Voltage & Current dependent transit time and capacitance in III-V HBTs

•Electro-Thermal Effects shown to be important for PA simulation• Static and dynamic self-heating necessary to fit device characteristics• Technical issues with thermal equivalent circuit, thermal coupling,

and thermal constitutive relations summarized

•Advanced Measurements shown to reveal rich device behavior•Advanced CAD shown promising for better PA simulation models

modeling of devices for power amplifier...

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