Chuong 3M t tp lnh Assembly ca 8086/8088 Khun dng: Mnemonics Cc ton hng Nhm lnh chuyn s liu- Nhm lnh s hc Nhm lnh logic Nhm lnh R nhnh Nhm lnh thao tc string Nhm lnh hn hp

3.1.Khun dng: Mnemonics Cc ton hng3.1.1. Mnemonic ( T gi nh) Assembly s dung cac cum t thay the cho cac oan ma lenh cua ngon ng may . Cac cum t o la cac t viet tat trong tieng anh co tac dung gi nh .Khi dch Assembler se dch ra ma may tng ng .o ch la ch dan e ieu khien cach dch cua Assembler.

3.1.2. Toan hang : (Operad) La d lieu ma cau lenh can x ly. Toan hang co the la:thanh ghi, ten thanh ghi, hang, bien, nhan, chng trnh con,bieu thc... *Chu thch : c viet sau dau cham phay(;) cuoi moi lenh hay au dong.

3.2.Nhm lnh chuyn s liu (Data Transfer Instructions) Chuyn s liu (sao chp s liu) t v tr ny sang v tr khc Ngun s liu khng thay i ich s c gi tr nh gi tr ca Ngun Cc lnh chuyn s liu khng nh hng n cc c trng thi trn thanh ghi c Mt s lnh tiu biu: MOV, XCHG

3.2.1Data Transfer Instructions - MOV

Khuon dng: MOV ch,Ngun Tc dng: Chuyen noi dung toan hang nguon vao toan hang ch . ch: c th l: + Mt thanh ghi 8 hoc 16 bit ca VXL + Mt v tr nh (1 hoc 2 nh lin tip nhau) Ngun: c th l: + Mt thanh ghi 8 hoc 16 bit ca VXL + Mt v tr nh (1 hoc 2 nh lin tip nhau) + Mt gi tr c th

Mt s lu i vi MOV ch v Ngun phi c cng kch c ch v Ngun khng th ng thi thuc b nh Nu ch l mt thanh ghi segment ca VXL th Ngun khng th l mt gi tr c th (ni cch khc, khng th np gi tr trc tip cho mt thanh ghi segment bng lnh MOV)

3.2.2.Data Transfer Instructions - XCHG

Khuon dng: XCHG T/h1,T/h2 -Tc dng: dung e hoan chuyen noi dung cua hai toan hang T/h1: c th l: + Mt thanh ghi 8 hoc 16 bit ca VXL + Mt v tr nh (1 hoc 2 nh lin tip nhau) T/h2: c th l: +Mt thanh ghi 8 hoc 16 bit ca VXL +Mt v tr nh (1 hoc 2 nh lin tip nhau)

Mt s lu i vi XCHG T/h1 v T/h2 phi c cng kch c T/h1 v T/h2 khng th ng thi thuc b nh T/h1 v T/h2 khng th l cc thanh ghi segment

Cc mode a ch Khi thc hin lnh, VXL s thc hin nhng thao tc nht nh trn s liu, cc s liu ny c gi chung l cc ton hng. Cc ton hng trong mt cu lnh c th l mt phn ca cu lnh ( dng m my), c th nm mt thanh ghi ca VXL hoc B nh Cch xc nh ton hng trong cc cu lnh c gi l cc mode (nh) a ch

Cc mode a ch Mode a ch thanh ghi: MOV AX,BX Mode a ch tc th: MOV AL,55h Cc mode a ch b nh: Cc cch thc xc nh a ch vt l ca ton hng nm trong b nh: Mode a ch trc tip Cc mode a ch gin tip

Mode a ch trc tip (Direct Addressing Mode)

Trong mode a ch nay mot toan hang cha a ch offset cua o nh dung cha d lieu con toan hang kia la thanh ghi ma khong c la o nh V du:MOV CH,[1234h];chuyen noi dung o nh ;DS:1234 vao CHMOV [4320],CX ; chuyen noi dung CX vao 2 o ; lien tiep DS:4320 va DS:4321

Mode a ch gin tip thanh ghi(Register Indirect Addressing Mode)

Trong mode a ch nay mot toan hang la mot thanh ghi c s dung e cha a ch offset cua o nh cha d lieu,con toan hang kia ch co the la thanh ghi ma khong c la o nh.V du:MOV AL,[BX] ;chuyen noi dung o nh co a ch DS:BX vao AL.MOV [SI],CL ;chuyen noi dung CL vao o nh co a ch DS:SIMOV AX,[SI] ;chuyen noi dung hai o nh lien tiep DS:SI va DS:(SI+1) vao AXMOV [DI],AX ;chuyen noi dung AX vao 2 o nh lien tiep co a ch DS:DI DS:(DI+1).

Mode a ch c s-ch s(Based-Indexed Addressing Mode)

Trong mode a ch nay ta dung ca hai thanh ghi c s lan thanh ghi ch so e tnh a ch cua toan hang.Neu ta dung them ca thanh phan bieu dien s dch chuyen cua a ch th ta co mode a ch phc hp nhat:mode a ch tng oi ch so c sV du: MOV AX,[BX][SI]+8 ;chuyen noi dung 2 o nh lien tiep co a ch DS:(BX+SI+8) va DS:(BX+SI+9)MOV AX,[BX+SI+8] ; nh trenMOV CL,[BP+DI+5] ; chuyen noi dung o nh SS:(BP+DI+5) vao CL

Cac cap thanh ghi segment va thanh ghi offset ngam nh

V du: Trong lenh MOV AL,[BX] th a ch vat ly cua toan hang e chuyen vao thanh ghi AL tng ng vi DS:BX v DS la oan ngam nh cua vung nh toan hang do BX ch ra.Neu muon thay oi khong lay toan hang trong oan d lieu DS na ma lay toan hang trong oan d lieu ES e a vao AL th viet lenh thanh: MOV AL,ES:[BX]

Nh cc mode a ch b nh nh th no?Tt c bt u trong bng sau y:

Ly ra 0 hoc 1 phn t t mi ct(Khng ly 2 phn t t mt ct)Phi ly t nht 1 phn t t bng

Cc v d

Cc v d

Cc v d

M myMt lnh c th di t1 n 6 byte Byte 1 gm: Opcode (6 bit) xc nh php ton cn thc hin Bit D xc nh ton hng REG ca Byte 2 l ngun hay ch:1: ch0: Ngun Bit W xc nh kch c ca ton hng l 8 bit hay 16 bit0: 8 bit1: 16 bit Byte 2 gm:Mode field (MOD), Register field (REG)Register/memory field (R/M field)

Anatomy of an instructionOpcode contains the type of instruction we execute plus two special bits, D and WThe mode byte is used only in instructions that use register addressing modes and encodes the source and destination for instructions with two operandsD stands for direction and defines the data flow of the instructionD=0, data flows from REG to R/MD=1, data flows from R/M to REG W stands for the size of dataW=0, byte-sized dataW=1, word (in real mode) or double-word sized (in protected mode)

Cau truc mot lenh .Opcode cha loai lenh ma ta thc hien tren 2 bit ac biet D va W..Byte mode ch c s dung trong nhng lenh ma s dung cac mode a ch thanh ghi va ma hoa nguon va ch cho cac lenh co hai toan hang..D bieu th hng di chuyen cua d lieu trong cau lenh-D=0 d lieu i t thanh ghi en thanh ghi/bo nh.-D=1 d lieu i t thanh ghi/bo nh en thanh ghi

Anatomy of an instructionMOD field specifies the addressing mode00 no displacement01 8-bit displacement, sign extended10 16-bit displacement11 R/M is a register, register addressing modeIf MOD is 00,01, or 10, the R/M field selects one of the memory addressing modesOPCODEMODR/MREG

Registers in the REG and R/M fieldsCodeW=0 (Byte)W=1 (Word)W=1 (DWord)000ALAXEAX001CLCXECX010DLDXEDX011BLBXEBX100AHSPESP101CHBPEBP110DHSIESI111BHDIEDI

ExampleConsider the instruction 8BECh1000 1011 1110 1100 binaryOpcode 100010 -> MOVD=1 data goes from R/M to REGW=1 data is word-sizedMOD=11, register addressingREG=101 destination, R/M=100 sourceMOV BP, SPCodeW=0W=1W=1000ALAXEAX001CLCXECX010DLDXEDX011BLBXEBX100AHSPESP101CHBPEBP110DHSIESI111BHDIEDI

Displacement addressingIf MOD is 00, 01, or 10 R/M has an entirely different meaningR/M CodeFunction000DS:BX+SI001DS:BX+DI010SS:BP+SI011SS:BP+DI100DS:SI101DS:DI110SS:BP111DS:BX00MOD01FUNCTION1011No displacement8-bit sign-extended displacement16-bit displacementR/M is a register (register addressing mode)Examples:If MOD=00 and R/M=101 mode is [DI]If MOD=01 and R/M=101 mode is [DI+33h]If MODE=10 and R/M=101 modes is [DI+2233h]

ExampleInstruction 8A15h1000 1010 0001 0101Opcode 100010 -> MOV D=1, data flows from R/M to REGW=0, 8-bit argumentMOD=00 (no displacement)REG=010 (DL)REG=101 ([DI] addressing mode)MOV DL, [DI]

Direct Addressing ModeMOD is always 00R/M is always 110REG encodes the register to/from we take data as usualThird byte contains the lower-order bytes of the displacement, fourth byte contains the high order byte of the displacement

Direct AddressingExample: 8816 00 101000 1000 0001 0110 0000 0000 0001 0000Opcode 100010 -> MOVW=0 (byte-sized data)D=0 data flows from REGMOD 00, REG=010 (DL), R/M=110Low-order byte of displacement 00High-order byte of displacement 10MOV [1000h], DL

Segment MOV instructionsDifferent opcode 100011Segments are selected by setting the REG fieldExample MOV BX, CSOpcode 10001100MOD=11 (register addressing)REG=001 (CS)R/M=011 (BX)8CCB

M myREG xc nh thanh ghi cho ton hng th nht

M myMOD v R/M cng nhau xc nh ton hng th hai

M myMOD v R/M cng nhau xc nh ton hng th hai

V dM ho lnh MOV BL,AL Opcode i vi MOV l 100010 Ta m ho AL sao cho AL l ton hng ngun: D = 0 (AL l ton hng ngun) W bit = 0 (8-bit) MOD = 11 (register mode) REG = 000 (m ca AL) R/M = 011 (m ca BL)Kt qu:: 10001000 11000011 = 88 C3

3.3.Nhm lnh S hcBn cnh tc dng, cn ch n nh hng ca lnh i vi cc c trng thiCc lnh s hc th/thng: ADD, SUB, Cc lnh s hc khc: CMP. NEG, INC, DEC, nh hng n cc c trng thiCF OF Ph thuc vo qu trnh thc hin php tonAF

ZF = 1 nu Kt qu bng 0SF = 1 nu MSB ca Kt qu = 1PF = 1 nu byte thp ca kt qu c Parity chn

3.3.1.Arithmetic Instructions - ADDKhun dng: ADD ch,Ngun Tc dng: : Dung e cong khong nh gia toan hang ch va toan hang nguon , ket qua lu vao toan hang ch ch: c th l: + Mt thanh ghi 8 hoc 16 bit ca VXL + Mt v tr nh (1 hoc 2 nh lin tip nhau)Ngun: c th l: +Mt thanh ghi 8 hoc 16 bit ca VXL +Mt v tr nh (1 hoc 2 nh lin tip nhau) + Mt gi tr c th

nh hng ca ADDZF = 1 nu Kt qu bng 0SF = 1 nu MSB ca Kt qu = 1PF = 1 nu byte thp ca kt qu c Parity chnCF c lp nu trn khng du (c nh t MSB)OF c lp nu trn c du: - C nh t MSB, Khng c nh vo MSB - C nh vo MSB, Khng c nh t MSBAF c lp nu c nh t nibble thp vo nibble cao (t bit 3 vo bit 4)

Cc c trn thanh ghi cCc bit nht nh trn thanh ghi c iu khin hot ng hoc phn nh trng thi ca vi x lCc c iu khin (TF, IF, DF)Quyt nh cch p ng ca vi x l trong cc tnh hung nht nhCc c trng thi (CF, PF, AF, ZF, SF, OF)B nh hng bi cc php ton nht nhPhc v cho cc lnh c iu kin

Cc c iu khinDF - Direction flag (C hng)DF = 1: hung xungDF = 0: hng ln IF Interrupt flag (C ngt)IF = 1: cho php ngt ngoiIF = 0: cm ngt ngoi (i vi ngt che c)TF - Trace flagTF = 1: vi x l thc hin tng lnh mt

Cc c trng thiCarrycarry or borrow at MSB in add or subtractlast bit shifted outParitylow byte of result has even parityAuxiliarycarry or borrow at bit 3Zeroresult is 0Signresult is negativeOverflowsigned overflow occurred during add or subtract

(Signed) OverflowCan only occur when adding numbers of the same sign (subtracting with different signs)Detected when carry into MSB is not equal to carry out of MSBEasily detected because this implies the result has a different sign than the sign of the operandsPrograms can ignore the Flags!

Signed Overflow Example 10010110+ 10100011 00111001

Carry in = 0, Carry out = 1Neg+Neg=PosSigned overflow occurredOF = 1 (set) 00110110+ 01100011 10011001

Carry in = 1, Carry out = 0Pos+Pos=NegSigned overflow occurredOF = 1 (set)

Examples of No Signed Overflow 10010110+ 01100011 11111001

Carry in = 0, Carry out = 0Neg+Pos=NegNo Signed overflow occurredOF = 0 (clear)

10010110+ 11110011 10001001

Carry in = 1, Carry out = 1Neg+Neg=NegNo Signed overflow occurredOF = 0 (clear)

Unsigned OverflowThe carry flag is used to indicate if an unsigned operation overflowedThe processor only adds or subtracts - it does not care if the data is signed or unsigned! 10010110+ 11110011 10001001

Carry out = 1Unsigned overflow occurredCF = 1 (set)

DEBUG's Register Display-R000 SP=0010 BP=0000 SI=0000 DI=000000F IP=004F NV UP DI PL NZ NA PO NCThe state of the Flags are shown in line 2OV/NV: (no)oVerflowDN/UP: directionEI/DI: En(Dis)abled InterruptsNG/PL: signZR/NZ: (not)ZeroAC/NA: (no)AuxiliaryPE/PO: Even/OddCY/NC: (no)Carry(set/clear)

3.3.2.Arithmetic Instructions - SUBKhun dng: SUB ch,Ngun Tc dng: (ch) (ch)-(Ngun) ch: c th l:1. Mt thanh ghi 8 hoc 16 bit ca VXL 2. Mt v tr nh (1 hoc 2 nh lin tip nhau) Ngun: c th l:Mt thanh ghi 8 hoc 16 bit ca VXL Mt v tr nh (1 hoc 2 nh lin tip nhau)3. Mt gi tr c th

nh hng ca SUBZF = 1 nu Kt qu bng 0SF = 1 nu MSB ca Kt qu = 1PF = 1 nu byte thp ca kt qu c Parity chnCF c lp nu trn khng du (c mn vo MSB)OF c lp nu trn c du: - C mn t MSB, Khng c mn t MSB - C mn t MSB, Khng c mn vo MSBAF c lp nu c mn t nibble cao vo nibble thp (t bit 4 vo bit 3)

3.3.3.Arithmetic Instructions - CMPKhun dng: CMP T/h1,T/h2 Tc dng: : Dung e so sanh gia T/h1 va T/h2 . Lenh nay Assembler se lay T/h1 tr T/h2 ket qua c lu trong cac c ma khong thay oi noi dung cua hai toan hang tren

T/h1: c th l: + Mt thanh ghi 8 hoc 16 bit ca VXL + Mt v tr nh (1 hoc 2 nh lin tip nhau) T/h2: c th l: +Mt thanh ghi 8 hoc 16 bit ca VXL +Mt v tr nh (1 hoc 2 nh lin tip nhau) +Mt gi tr c th

Ket qua cua phep so sanh1.1 oi vi so khong dau : 1.2 oi Vi So Co Dau :

3.3.4.Arithmetic Instructions INC, DEC, NEG

INC T/hTrong : T/h c th l cc thanh ghi hoc v tr nhTc dng: (T/h) (T/h)+1

DEC T/hTrong : T/h c th l cc thanh ghi hoc v tr nhTc dng: (T/h) (T/h)-1Lu : Cc lnh INC v DEC khng nh hng n c CFLnh NEG T/h: o du ca T/h (Ly b 2)Lnh NEG s lp c OF nu gi tr ca T/h l gi tr m nht trong di gi tr ca cc s c du tng ng

3.4.Nhm lnh LogicCn ch n nh hng ca lnh i vi cc c trng thiCc lnh logic th/thng: NOT, AND, OR,XORNOT A: ~AAND A,B: A &= BOR A,B : A |= BXOR A,B: A ^= BNOT khng nh hung n cc c trng thi.Cc lnh khc:CF = 0OF = 0ZF = 1 nu Kt qu bng 0SF = 1 nu MSB ca Kt qu = 1PF = 1 nu byte thp ca kt qu c Parity chnAF khng xc nh

Mt s v d1100 1010NOT ALAL0011 0101ALALBL0011 01010110 1101AND AL, BL0010 0101ALALBL0011 01010110 1101OR AL, BL0111 1101ALALBL0011 01010110 1101XOR AL, BL0101 1000ALALBL0011 01010000 1111AND AL, BL0000 0101ALALBL0011 01010000 1111OR AL, BL0011 1111AL

Mt s ng dngBi ton Xo bit: Xo mt bit no ca mt ton hng m khng lm nh hng n cc bit cn li ca ton hng Bi ton Kim tra bit: Xc nh mt bit no ca mt ton hng l bng 0 hay 1 (thng qua gi tr ca mt c trng thi)Bi ton Lp bit: Lp mt bit no ca mt ton hng m khng lm nh hng n cc bit cn li ca ton hng

Mt s lnh logic khcCc lnh logic khc: Lnh TEST, Cc lnh dch (Shift) v Cc lnh quay (Rotate)Lnh TEST ch khc lnh AND l khng gi li kt qu ca php tonCc lnh dch v Cc lnh quay u c hai khun dng: Khun dng 1: Mnemonic Ton hng,1 Khun dng 2: Mnemonic Ton hng,CLTc dng ca mt cu lnh theo khun dang 2 ging nh tc dng lin tip ca N cu lnh tng ng theo khun dng 1, vi N l gi tr ca thanh ghi CL

Cc lnh Dch tri: SHL, SALMSBLSBSHL ,1SHL ,nSAL ,1SAL ,n

Shift right SHRMSBLSBSHR ,1SHR ,n

Shift right SARMSBLSBSAR ,1SAR ,n

Rotate through Carry L/R(Quay tri/phi thng qua carry)MSBMSBLSB

LSB

Rotate left/right (Quay tri/phi khng qua carry)ROLMSBMSBLSB

LSB

3.5.Nhm lnh r nhnhLm thay i trt t thc hin lnh bnh thng ca vi x lLnh nhy khng iu kin: JMPCc lnh nhy c iu kin: JxxxLnh lp: LOOP v cc bin th ca nCc lnh c lin quan n Chng trnh con: - CALL (gi chng trnh con) - RET (tr v chng trnh gi)Cc lnh c lin quan n Chng trnh con phc v ngt - INT (gi chng trnh con phc v ngt - Gi ngt) - IRET (quay v chng trnh gi ngt)

3.5.1Lnh nhy khng iu kinJMP nhnNhy ngn: EB xx (2 byte)Nhy gn: E9 xx xx (3 byte)Nhy xa: EA xx xx xx xx (5 byte)Nhn: tn do ngI lp trnh t t ra theo qui tc t tn ca Assembler v c th t vo trc mt cu lnh bt k trong chng trnh cng vi du : Cu trc :Nhn: Cu lnh cn thc hin

Nhn s c dch thnh a chKhong cch nhy: Khong cch i s (c du) t lnh nhy n lnh cn thc hin

C ch thc hin lnh nhyCc lnh nhy ngn v gn ch lm thay i gi tr ca thanh ghi IPLnh nhy ngn cng khong cch nhy 8-bit c du vo gi tr hin thi ca IPLnh nhy gn cng khong cch nhy 16-bit c du vo gi tr hin thi ca IP Lnh nhy xa lm thay i c CS v IPGn cho CS v IP cc gi tr mi

M my ca lnh nhy1106:0100 EB2A JMP 012C012C-0102=002A1106:0102 EBFC JMP 01000100-0104=FFFC1106:0104 E97F00 JMP 01860186-0106=0080 (too far for short!)0186-0107=007F1106:0107 E9F5FE JMP FFFFFFFF-010A=FEF5

3.5.2.Cc lnh nhy c iu kinJxxx nhn C gn 40 lnh khc nhauCc lnh nhy iu kin n: ph thuc vo gi tr ca 1 c.Tt c cc lnh nhy c iu kin phi l nhy ngnkhong cch nhy: -128 to +127 bytes T hp vi lnh nhy khng iu kin c th vt qua gii hn ny. Cc lnh nhy thng theo sau cc lnh lm thay i gi tr ca cc c trng thi:CMP-Lnh logic TEST Lnh kim tra

V du cc lnh nhy c iu kin:Cc lnh nhy c iu kin n:+JNZ/JNE - Nhy nu c ZF = 0, ngha l kt qu ca php ton trc khc khng+JC -Nhy nu CF = 1, ngha l cu lnh trc CF c lp+JZ/JE-Nhy nu c ZF =1+JNC/JNB/JAE-Nhy n nhn nu tha mn c CF=0

Cc lnh nhy iu kin kp: ph thuc vo gi tr ca nhiu c+Lnh JNL/JGE-Nhy nu SF=OF+Lnh JLE-Nhy nu tha SFOF vZF=1+Lnh JA/ JNBE: Nhy nu CF = 0 v ZF= 0+ Lnh JBE/ JNA : Nhy nu CF = 1 hoc ZF = 1 + Lnh JG :Nhy nu SF = OF v ZF= 0+ Lnh JGE :Nhy nu SF = OF+ Lnh JL/JNGE-Nhy nu SFOF

ng dng ca cc lnh nhy c iu kin

Kt hp vi JMP xy dng cc cu trc lp trnh c bn: - Cu trc iu kin - Cu trc lp

Cu trc iu kin

mov ax,n cmp ax,7 jz nhan1 lnh 1 jmp nhan2 nhan1:lnh 2 nhan2:lnh 3

Cu trc iu kin - ANDchar n; int w,x;if (n>='A' && w==x)whatever();;if(n>='A'&&w==x) mov ah,ncmp ah,'A' jl nhan mov ax,w cmp ax,x jne nhan;then-partcall whatevernhan: ;nhom lenh

Cu trc iu kin - ORchar n,k; unsigned int w;if (nk || w

Cu trc lp mov ax,n nhan1: cmp ax,0 jz nhan2 ;lnhi sub ax,2 jmp nhan1 nhan2: ;lnhk

3.5.3Lnh LOOPLOOP nhanGim CX i 1Nu (CX) 0 th JMP nhan. Nu khng th tip tc thc hin lnh theo trt t bnh thng

mov cx,9nhan: lnh 1 lnh 2 lnh 3 loop nhan

LOOPZ/E v LOOPNZ/ECc bin th ca LOOPGi tr ca c ZF c th lm kt thc sm vng lpLoop while ZF/equal && CX!=0Loop while (NZ/ not equal) && CX!=0Lu : LOOP gim CX nhng khng nh hung n cc cLOOPZ == LOOPELOOPNZ==LOOPNECc lnh trong vng lp c th tc ng n c ZF (CMP ?)

3.5.4 Chng trnh conChng trnh con trong ngn ng Assembly c gi l Th tc (Procedure)Mt th tc c th c thc hin nhiu lnC lin quan n stack: - lu gi a ch quay v - lu gi gi tr ca cc thanh ghi ca vi x l

Stack ?Cu trc d liu LIFO RWM - PUSH : ghi d liu vo stack, - POP: c d liu t stack (SS:SP) tr n nh ca stack(SS:BP) truy cp stack ngu nhin (khng theo LIFO)

PUSHPUSH ngunPush ngun vo stackPUSHFPush thanh ghi c vo stackLnh PUSH trc ht s gim SP i 2 ri lu gi tr ca ngun vo v tr nh c tr bi (SS:SP)

V d PUSHPUSH AX3C09A4402CFFA2232A0946SP:000601064CSS:0340AX: 0123

POPPOP chPop d liu t nh stack vo chPOPFPop d liu t nh stack vo thanh ghi cLnh POP trc ht copy d liu c tr bi (SS:SP) n ch ri tng SP ln 2

V d POPPOP ES3C09A4402CFFA2232A0946SP:000801064CSS:03403C09A4402CFFA2232A0946SP:000601064CSS:0340ES: 0123

Th tcTn_Th_tcPROCkiu;thn ca th tcRET;quay v chung trnh giTn_Th_tcENDPkiu l NEAR hoc FARngm nh l NEARMt th tc c th c nhiu lnh RET

Lnh CALL v RETGi mt th tc (NEAR)CALLTn_Th_tcpush IP vo stackcopy a ch ca Tn_Th_tc vo IPTr v t mt th tc (NEAR)RETpop gi tr nh stack vo IP

Th tc FarGi th tc (FAR)CALLTn_th_tcln lt push CS v IP vo stackcopy a ch ca Tn_th_tc vo CS v IPTr v t th tc (FAR)RETpop gi tr t nh stack ln lt vo IP v CS

Gi ngtGi ngt l mt li gi th tc c bitFARThanh ghi c phi c bo tonINT S ngtThanh ghi c c push, TF v IF b xoCS v rI IP c pusha ch ca mt chng trnh con phc v ngt (Vector ngt) tng ng vi S ngt c copy vo CS v IP

Tr v t ngtIRETTc dng ca lnh:Gi tr nh ca stack c pop vo IPGi tr nh ca stack c pop vo CSGi tr nh ca stack c pop vo thanh ghi c

Chng trnh b ngt tip tc thc hin dng nh khng c chuyn g xy ra

Xut k t ra mn hnh PCNgt 21h Ngt ny h tr rt nhiu dch v trn PC Nhn dng dch v bng s dch v (s hm). S dch v cn c np vo thanh ghi AH Tu theo tng dch v, c th cn thm mt s i s khc c np vo cc thanh ghi xc nhAH = 2, DL = M ASCII ca k t cn xutK t c hin th ti v tr hin thI ca con tr

Xut xu k t ra mn hnh PCDch v 09h ca ngt 21hDX = a ch Offset ca xu (trong on d liu)DS = a ch segment ca xuXu k t phi kt thc bng k t '$' np a ch offset ca xu vo DX, c th:LEA DX, Tnxu MOVDX, OFFSET Tn xu

Nhp 1 k t t bn phm PC Dch v 01h ca ngt 21h Khi NSD g mt k t t bn phm:K t s hin trn mn hnh AL s cha m ASCII ca k t AL=0 nu k t c nhp l k t iu khin

3.6.Nhm lnh thao tc stringChng ta hiu: string l mt mng byte hoc t nm trong b nhCc thao tc string:Sao chpTm kimLu trSo snh

3.6.1.Cc c imNgun: (DS:SI), ch: (ES:DI)DS, ES cha a ch Segment ca stringSI, DI cha a ch Offset ca stringC hng DF (0 = Up, 1 = Down)DF = 0 - Tng a ch (tri qua phi)DF = 1 - Gim a ch (phI qua tri)

3.6.2.Chuyn (Sao chp)MOVSB, MOVSWChuyn 1 byte hoc 1 word t v tr nh ny sang v tr nh khcCu trc :MOVSB/MVSW [ES:]ch,[DS:]ngunTc dng ca lnh:Sao chp byte/word t (DS:SI) n (ES:DI)Tng/Gim SI v DI 1 hoc 2 gi trNu MOVSB v c hng DF=0 th SI,DI tng ln 1 n vNu MOVSW v c hng DF=0 th SI,DI tng ln 2 n vNu MOVSB v c hng DF=1 th SI,DI gim 1 n vNu MOVSW v c hng DF=1 th SI,DI gim 2 n v

V d:Sao chp mng; Sao chp 10 byte t mng a sang mng b, gi s (DS) = (ES)mov cx, 10 mov di, offset bmov si, offset acld;xo c DFrep movsb

V d: Tnh tin cc nh

movcx, 7 mov di, offset a+9mov si, offset a+6std;lp c DFrep movsbDIaSI

V dpatterndb"!@#*"db96 dup (?) movcx,96movsi, offset patternmovdi, offset pattern+4cldrepmovsb!@#*DIaSI

3.6.3.Lu tr stringSTOSB, STOSWCopy AL hoc AX vo mt vng nh c tr bi DS:SI Tng hoc Gim DIPh thuc vo lnh lu tr byte hay wordph thuc DFTng t nh MOVS

Thng c s dng c tin t REP v s ln lp trong CX

V d: arr dw200 dup (?)

movax,50A0hmovdi,offset arrmovcx,200cldrep stosw

A050A050arr50A0AXDI

3.6.4.Np StringLODSB, LODSWByte hoc word ti (DS:SI) c copy vo AL hoc AXSI tng hoc gim 1 hoc 2 gi tr ph thuc DFThng c dng vi STOSx trong mt vng lp x l tng phn t trong mt mng

V d:

mov di, offset bmov si, offset amov cx,30cldlp:lodsband al,0DFhstosblooplp

3.6.5.Qut StringSCASB, SCASWSo snh AL hoc AX vi byte hoc word tI (ES:DI) v t ng tng hoc gim DILnh ny nh hng n cc c trng thiTu theo kt qu so snhDng trong mt vng lp REPsREPZ, REPE, REPNZ, REPNE

V darrdb 'abcdefghijklmnopqrstuvwxyz'movdi, offset arrmovcx,26cldmoval,targetrepne scasb

jnenomatch

3.6.6.So snh StringCMPSB, CMPSWSo snh byte hoc word ti (DS:SI) vi byte hoc word tI (ES:DI), tc ng n cc c v tng hoc gim SI v DICu trc CMPS[ES:]ch,[DS:]ngunThng dng so snh hai mng vi nhau

V dmov si, offset str1mov di, offset str2cldmov cx, 12repe cmpsb jlstr1smallerjgstr2smaller;the strings are equal - so far;if sizes different, shorter string is less

3.7.Nhm lnh hn hp- Cc lnh Lp/Xo trc tip cc c: STC, CLC STD, CLD STI, CLI - Lnh NOP (No Operation): Khng lm g!!!- Lnh NOP thng c dng trong cc vng lp to tr (delay)bng phn mm- Cc lnh Nhp/Xut d liu i vi cc cng I/O IN OUT

3.7.1.Lnh IN- Nu a ch ca cng Nh hn hoc bng FFh: IN Acc, a ch cng - Trong : Acc c th l AL hoc AX- Nhp d liu t cng vo Acc- Nu a ch ca cng Ln hn FFh: MOV DX, a ch cng IN Acc, DX - Trong : Acc c th l AL hoc AX- Nhp d liu t cng vo Acc

3.7.2.Lnh OUT- Nu a ch ca cng Nh hn hoc bng FFh: OUT a ch cng, Acc - Trong : Acc c th l AL hoc AX- Xut d liu t Acc ra cng- Nu a ch ca cng Ln hn FFh: MOV DX, a ch cng OUT DX, Acc - Trong : Acc c th l AL hoc AX- Xut d liu t Acc ra cng

Tm tt chng- Tnh tng thch v Cu trc thanh ghi ca cc vi x l h x86- Tnh tng thch v Tp lnh ca cc vi x l h x86