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ML610Q418/418C Reference Board User’s Manual Issue Date: Apr. 22, 2016 FEBL610Q418/418C_RB-01

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Page 1: ML610Q418/418C Reference Board User’s Manuals manual-file_db... · 3/16 1.Overview 1.1 Features ML610Q418/418C Reference Board is for evaluating the function of ML610Q418 or ML610Q418C

ML610Q418/418C Reference Board User’s Manual

Issue Date: Apr. 22, 2016

FEBL610Q418/418C_RB-01

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Notes 1) The information contained herein is subject to change without notice. 2) Although LAPIS Semiconductor is continuously working to improve product reliability and quality, semiconductors

can break down and malfunction due to various factors. Therefore, in order to prevent personal injury or fire arising from failure, please take safety measures such as complying with the derating characteristics, implementing redundant and fire prevention designs, and utilizing backups and fail-safe procedures. LAPIS Semiconductor shall have no responsibility for any damages arising out of the use of our Products beyond the rating specified by LAPIS Semiconductor.

3) Examples of application circuits, circuit constants and any other information contained herein are provided only to

illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production.

4) The technical information specified herein is intended only to show the typical functions of the Products and

examples of application circuits for the Products. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of LAPIS Semiconductor or any third party with respect to the information contained in this document; therefore LAPIS Semiconductor shall have no responsibility whatsoever for any dispute, concerning such rights owned by third parties, arising out of the use of such technical information.

5) The Products are intended for use in general electronic equipment (i.e. AV/OA devices, communication, consumer

systems, gaming/entertainment sets) as well as the applications indicated in this document.

6) The Products specified in this document are not designed to be radiation tolerant.

7) For use of our Products in applications requiring a high degree of reliability (as exemplified below), please contact and consult with a LAPIS Semiconductor representative: transportation equipment (i.e. cars, ships, trains), primary communication equipment, traffic lights, fire/crime prevention, safety equipment, medical systems, servers, solar cells, and power transmission systems.

8) Do not use our Products in applications requiring extremely high reliability, such as aerospace equipment, nuclear

power control systems, and submarine repeaters.

9) LAPIS Semiconductor shall have no responsibility for any damages or injury arising from non-compliance with the recommended usage conditions and specifications contained herein.

10) LAPIS Semiconductor has used reasonable care to ensure the accuracy of the information contained in this

document. However, LAPIS Semiconductor does not warrant that such information is error-free and LAPIS Semiconductor shall have no responsibility for any damages arising from any inaccuracy or misprint of such information.

11) Please use the Products in accordance with any applicable environmental laws and regulations, such as the RoHS

Directive. For more details, including RoHS compatibility, please contact a ROHM sales office. LAPIS Semiconductor shall have no responsibility for any damages or losses resulting non-compliance with any applicable laws or regulations.

12) When providing our Products and technologies contained in this document to other countries, you must abide by

the procedures and provisions stipulated in all applicable export laws and regulations, including without limitation the US Export Administration Regulations and the Foreign Exchange and Foreign Trade Act.

13) This document, in part or in whole, may not be reprinted or reproduced without prior consent of LAPIS

Semiconductor.

Copyright 2016 LAPIS Semiconductor Co., Ltd.

2-4-8 Shinyokohama, Kouhoku-ku,

Yokohama 222-8575, Japan http://www.lapis-semi.com/en/

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Preface

This manual describes the ML610Q418/418C Reference Board. The following manuals are also available. Read them as necessary.

■ ML610Q418 User’s Manual Description on the ML610Q418 ■ ML610Q418C User’s Manual Description on the ML610Q418C ■ uEASE User’s Manual

Description on the on-chip debug tool uEASE.

ML610Q418 Series have 2 products. Table.1 List of the ML610Q418 Series microcontroller

Part number ML610Q418 ML610Q418C

Package 100pin TQFP

Program FLASH size 128KB

LCD driver 192 dots max. (48 seg x 4 com)

160 dots max. (40 seg x 4 com)

LAPIS support 2 types of reference boards. Table.2 List of the ML610Q418 series Reference Board

Product name Mounted device Note

RB-D610Q418TB100 ML610Q418 100pin TQFP

One pcs of ML610Q418-NNNTB is mounted on reference board, used for developing the software works on ML610Q418

RB-D610Q418CTB100 ML610Q418C 100pin TQFP

One pcs of ML610Q418C-NNNTB is mounted on reference board, used for developing the software works on ML610Q418C

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1.Overview

1.1 Features

ML610Q418/418C Reference Board is for evaluating the function of ML610Q418 or ML610Q418C. This board can connect the pin of ML610Q418/418C with a user application system, it can perform the check of a system of operation easily. By using the board with "on-chip debug emulator" (herein after referred to "uEASE") not only Software debugging but also writing Flash ROM in the devices are capable.

The hardware specification of this board is shown below.

Embedded microcontroller

・ U1: ML610Q418 or ML610Q418C (The part name is labeled on the solder side of the board.)

Embedded parts

・ X1, C1, C2: 32.768KHz resonator and capacitors. ・ PWR: Jumper for input power supply switch ( 3pin pin-header and short pin ) ・ ISP: Jumper for ISP boot control ( 3pin pin-header and short pin ) ・ BIAS: Jumper for bias circuit of LCD (3pin pin-header and short pin ) ・ CNUE: Connector for uEASE ( 14pin connector ) ・ C5-C13: Capacitors for power supply and LCD bias generation circuit ・ J1 to J8: Chip jumper for ML610Q418/418C pin connection

Pads for mounting

・ CNU1 to CNU4: Pads for peripheral board connectors ( 34pin x 4、2.54mm pitch ) ・ IN0, CS0, RT0-1, RA0-1, RS0, RT0, RA0, CVR0, IN1, CS1, RS1, RT1, RA1, CVR1:

Pads for RC oscillation type ADC parts ・ X2, C3, C4: Pads for mounting high-speed clock oscillation circuit parts ・ SP1 to SP9: Pads for opening or short ( 1608 type )

Power supply pads ・ VDD, VSS, AVDD, VREF, AVSS AIN pads ・ AIN0P, AIN1P, AIN2P, AIN3P Monitor pads ・ RCM: RC oscillation monitor

Operating voltage ・ +1.1V to +3.6V Board size ・ 71.12 x 60.96 mm

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1.2 PCB outline drawing

Fig.1 PCB outline drawing

CNUE CNU 3

U 1

PWR

High - Speed clock

CNU 4

RC _ ADC 0

SA _ ADC

CNU 1

RC _ ADC 1

BIAS

CNU 2

ISP

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2. Function

2.1 PWR Jumper

PWR jumper is power supply source select jumper. When supplying from uEASE, PWR jumper is set to the uE side. The ability to supply power of the uEASE is +3.3V/100mA. When supplying power from CNU4_1pin and CNU4_2pin, PWR jumper is set to the USR side.

PWR

uE

USR

CNUE

13pin

CNU4

1,2pin

ML610Q419ML610Q419C

VDD

Fig.2 The connection of PWR jumper 【Note】 When the PWR jumper is set to USR side and the uEASE is connected. Turn on the power supply of the peripheral board after starting the uEASE. Moreover, stop the uEASE after turning off the power supply of the peripheral board.

2.2 ISP Jumper

ISP jumper is the BOOT area control of ML610Q418/418C. When the uEASE is used, the ISP jumper is set to the uE side. Without using uEASE, if the ISP jumper is set to the VDD side, the ISP boot will become effective.

ISP

uE

VDD

CNUE

7pin

ML610Q419ML610Q419C

TEST0VDD

Fig.3 The connection of ISP jumper

ML610Q418

ML610Q418C

ML610Q418

ML610Q418C

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2.3 BIAS Jumper

BIAS jumper is LCD BIAS select jumper. When the 1/3 bias is used, set BIAS jumper to the 1/3 side. When the 1/2 bias is used, set BIAS jumper to the 1/2 side.

ML610Q419ML610Q419C

1/3

1/2

0.1uF

0.1uF

VL3

VL2

VL1

BIAS

0.1uF

Fig.4 The connection of BIAS jumper

ML610Q418

ML610Q418C

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2.4 Use of RC_ADC0

Mount necessary parts on the each pad of the IN0, CS0, RT0-1, RA0-1, RS0, RT0, RA0 and CVR0. Refer to ML610Q418/ML610Q418C User’s Manual for the parts to mount. The example of processing is shown below.

Fig.5 The example of processing of RC_ADC0

2.5 Use of RC_ADC1

Mount necessary parts on the each pad of the IN1, CS1, RS1, RT1, RA1 and CVR1 pads. Refer to ML610Q418/ML610Q418C User’s Manual the parts to mount. The example of processing is shown below.

Fig.6 The example of processing of RC_ADC1

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2.6 Use of P30 to P34

Initial setting of the P30, P31, P32, P33 and P34 are not connected with CNU1. When connecting these pins with CNU1, mount a jumper chip to SP1, SP2, SP3, SP4 and SP5.

Fig.7 The example of processing of SP1 to SP5 2.7 Use of P44 to P47

Initial setting of the P44, P45, P46 and P47 are not connected with CNU1. When connecting these pins with CNU1, mount a jumper chip to SP6, SP7, SP8 and SP9.

Fig.8 The example of processing of SP6 to SP9

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2.8 Use of the high-speed clock generation circuit

Mount parts on the each pad of the X2, C3, and C4 pads. And cut each short pattern of SP10 and SP11 if necessary. The example of processing of the high-speed clock generation circuit is shown below.

Fig.9 The example of use the high-speed clock generation circuit

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2.9 Use of SA_ADC

(a) Initial setting of the AVDD pin and VREF pin on the board are connected to AVSS. Cut each short pattern of SP12 and SP13, and it separates from AVSS.

(b) Supply the appropriate voltage to AVDD, VREF, AVSS, AIN0P, AIN1P, AIN2P, and AIN3P pad. Mout a noise decrease capacitor to AIN0, AIN1, AIN2, and AIN3 pad if necessary. 【NOTE】 Cut the short pattern of SP12 and SP13 before supply voltage to AVDD and VREF. The example of processing of SA_ADC is shown below.

Fig.10 The example of processing of SA_ADC

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3. User Interface

3.1 The user interface of ML610Q418 Reference Board

Table 3 shows the user interface of ML610Q418 Reference Board.

Table 3. CNU1-4 of ML610Q418 Reference Board Pin CNU1 CNU2 CNU3 CNU4 1 P03 N.C SEG20 VDD

2 P02 N.C SEG21 VDD

3 P01 N.C SEG22 N.C

4 P00 N.C SEG23 N.C 5 N.C N.C SEG24 N.C

6 P20 N.C SEG25 N.C

7 P21 N.C SEG26 N.C

8 P22 N.C SEG27 N.C

9 P40 N.C SEG28 N.C

10 P41 N.C SEG29 N.C

11 N.C N.C SEG30 N.C

12 P42 N.C SEG31 N.C

13 P43 SEG0 SEG32 N.C

14 P44 SEG1 SEG33 N.C

15 P45 SEG2 SEG34 N.C

16 P46 SEG3 SEG35 COM0

17 P47 SEG4 SEG36 COM1

18 P30 SEG5 SEG37 COM2

19 P31 SEG6 SEG38 COM3

20 P32 SEG7 SEG39 P50

21 P33 SEG8 SEG40 P51

22 P34 SEG9 SEG41 P52

23 P35 SEG10 SEG42 P53

24 N.C SEG11 SEG43 N.C

25 N.C SEG12 SEG44 N.C

26 N.C SEG13 SEG45 AIN0

27 N.C SEG14 SEG46 AIN1

28 N.C SEG15 SEG47 AIN2

29 N.C SEG16 N.C AIN3

30 N.C SEG17 N.C AVDD

31 P10 SEG18 N.C VREF

32 P11 SEG19 RESET_N AVSS

33 VSS VSS VSS VSS

34 VSS VSS VSS VSS

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3.2 The user interface of ML610Q418C Reference Board

Table 4 shows the user interface of ML610Q418C Reference Board.

Table 4. CNU1-4 of ML610Q418C Reference Board Pin CNU1 CNU2 CNU3 CNU4 1 P03 P60 SEG20 VDD

2 P02 P61 SEG21 VDD

3 P01 P62 SEG22 N.C

4 P00 P63 SEG23 N.C 5 N.C P64 SEG24 N.C

6 P20 P65 SEG25 N.C

7 P21 P66 SEG26 N.C

8 P22 P67 SEG27 N.C

9 P40 N.C SEG28 N.C

10 P41 N.C SEG29 N.C

11 N.C N.C SEG30 N.C

12 P42 N.C SEG31 N.C

13 P43 SEG0 SEG32 N.C

14 P44 SEG1 SEG33 N.C

15 P45 SEG2 SEG34 N.C

16 P46 SEG3 SEG35 COM0

17 P47 SEG4 SEG36 COM1

18 P30 SEG5 SEG37 COM2

19 P31 SEG6 SEG38 COM3

20 P32 SEG7 SEG39 P50

21 P33 SEG8 N.C P51

22 P34 SEG9 N.C P52

23 P35 SEG10 N.C P53

24 N.C SEG11 N.C N.C

25 N.C SEG12 N.C N.C

26 N.C SEG13 N.C AIN0

27 N.C SEG14 N.C AIN1

28 N.C SEG15 N.C AIN2

29 N.C SEG16 N.C AIN3

30 N.C SEG17 N.C AVDD

31 P10 SEG18 N.C VREF

32 P11 SEG19 RESET_N AVSS

33 VSS VSS VSS VSS

34 VSS VSS VSS VSS

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4. Schematics and PCB dimensional drawing The circuit diagram and the dimensional drawing of this board are shown as follows.

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ML6

10Q

418

ML6

10Q

418C

ML6

10Q

418

ML6

10Q

418/

418C

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ML6

10Q

418

ML6

10Q

418/

418C

/

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