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    MIT OpenCourseWarehttp://ocw.mit.edu

    For information about citing these materials or our Terms of Use, visit: http://ocw.mit.edu/terms.

    6.004 Computation StructuresSpring 2009

    http://ocw.mit.edu/http://ocw.mit.edu/termshttp://ocw.mit.edu/termshttp://ocw.mit.edu/
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    L04 - Logic Synthesis 16.004 Spring 2009 2/12/09

    Synhesis of Combinaional Logic

    Lab 1 is due Thursday 2/19Quiz 1 is a week from Friday (in secion)

    A

    B

    modified 2/12/09 10:01 L04 - Logic Synthesis 26.004 Spring 2009 2/12/09

    Funcional Specificaions

    There are many ways of specifying hefuncion of a combinaional device, for

    example:

    A

    BYIf C is 1 hencopy B o Y,

    oherwise copyA o YC

    Concise alternatives:

    truth tablesare a concise description of the combinational

    systems function.Boolean expressionsform an algebra in whose operations are

    AND (multiplication), OR (addition), and inversion

    (overbar).

    Any combinational (Boolean) function can be specified as a truthtable or an equivalentsum-of-productsBoolean expression!

    Argh Im tired of word games

    C B A Y

    0 0 0 0

    0 0 1 1

    0 1 0 0

    0 1 1 1

    1 0 0 0

    1 0 1 0

    1 1 0 11 1 1 1

    Truh Table

    CBAACBBACABCY

    L04 - Logic Synthesis 36.004 Spring 2009 2/12/09

    Heres a Design Approach

    1) Wrie ou our funcional spec as aruh able

    2) Wrie down a Boolean expression wiherms covering each 1 in he oupu:

    3) Wire up he gaes, call i a day, anddeclare success!

    This approach will always give usBoolean expressions in a paricularform: SUM-OF-PRODUCTS

    C B A Y

    0 0 0 0

    0 0 1 10 1 0 0

    0 1 1 1

    1 0 0 0

    1 0 1 0

    1 1 0 1

    1 1 1 1

    Truh Table

    -is sysemaic!-i works!

    -is easy!-are we done ye???

    CBAACBBACABCY

    L04 - Logic Synthesis 46.004 Spring 2009 2/12/09

    Sraighforward Synhesis

    We can implemen

    SUM-OF-PRODUCTS

    wih jus hree levels of

    logic.

    INVERTERS/AND/OR

    Propagaion delay --

    No more han 3 gae delays

    (assuming gaes wih an arbirary number of inpus)

    AB

    CAB

    CAB

    CAB

    C

    Y

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    L04 - Logic Synthesis 56.004 Spring 2009 2/12/09

    Basic Gae Reperoire

    Are we sure we have all he gaes we need?

    Jus how many wo-inpu gaes are here?

    AB Y

    00 0

    01 0

    10 0

    11 1

    ANDAB Y

    00 0

    01 1

    10 1

    11 1

    ORAB Y

    00 1

    01 1

    10 1

    11 0

    NANDAB Y

    00 1

    01 0

    10 0

    11 0

    NOR

    2 = 24 = 1622

    Hmmmm all of hese have 2-inpus (no surprise)

    each wih 4 combinaions, giving 22 oupu cases

    How many ways are here of assigning 4 oupus? ________________

    L04 - Logic Synthesis 66.004 Spring 2009 2/12/09

    There are only so many gaes

    There are only 16 possible 2-inpu gaes some we know already, ohers are jus silly

    I

    N

    P

    U

    T

    AB

    Z

    E

    R

    O

    A

    N

    D

    A

    >

    B A

    B

    >

    A B

    X

    O

    R

    O

    R

    N

    O

    R

    X

    N

    O

    R

    N

    O

    T

    B

    A

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    L04 - Logic Synthesis 96.004 Spring 2009 2/12/09

    One will do!

    NANDs and NORs are universal:

    Ah!, bu wha if we wan more han 2-inpus

    =

    =

    =

    =

    =

    =

    L04 - Logic Synthesis 106.004 Spring 2009 2/12/09

    Supid Gae Tricks

    Suppose we have some 2-inpu XOR gaes:

    And we wan an N-inpu XOR:

    A0011

    B0101

    C0110

    pd = 1cd = 0

    pd = O( ___ ) -- WORST CASE.

    oupu = 1iff number of 1sinpu is ODD(ODD PARITY)

    Can we compue N-inpu XOR faser?

    N

    A1

    A3 A4 AN

    A2

    A

    BC

    L04 - Logic Synthesis 116.004 Spring 2009 2/12/09

    I hink ha I shall never seea circui lovely as...

    N-inpu TREE has O( ______ ) levels...

    Signal propagaion akes O( _______ ) gae delays.

    Quesion: Can EVERY N-Inpu Boolean funcion be implemened as aree of 2-inpu gaes?

    log N

    log N

    21222

    log2N

    A1

    A2

    A4

    A3

    AN

    L04 - Logic Synthesis 126.004 Spring 2009 2/12/09

    Are Trees Always Bes?Alernae Plan: Large Fan-in gaes

    N pulldowns with complementary pullups

    Output HIGH if any input is HIGH = OR

    Propagaion delay: O(N) since each

    addiional MOSFET adds C

    ...

    N

    pd

    O(log N)

    O(N)

    ~4

    Don be mislead by he big O suffhe consans in his case can be much

    smaller so for small N his plan mighbe he bes.

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    L04 - Logic Synthesis 136.004 Spring 2009 2/12/09

    AB=A+B

    Pracical SOP Implemenaion

    NAND-NAND

    NOR-NOR

    CA

    B

    Y

    C

    A

    B

    Y

    zyxxyz ++=

    C

    A

    BY

    yxyx =+

    C

    A

    B

    Y

    C

    A

    BY

    AB=A+BPushing Bubbles

    C

    A

    BY

    You migh hink all hese exrainverers would make his srucureless atracive. However, quie heopposie is rue.

    L04 - Logic Synthesis 146.004 Spring 2009 2/12/09

    Logic Simplificaion

    Can we implemen he same funcion wih fewer gaes?

    Before rying well add a few more ricks in our bag.BOOLEAN ALGEBRA:

    OR rules: a + 1 = 1, a + 0 = a, a + a = aAND rules: a1 = a, aO = 0, aa = aCommuaive: a + b = b + a, ab = baAssociaive: (a + b) + c = a + (b + c), (ab)c = a(bc)Disribuive: a(b+c) = ab + ac, a + bc = (a+b)(a+c)Complemens:

    Absorpion:

    Reducion:DeMorgans Law:

    0aa1,aa ==+

    babaaa,aba+=+=+

    abb)aa(a,b)a(a =+=+

    bb)ab)((ab,baab =++=+

    baba,abba +==+

    L04 - Logic Synthesis 156.004 Spring 2009 2/12/09

    Boolean Minimizaion:An Algebraic Approach

    BACCBAACBABCY +++=

    Les (again!) simplify

    Using he ideniy

    =+ AA

    BACCBAACBABCY +++=

    CBACY +=

    BACCBABCY ++=

    Can he come upwih a new example???

    For any expression and variable A:Hey, I could wrieA programo do

    Tha!

    L04 - Logic Synthesis 166.004 Spring 2009 2/12/09

    A Case for Non-Minimal SOP

    ABCBACY ++=

    AC

    B

    Y

    NOTE: The seady sae behavior ofhese circuis is idenical. Theydiffer in heir ransien behavior.

    Y(1)C(1)

    Y = CA +CB

    A(1)

    B(1)

    CD = 1 nSPD = 2nS

    00

    1

    C B A Y

    0 0 0 0

    0 0 1 1

    0 1 0 0

    0 1 1 1

    1 0 0 0

    1 0 1 0

    1 1 0 1

    1 1 1 1

    CA

    CB

    BA

    A

    BC

    Y

    Thas whawe call a

    glich orhazard

    A

    BC

    YNow isLENIENT!

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    L04 - Logic Synthesis 176.004 Spring 2009 2/12/09

    Truh Tables wih Don Cares

    C B A Y

    0 0 0 0

    0 0 1 1

    0 1 0 0

    0 1 1 1

    1 0 0 0

    1 0 1 01 1 0 1

    1 1 1 1

    CA

    CB

    BA

    C B A Y

    0 -- 0 0

    0 -- 1 1

    1 0 -- 0

    1 1 -- 1

    -- 0 0 0

    -- 1 1 1

    One way o reveal he opporuniies for a more compac implemenaion iso rewrie he ruh able using don cares (--) o indicae when he

    value of a paricular inpu is irrelevan in deermining he value of heoupu.

    L04 - Logic Synthesis 186.004 Spring 2009 2/12/09

    Weve been designing a mux

    D0

    D1

    S

    0

    1

    0101S

    0101S

    0101S

    D00D01

    D10D11

    S0 S1

    and implemened as aree of smaller MUXes:

    00

    01

    10

    11

    D00

    D10D11

    S0S1

    YD01

    MUXes can be generalized o 2k daa

    inpus and k selec inpus

    2-inpu Muliplexer

    YC B A Y

    0 0 0 0

    0 0 1 10 1 0 0

    0 1 1 1

    1 0 0 0

    1 0 1 0

    1 1 0 1

    1 1 1 1

    Truh Table

    Y

    L04 - Logic Synthesis 196.004 Spring 2009 2/12/09

    Sysemaic Implemenaionsof Combinaional Logic

    Consider implemenaion of some arbirary Booleanfuncion, F(A,B,C) ... using a MULTIPLEXERas he only circui elemen:

    A B Cin Cout

    0 0 0 0

    0 0 1 0

    0 1 0 0

    0 1 1 1

    1 0 0 0

    1 0 1 1

    1 1 0 11 1 1 1

    Full-Adder

    Carry Ou Logic

    0123456

    7A,B,Cin

    Cou

    00010111

    L04 - Logic Synthesis 206.004 Spring 2009 2/12/09

    General Table Lookup Synhesis

    MUX

    Logic

    A B

    Fn(A,B)

    Generalizing:In heory, we can build any 1-oupu combinaionallogic block wih muliplexers.

    For an N-inpu funcion we need a _____ inpu mux.

    BIG Muliplexers?How abou 10-inpu funcion? 20-inpu?

    AB Fn(A,B)

    00 0

    01 1

    10 111 0

    2N

    Muxes are UNIVERSAL!

    In fuure echnologiesmuxes migh be he

    naural gae.

    0101S

    10

    A

    Y A Y=

    0

    1

    0

    1S

    0

    B

    A

    Y

    0101S

    B1

    A

    Y

    =

    =

    A

    B

    Y

    AB

    Y

    0101S

    BB

    A

    Y

    Wha does

    ha one do?

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    L04 - Logic Synthesis 216.004 Spring 2009 2/12/09

    A New Combinaional Device

    k

    D1D2

    DN

    DECODER:

    k SELECT inpus,

    N = 2k DATA OUTPUTs.

    Seleced Dj HIGH;all ohers LOW.

    NOW, we are well on our way o building a general

    purpose able-lookup device.

    We can build a 2-dimensional ARRAY of decoders andselecors as follows ...

    Have Imenioned

    ha HIGHis a synonym

    for 1 andLOW means

    he same

    as 0

    L04 - Logic Synthesis 226.004 Spring 2009 2/12/09

    Read-only memories (ROMs)

    COUTS

    000

    001

    010

    011

    100

    101

    110

    111AB

    CIN

    A B Ci S Co

    0 0 0 0 0

    0 0 1 1 0

    0 1 0 1 0

    0 1 1 0 1

    1 0 0 1 01 0 1 0 1

    1 1 0 0 1

    1 1 1 1 1

    FA

    A B

    Co Ci

    S

    Full Adder

    For K inpus, decoder

    produces 2K signals,only 1 of which is

    assered a a ime --hink of i as one signalfor each possible

    produc erm.

    Each column is large fan-in OR as describedon slide #12. Noe locaion of pulldownscorrespond o a 1 oupu in he ruh able!

    Shareddecoder

    One selecor foreach oupu

    L04 - Logic Synthesis 236.004 Spring 2009 2/12/09

    Read-only memories (ROMs)

    A B Ci S Co

    0 0 0 0 0

    0 0 1 1 0

    0 1 0 1 0

    0 1 1 0 1

    1 0 0 1 0

    1 0 1 0 1

    1 1 0 0 1

    1 1 1 1 1

    FA

    A B

    Co Ci

    S

    Full Adder LONG LINES slow down propagaion imes

    The bes way o improve his is o buildsquare arrays, using some inpus o driveoupu selecors (MUXes):

    00

    01

    10

    11

    0 1 0 1AB

    CIN

    COUTS

    2D Addressing: Sandard for ROMs, RAMs, logic arrays

    L04 - Logic Synthesis 246.004 Spring 2009 2/12/09

    Logic According o ROMs

    ROMs ignorehe srucure of combinaional funcions ... Size, layou, and design are independen of funcion Any Truh able can be programmed byminor reconfiguraion:

    - Meal layer (masked ROMs)- Fuses (Field-programmable PROMs)- Charge on floaing gaes (EPROMs)... ec.

    Model: LOOK UP value of funcion in ruh able...Inpus: ADDRESS of a T.T. enryROM SIZE = # TT enries...

    ... for an N-inpu boolean funcion, size = __________

    2N x #oupus

    ROMs end ogenerae glichyoupus. WHY?

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    L04 - Logic Synthesis 256.004 Spring 2009 2/12/09

    Summary

    Sum of producs Any funcion ha can be specified by a ruh able or, equivalenly,

    in erms of AND/OR/NOT (Boolean expression)

    3-level implemenaion of any logic funcion Limiaions on number of inpus (fan-in) increases deph

    SOP implemenaion mehods NAND-NAND, NOR-NOR

    Muxes used o build able-lookup implemenaions Easy o change implemened funcion -- jus change consans

    ROMs Decoder logic generaes all possible produc erms Selecor logic deermines which perms are ored ogeher