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Microprocessorimplementation of PWM

switching strategies

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• A Doctoral Thesis. Submitted in partial fulfilment of the requirementsfor the award of Doctor of Philosophy at Loughborough University.

Metadata Record: https://dspace.lboro.ac.uk/2134/26986

Publisher: c© Djamel Akhrib

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MICROPROCESSOR IMPLEMENTATION OF

PWM SWITCHING STRATEGIES

by

DJAMEL AKHRIB, BSc

A Doctoral thesis submitted in partial fulfilment of the requirements for the award of the degree of , .

Doctor of Ph il, oso~hy of Loughborough University of Technology

May 1986

Sup·ervisor: Dr E.S. Tez

Department of Electronic and Electrical Engineering

e by DJamel Akhrib, 1986

/) r~

f

L----... -...... . CONTENTS

Acknowledgements List of Symbols Summary

· .. • • • • 10 • • ••

CHAPTER 1: 1.1 1.2

CHAPTER 2:

· .. · .. .

INTRODUCTION General

. . . · ..

, . . .. ..

• • • Organisation of.the Thesis

· .. · .-. · ..

· .. · .. · ..

INVERTER-FED INDUCTION MOTOR DRIVES AND . PWM SWITCHING STRATEGIES .•.

2.1 : The Three Phase Induction Motor · .. 2.1.1 Induction Motor Characteristics

Page No

i

ii iii

1

1

3

7

7

7

2.2.2 Induction Motor Speed Control... 9 2.2.3 Effects of Harmonics on Induction

~~r 9 2.2

2.3

CHAPTER 3:

3.1

Three-Phase Bridge Voltage Inverters ... 2.2.1 Quasi-Square-I~ave Inverters 2.2.2 Pulse-Width Modulated Inverters Pulse Width Modulated Switching Strategies 2.3.1 Natural Switching Strategy. . •. 2.3.2 The Regular Switching Strategy 2.3.3 Optimal Switching Strategy · .. IMPLEMENTATION OF REGULAR SWITCHING STRATEGY • • . . •. Introduction · . . . ..

3.2 H<\rdwa re Des i gn ••. 3.3 Software Design

3.3.1 Algorithm Description 3.3.2 Symbol Definitions 3.3.3 Flowcharts •.•

· .. ' · .. · .. · ..

10

11

11

12 13 15 1B

34 34 34 36 36 43 44

,

CHAPTER 4: 4.1 4.2

4.3.

4.4

4.5

CHAPTER 5: 5.1 5.2

CHAPTER 6: 6.1 6.2

IMPLEMENTATION OF OPTIMAL SHITCHING STRATEGY Introduction. . .. .... Hardware Design of Microprocessor-Based Optimal PHM Signal Generator ... 4.2.1 Microcomputer Design ••• 4.2.2 Methods of Frequency Control ••• 4.2.3 Phase Locked Loop Design 4.2.4 Non-overlapping Delay Time ... Software Design for the Optimal Switching Strategy . ... ... 4.3.1 Minimum Pulse Width Control ••• 4.3.2 Phase Balance ••• 4.3.3 Time Delays Introduced by Interrupt

Servicing ••• 4.3.4 Implementation of Constant Vlf

Characteristic . Program Flowcharts •.• 4.4.1 Symbol Definitions 4.4.2 Flowcharts ••• Operator's Interface

...

...

COMBINED REGULAR-OPTIMAL SWITCHING STRATEGY Introduction ... Implementation of the Regular-Optimal Switching Strategy ••• • •. .. . 5.2.1 Hardware Design 5.2.2 Software Design ' ... ...

COr.1PUHR SIMULATIONS ... . .. Introduction ••• ••• .••. • •• Simulation of the Regular Switching Strategy Waveforms • • • • •• 6;2.1 Simulation of Phase and Line-to-Line

Vol tages ••• 6.2.2 Simulation of Voltage Harmonic

Spectra ... ...

Page No

54 54

55 55 56

58

59

60 61 62

64

66

67

67

69

71

91

91

91

91

92

95 95

95

95

97

. 6.3

CHAPTER 7: 7.1 7.2

7.3

7.4

CHAPTER 8:

CHAPTER 9:

References

APPENDICES: Appendix I: Append i xII:

. Appendix Ill: Appendix IV:

Appendix V:­Appendix VI:

6.2.3 Line Current Simulation... ... Simulation of the Optimal Switching Strategy Waveforms .• ,.

SIMULATION AND EXPERIMENTAL RESULTS .•• Results for Regular Switching Strategies Results for the Optimal Switching Strategy 7.2.1 l7-Pulse Optimal PriM ... ... 7.2.2 29-Pulse Optimal PWM· .. . ... ~e~ults for the Combined Regular-Optimal Switching Strategy... ••. • •• Discussion-of Results ... CONCLUSIONS .. . ...

SUGGESTIONS FOR FURTHER WORK ... ...

... ...

Optimisation of Switching Angles Look-up Tables and Program Listing for Regular-Sampled PWM Strategy ••• Pulse-Width Numbers and Sensitivity Test Circuit Details of Hardware for Regular Sampled Switching Strategy •••• •• Operator's Interface Circuit Description Determination of the Induction Motor Equi­valent Circuit Paramters and Stator Current Ca 1 cul ation • • • • • • • ••

Page No.

\

·98

99

112

112

118 118

122

123 148

158

161

166

172

189 194

211

215

219

i

ACKNOWLEDGEMENTS

I wish to express my sincere gratitude to Dr E.S. Tez whom I am privileged to have had as my research supervisor. His enthusiasm in the field of microcomputer control of motors has been a strong source

of encou ragement to me. Hi s techni ca 1 gui dance and va 1 uab 1 e criticisms have greatly influenced the .course of this research.

I would also like to thank the Head of the Electronic and Electrical Engineering Department at Loughborough University of Technology for providing all the research facilities. I am thankful to the staff and student members of this Department whose assistance was valuable to my work.

I am particularly grateful to Mrs Janet Smith who competently typed this thesis.

I wish·to thank Sonatrach and the Algerian government for providing me with the opportunity to carry out this research and financially support i ng me.

Finally, I express my deepest gratitude to my parents for thei r moral support whose confidence in me has made my study possible. To them I

dedi~ate this thesis.

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tpl

t01

tp (j+l)A

ii

LIST OF SYMBCl.S

Synchronous speed

Rotor speed

Sli p

Supply frequency

Number of pole pairs of motor

RMS air-gap voltage

,Magnetising reactance

Magnetising current

Rotor current

Rotor resistance

Rotor reactance

Electrical torque output

Electrical output power

Pull-out torque

Period of carrier signal

Frequency of carrier signal

Modulation depth

Angular frequency of modulating signal

Magnitude of the nth sinewave harmonic

Magnitude of the nth cosine wave harmonic

ith switching angle in radians

Width of the first high level pulse

Width of the first low level pulse

Width of the (j+l)th high level pulse of phase A

. i i i

tp(j+l)B Width of the (j+l)th high level pulse of phase B

tp(j+l)C Width of the (j+l)th high level pulse of phase C

C Number of chops per half cycl e

f 0 PLL output frequency

f i PLLi nput frequency

.d Total delay caused by the interrupt service routines over a

period of 1200 seconds

NR integer number to load into timers to produce a pulse

du rati on

Symbols not included above are defined where they first appear in this

. thesis.

iv

MICROPROCESSOR IMPLEMENTATION OF PWM STRATEGIES SUMMARY

r A major problem that arises in the inverter-fed induction motor drives is the inevitable introduction of harmonics into the alternating

output voltage of the inverter. These harmonics, particul arly the low order ones, produce harmful 'effects such as torque pulsations, excessive motor heating etc; Various techniques for controlling inverters have been proposed in order to reduce the harmonic content of the inverter output waveforms and to effect the voltage/frequency relationship for optimum util isation of the motor. The latest forms of inverter control "employ sinusoidal Pulse-Width-Modulation (PWM) for producing an AC supply with variable voltage and frequency.

L

Among the various switching strategies developed for synthesising PWM waveforms are the Natural Switching Strategy, the Regular-Sampled Switching Strategy and more recently the Optimal Switching Strategy. The present work is concerned with the practical real isation of microprocessor-based controllers for implementing these PWM switching strategies. Upon a theoretical analysis of each of these strategies, it was concluded that the regul ar-sampled and the optimal switching strategies are better suited to microprocessor implementation. Both of these strategies have been implemented by means of microprocessor­based control ci rcuits, which not only provide the necessary, tri ggeri ng signal s to the power switchi ngdevices of the inverter but also perform the functions relating to the motor characteristics and

the user interface. , \

A generalised theory has been presented for the optimal strategy, which enables elimination of a number of harmonics in the PWM output waveform while the fondamental component is maximised. The non-linear equations which result from the optimisation process have been solved using numerical techniques, on a mainframe computer for" two separate versions using respectively 17 and 29 pulses per output cycle. The widths of individual' pulses in a cycle of a PWM waveform are determined so that harmonics up to the 23rd are el iminated by the

v

first version"and harmonics up to the 41st by the second. The

optimisation process needs to be repeated so as to obtain 128

different magnitude levels for the fundamental component while

harmonics up to either the 23rd or the 41st are still minimised. These

various magnitude levels are necessary to enable the inverter "output

voltage to be varied (in 128 small steps) so that constant flux

operati on of the motor can be effected.

A simple way of implementing the regular-sampled symmetric PWM

switching strategy is described with two different versions using

respectively 18 and 30 pulses per output cycle. The requirement of

maintaining the inverter output voltage-to-frequency (V/f) ratio

" constant, together with the synchronous nature of the modulation

strategy, has resulted in considerable simplification in the system

software.

A comparison between the performances provided by the regula'r-sampled

and the opt i ma 1 switchi ng st rategi es has shown that the 1 atter is

superior in terms of both fundamental voltage magnitude and harmonic

spectrum. However, both the regular-sampled and the optimal switching

strategies are implementations of synchronous pulse-width modulation,

and hence their performance pa~titularly at low inverter output

frequencies need to be improved by increasing the number of pulses per

cycle. Since the equations involved in the optimisation process are

non-linear and the process becomes subject to a large number of non­

linear constraints when a high pulse number is ~sed, an optimal

sol uti on cannot al ways be guaranteed by the numeri ca 1 techni ques that

are employed. To obtain a good compromise, the Regular PWM" strategy

was combined with the Optimal PWM strategy. each coming into effect at

a different secti on of the output frequency range. For output

frequencies from 0 to 20 Hz, the regular switching strategy is used

with 75 pulses per output cycle. For output frequencies from 20 to 50

Hz, the microprocessor-based controller switches to the optimal

strategy with 29 pulses per output cycle.

vi

The combined regular-optimal strategy permits the use of the regular

strategy with high pulse numbers (75 pulse per cycle) at. the lower end

of the output frequency range (0-20 Hz). At the same time, it retains

the advantages of the optimal strategy at the higher end of the output

frequency range. (20-50 Hz).

1

CHAPTER 1

INTRODUCTION

1.1 GENERAL

The need for variable-speed drives has increased considerably as a

result of the increasing number of applications which require variable

speed operation. The requi rements of reliabll ity, stabil ity,

flexibility and preciSion of control in variable-speed drives have

traditonal1y been met by the DC motor using the Ward-Leonard system1•

The robust. simple and economic construction and the reliability and

ease of maintenance of the cage induction motor have led to the

development of various forms of variable-speed AC drive. Besides the'

rotor-based control methods, the speed of an induction motor can be

controlled by varying the magnitude and frequency of the stator

voltage. Two main forms of frequency control for varying the speed of

an induction motor. i.e. cycloconverter and DC link converter. have

been described elsewhere2,3. The DC .link converter is widely used for

effecting frequency control. This converter involves both . , rectification and inversion processes. Tj) ensure that the induction

motor operates with constant fl ux and that motor effi ci ency is not

impaired, the DC 1 ink converter must be capable of providing a wide

range of output frequencies with the ratio of voltage to frequency

maintained constant. (Various forms of inverters have been designed

over the years to effect the voltage/frequency relationships and to

reduce the harmonic content of the output waveform~ Quasi-square

, wave inverters with controllable voltage and frequency were the fi rst

methods used to vary the speed of induction motors 4• Quasi-square

wave inverter dri ves suffer from the presence of low-speed peri odic

torque pul sations, making"the drive jerky with noticeable speed

riPPle.'~onsiderable improvement in the low-speed performance of the

inverter can be achieved,by using sinusoidal pulse-width modulation

(PWM) techniques5- 14• P'WM techniques implemented by analog means have

long been in existence and are widely used today. These are based on

the comparison of a sinusoidal modulating signal with a carrier signal

2

of triangular waveforml~ Practical problems faced by analog signal generators in producing such signals with high accuracYi such as t em peratu re drift effect s, n on-l i nea rit i es, componentagei ng etc., gave way to hybrid implementations employing a combinat.ion of discrete analog and digital components16-18•

IOigital implementation of PWM techniques has received considerable attention with the·advent of microprocessors. These techniques can be divided into two main groups. The first group is derived from the analogue process of PWMimplementation and can be split further into two sub-groups, namely synchronous19- 25 and asynchronous26- 27 PWM strategies. In synchronous PWM strategies, the carrier frequency is synchroni sed with the modul ati ng frequency; in the asynchronous PWM strategies, the carrier frequency is kept constant while the modulating frequency is varied. The second group of digital PWM techniques uses complex non-linear optimisationtechniques to optimise a certain perf~rmance index28- 32 • [in optimal methods, the pulse-· widths over the whol e frequency range are cal cul ated on a mai nframe computer so that the switched waveform yields·a fundamental frequency component of a desired magnitude while optimising a .certain performance CriteriO~ Three-phase implementation of the digital PWM techniques requires a considerable amount of complex circuitry. Nevertheless, .incorporation of microprocessors into the control circuitry of variable speed drives reduces the complexity of hardware.

/required, since most control functions ·can be implemented by software. L ... . ~ The objective of this project is to produce a microprocessor-based PWM

signal generator capable of vary; ng the speed of an inverter-fed induction motor while maintaining a constant airgap flux. The minimisation of losses in variable speed induction motor drives requires a method of reducing or eliminating the harmonics caused by

. \{ the non-sinusoidal voltage waveforms.

3

1.2 ORGANISATION OF THE THESIS

\ The present thesis is concerne'd with microprocessor-based implementation of various switching strategies for use in inverter­fed induction motor drives. The block diagram of a typical drive

system of concern is shown in Figure 1 for open-loop control applications. In the work presented, the emphasis has been placed on the microcomputer block of Figure 1, which receives .the frequency demand input set by an operator and generates the TTL switching pulses for the inverter according to the PWM strategy emloyed.

Chapter 2 provides the necessary background in speed control of induction motors and various PWM strategies. The theoretical framework of different PMW strategies, namely natural switching st rategy regul ar-sampl ed switchi ng st rategy and opt imal switchi ng strategy, is presented. This chapter describes in detail the mathematical foundations of the optimal switching strategy which aims at el iminating a number of particular harmonics from the harmonic

\_ spectrum of the PWM si gnal s.

In the project undertaken, the fi rst step of practical work was the microprocessor-based implementation of regular switching strategy with 18 and 30 pulses per inverter output cycle. The software and hardware details of this implementation are given in Chapter 3. The microprocessor-basedPWM signal generator developed is capable of providing the necessary switching signals for the inverter to produce a 3-phase output with variable amplitude and frequency. These switching signals are generated in such a way that the inverter output voltage magnitude becomes linearly related to the output frequency. The incorporation of this feature, i.e. maintaining a constant Vlf

ratio over the full operating range, has resulted in considerable reduction in the complexity of the way in which.the regular switching strategy' is effected.

Chapter 4 describes the details of the microprocessor-based implementation of the optimal switching strategy. The practical

4

microprocessor-based PWM signal generator developed is capable of

effecting any form of optimal switching strategy so long as the

switching angles are predetermined in accordance with an optimisation

criteri on and thei r val ues 'stored in the 1 ook~up tabl e of the system.

The selective harmonic elimination method employed in the system

enables elimination of all the PWM voltage harmonics up the 23rd and

the 41st by using pulse patterns with 17 and 29 pulses per inverter

output cycle, respectively. The inverter output frequency is

controlled by means of phase-l ocked-l oop ci rcuits, and the magnitude

of the output voltages is varied proportionally with the' frequency so

as to keep the Vlf ratio constant. The voltage control technique is

based on look-up tables and ensures that harmonics up to the 23rd (or

the 41st) remain at negligible magnitudes throughout the operating

range of the inverter. The maintenance of correct phase-balance

amongst the three output voltage waveforms has been accompl i shed for

,the full operating range by considering the delays introduced by the

interrupt service routines. The effect of these delays has been taken

into account in the software programs without a need for complex

hardware circuitry to maintain the 1200 phase-balance amongst the

outputs. A sensitivity test has also been carried out during the

calculation of the optimal switching angles in order to examine the

effect of these delays on harmonic magnitudes.

Chapter 5 describes an original concept of combining the regular and

the optimal strategy into a single strategy. termed the combined,

regular-optimal switching strategy. This utilises the regular

strategy with 75 pulses per cycle for the inverter output frequency

range 1 to 20 HZ, and the optimal switching strategy with 29 pulses

per cycle is used for the output frequency range 20 to 50 Hz.

Computer simulations of the voltage and current waveform as well as

thei r, harmonic spectra for all the implemented strategies are

explained in Chapter 6. The computer simulation and experimental

results obtained from various strategies are both given in Chapter 7

in the form of oscillograms for the PWM voltage and current waveforms

and the correspondi ng harmoni c spect ra. A compari son between the

5

performances of the regular and the optimal strategies clearly

indicate that the optimal strategy is far better than the regular

strategy in the frequency range of 20 to 50 Hz in terms of harmonic

content. The regul ar st rat egy is better su ited to operat i on at

frequencies below 20 Hz. Hence, a good compromise was achieved by

combining these two strategies into a single one, which considerably

reduces the total losses and low-speed torque pulsations in the motor.

Following the conclusions given in Chapter 8, a number of suggestions

are made in Chapter 9 to extend the work described in thi s thesis,

particularly towards an improved method of implementation for the

optimal PWM switching strategy.

cy frequen demand Input ---,.

6

TTL pwm output signals

3-phase pwm-voltages

! dc supply

1 micro _ . 3-phase optional

computer , pwm , 10\/- pass ,

system inverter filter .

3-ohase siriUsoldal voltages

J 3-phase . indudion --, motor

Fig-1 ·.Block diagram of open loop control. system

\

spe~ d ,

7

CHAPTER 2

INVERTER-FED INDUCTION MOTOR DRIVES AND PWM SWITCHING STRATEGIES

2.1 THE THREE PHASE INDUCTION MOTOR 2.1.1 Induction Motor Characteristics

The three-phase induction motor is the most extensively used AC motor in industry. The construction and basic principles of induction motors can be easily found in the 1iterature33 -34• Before reviewing various speed control techniques for the induction motor, it is worthwhile considering its behaviour on sinusoidal supplies.

For ba1 anced steady-state operation, the per-phase equi va 1 ent ci rcuit shown in Figure 2.1 may ·be used to determine the performance characteristics of the motor. A usual simplification is to omit the iron loss resistor Rm in the magnetising branch. With this simplifying assumption, it can be shown from Figure 2.1 that,

j ~ Xm 12 = Rn (2.1)

T + j X2 Thus, the rotor current can easily be determined when the slip and the magnetising current is specified. The torque developed by the motor is calculated by equating the mechanical outP.ut at a speed w = ws(l-s) to the electrical power dissipated in the equiva1ent·resistor R2~ of Figure 2.1, giving

(2.2)

where ws is the synchronous speed.

Substitution of equation (2.1) into (2.2) yields 2 2 \lml Xm R2s .. x 1

T = (R/ + s2 x/i ""; (2.3 )

8

A typical torque/speed curve is shown in Figure 2.2. Points of special interest are shown by A, Band C in the figure, which are respectively the starting torque, the pull-out torque and the full­load torque. To maintain stability when the motor is loaded, operation of the motor should fall within the region of negative slope shown in Figure 2.2. It can easi ly be shown that the 51 ip at which pull-out torque occurs is given by

(2.4) .

Equation (2.4) indicates that if the rotor resistance is increased, the slip at which pull-out torque occurs is increased resulting in the characteristics shown in Figure 2.3.

Substitution of equation (2.4) into (2.3) gives

T -+ po --1 I 12 X 2 m m

2X2 x -lnr =+ (2~5)

which shows that the pull-out torque ·is independent of the supply frequency.

The output torque for a given sl i p frequency can al so be shown tobe independent of the supply frequency. Thus, with Im kept constant, the torque/speed curves for different supply frequencies are parallel, as shown in Figure 2.4. The most efficient machines are those with the lowest stator and rotor resistances, capable of operating at the smallest full-load slips. With inverter supplies, high starting torque can be obtained by reducing the frequency to start up the motor, and this permits maximum efficiency to be achieved with motors having as low rotor resistance as possible.

9

2.1.2 Induction Motor Speed Control

Besides the rotor based and the pole-changing techniques35 , static frequency changing is the most widely used method of induction motor speed control. Stat i c frequency changers, i ncorporati ng ei ther power transistors or thyristors as the switching elements, can .successfully produce AC voltages with controllable magnitude and frequency. The, power supply input to these converters can be either DC or AC, which is a, significant factor influencing the choice of control method. The cyc10converter36 , which directly uses the mains frequency AC supply to produce waveforms of variable frequency, suffers from a restricted output frequency range~ Cyc10-;converters produce maximum frequency outputs at about one third of the supply frequency and they are therefore restricted to low-frequency applications. A large group of frequency converters, known as the inverter or the DC link converter, use a DC supply to produce a variable voltage,variab1e frequency output by turning on and off the inverter switching devices at specific instants37 •

2.1.3 Effects of Harmonics on Induction Motor

, The most commonly used techniques to produce variable frequency AC supplies are the quasi-square wave inverter shown in Figure 2.5 and thepu1se-width-modu1ated (PWM) inverter shown in Figure 2.6. The output voltage waveforms produced by both these inverters are not pure sinusoids and are therefore bound to contain harmonic components. The response of the motor to these complex voltage waveforms can be' determined by assuming that each harmonic voltage is applied separately to the motor.

')( The motor imE..eda~ces of Figure 2.1 are proporti ona1 to frequency and are therefore very. large at high harmonic frequencies. When the motor is running at light load' near the synchronous speed, the slip is close to unity for all harmonic frequencies., The equivalent circuit to represent harmonic currents can be simp1 ified to that in Figure 2.7, where the magnetising reactance can be neglected without losing

10

significant accuracy. The harmonic currents can be evaluated from

where h is the harmonic order.

For a quasi-square wave inverter voltage supply this becomes:

. V/h V Ih = 2'1rfh (C 1 h + C 2 h ) = .,..2....,'lrf~( rc l"":h-:-+ 'C-2-h )t-rh"T2

c:I,,~

In practice, leakage reactances willdecrease{to the rotor deep bar effect, resulting in an increase in the harmonic current. Harmonic torques are generally much smaller than the fundamental torque. They rotate alternately in negative and positive directions .resulting in alternately negative and positive torque amplitudes of Figure 2.8.

The stator I2R losi is increased as a result of the increase of stator . current due to the harmonics. The. rotor winding loss and core loss will al so increase. Owing to hi gh frequency currents in the rotor, the deep bar effect will be very pronounced at harmonic frequencies; this will increase the rotor resistance and losses at these frequencies by a large factor.

Several improvements can be made in the motor performance by using a low skin effect rotor bar shape, to reduce the rotor harmonic I2R losses. By designing the motor to have incre'ased series reactance, the harmonic current amplitudes and consequently the harmonic I2R losses can be reduced.

2.2 THREE-PHASE BRIDGE VOLTAGE INVERTERS·

An inverter is a device which converts a fixed DC supply into a variable voltage, variable frequency output by virtue of switching action. In its simplest form, an inverter switches each phase output

. ) repeatedly to the positive and then negative rails of the DC supply.

11

This switching action requires a power ~witch, and the success of the whole Inverter depends largely on this element.

The mal n requl rements of an I nverter for Induction motor drl ves are that It must be capable of providing varlable-v6ltage, varlable­frequency three-phase output at varying load power 'factors. Furthermore, It must be reliable, efficient and should require minimal mai ntenance.

There are two main types of voltage-source Inverters, namely the quasi-square wave Inverter And the pulse-width-modulated Inverter.

2.2.1 QuasI-Square-Wave Inverters'

The basl c cl rcuit of the three-phase quasi -square wave inverter Is , shown in Figure 2.5 together with'lts typical output waveforms. The

input Is taken from a fixed DC supply, which is then regulated by a DC chopper to produce a variable DC link. The Inverter comprises three pairs of identical phase switches. Each switch conducts for a period' of 1200 of the output cycle, resulting in the waveforms shown In the figure.

A major drawback of quasi-square wave Inverters is that the power flow is through two cascaded stages of power convers i on (i .e. the chopper and the inverter) which results In an increase In the total losses. Moreover the square-wave output 1 eads to performance degradat ion of the motor due to the extra losses resulting from the high harmonic content of the motor current. These are particularly noticeable at low-speed operations, when the torque pul sat ions produced by harmonic currents may be at unacceptable levels.

2.2.2 Pulse-Width Modulated Inverters

The use of high-power switching transistors for inverter circuits eases considerably the switching problems encountered with thyristors. Conventional thyristors cannot readily be switched off after a period

12

of conduction and require the use of external commutation circuitry for turn-off. Power switches which can easily be turned on or off make it possible to use a form of inverter control referred to as pul se-width-modulation (PWM). In PWM inverters, full frequency and voltage control may be achieved within the same power conversion stage. There is no need for a separate DC regulator. The output waveform at low ~utput frequency is very much improved, hence a considerable reduction occurs in the losses and torque pulsations. The basic power circuit of a transistor PWM inverter is shown in Figure 2.6 together with its resulting output waveforms.

The mark to space ratio of each PWM pulse is varied relative to an overall pattern which' repeats itself at the required output frequency. Voltage control is achieved by varying the average level of the mark to space ratio at a particular output frequency. A considerable improvement in harmonic spectra results from using the sinsusoidal pul se-width-modulation technique. PWM inverters regenerate power directly into the DC supply system.

Snubber circuits of the type shown in Figure 2.9 are usually needed for protecting the semiconductor power switching devices. The inductor is used to limit the rate of growth of current in the device at switch on. The capacitor limits the rate of growth of voltage across the device as the diverted circuit current charges the capacitor anq resistance R allows a controlled capacitor discharge.

2.3 PULSE WIDTH MODULATED SWITCHING STRATEGIES

The most important aspect of any Pul se Width Modulation (PWM) control scheme is the way in whi ch the edges of the PWM tri ggeri ng pul ses are generated. The three types of PWM switching strategy in common use are: the natural switching strategy, the regular switching strategy and the optimised switching strategy, which are described in the following sections.

13

2.3.1 Natural Switching Strategy

Most PWM inverter control schemes implemented by analog circuitry employ natural switching strategy. because of its inherent simplicity and ease of i mp1 ementat i on by means of analog techn i ques. The natural switching strategy is based on comparing a triangular waveform with a

sinusoidal waveform to determine the pulse widths as illustrated in . Figure 2.6. Determination of the switching instants for one phase is

shown in more detail in Fi gure 2.10.

The triangular and sinusoidal waveforms are called the "carrier" and "modulating" signals respectively. If the amplitude of the sirle wave is greate,r than the amplitude of the triangular waveform. the modulating signal fails to intersect all the "teeth" of the triangular carrier signal. This results. in large pulse-widths in the middle region of a half cycle of the modulating signal and this situation is described as overmodu1ation. The modulation index M is defined to be the ratio of the carrier to the modulating signal amplitudes. The PWM technique shown in Figure 2.10a is referred to as a 2-1eve1 PWM. because it provides a pulse switching between the levels +1 and -1. The frequency spectrum of 2-1evel PWM pulses includes the carrier frequency harmonics. The harmonic spectra can be improved by uSing a 3~leve1 PWM which switches between the levels of +1. zero and -1. This can be achieved by changing the polarity of the pulses every half cyc1 e of the modu1 at i ng signal as shown in Fi gure 2.11.

It should be noted that as the carrier frequency is increased. the harmonic content of the PWM waveform becomes reduced because more pulses per cycle are obtained. The carrier frequency is therefore chosen as high as can be permitted by the swi~hing characteristics of the semiconductor devices used in the inverter.

Since the switching edges of the width modulated pulse are determined by the instantaneous intersection of two waves. the resultant pulse width is proportional to the amplitude of the modulating signal at the instant of switchi ng. Thi s has two important consequences:

14

i) The centres of the pulses in the PWM signal are not equidistant, i.e. not uniformly spaced.

ii) The pulse widths cannot easily be described by simple analytic expressions.

It is possible, however, to show from Figure 2.10b that the width of a pulse in a 2-level PWM signal can be defined by the transcendental equation:

where tpl = the width of the pulse (ON-time) T = the period of the carrier waveform M = the modulation index Wm = the angular·frequency of the modulating waveform tl = the instant at which the pulse rises t2 = the instant at which the pulse falls.

Althoughthe natural switching strategy inherently calls ·for analog techniques, a possible way of digital implementation is to generate the variable frequency sinewave modulating signal by means of a microprocessor. The natural sampl ing process and PWM generation are then performed in hardware external to the microprocessor as shown in Figure 2.12. Sampled values of the modulating wave are stored in the microprocessor's memory in the form of a look-up table. Multipl ication of each value of the modulating signal with the

modulation depth i~ achieved using a hardware multiplier since software multiplications require long microprocessor time. A hardware triangular waveform generator is used to produce the carrier signal. The PWM signals are finally obtained by comparing the triangular waveform with the mult ipl i er output usi ng a compa rator as shown. in Figure 2.12.

15

2.3.2 The Regular Switching Strategy

LThe regular sampled PWM strategy is based on the comparison of the triangular carrier wave with a stepped waveform obtained by regularly sampling the sinewave modulating signal and holding its value until

the next sampling instant.

Two types of regular-sampled PWI1 strategy exist: the asymmetric

modul at ion type and the symmetri c modul at i on type. J l In the asymmetric modulation type shown in Figure 2.13 the leading and

trailing edges of each output pulse are determined by using two different samples of the modulating wave (a) shown in Figure 2.13. Each sample is held for half a period of the carrier signal (b) to produce the stepped waveform (d). The asymmetric pulse is obtained by

comparing the triangular signal (b) with the stepped signal (d).]

. l In the symmetri c modul at i on type shown in Fi gure 2.14 the val ue of the modulating signal at a sampling instant, e.g. t1 is stored by a

sample-and-hold circuit and is maintained at the same level until the next sampling instant, i.e. t2 producing signal (c). Comparison of the triangular carrier waveform with the stepped signal (c) produces the intersection points defining the switching instants for the width modulated pulse. Note that the stepped modulating wave has a constant value while an intersection point is being determined. Consequently,·

the widths of the output pulses are proportional to the value of the sinusoidal modulating wave at each sampling instant, and the centres

of the pulses are spaced uniformly in time, leading to the term

REGULAR sampling~ ~

Since the sampling instants and the sampled values of the modulating

signal are defined unambiguously, both the width and the position of the output pul ses produced by thi s strategy can be predi cted easily.

(This was not the case for natural sampling). It is possible to obtain simple trigonometric functions giving directly the pulse widths

of the PWM waveform.

•

16

For symmetric modulation, with reference to Figure 2.15, the width of a pul se may be defi ned i n ter~s of the sampl ed value of the modul at i ng wave taken at time t1 as

. tp1 = T/2 [1 + M Si~)Wmt1)] For asymmetri c modul at i on, with re~\ence to Fi gure a pul se may be defi ned as \

\ ,

where t1 and t3 are the instants shown on the figure.

(2.6 )

2.13 the wi dth of

(2.7)

~ecause the number of calculations required to evaluate the width of a pulse is higher in equation (2.7) than in equation (2.6) more computer

time would be necessary to calculate the pulse widths with a mi croprocessor i mpl ement i ng the asymmetri c modul at ion.

Three-level PWM regular sampling also exists and it may be generated in a manner similar to that described for the natural sampling strategy.

With reference to Figure 2.15 the carrier period T may be defined as

(2.8)

Because of the nature of the symmetric modulation regular sampling strategy, the widths TA/2 and TB/2 shown in Figure 2.15 and defined as

T t ~= x+4 T t

and -} = 4 + Y

are equal to hal f the.carr.ier period T/2, leading to the result that interval X is also equal to interval Y. Similarly, for the next

i period, the symmetry requires that z = W. The 'OFF'time pul se t02 can be defined from the same figure as

17

t t02 = Y + Z =y + (~ - 4)

Since X is equal to Y, equation 2.8 becomes

giving

T = 2 X + tp1

t y=x=l--.:ill 2 2

Substituting for Y in equation (2.9) gives

Similarly,

where

_ T tpl' T tp2 t02-,2-2+2~'-2

t 1 ,; T -o "

t - T pO- "'2

t02 = T -

t 3 = T -o , •

•

ton = T -

(tpl + t p2 )

2

(tp2 i tp3)

(tpn - l + t )

pn 2

(2.9)

(2.10 )

It can clearly be seen that the 'OFF' time pulse widths are di rectly

dependent on the 'ON' time pulse widths and the carrier period.

Hence, once the 'ON' time pulse widths are known, the 'OFF' time pulse

widths are automatically deduced from equations (2.10).

18

2.3.3 Optimal Switching Strategy

The optimum switching strategies are based on the minimisation of a performance criterion such as e1 imination or minimisation of particular voltage harmonics, minimisation of harmonic current

distortion etc. These strategies involve the solution of a minimisation algorithm on a mainframe computer in order to determine the optimised switching angles. Once these angles are determined, they are subsequently preprogrammed into the microprocessor memory so as to generate the PWM switching strategy in real time. In this work, the selective harmonic elimination technique is adopted, where the objecti ve is to produce a waveform contai ni ng a mi nimum amount of 10w­frequency harmonics and a maximum fundamental voltage magnitude. The underlying theory is described below, commencing with an analysis of the harmonic content of the PWM waveform.

It should be noted that the analysis is given for a single phase output signal. However, once the switching angles for this signal are calculated, the angles for the remaining two of the three-phase signals can readily be deduced by shifting the actual phases by 1200

and 2400 respective1y.lThe PWM waveform to be analysed is shown in . M Figure 2.16. The function f(wmt) contains:.c chops per half cycle and possesses half wave symmetry. In general, Fourier analysis of the

waveform f(wmt) yields J .,

= L n=1

(2.11)

where (2.12)

and ,. 111

b - 1 n--11 0

(2.13)

Because of the half wave symmetry, the coefficients of the sine terms .

can be expressed as

\

2 2C an = - l n " '=0

19

(2.14)

where i is an integer indicating the switching angles Xo = 0, X2C+l = n

0< Xl < X2 ... < XM < ;, and C is the number of chops per half cycle.

Integration of equation (2.14) leads to

. ~C a = 2 L (_l)i [cos (nX,") - cos (nX,"+l)] n 1'Iii" '=0

= 1- [cos nXo - cos nX1 - cos nX1 + cos nX2 + cos nX2 nn

- cos nX3 - ••• + cos nX2C - cos nX2C+1]

2C = 1- [cos nXO - cos nX 2C+1 + 2 "L (_l)i cos nXi]

nn , = 1

The first two terms above are cos nXO = 1 and cos nX2C+l= (_I)n, becauseXO = 0 and X2C+1 = n.

Therefore the expression for an becomes

2C an = 1- [1 - (_l)n + 2 L (_l)i cos nXi]

. nn i=l (2.15)

The coefficients of the cos'ineterms can be determined in the same manner, resulting in

bn = .:! [sin nXO - sin nX2C+1 + 2 nn

2C .=.:! [2 J (_I)i sin nXi]

nn , = 1

4 2C " bn =.:... L (_I)' si~ nXi

nn " 1 ,=

2C t (_I)i sin nXi] i=1

(2.16)

2lJ

Because of the half~wave symmetry property of the waveform, there will be no even harmonics in the frequency spectrum of f(wmt) since an = 0 and bn = 0 for even n. Furthermore, because of the star connection of the three phase induction motor, no triplen harmonics will exist in the stato~ voltages, thus n can only be odd giving (_l)n = -1 and

and

2C an = 1.. [1 + 1 + 2 L (-1) i cos nXi]

nrr i = 1 2C

= 1- (1 + L (_l)i cos nXi ] nrr . 1 1=

2C bn = -4 L (_l)i sin nXi

nrr . 1 1=

(2.17)

(2.18 )

Since the waveform of Figure 2.16 is also constrained to possess quarter-wave symmetry, the switching angle Xl' shown in this figure is equal to the switching anglerr - X2C• In general, the switching angles

i

Xi are equal to the angles rr - X2C+1-i. This results in the equation'

sin nXi = sin n (rr - X2C+1-i) (2.19)

. which, using trigonometrical relations, becomes

sin nXi = sin nrr.cos nX2C+1-i - cos nrr.sin nX2C+1-i (2.20)

For odd values of n, sin nrr = 0 and cos nrr = -1.

Substitution for sin nrr and cos nrr in equation (2.20) gives

sin nXi = sin nX 2C+1_i (2.21 )

Expansion of equation (2.18) yields

bn = ~! [sin nX1 - sin nX2 + sin nX3- sin nX4 + •••

+ sin nX2C_1 - sin nX2C] (2.22)

21

Since, as a result of equation (2.21):

sin nX1 = sin nX2C' sin nX2 = sin nX2C_l' sin nX3 = sin nX2C_2' sin nX4 = sin nX2C_3 etc

all the sine terms in equation (2.22) cancel each other. giving bn=O.

Simil arly, because Xi = 11 -X2C+1-i as stated above cos nXi = cosn (" - X2C+1-i)' which, by using trigonometrical relations becomes •.

cos nX i = - cos nX 2C+1-i

Substitution of equation (2.23) in equation (2.17) results in

C an = i.. [1 + 2 L (-1) i cos nXi ]

nll i = 1

(2.23)

(2.24)

where n is the order of harmonics, C isthe number of chops per half cycle and X's are the switching angles. ------ ..

For a 2-state waveform, a number of harmonics can be el iminated by solving C equations obtained by setting to zero an of equation (2.24) for i = 1 to C. Thus, the number of harmonics that can be el iminated is equal to C, the number of chops per half cycle. The harmonics to be eliminated are normally chosen to be some higher harmonic components excl udi ng the fundamental, whose '!'agni tude is maxi mi sed· to obta in as high a voltage output from the inverter as possible.

The problem of maximising the fundamental voltage magnitude .while eliminating C harmonics has been solved by Quasi-Newton Minimisation Method with Sequential Augmented lagrangian Function. The optimisation process is described" in Appendix I, where a PWM waveform containing C = 8 chops per half cycle is considered for elimination of ha rmoni cs up to the 25th.

The control of inverter output voltage is possible if a singl e degree of freedom is introduced in the problem. Thus, to eliminate· C

22

harmonics and at the same time control the fundamental component. (C+l) chops per half cycle are required. Alternatively. with a waveform containing C chops per half cycle. (C-l) higher harmonics can be eliminated while the fundamental component is kept at a specific magnitude. This requires solving a system of C non-linear equations with C variables. which result from equation (2.24) by equating al to the specific ma[nitude required for the fundamental and equating the other components for i = 2 to C to zero. Since the fundamental magnitude is to be varied in proportion with its frequency (to keep the stator voltage to frequency ratio constant). the above problem needs to be solved repetitively for K times •. ~ith K being an integer representing the number of different voltage levels required in the fundamental magnitude. The method used for solving C equations (with C unknowns) for K ti mes on a mai nframe computer is expl ai ned in Appendi x

I .

. The results given in Appendix I are in the form of sets containing 8 Xi values in radians. with each set corresponding to a fundamental voltage 1 evel. These val ues need to be transformed into the actual numbers to be stored in a look-up table for use with the 8254 timers to produce the required pulse widths. The hardware and software related aspects of microprocessor implementation of the optimal PWM strategy are described in Chapter IV. and the process of converting the theoretical results of Appendix I to the integer numbers actually stored in the look-up table is explained in Appendix Ill.

Fig-2-1

23

1m

Rm Xm

12 R2 \.-----,

R2(1-s) s

Exact equivalent circuit of inductio!,) motor

B

constant load line - - -- - .

s=l s=O , speed

. 4.;1-

BR~KING MODE NORMAL OPERATING REGION GENERATOR MODE .... .. ..

Fig ~ . Torque speed characteristic of an induction motor

25

T

high resi stance

o n

Fig.Z.3 Effect of rotor resistance variation

T

o n

Fi1_2_4 Effect of supply frequency. variation

FIXED DC

SUPPLY

~ ... a:

Ua:

26

VARIABLE

CuJ ""a: ""0

0--1 §! ... 1---~-.1-J.-I---'-I4--~ U

r---

----'_...J' .\ L-----J A phase A '120~·

.. • , I I

L.....,.-----Jr B -phaseB I

, ••

240' I , I

-J I I phase C

line A-B

c

r

. low speed operati on high speed operation

Fig-2S Quasi square wave inverter

-

I"'

'--

fixed dc supply.

sinewave A

27

c

sinewave B. ' smewave C

~~$~~~~~~~~~~~' tri~gUlar wave

I,'LI __ '--____ -.. _____ ... ___ ._ ..... '"="'.~-__:--11 __ - •• 1"· --I ~_. '1'1 • « • -,.. ... - e' •• __ - gate current pulse

perio ds ~'- Mlr _ - • • - .. MW I );;t '- -, - • • - M' __ «

LQPr=;~EilllLfl n lILD v . VG ou~~~ lflflJ8DLJ[dtJ:l fundamental

n n}LOJEhnRDlllV frequency

Vb gUOOOln lrutrlJEJ[ V mJ]J1 n rIJlJ1GfJ~r::

vc 'lll1tf8uuldt11JiA

L·""~Mn i L r ~ J

Fig.2:6 Pulse width modulated inverter

28

Fig_2.7 Harmonic equivalent circui t of induc ti on motor

.J> '::;

"

% Torque

200

100

Fig. 2.8 Harmonic

L

C

R

, Fundamental

7th Harmonic ,/

0/0 Speed

torque-speed characteristics

Fig.2.9 Snu bber circuit

t

+ 1---

o

1---

29

carri er wave ,

,

'-

,

~~ PWM waveform

T

I I I I I

I I I I

modulating wave

, r-' ',..

(a)

)

_ carrier wave

~tpl_~1

-"I 1,----~ t2

( b)

J,// Fig-2-10 (a) The 2-level natural sampled PWM

(b) A 2-level natural sampled pulse creation

o ... 1

----

-

30

-

""--

o~---------------+----------------+-

--.1,. _____________ _____ ....... _______ .....a

-- --, .,' .,

......... , ... L...

.... , r-""1 ./" "- ........ - t----

.... ~ --

Fig-2-11 The three-level natural sampled PWM

modulation depth

sinewave variable \

/

frequency MICROPROCESSOR MULTIPLIER AND

MEMORY

J.

ilp comparator

" "-./ P'v/ M DIP

T~IANGUlAR

.. WAVE GENERAT_ OR

, ~ ~/ :r Fig-2-12· Possible hardware implementation of the natural

switching strategy

t1 Fig-2-13

t2. . t 3

Asymmetric

31

d

regular sampled pwm

Fig-2-W Symmetric regular sampled pwm

••

,..,

b

I I I

I . I

I I I I , I I I • I I I T ( . I I , I . I

\( tpl---7! ,

o I--+-II-...J

32

I t02

y-' I

I I I I I , i , I , , I

I I

'E I

I Z~

It I--~---I----~ 2· ,

~Th. I 2

v-J <f

. Fig-2-15 A symmetric regular PWM

• I I I I I I I I I I I . I I , I I

• t.p2. I ~

. ~W-;

I ,

IT, = T 14)

,

33

'I' fit) w

1 chop C chops r-- ~ I""

o •

. .•••• 1- I- ~ L... •••

X, X2 X3 X4 - - - - - - 11"

Fig-2-16 Generalized Llevel PWM waveform

34

CHAPTER 3

IMPLEMENTATION OF REGULAR SWITCHING STRATEGY

3.1 INTRODUCTION

This chapter describes in detail the implementation of the 3-phase regular sampled PWM switching strategy with 18 pulses per inverter output cycle. The same switching strategy was also implemented with 30 pulses per output cycl e inexactly the same manner as for the one described inthis chapter. With an increased number of pulses per cycle, the only difference 1 ies in the content and the size of the look-up tables used. The look-up tables devised for the 30 pulse-per­cycle regularPWM switching strategy are given in Appendix 11.

3.2A HARDWARE DESIGN

The most ·important considerations in designing a microcomputer system for real-time control are the type of microprocessor to be used, the speed at which it is clocked and the type of programming language to be employed for software development.

Because the microprocessor is to act as a controller implementing the PWM pulses in real time, very fast processing speeds are required. A low-level language such as assembly 1 anguage is therefore the most appropriate choice for software development. The requirement of fast processing speeds also calls for a fast processor capable of operating

at high clock frequencies and containing efficient and useful . arithmetic operati ons in its instructi on set to perform the control functions adequately. The choice of microprocessor device was made for 8085A-2 which is a 5 MHz, 8-bit microprocessor manufactured by Intel Corporation38•

35

The hardware block diagram for the three-phase implementation of the

regular-sampled PWM strategy is shown in Figure 3.1. ,The generation

of the regular-sampled pulse widths is achieved by using a 8253

timer/counter device39, which allows a flexible and efficient program

structure to minimise the overall computation time, thereby releasing

the microprocessor to perform other functions.

The communication between the microprocessor and the outside world is

accompl ished via a programmable peripheral interface {PPI} device,

which can write to or read information from external circuits in a

number of different modes selected by initial programming. The

details of the device and its modes of operation are available

elsewhere40 •

The 8253 timer has three 16-bit counters~ Each counter is used in

conjunction with one of the three-phases. The outputs of these

counters are connected directly to RST 7.5, RST 6.5 and RST 5.5

interrupt lines of the microprocessor'as shown in Figure 3.1. To

create a pulse of certain duration, a counter is loaded with a

corresponding 16-bit number and this is decremented at a rate

controlled by the clock frequency feeding the counter. When the count

reaches zero, the output of the counter becomes raised to a high ,level

and therefore generates an interrupt signal, informing the processor

of the end of the time duration for the pulse. On receiving th~s

interrupt request, the microprocessor acts so as to output through the

PPI the appropriate pulses for each phase. Since simultaneous

creation of three pulses each with different duration is needed, the

three counters in the 8253 timer are all used. To resolve any

ambiguity that would arise if the interrupt signals were generated by

the counters at the same instant, priorities are assigned in high to -. ,

low order to counter 0, counter 1 and counter 2 by connecti ng thei r

., outputs to RST 7.5, RST 6.5, and RST 5.5, respectively. Further

implementation details are given in Section 3.3 to provide the basis

for the calculations and look-up tables used in the software programs.

36

In all control systems, some means of communi cati on between the human operator and the control system is necessary. This is usually achieved by intermediate circuitry w~ich, depending on the appl ication, may be very complex. For simpl icity, a two-digit hexadecimal thumbwheel switch was used in the experimental unit as the interface circuitry for the operator to set the desired inverter output frequency. As shown in Figure 3.2, the outputs of the individual switches are connected to an input port of thePPI, through which the microprocessor reads the desired frequency in hexadecim,al form simply by means of an "input" instruction in the software. The arrangement is such that the number on the thumbwheel switch actually corresponds to the inverter output frequency in Hz, which can be varied with 1 Hz increments.

The hardware block diagram of Figure 3.1 was put into practice by means of a ISBC 80/24 single board computer41 , whose memory and input/output addressing details are given in Appendix IV.

3.3 SOFTWARE DESIGN

3.3.1 Algorithm Description

As gi ven by equati ons (2. 6) and (2.10) of Chapter 2, the width of the first "high" level pulse of phase A shown in Figure 2.15 is

(3.1)

and the "low" level pulse width is

T . (~- t lA)

T - P 2

(3.2)

37

where T, T1, M and 'in are as defined in Section 2.3.2. It can be seen from equation (3.1) that the calculation of pulse width tp1A involves an addition, a multiplication and a sinusoidal function, which require considerable computation time. As a consequence,the maximum output frequency available from the inverter becomes restricted, since at high inverter frequencies, the system would be unable to produce pulses of short duration. One way of solving this problem is to use fast hardware multipliers, another is to further simplify the pulse width equations so as to reduce the complexity of calculations in the microprocessor. The latter approach is obviously much preferred and is explained below.

If a constant number of pulses over a cycle, P, is used, this leads to

P =I = constant f

(3.3 )

where F is the carrier switching frequency and f is the inverter output frequency or modulating frequency.

The carrier period is given by

T=1 F

(3.4)

Since, in order to keep the t ratio constant, the modulation depth M needs to be increased when the inverter output voltage is increased, the modulation index can-be made a linear function of the inverter output frequency, i.e.

M= k f (3.5)

where k is a constant.

Equation (3.1) can be conveniently expanded as

(3.6)

38

where Tl = T/4, as defined in Chapter 2. Substitution of equations

(3.3), (3.4) and (3.5) into equation (3.6) yields

tplA = iF + k; ; Sin2rrf.J

1 k 11 f =""2F +"zp sin ""2 f

1 k 11 1 ="ZPf +"zp sin.., -. Co P

With reference to Figure 2.15, T2 = Tl + T ~ ~T.

(3.7)

The second "high" level pulse width is therefore calculated in the . . same mann.er as for t plA' gi vi ng

1 k 511 tp2A = 2JiT + 'ZP' sin 'ZP" (3.8 )

In general. the (j+l)th "high" level pulse width can be calculated

from

t p(j+1)A = -J.r + -dP sin [.zp (4j + 1)] (3.9)

where j is an integer taking values from zero to P-1.

Equation (3.9) describes the pulse widths only for a single-phase

output A. The same carri er waveform used for phase A is al so used for·

phases Band C. To obtain the pulse widths for the remaining phases B

and C, phase displacements of 1200 and 2400 are introduced into the

sine expression to give the pulse widths for phase B as

. 1 k 11 ( ) _ ,..,,-.211)] tp(j+l)B = 2Pf + 2P sin [(2P 4j+l ~

and the pulse widths for phase C as

sin tp(j+l)C =.Jr. + iP-/[(2P (4j+1) - 411)]

3

(3.10)

(3.11)

39

It can be seen from equations (3.9) to (3.11) that the.second term in

each expression does not vary with frequency and is a constant. Since

2P is also a constant, the general expressions describing the pulse

widths for the three phases take the form

t p(j+1)A = ~ + CjA

t p(j+1)B = ~ + CjB

t p(j+1)C = ~ + CjC

where Nand CjA' CjB and CjC are all constants defined by

1 N = 2P

CjA = 2~ sin [2~ (4j+1)]

k n 2 CjB = 2P sin [(2P (4j+1) - ~)]

k n 4n CjC = 2P sin [(yP (4j+1) - 3)]

(3.12)

(3.13)

(3.14)

(3.15) .

The only parameter remaining as a variable in equation (3.12) to

(3.14) is the modulating frequency f.

Equations (3.12) to (3.14) can be evaluated in a very fast manner by

using look-up tables. This permits high inverter output frequencies

to be obtained, since the pulse width calculations can be performed

very rapidly.

The value of k of equation. (3;5) depends on the maximum output

frequency f max and the maximum modulation depth Mmax used in the

inverter. Therefore, the proportionality constant k can be defined as

t1 k - max - f

max (3.16)

40

and by choosing fmax = 50 Hz and Hmax = 1.0, the value of k becomes

k = 1.0 = 0.02 sec 50

With the constant number of pulses per cycle chosen as P = 18, .. N = J = 3~ and the values of constants of equation (3.15) become

and

CjA = ~ ~in [3~ (4j+1)]

CjB = ~ sin [i (4j+1) -1J)]

CjC = ~ sin [3i (4j+l) -~)]'

(3.17)

A look-up table can now be conveniently organised by calculating constants CjA' CjB and CjC from equations (3.17) and storing them in specified addresses in the memory. Whenever the inverter frequency is to be changed, the ratio of Nlf in equations (3.12) to (3.14) is fi rst· calculated and its value is then added to the appropriate CjA' CjB or CjC values obtained from the look-up table to determine the pulse width. Si nce the actu a 1 va 1 ues of constant s C jA' C j Band C j C a re of the order of 10-3, floating point arithmetic operations would be ·involved. However, this can be avoided by scaling the values of these constants for the look~up table so asto convert them into integer numbers as necessitated by the 16-bit counters of the 8253 timer.

If the clock frequency to the counters of the 8253 timer is chosen as f c = 1.075 MHz, the clock peri od tc = 11f c = 9.3023256 x 10:..7 s becomes the actual time interval corresponding to a decrementation in the

. contents of a counter register. The actual integer numbers to be loaded into the 8253 count registers are therefore obtained by

Xp(j+1)A = Int [t~(j+l lA] \ = Int [Yf + ZjA] =Yf + ZjA

Xp(j+1)B = Int [tp(j+l)B] tc

= Int [Yf + ZjB] = Yf + ZjB (3.18)

Xp(j+1)C = Int tp(j+l)C'

= Int [Yf + ZjC] = Yf + ZjC [ t ] c

41

Where "Int" stands for the rounding operating to convert the value into an integer number and the common term Yf is given by

N N.fc ~ x 1.075 x 106 Yf = r.r = -f- = f {3.19}

c

'By using equations (3.17), the second terms in equations {3.18} are found as

CjA ' 6 ZjA =

0.02 x 1.075 10 . [i- {4j+1}] tc = 36 Sln

CjB 6 ZjB = = 0.02 x 1.075 10 s. [3~ (4j+1) - .g] (3.20)

"\ 36 1n

Cf~ 6 ZjC = = 0.02 x 1.075 10 . [i- (4j+1) - ~] 36 Sln

where j takes integer values from zero to 17. To avoid the division operation involved, the common term Yf = Int (Yf) can be manually calculated from equation {3.19} for different frequencies and the

'resulting integer values can be stored in a look-up table. With the inverter output frequency f ranging from 1 Hz to 50 Hz with 1 Hz

, , increments, the look-up tab1e,for Yf contains 50 16-bit integer numbers arranged as shown. in Figure 3.3. The contents of the Y f 100k- , up table as actually stored in the ROM are given in Appendix 11 in hexadecimal form.

Similarly, by uSing equations (3.20), ZjA' ZjB and ZjC can be calculated for different j values, and the resulting integer numbers can be stored in another look-up table arranged as shown in Figure 3.4. The contents of' this look-up table as stored in the ROM is also given in Appendix 11.

'With the above arrangement of look-up tables, the calculation of pulse widths and production of pulses with corresponding widths become very much simplified. The actual number to be loaded directly to the timer

'for a pulse in e.g. phase A, i.e. XpjA' is obtained by collecting from the Yf table the constant corresponding to the required output

. .'

42

frequency and adding it to the constant which corresponds to this pulse and is fetched from the ZjA table. However to avoid the repetition of these operations at the occurrence of each pulse. all the pulse width data needed for one complete inverter cycle in all the three phases are assembled together and put into the form of a 'look-up, table situated in the RAM area, as opposed to the ROM for the previous tables. When all the high level pulse width numbers XpjA' XpjB and XpjC have been calculated, these are stored in the RAM look-up table arranged as shown in Figure 3.5. The numbers for the low level pulse wi dths. i.e. XojA' XojB and XojC' arethen cal cul ated by means 'of the relationship given by equation (3.2), and these are also stored as part of the RAM look-up table shown in Figure 3.5.

Before these numbers are transferred to the 8253 count registers, the present value of the frequency demand input is read and compared with its previous value. ,If the two values are the same, the microprocessor collects three appropriate numbers from the RAM look-up table and loads them into the three counters of the 8253 device. The frequency demand input is checked each time a counter is loaded with a

, number to produce a pu1 se. If the frequency demand input has changed from its previous value, the output signals remain unchanged while the microprocessor updates the contents of the RAM look-up table for the new value of the inverter output frequency. Since the operations involved in the calculation of the "high" and "low" level pulse widths are very simple, the whole RAM look-up table can be updated very quickly without producing any significant disturbance in the PWM waveforms.

The resolution and the maximum range of the inverter output frequency can easily be increased e.g. to O. 1 Hz steps in the range 0.1 - 100

Hz, and this only involves increasing the size of the ROM look-up table, shown in Figure 3.3, where Yf numbers are stored, with the si zes of all the other tables remaini ng unchanged. Since the implementation of this strategy formed the initial part of the investigation and was aimed to provide a basis for comparison with the optimum switching strategy, a frequency range of 50 Hz with 1 Hz

43

frequency increments was considered sufficient. The software program designed to effect the 3-phase regular-sampled PWM strategy is described in Section 3.3.3 by means of flowcharts,and the symbols used in these charts are defined in the following section. The listing of the assembly language program is included in Appendix 11.

3.3.2 Symbol Defi nit ions

ADR = 16-bit address of a location in the Yf look-up table BA = 16-bit base address of the Yf look-up table f = 8-bit number (two hexadecimal digits) representing the input

frequency value J = an integer varying from 1 to 16.to represent the number of

the pulse currently in production for phase A K = same as J but used for phase B 0.

L = same as J but used for phase C XojA = width of the jth low level pulse for phase A (16-bit binary

number) XoKB = same as XojA but used for phase B XoLC = same as XojA but used for phase C XpjA = width of the jth high level pul se for phase A (16-bit binary

number) XpKB = same as XpjA but for phase B XpLC = same as XpjA but for phase C IFLAGA = a 16-bit address where an 8-bit binary number is stored. If

this number is odd, a "hi gh" 1 evel pulse width for phase A, i.e. XpjA' is fetched from the RAM table. If this is even,

a "low" level pulse width for phase A, i.e. XojA' is fetched. Number 55H is initially loaded into IFLAGA so that consecutive rotation to the right would produce a sequence of even, odd, even, odd ••• numbers. IFLAGA is used because the XpjA and XojA are stored in different locations in the same table, as shown in Figure 3.5

IFLAGB = same as IFLAGA but for phase B IFLAGC = same as IFLAGA but for phase C •.

44

3 .3 .3 Fl owch art s

The main program flowchart in Figure 3.6 shows that the frequency demand input is first read via a PPIinput port. The 8-bit hexadecimal number representing the frequency is then multiplied by 2 and added to the base address BA of the Yf look-up table to calculate the address ADR from where the appropriate Yf value is to be fetched. After this, all the high level pulse widths XpjA' XpKB and XpLC are calculated and stored in the RAM memory area as the first half of the look-up table of Figure 3.5. This is followed by calculation of all the low pulse widths XojA' XoKB and XOLC which are stored as the second half of the same RAM look-up table. Thus all the data necessary to produce the three-phase PWM waveforms corresponding to the demanded frequency becomes readily available in the RAM memory. Before producing these PWM waveforms, the frequency demand is read in again and is compared with its previous value. If the frequency demand has changed, the program jumps to point A to repeat the process described above. If the frequency demand has not changed, X01A ' X01B and X01C

,numbers are loaded to the 8253 counters, 0, 1 and 2 respectively, and a low level signal is output Via the PPI output port to the 3 output lines for the A; Band C phases. The counters are now timing the low level pulse widths, and the microprocessor is therefore waiting for interrupt signals to be generated by the outputs of these counters. As soon as counter 0 content reaches zero, a high level signal is generated at the output of this counter to produce an RST 7.5 interrupt signal setting the microprocessor's program pointer to Interrupt 1 routine address.' The flowchart of Figure 3.8 shows the program structure for this interrupt routine, which first saves all the microprocessor registers and flags in a reserved RAM area called the stack.' The data stored in IFLAGA address is then read and checked for parity to determine whether XOjA or XpjA has to be fetched and loaded into counter 0 to time the width of the pulse. As soon as counter 0 is loaded with the appropriate number, the output of phase A is complemented, and J is incremented to count the number of pulses produced. If 36 i.e. 2P pulses have been produced, it is the end of an inverter cycle, so J is set to 1 to indicate that a new cycle is to be

r

45

started. The registers and flags saved previously in the stack are

then called back, and the interrupt routine is terminated by setting

the program pointer to the "Input Frequency" subroutine described by

the flowchart of Figure 3.7. This routine reads the frequency demand

input and compares it with the previous demand. If the frequency

demand is a new value all the interrupts are disabled, the stack

pointer is reset to its initial address, and the program then jumps to

point A in the main program to calculate all the new pulse widths so

as to update the complete RAM look-up table. However, if the input

frequency is the same as before, the microprocessor is set to wait for

other interrupts.

Interrupt 2 and Interrupt 3 routines, shown in Figures 3.9 and 3.10

respectively perform exactly the same operations as Interrupt 1

routine does, except that the flags and pointers used are those

appropri ate for the Band C phases.

r

i/p port I

I I I (

Thum bwheel swi tche·s

5 Mhz clock

Numbers loaded t through bus

to be 0, o counters data 0-:-

0

rst 7.5

. \

I f

f =1.075Mhzclock t

46

0 ut put port I

p- P - I > PWM output signals

r.

0" "- DO 7 - ,/

80 B 5 A- 2 • microprocessor

.

rst rst 6.5 5.5

r.= ~

f '-QI 1!! 8253 .... c: c: ::J ::J 0 0 ..... u

Timer

-Fig -3-1 Hardware block diagram for regular sampled. strategy

Fcc

~ 1 J ]I SN74LS1

. switches 1k ,.I Isb

4

. -::::. .

....

G

-::::: .r !::' -,-

~ NO

TO

P. P. I

...... msb

•

Fig;;'3-2 . Thumbwheel switch operator's interface

. . . . ....

Base address=17FEH

47

YI low.byte

Y2 high byte I

I I

I I

I I

I I

YSO low byte

YSO h~gh byte

} f =1 Hz

} f = 2 Hz

Figure 3.3 Organisation of Yf look-up table

Base address=IB6SH A phase

Base address=IB7SH B,phase

Base address=IBBSH . C phase

ZOA low byte

ZOA hioh byte I I I

Z. I

JA low byte

ZjA high byte

ZOB low byte

ZOB high byte I I I

Z· J'B low byte

Zjs hiah byte

ZOC low byte

ZOC hiqh byte I I I

Zjc low byte

Zjc high byte

}OA

}i' }ZOB

}iB

}zoc

}iC

Phase A ZjA

Phase B Z'B .J

Phase C ZjC

Figure 3.4 Organisation of look-up table for ZjA' ZjB and ZjC'

48

Base address=30B6H XplA low byte

XplA high byte

0 • • XplB low byte

XplB high byte 0 0 •

XplC low1'byte

XplC high byte

I I I I I

Base address=30E7H XOlA low byte

XOlA high by.te I I I

XOlB low byte

XOlB high byte , . 0 0

XOlC low byte

XOlC high byte , I I I I I J J

} .

A phase high level

pulse widths

B phase high level

pulse widths

Cphase high level

pulse widths

A phase low level

pulse widths

B phase low level

pulse widths

C phase. low level

pulse widths

Figure 3.5 Organisation of the RAil look-up table containing the

high and low level pulse width data for all phases.

49

Figure 3.6 I-lain Program

I Input frequency I

(£) Calculate

ADR = BA + 2f

.L Calculate all the 'high' level pulse widths and store these in the RAM table

Calculate all the 'low' level pulse widths and . store these in the RAM table

1 I Input frequency I

1 Isit~ ves

r-

no

Get XOIA ' XOIB & XOIC from RAM table and load these into

timers 0, 1 & 2 respectively

Output, '0' into phase A, B, C outputs

. I Wait for Interrupt I .

~ ., .

Figure 3.7

50

Input Frequency Subroutine

I n ut frequency

yes

Initialise stack, disable interrupts and jump to A

no Return to wait for Interrupts

figure 3.B Interrupt 1

Get XOJA from

RAM and load it

into timer 0

no

51

yes

Get XpJA from RAM

and load it into

timer 0

Complement the state of phase A output i.e. A = A. Rotate (FLAGA) to the right

es

no

Pop all registers and return to "Input Frequency" subroutine

J = 1

.52

figure 3.9 Interrupt 2

no yes

Get XOKB from RAM

table and load it

into timer 1

Get XpKB from RAM

table and load it

into timer 1

Gomplement the slate of phase B output i.e. B = B. Rotate (flAGB) to the right

K = K + 1

yes

no

Pop all r~gisters and return to "Input frequency" subroutine

53

Figure 3.10 Interrupt 3

no

Get XOLC from RAM

table and load it

into timer 2

Push all registers

Read (IFLAGC)

yes

G;t XpLC from RAM

table and load it

into timer 2

Complement the state of phase C output i.e. C = c. Rotate (IFLAGC) to the right

L = L + 1

no

I Pop all registers and to "Input Frequency" subroutine

yes

return

L = 1

54

CHAPTER 4

IMPLEMENTATION OF OPTIMAL SWITCHING STRATEGY

4.1 INTRODUCTION

Optimal pulse width modulation strategies offer certain advantages that cannot easily be provided by other PWM techniques used in induction motor drives. In this chapter, the construction of a microprocessor-based optimal PWM signal generator is described for two-quadrant speed control of induction motors. Using the selective harmonic elimination technique, voltage harmonics up to the 23rd have been eliminated with the inverter output waveform containing 17 pulses per cycle. In an improved version of the controller employing 29 pulses per output cycle, elimination of voltage harmonics up to the 43rd has been achieved.

The implementation of the optimal strategy with 17 pulses per cycle is fi rst described in detail, since the optimal PWM strategy with 29 pulses per cycle has been implemented in the same manner. The differences between the two implementations lie in the initial values estimated at the beginning of the optimisation process, the size and contents of the look-up tables used and corresponding softwar~

modifications. The look-up tables for the 17 pulse and the 29 pulse optimal PWM strategies are included in Appendix Ill. The facility for constant Vlf ratio at the inverter output has been incorporated into the controller, although independent voltage and frequency control can easily be achieved by slight changes in the software.

The phase-balance between the 3-phase outputs is maintained throughout the operational frequency range to ensure efficient use of the inducti on motor.

55

4.2 HARDWARE DESIGN OF MICROPROCESSOR-BASED OPTIMAL PWM SIGNAL GENERATOR

The optimum switching strategy is implemented by hardware circuits containing a microprocessor as the main controller, timers· to produce pulse durations and a programmable interrupt controller (PlC) to set different priority levels to the interrupt signals generated by the ti mer outputs. An operator's interface facil Hati ng the communi cat ion between the user and the system has also been designed and constructed. High accuracy in inverter frequency control is achi eved by the use. of a phase locked loop.

4.2.1 Microcomputer Design

The design method employed for implementing the optimal switching strategy is similar to the one used for the regular switching strategy. Because of the real-time operation involved, the characteristics described in Section 3.2, i.e. fast processing speed, a fast and efficient programming language, are again required from the microcomputer. The hardware block diagram of the microcomputer system is shown in Figure 4.1. The high-frequency version of the 8085 microprocessor (8085 A-2) has been chosen together with two 8254 timer chips committed to the generation of optimal pulse-width durations and the maintenance of phase balance between the three-phase outputs. A third timer chip is used in conjunction with the operator's interface to read the speed demand into the microprocessor •. A detailed description of the operator's interface is gi ven an Section 4.5. From the four interrupts used in this system, three of these indicate the end of a pul se duration for each of the three output phases, and the fourth is used to maintain the phase-balance between the three outputs. The 8259 programmabl e interrupt controller, employed to set the interrupt priority levels, has been programmed to resp~lhd to edge-

. .' . ~.'

triggered interrupts in the nested mode. The 8255 programmable peripheral interface (PPI) provides the three PWM output signals and a gating signal to control the instant at which the PWM signals start to be output. as shown in Fi gu re 4.2. The deta il ed ci rcu it d i ag ram of

56

the microcomputer system is given in Figure 4.3, where the two OR gates together with the two NAND gates generate the cont~ol bus signals MEMR, MEMW, IOR and IOW.

A 3-to-8 decoder is used for address decoding to select different peripheral devices of the system. From the connections between the peripheral devices and the 3-to-8 decoder shown in Figure 4.3, a memory map can be determined as given in Figure 4.4. The calculation

, of the optimal pulse-width durations to eliminate voltage harmonics up to the 23rd is given in Appendix I.

,4.2.2 Methods of Frequency Control

There are several methods of obtaining a variable-frequency signal under the control of a mi croprocessor. The three most commonly used methods are based on

i) the voltage-controlled oscillator (VCO) i1) the binary rate multiplier (BRM), and

iii) the phase locked loop (PLL).

The first method consists of using a digital-to-analog converter (OAC) to convert the digital frequency value'from the microprocessor to an analog signal. This is then fed to a voltage controller, oscillator (VCO) to create a signal with its frequency proportional to the analog input voltage of the VCO. A block diagram of the hardware needed for the method is shown in Figure 4.5. Analog trimming and calibration is required to precisely adjust the VCO and the OAC by using external circuitry, which is the major disadvantage of thi s method.

The second method employs a crystal oscillator clock to drive the n­bit binary rate multiplier (BRM) so as to obtain a variable frequency output, as shown in Figure 4.6. The microprocessor produces an n-bit digital number N to be fed into the BRM, which generates an output signal with frequency fo proportional to the inputfrequency fi as

57

given by

(4.1)

which shows that the output frequency fo can be controlled by the

microprocessor simply by varying the value of N. Because of the use

of a high frequency crystal oscillator, high accuracies in the output

frequency can easily be achieved. However, the main disadvantage is

that the sequence of the pulses produced at the BRM output is not

regul ar.

The third method consists of a phase-locked loop (PLL) and a divide­

by-N counter connected as shown in Figure 4.7. A low frequency clock

fi is derived from a high frequency crystal oscillator to provide

high accuracies of frequency. The output signal from the PLL with a

frequency·fo is input to a divide-by-N counter to produce a signal of

frequency folN which is then fed back to the second input of the PLL.

The PLL consists o~" a phase-comparator, an external low-pass ff1ter

and a VeD, as shown in Figure 4.8. The phase of the input signal of

frequency fi is cons"tantly compared with the phase of the feedback

signal fo/N. This results in a signal at the output of the

comparator whose average value is proportional to the phase

dffference between the two signal s. When the phase error is zero,

i.e. when the input frequency f i is equal to the feedbac k frequency

folN, the PLL output settles to a steady-state and remains unaltered.

This situation corresponds to fi = folN giving

which shows that the output frequency fo can be varied by changing

the value of N. The PLL system shown in Figure 4.8, acts as a

closed-loop frequency control servo in which the low-pass filter

58

damps out the output frequency swings that may occur in response to large step changes in the frequency demand determined'by N. This method provides high frequency accuracies and regularly-spaced pulses with constant duty cycle, and it is this method which has been employed in the implementation of the optimal PWM strategy.

4.2.3 Phase Locked Loop Design

The main consideration in the design of a PLL, when used as a frequency controller, is the frequency range at which it locks and the type of phase-comparator it contains.

A digital phase-compar~tor and a wide locking range are provided by the CMOS PLL chip CD4046, which contains two phase-comparators, a VCO, a source follower and a zener diode, as shown in Figure 4.8. The maximum frequency at which this device can lock is 1.3 MHz and the value of resistors RI' R2. and capacitor Cl shown in the figure determine the range within which the PLL locks. A resistor RI = 10 Kn

and a capacitor Cl = 470 pf have been used to set the maximum centre frequency to approximately 1 MHz. Resistor R2 = 1 Mn sets the minimum centre frequency to approximately 30 KHz. To prevent swings which may occur in the output frequency in response to large step changes in the frequency demand, a low pass R-C filter with a cut-off frequency of

500 Hz is formed by the components R3 = 1 Kn and C2 = 2 IlF. The constant value of the PLL input frequency is fixed at fi = 488.28 Hz by means of a divide-by-N counter at the output of the crystal clock, as shown in Fi gure 4.7.

The fixed value of the PLL input frequency fi is determined by the maximum locking range of the PLL and the range of number N to be loaded into the divide-bY-N counter of the PLL circuit. The maximum value of N is chosen as Nmax = 2048, and when this is loaded into the divide-bY-N counter the PLL circuit produces the maximum output frequency of f omax = 1 MHz. The input frequency to the PLL therefore needs to be

59

106 = 2Oirn" = 488.28 Hz

With this arrangement, the value of N entered by the operator on the

operator's interface gives an indication of the synchronous speed

expected from the motor.

4.2.4 Non-overlapping Delay Time

In all PWM inverters, a delay is necessary between any two

. complementary PWM output signals in order to prevent a short circuit

which would result from turning on a switching device on one arm of

the inverter bridge before the other switching device on the same arm

has turned off completely. These time delays. are herein referred to

as non-overlapping times. A 10 ~s non-overlapping delay time was

introduced between any two signals feeding the complementarily­

operating pair of switching devices on one arm of the inverter. The

circuit shown in Figure 4.9 provides the 10 ~s delay between outputs

A and A, and the same circuit was also used for the other two phases,

Band C.

The voltage level shifter of the figure is necessary for converting

switching signals from TlL voltage levels (0, +5V) to CMOS voltage

levels (0, +15V), which is needed to interface the microprocessor­

based controller to a 3-phase transistor inverter (Ensign 2.2 kW,

made by Morse-Flexton Ltd, serial No 10351/1) already available in

the Department.

A sensitivity test has been carried out to see whether the magnitude

of voltage harmonics would increase significantly when a disturbance

of over 20 )Lsis introduced in the optimal pulse widths. The results

of this showed that the harmonics are slightly increased but they

still remain of small or negligible magnitudes.

60

4.3 SOFTWARE DESIGN FOR THE OPTIMAL SWITCHING STRATEGY

The software implementation of the optimal PWM stategy is based on a look-up table technique fot achieving fast processing speeds. The optimal values of pulse width durations for 128 different voltage levels have been determined by solving the set of nonlinear equations A1.8 shown in Appendix I for different voltage levels. These values are given in Appendix III in the form of integer numbers to be loaded into the 8254 timers for <;ounting. 128 different voltage levels are used in order to have a good frequency resolution as well as to simplify the calculations involved in the assembly ,language software. Because of the quarter wave symmetry of the optimal strategy, only 9 different numbers designated as NR(O) to NR(8) need to be used for each voltage level. Each of the 128 different voltage levels is also designated by a value of K ranging from 0 for the minimum to 127 for the maximum voltage level. These NR values, represented by 16 bit numbers, are stored in a look-up table organised as shown in Figure 4.10.

Because 128 voltage levels are used, the complete look-up table shown in Figure 4.10 comprises 128 subtables, each containing 9 different NR values. From the look-up table organisation shown in the figure, a relationship can be deduced between the voltage levels K and the starting address of each subtable SA as

SA = BA + 18 (K+l) (4.3 )

where BA is the base address of the complete table. Accessing of the NR values from the look-up table can easily be done using a pointer which sweeps through the look-up table in a direction determined by a flag. The pointer is started to move from the starting address of a subtable, and when it reaches the end of the subtable, a quarter cycle is complete. The direction of the pointer is then reversed and it moves back towards the starting address, producing the next

quarter cycl e.

one half cycle

61

When the pOinter has reached the starting address,

is compl ete, and the process is then 'repeated to

produce the next half cycle in the same manner, but with the phase

switching signals being output in their complementary form. Three­

phase operation is achieved by using three flags and three pointers,

displaced by 1200 from one another, sweeping through the same

subtable •. The pulse width durations for phases A, 8 'and Care

produced by counters 0, 1 and 2 of timer 8254A of Figure 4.3,

respectively. All these counters are operated in mode 0, i.e. the

counter output is low while the count value is being decremented at

the clock frequency coming from the PLL ci rcuit. As soon as the count

reaches zero, the counter output changes to high and remains high

until anew count is loaded. As is shown in Figure 4.1 the outputs of

counter 0, 1 and 2 of 8254A and counter 0 of 82548, are directly tied

to interrupt request inputs IRl, IR2, IR3 and IRO of PlC (8259)

respectively. Counter 0 of timer 82548 is used to maintain the 1200

phase-shift among the three-phases as described later. The highest

priority is given to interrupt IRO, since it is important to keep the

three PWM waveforms always in a 1200 phase balance. The second, thi rd

and fourth priorities are given IRl, IR2 and IR3 respectively.

4.3.1 Minimum Pulse Width Control

For reliable inverter operation, it is essential that any theoretical

PWM strategy should allow for a minimum pulse width to be maintained

at the outputs of the PWM signal generator. This is a very important

feature requi red from all PWM control schemes and is necessary for

safeguarding the commutating abil ity of the inverter power switching

. devices. However, when pulses below a minimum width are dropped, the

voltage/frequency characteristic of the inverter becomes distorted

since the inverter output voltage is directly governed by the widths

of pulses in the modulated waveform. Moreover, the harmonic content

of the inverter output voltage increases since theoptimisation

concept is no longer valid after a pulse is dropped out of an

optimised pulse pattern.

62

In the present optimal PWM strategy, a minimum pulse width of 30)-s (20I"S to allow for the non-overlapping time delays and 1O!,-s for the turn-on and turn-off times of the transistors) was introduced as boundary constraints on the pulse widths (i.e. variables X in the optimisation process) as shown in equations A1.6 and A1.7 of Appendix I. As a consequence of this, the pulse dropping problem was avoided, without causing a distortion in the inverter Vlf characteristic and a corresponding increase in the harmonic content of the inverter output voltage.

4.3.2 Phase Balance

The 1200 phase-shift amongst the three PWM output signals is produced by means of a "phase balancing" process shown in Figure 4.11. During this process, which covers the first PWM cycle (360 0 ) the gating si gna 1 G of Fi gure 4.2 is kept low to prevent the P WM si gna 1 s A, B, C, ~, ~ and C from appearing at the inverter outputs. The microprocessor operation starts with the PWM switching signal A being produced by fetching the fi rst NR value from the subtable pointed by the phase A pointer and loading thi s value i,nto counter 0 of 8254 A· ti mer. Each ti me the count regi ster of thi s counter reaches zero, IR1 is generated so as to fetch the next NR value to be loaded into this counter and to complement the logic level of phase A output signal. At the instant when the operation starts, counters I, 2 of 8254 A and counter 0 of 8254 B timers are loaded with numbers producing 1200

2400 and 3600 delays, respectively. When the count register of counter 1 of 8254 A timer reaches zero, (i.e. 1200 later), IR2 is generated to set phase B pOinter to point at the start of the same subtable containing the NR values as for phase A. Then, the phase B pulses are produced in the same manner as for phase A by loading the NR values into counter 1 of 8254 A sequentially and by complementing phase B output signals each time IR2 is generated.

When the count regi ster of counter 2 of 8254 A timer reaches zero, (i.e. 240 0 later) IR3 is generated, and phase C pointer is set to point at the start of the same subtable containing the NR values. As

63

for phases A and B, the e-phase pulses are produced by loading the NR values into counter 2 of 8254 A and by complementing phase e output signals each time IR3 is generated. This process results in the creation of three similar patterns of PWM waveforms started at 1200

intervals as shown in Figure 4.11. As, soon as the count regi ster of counter 0 of 8254 B timer reaches zero, (i.e. 3600 after the instant of start) IRO is generated to assert signal G high so that the AND gates of Fi gure 4.2 are enabled and outputs A, B, e, A, B, e are fed into the inverter. The frequency demand input is also read at thi s instant. If the frequency demand has not changed, the required voltage level is still the same, thus the same subtable continues to be used for creating the PWM signals. Since it is now the beginning of the second cycle, the phase A pointer is forced to point to its initial address and counter 0 of 8254 B is again loaded with a number producing 1200 delay. When the next IRO signal is generated 1200

later, the phase B pointer is forced to move to the start of the subtable, whi ch creates a 1200 phase difference between the phase A and B pointers. At the same time, this counter is loaded with the same' number to produce a further 1200 del ay. After an interval of 120 0

when IRO is generated again, the phase e pOinter is forced to move to the start of the subtable. Note that each ti me IRO is generated,the frequency demand input is read and, only if this has not changed, the process described above is repeated indefinitely. A flag (W) is used in the software program to designate which of the three pointers is to be forced to point to the start of the subtable when interrupt signal I RO i sgenerated.

If, however, the frequency demand input and consequently the vol tage level are changed, the pulse width data to produce the three PWM waveforms at the new frequency need to be fetched from a different subtable. To maintain the phase balance, the transition from one subtable to another is made in three steps. The phase A pulse durati on numbers, (NR'S) are fi rst fetched and loaded to counter 0 of 8254 A from the new subtable'while the pulse durations for phases B and e continue to be fetched from the old subtable. When IRO is generated again 1200 later, the pointer to point to the phase B pulse

64

durations is moved to the new subtable, whereas the phase C pOinter

still remains pointing at the old subtable. Finally, at the next

occurrence of IRO, the pointer for phase C pulse durations is also

moved on to the new subtable and all the pulse durations then

continue to be fetched from the new subtable. Phase balance is

thereafter maintained in the same way as for no change in the' input

demands.

4.3.3 Time Delays Introduced by Interrupt Servicing

The flowcharts for the software interrupt routines to service the

interrupts generated by counters 0, 1 and 2 are given in Section 4A

and are named INTA, INTB and INTC respectively. It should be noted

that a small time delay is inevitably introduced when two or three

interrupts occur at the same time. The time delay to introduced by

an interrupt service routine at each transition of the output pulse

becomes accumulated over a cycle as shown in Figure 4.12. The total

delay over a half cycle is 17 to' and over a complete cycle it is

3d= 35 to' where d is the time delay in seconds introduced over one

third of a cycle. These delays are not expected to produce

significant odd harmonic magnitudes as it has been predicted by a

sensiti~ity test. However, the effect of the delays is taken into

. consideration by adding a hexadecimal number 0, which produces a d­

second time delay, to the number loaded to counter 0 of 8254 B timer

for producing a 1200 delay. When this counter. is used to produce a

360 0 delay, the original number producing 360 0 is increased by the

addition of a hexadecimal number equal to 3~. The inclusion of these

numbers to account for the delays produced by the interrupts, results

in signal (b) of Figure 4.12. If these time delays were not taken into

consideration, the output PWM waveform would not retain the exact

quarter-wave and half-wave symmetry. This is because, due to the time

delay to introduced at each interrupt servicing, the time duration for

1800 would elapse at the instant A indicated in Figure 4.12 before a

half cycle could be output completely •. As a consequence, some amount

of even harmonics would appear in the PWM output signals. Thus, to

maintain a good phase balance and avoid these even harmonics, the

65

number D is added to the hexadecimal number which would normally be loaded into counter 0 of timer 8254 B to produce 1200•

Note that. because of the time delays introduced by the interrupts. the frequency of the actual PWM output waveforms becomes sl i ght1y less than the demanded frequency. The delays accumulated over a third of a cycle. d. have been measured from the oscilloscope and were found to be equal to approximately sqO-4 seconds.

However. this is a time duration which depends only on the number of pulses in a PWM cycle but is independent of the output frequency required from the inverter. Since the 8254 timers operate on the basis of angular time (as they count the pulses from the PLL output). the time duration d needs to be converted to the appropriate number in the following manner:

D = ffo (360 fd) 360 (4.4)

where f is the inverter frequency. fo is the PLL output frequency and 360 fd is the angle in degrees which corresponds to the time d. Since the PLL output frequency is

(4.5)

and the constant PLL input frequency has been chosen as

fi = 488.28 Hz . (4.6)

substitution of equations (4.5) and (4.6) together with d ~ 457 llS

into equation (4.4) yields

66

. N D = 0.22 N = -

4 (4.7 )

where N is the number loaded into the divide-bY-N counter of the PLL ci rcuit to determine the inverter output frequency. Thus, whenever the inverter frequency is changed, the numberD is calculated from equation (4.7) and then added to the number to be loaded into the timer producing 1200 delay (3D is added when the timer is producing 360 0 delay) •. This process ensures the maintenance of quarter-wave and half-wave symmetry of the PWM output waveforms and hence avoids the introduction of unnecessary harmonics into these waveforms.

4.3.4 Implementation of Constant Vlf Characteristic

The number K in equation (4.3) determines which subtable is to be used out of the 128 subtables included in the look-up table of Figure 4.10 for each voltage level, and hence fixes the magnitude of the inverter output voltage. The inverter output frequency is fixed by the number N, which is loaded into the divide-by-N counter of the PLL ci rcuit. Although these two quantities can be independently varied, they need to be related to each other if a constant flux is to be. maintained in

. the motor driven by the inverter. The simplest strategy is to keep inverter voltage to frequency ratio constant by relating K to N in a linear fashion as shown by Figure 4.13. Since N = 2048 at the maximum inverter frequency which should correspond to maximum inverter voltage with K = 128, the voltage level number K can be related to N as

K - 128 N N - 204B" = Tb (4.8 )

.

67

Thus, immediately after the frequency demand input is. read from the operator's interface and the number N is fixed for the PLL circuit, the voltage level number K is easily calculated from equation (4.8) and substituted into equation (4.3) to determine the starting address of the subtable to be used.

4.4 PROGRAM FLOWCHARTS

4.4.1 Symbol Definitions

The symbols used in the program flowcharts are defined in the table below:

Symbol Size Definition

o ,.; N ,.; 2048 ( 12-bit) Frequency input .

O";K"; 127 (7 -bit) Voltage input

ST (l-bit) Start/stop switch ST=1 (start) ST=O (stop)

A, B, C (each I-bit) PWM signals for A, B, C phases

G (l-bit) Gating signal, G=1 outputs enabled, G=O outputs disabled

XTO, XTl, XT2 (each 16-bitl Count length for each counter of 8254 A timer

BA (16-bit constant) Base address of complete look-up table

D (8-bit) Hexadecimal number correspon-ding to the delay of d seconds introduced by interrupt service routines over a third of a PWM cycle

Sil. (l6-bit variable) Starting address of subtable corresponding to K value

0";11";8 (l-byte A flag used to cal culate phase variable) A pointer address

. .

•

I·

Symbol

J

Q

L

ADR1, ADR2, ADR3

P1

DD

.

Size

(l-byte vari abl e)

(l-byte vari abl e)

(B-bit flag)

11

11

(16-bit each)

(B-bit)

(B-bit)

(B-bit)

(B-bit)

(B-bit)

6B

Definition

Same as 11, but for phase B

Same as 11, but for phase C

Flag indicating the direction of sweepfng a subtable for phase A. Its value is either +1 or -1, corresponding to up or down sweeping

Same as J but used for phase B

Same as J but used for phase C

Actual pointers for phases A, Band C

NR(1) has to be loaded into the XTO timer for phase A twice at the 1800 point. P1 is a f1 ag used 1D count the number of times NR(l) has been loaded into the timer at the 1BOo point

Same as P1 but used for phase B

Same as P1 but used for phase C

Flag whfch shows what pointer . has to be moved to the start of the subtable. This is used in order to keep the phases balanced. If W=2, pointer A (ADR1) fs forced to move, if W=l, pofnter B (ADR2) is forced to move, and if W=O, pointer C (ADR3) is forced to move to the start of the subtable

Flag used to indfcate, when a newsubtable. is needed because of a change in frequency, the sequence wfth which the starting address of each pofnter is trans­ferred from the old sub­table to the new one

69

4.4.2 Flowcharts

The flowchart diagrams are divided into four sections:, the main program (shown in Figure 4.14) and the four interrupt routines INTA, INTB, INTC and INTO shown in Figures 4.15 to 4.18.

The main program initialises all the chips in the hardware i.e. sets all their control modes, and then assigns the appropriate initial values to all the flags and pointers. The AND gates shown in Figure 4.2 are then disabled by outputting a low level to the gating signal G. The minimum frequency, i.e. N = 2, is initially imposed to the control system if the start/stop switch is in the start position. The content of the fi rst location in the subtable corresponding to the K = 0 voltage level is loaded into counter 0 of 8254 A timer (XTO) to time the first phase A pulse width. A high level signal is then output to represent the A phase signal and the Band C phases signals are set low. Counters 1 and 2 of 8254 A and counter 0 of 8254 Bare then loaded with hexadecimal numbers producing (1200 + Deg), (2400 + 2 Deg) and (3600 + 3 Deg) delays, respectively. Deg is the angle in degrees corresponding to a delay D. Pointer 11 is set to 1, and after enabling all the interrupts, the microprocessor enters in a "wait for interrupts" state.

The INTA service routine shown in Figure .4.14 first saves all the registers and flags of the microprocessor in the stack and enables the interrupts. The pointer for phase A, ADRl, is then set to point at the required pulse width data in the· subtable. After loading the data into XTO, the phase A Signal output is complementedi There are 9 pulses to be generated in a quarter cycle~ If the pulse which is about to be created is neither the first nor the 9th, and if the quarter cycle produced is the first one, flag 11 is incremented so as to set the phase A pOinter to sweep through the subtable in a downward direction (increasing address values). If 11 = 8, i.e. the 9th pulse· of the fi rst quarter cycl e is about to be produced 11 is decremented so as to set the phase A pointer to sweep through the subtable in an upward direction, which produces the second quarter cycle of the PWM output Signal. When 11 = 0, i.e. the last pulse of the second quarter

70

cycle which is also,the first pulse of the third quarter cycle is aboutto be produced, PI is set to zero to indicate that this is the last pulse and that 11 need not be changed. On the next INTA, PI is set to 1 to show that the pul se to be created is the first one of the third quarter cycle and that 11 needs to be incremented to set the phase A pointer to sweep through the subtable in the downward direction.

The flowcharts for the interrupt service routines INTB and INTC are shown in Figures 4.16 and 4.17 which have the same structure and involve the same mathematical operations as that for INTA but with different flags and pointers as appropriate for the phase B or C.

The interrupt service routine INTD, whose flowchart is shown in Figure 4.18, takes the longest processor time for execution. This is because reading the frequency demand input, calculating the address of the subtables to be looked up, initial balancing and maintaining the phase balance and other important functions are all performed within this interrupt routine. However, this routine is executed only once every thi rd of a cycle, i.e. 3 times at each inverter cycle. Routine INTD starts by saving all the registers and flags of the microprocessor'into the stack and enabling the interrupts. Next, flag DD is incremented and, if the result is3, the microprocessor reads the start/stop switch. If this is in the stop position (ST=O), the stack pointer is initialised and a low level signal is output to the gating Signal G to disable the PWM outputs. An 'end of interrupt' is then generated and the program counter is set so as to branch to point A in the main program of Figure4.14. If, however, ST is in the start position (ST=I), the PWM outputs are enabled by G=I, and the input frequency demand is read and loaded to the divide-bY-N counter of the PLL circuit shown in Figure 4~. The voltage level K and the number D are then calculated. If the voltage level K has changed from its previous value, the address of the new look-up subtable is calculated, and the phase A pointer is forced to point to the new look-up subtable. Also, counter 0 of 8254 B is loaded with a number producing (120 0 + Deg). The output of phase A is'then set

•

71

high, and all the flags and pointers are set to appropriate values, before reading back the previously stored registers from the stack and ending the interrupt. Flag DD is appropriately set to 1 so that, in the next occurrence of INTD when DD would be incremented to 2, the phase B pOinter would be forced to point at the new look-up subtable to produce phase B PWM waveform (whfle phase C PWM output signal will

still be produced from the old subtable). Finally, (1200 + Deg) later when the INTD occurs again, the phase C pofnter is set to point at the new subtable, and the three phases are now balanced and are all

·produced from the same new look-up subtable.

If, however, the voltage level K has not. changed, flag W is read to determi ne whi ch poi nter is to be moved to the start of the look-up subtable to maintain the phases balanced. If W = 2, the phase A pointer is moved to the start of the subtable, with the pointed data then loaded into counter 0 of 8254 A and output signal A set high. If W = I, the phase B pointer is moved to the start of the subtable, and the phase B output signal is produced using the pul se duration data pointed by the phase B pointer. Finally, if W = 0, the phase C pointer is moved to the start of the look-up subtabl e. The process is repeated cyclically to keep the phases balanced if the voltage level remains the same. The listing of the assembly language program is included in Appendix A3-3.

4.5 OPERATOR'S INTERFACE

The ha rdware block d i ag ram of the operator's interface is shown in Figure 4.19 where a signal generator produces two pulse trains, FPT and RPT, which are fed into the two 16-bit counters of the 8254B timer chip of Figure 4.1. The signal generator outputs the pul se train FPT when the push button switch INC is depressed in order to increase the inverter output frequency. Depressi ng the push button switch DEC, whi ch has the effect of decreasing the inverter output frequency, causes the signal generator to output the pulse train RPT. The frequency of these pulse trains can be selected to be high or low

72

. by means of the FAST/SLOW switch. Depending on .the length of the period switch INC or DEC remains depressed, the signal generator outputs a number of pulses in either the FPT or RPT pulse trains. If the number of FPT pulses counted by counter A is NI and the number of RPT pul ses counted by counter B is N2, the microprocessor system calculates

and stores the val ue of N as the frequency demand input. The same frequency demand input number is also displayed as a signed integer by a display unit which has its own counter/display driver chip performing the same subtraction operation as above. By this means, the microprocessor does not become committed to the tasks involved in controlling the 7-segment LED numeric display.

The frequency demand input number N calculated by the microprocessor is immediately loaded into the divide-by-N counter of the PLL circuit in Figure 4.1 to change the PLL output frequency and hence the inverter output frequency. The microprocessor then resets both

~

counters A and B of Figure 4.1 to avoid an eventual overflow and make them ready for counti ng again.

The circuit details of the Signal generator and display modules of the operator's interface are included in Appendix 5.

fi

,

825 5 DATA B .

\ A

A \ . P P I ~ L ~

C .:l -I

l B 09 _

f-07 ...l

8 2 5 9 C ·80 8 5 A-2 iNTl

P I C .1

MIC ROP ROCESSOR G IHT ~ 1

I ''''""''' IR3 I~~ __ .tIR to AND GATES

""""" 10 Mhz crystal

8254A 8254 B Phase Locked Loop

PflM ( PHASE P L L I-(PWM B A )

, CPWMA .J. 8 )

B 2 54 C 00i:._.J07

./. N .

'-- FPT RPT

oaa· From operator interface

a Fi 9 -4-1 Hardware block diagram, of the microcomputer system for 3 -phase

optimal PWM sWiching strategy.

...... w

74

-,I I~ ph~seA .~/p ro wr PA, ,4

l.( vee ~ phQ,s~ t3 OlD 7

'9nd PA,

phase C olp '" reset PAs £

PA, I g~tesignal G I I

ST

.£"' portS

vf.c PA7, s<· I ,

. {~~ " J..{) J..{) PC. \ , '> .po·rt C t (\J pC

1 (fJ -[

1 AI / Dj

:~ Ao ~ D. -r

-.;., ::.J

A .-,' B

:::J

] C

J , ,

'\ '7 "I ~

." ,J, k.

CBA C"BA ''-' --~ -~-...;? v-

to 3-phase inverter inter fae e

Fig-4-2 Arrangement of PPI outputs.

r;=============~1J ADDRESS BUS

r----~~Al1S~N~~~~~l~~~~~~~~--~ A1 A.8 21 DATA BUS 1 ,2~,22. n7 . A1 H AB 14 ~\ 07 12 .1,~ ~ 2 r- CS AD7 0 - Dl!' A« 1 17 AD0 \',.4 " "3!!!O _____________ -'-'''''-j XI ,191

li, U A12 i-

A6 ~/a,7/ ... /3125/24.1 21j 23.

N

I

c:(

LO

ro o ro

ALE r- 4'l;'""0, A9~ Iljj 32 9 ~ 6 8212 ALE+-ll. 81BS_2ABI

10'

11 SN·1428 iO/A 34 12 J 13

11~cc

,1!< clr I rrd stb bs1 2 11 I '-1'.

Vcc

CE1.!LVcc mr':L

-.YssfL ra wr f.l.LVCC 17 16

i' A1S y7 7

I., Au,· ~~9E~~I~~~~~=f4===~=fiF==lr1-r--l HOLD I-'" A'3 Y 10

RST\I- SN74LS13B:: TAlP \£.l M. y\ 1!

5 y2p--.,.' . ti: yl 14 1- y~ 15

XI ~10MHZ X2 crystal

-reset in 36

~ in! 10

rnta !1

to PLL outp ut

clock 37 SMHZ clock

21 2223, 21 2223 21 21 23 536 ~ Cs ra wr 07 • 20 F.S: Fi! wr D7 6 2f- cs NI wr 6 L!..lfS ra wr

,~!L A9 't'! :;:- A9 If.' '- A9 07 ~ a VI?i-

'6 A8 De i! V\I~- A8 0011-' v,'9- AB D0.J.J'::" A 9

I ccccm6 g2 .l!.. AB .. i 14 :0 1 ., reset -%8'2 S 4 ~!1.ll g0 B 2Z 4. r--- llll

I ~2 A ~ ck2 .a ~'8 ck2 ~7 07 . lis ckl ~ ckl . n ckl fI cklil O~o, 02 JL ckj&'Oou 02 cklil 4 00

o '3 17 10 1 1

t 3 2

. '- CS rd wr 25 2L AB 1R7-'-T

I • 01 lR3 lli t. oa!12.2. 1R2lL

lRI f1L "f-16. ijl/~ IRO r!!-

int IniO

to PLL input frequency

to PLL comparator input

IRl Rl I 3

Fig-4-3 Mi crocomputer . hardware

IR~ FPT} from module 1

LI-------------------+-R~

76

000 - 1FFF EPROM

O· 0 0 X X X X X X X X X X X X X

2000 - 3FFF Free

o 0 1 X X X X X X X X X X X X X

4040-Counter 0 0 4141-Counter 1 0

4242-Counter 2 0 43437Contro1 8254A 0

6060-Counter 0 0 6161-Counter 1 0 6262-Counter 2 0 6363-Contro1 8254B 0

1

1

1

1

1

1

1

1

o o o o

~ 0 0 0 1

~ 0 1 0 1 ~ 1 0 0 1 ~. 1 1 0 1

~ 0

~ 0

~ 1

~ 1

o 1

o 1

o o o o

1

1

1

1

o o o o

1

1

1

1

~ ~ ~ 0

~ ~ ~ 0 ~ ~ ~ 1

~ ~ ~ 1

~ ~ ~ 0

~ ~ ~ 0

~ ~ ~ 1

~ ~ ~ ,1

o 1 o 1

o 1

o 1

·8080-CounterO 1 o o o o

o o o o

~ ~ ~ 0

~ ~ ~ 0

~ ~ .~ 1

~ ~ ~ 1

o 1

o 1

1

1

1

1

o o o o

o ~ o 1

o 1

8181-Counter 1 1 8282-Counter 2 1

o ~

o . ~ 8383-Contro1 8254C 1 o ~

AOAO-Port A A1A1-Port B A2A2-Port C A3A3-PPI Control &255:: '.:--

CO CO ~ C1C1 J 8259

1 0 1 ~~ ~ 0 0 1 0 1 1 0 1 ~ ~ ~ 0 1 101

1 0 1 ~ ~ ~ 1 0 1 0 1

1 0 1 ~ ~ ~. 1 1 1 0 1

1 1 0 ~ ~ ~ ~ 0 1 1 0

1 1 0 ~ ~ ~ ~ 1 1 1 0

~ ~ ~ 0 0

~ ~ ~ 0 1 ~ ~ ~ 1 0

~ ~ ~ 1 1

moo - DFF RAM 1 1 1 ~ ~ ~ x x x X· x x X. x X· x

~ = don't care state X = can take the value O.or 1

Figure 4-4. - Memory map showing device addresses

0

N

no component is. addressed

7_ ROLLOVERS

OF

RAM

RAM

15:.. ROLLOVERS

OF 0 r, 2 59

INTERRUPT CONTROLLER

FFFF

E3FF

E000 DFDF

C1C2

~ ____________ ~~3A4

77

N

M

r,ar,0

7 ROLLOVER S OF L

6364 O~TRQL. r,2 54 B

L

6~

·7 ROLLOVERS OF K

4344 ONTRO L r, 254 A 4343

K

FR E E ~----______ ~l~F

EPR 0 M

Fig-4-4b memory map showing rollover areas

78

N , ~ MICRO-

r. BIT I o A C ANALO!;UE

PROCESc:n: VOLTA~E

ilj:l freq' V

Fig-4-S Frequency control by voltage controlled oscillator

CRYSTIIL OSCILATOR· r----,.~-......, CLOCK f. n.b,!

I-__ I-tbinary-ratr..multiplicr 1--____ f =( Nil) fi

a- R- M

N

.... PROCESSOR

Fig-4-6 Frequency control by binary rate multiplier·

CRySTAL OSCILLATOR CLOCK

f· PHA SE-lOCK EO_LOOP f 0/. N 1-.......... .., 1--.....,..---_ 0

P L L

·I.N fo '---I CO UNTE R 1--"-----'

N MICRO­

PROCESSOR

Fig-4-7 Frequency control by phase.:.locked- loop

""'\,."

C OM PARA Toll INPUT 3

'I. N' co~PC , -h'!

1 4

veo O~T PUT 0J! S FREe. • 470pf T 7

RIK~ok 11 r- V'f

~A 12 Vv ~E"R2=1M S

GND

79

SIGNAL INPUT OF FREo. fi I,¥dd 14

I~ PHASE COMPARATOR I pHASE COMPARAT

--------~ OUTPUT

OR I

f2 L 13

?HASE PHASE COMP 11 eONPARAT_ _0 R. 11 OUTfUT

'PHASE > • PULSES, • >

Veo INPUT

V ( 0 , s ='= (2= 2uF

source 10 I

follower "'1 • fRs

[)t I'-- .. ~

r. 15 GND

) 0 SND ZEHER

Fio-4-8- 4046 phase-locke>d_loop device used as a frequency muHiplier

A

P

A.P: r

-A

o

80

+15 TTL PWM p P 555 RA: r v 0 L TAC'E R mDnDsh LEVEL A .bl. 5HIFlER

A

+15

TH PWM 0 o.A=l' VOLlACE R. 555 monoslo LE V El

A .ble SHI FlER

(a)

I I I I

I • I r- I I I -ar-I I

I us I

0 I I I ; I .. • I I • I

I .

I I • I I I I I i--I I

I I I I

I I I I I I -if----- .. I I h • I I I I I

T I I I I I I I

A B

-C A B C

F,ig -4- 9

__ :10 ,US

r-I

-0'--US· :1

(b) .' ,

~15v

- I NVE RTER BASE 1-->.-- DRIVE

INTERFACE

( c )

al Circuit diagram of phase A and A interface circuitry b)Waveforms produced atlhe outputs of the interfo.ce circuitry c) Block diagram of the overall interface ci rcuitry

."

81

N R 19 1 M S R HR(S)· L S [3

I I

I I I

I .

N R (t ) L S [3

I

I

I

I

I

I

I

I "

I

ILRI l:I. M S B HR ( 9 ) L 5 13

I

I

I I I .

N RIll M S L C;

N R( 9 ) M 5 H R( 9 ) L S 13

I

I

I . I

I I I

i rtRI2 ) MS B tI R 121 l S B tiRO) M 5 IS

.Nlilll L S B

SA=STARTlNG ADDRESS

BA= BASE ADDRESS

}iR(9 i"

>- SU LAST BTABLE = 127

} HR~t), ...

:...

} HR (9 )

}HRll )

! } HR (9 )

1'''21 H RI 1 )

K

> 2nd

> 1ST

S

SUBTABLE K = 1

SA=524H

SUBTABLE K = 0

A=t3A+1~J K+ 1) BA= 512H .

Fig- 4-10 Look-up table organisati on of the NR values to be stored in the EPROM

" ,

A

B

c

G

82

r- ,.... r-- ..-. r- r- r-

... .... I- .....

. . .... -•

deJa, b:120· ! XT 1)

ddol. ;: 240·

(XT21

.. 1 e. o· If=.

360· , ( 1(1'3)

r-

i-

..-.

~ --

,.. ,.. ,..

L- I... I-

.... ,.. .... ...

""

~

I- - "-

-..

auric. enabled to

OUlpul 5_phue PWM "av r form$

Fig-4-11 Initial creation of B-phase PWM waveforms

td delay due to inta ~aotUQI PWH waveform I

IJ ----- r-----' r---- -1 r-------, r---- -------. ,.-_. ----- r------, I I : I I I I I I I I

I I I I I I I I

I

I . I I I I

I I I I I I I

I I I I 1 I

I I I I I

I I

I I I I I I I

I I I I I I I I I I I I I

I I I I I I - I I I I I I I I

I I I I I I

I I I I I

I I I

f f I I I I I . I I I L _4 L_J L_l L.a I --- .-- - .... _-

I - ... --~ "-- '-

t.. desired PWM waveform I • _d~ d :35 td/3

, 180 120

0

~ I

Fig-4-12 . half a cycle of the desired and actual PWH waveforms.

r-----1

I-

.

I I I I 1. .. -- A

·. 17td

1

ex> w

84

K 12·t, - - - ------- --- - ---- - ------

, , O.~--------------------------~~I----~ 2046 .. N

Fig-4-13 The KIN characteristic to maintai n inverter output vol tage-to- frequency ratio constant. .

A

yes

85

Initialisation

13 ,12,11, P2, P3 = 0

J, PI = 1

K, L =. -1

D.b= 2, W = 2

no

In ut N = 2 1n 0 1mer

K = 0 & BA = SA = 512H

Output A = 1, B = C = 0

XTl = 1200 + DE!;

XT2 = 240 0 + 2. D Et;

XTJ = 3600 + 3D Et;

Enableinterrupts & wait

rigure 4.iil; - Flowchart for main program

86

yes yes

no

= 8?~>--,Yc..:ec..:s~ __ -'-+_---1

no ~----------------~------~

1 = 11 + J

POP register. & return

Figure 4.15 - Flowchart for INTA service routine

87

INTB

Save Registers and enable interrupts

= SA + 2 I2

yes yes

. no

yes

no

POP registers & return

Figure 4.16 - Flowchart for INTB service routine

88

Save Register and enable interrupts

ADR3 = SA + 213

XT2 = (ADR3)

yes

no

ves

no

POP registers and return

Figure 4.17 - Flowchart for INTC service routine

..... ..

no

, . yes

,

DD: 00'+

no

= +1

no

DD: 2

89

INTO

es

POP registers & return

POP & return POP & return

in ut ST

yes

no

Input N & load it into PLL timer

Calculate K= N/16

yes

(K+l)

(SA)new 13 = 120o+llEG

A = 1 Pl = 11 = J = 1 Set DD = 1 = W

return

Figure 4.1& - Flowchart for INTO service routine

90

00 D7

on/off . I-~ FF FF J FPT '1

taunter A inc ! ~ SIGNAL

~

dec 1-0-

GENE-RATO R 00 D7 FAS:r .• !:::= -/-

• I--sloW' RPT f"- J FF FF J 'L

Vcc tounhr B

'1- v

rese~ 1* ·.oI·SPLAY

Fig";4-19 Block dio.gram of operator's interface.

91

CHAPTER 5 COMBINED REGULAR-OPTIMAL SWITCHING STRATEGY

5.1 INTRODUCTION

After an investigation of the results produced by the regular and optimal PWM switching strategies, it was found that a good compromise was to com~ine the two strategies into a single strategy, each coming into effect at a different section of the output frequency range. The experimental results obtained from the regular, the optimal and the combined regular-optimal strategies are given in Chapter 7. This chapter describes in detail the hardware and software implementation of the combined strategy.

5.2 IMPLEMENTATION OF THE REGULAR-OPTIMAL SWITCHING STRATEGY

The aim of this strategy is to provide three-phase PWM signals with a high quality harmonic spectra at all frequencies and with a good level of fundamental magnitude. This is achieved by uSing the regular PWM switchi ng st rategy (with 75 pul ses per cycl e) from 0 to 20 Hz so that the first significant voltage harmonic that appears in the spectrum would be the one at the switching frequency (i.e. 75th harmonic). The optimal strategy (with 29 pulses per cycle) is then used from 20 to 50 Hz, giving higher fundamental magnitudes and resulting in the 43rd harmonic to be the first significant harmonic in the frequency spectrum. The optimal strategy was not implemented with a pulse number per cycle higher than 29, because of the difficulty in finding optimal solutions for switching angles. Since the optimisation index and the constraints involved are non-linear in nature, an optimal solution is not automatically guaranteed.

5.2.1 Hardware Design

The hardware used for the Regular-Optimal switching strategy is exactly the same as that used for the optimal PWM switching strategy.

92

This was described in detail in Section 4.2 of Chapter 4. and hence is not repeated here.

5.2.2 Software Design

The software design of the Regular-Optimal strategy is. as for the

previous strategies. based on the use of timers to produce the pulse width durations and on the use of look-up tables. The look-up tables

for the regular strategy are the Yf and the ZjA' ZjB' ZjC look-up tables described in Chapter 3.

The Yf table for the present implementation is. obtained by replacing N in equation (3.19) by (1/2P). P representing the number of pulses per cycle (P=75) and by calculating and storing the values of Yf for different output frequencies in the range 0 to 20 Hz varying in steps

of 0.4 Hz. The ZjA' ZjB and ZjC look-up tables are obtained by substituting P=75 in equation (3.20). and by varying j from 0 to 74.

The cal cul ated ZjA' ZjB' ZjC values are then stored in the form shown in Fi gure 3.4.

With this arrangement of look-up tables. the calculation of pulse widths and the production of pulses with corresponding widths become very much si mpl if i ed for frequency demands from 0.4 to 20 Hz. The clock frequency of the timers used to count the length of the

individual pul se widths is set to fc =.Nfi = 1.075 MHz by loading a constant N into the PLL-timer combination shown in Figure 4.1. The actual numbers to be loaded directly into the counters of the 8254A

timer of Figure 4.1. e.g. XpjA for a pulse in phase A. is obtained by collecting from the Yf table the constant corresponding to the required output frequency and adding it to the constant fetched from , the ZjA table corresponding to this pulse. However. to avoid the repetition of these operations at the occurrence of each pulse. all the pul se width data needed for one compl ete cycl e of all the three phases are assembled together in the form of a look-up table situated in the RAM area (as opposed to the ROM area for the previous tables).

When all the high-level pulse width numbers XpjA' XpjB and XpjC have

93

been calculated from equation 3.18, these are stored in the RAM look­up table with an arrangement as shown in Figure 3.5. The numbers for the low-level pulse widths, i.e. XojA' XojB and XojC are calculated by means of equation (3.2) and they are then stored as part of the RAM look-up tabl e shown in Figure 3.5.

Before these numbers are transferred from the RAM look-up table to the 8254 count regi sters, the present val ue of the frequency demand is read and compared with its previous value. If the two values are the same, the microprocessor collects three appropriate numbers from the RAM· look up tabl e and loads them into the three counters of the ti mer devices. The frequency demand is checked at the end of e~ch output cycl e. If the frequency demand has changed but is lower than 20 Hz, the output si gna 1 s remai n unchanged whll e the mi roprocessor updates the contents of the RAM look-up table for the new value of the inverter output frequency. The whole RAM look-up table can be updated very quickly without producing any significant disturbance in the PWM waveforms since the operations involved are very simple.

If, however, the new frequency demand is higher than 20 Hz, a program pointer is moved so as to point to the beginning of the program implementing the optimal strategy with 29-pulses per cycle for the output frequency range 20 to 50 Hz. The al gorithm description of the software implementing the optimal strategy has already been given in Section 4.3. The only difference now is that the look-up table containing the values of NR does not need to hold the NR values for frequencies 0 to 20 Hz. The flowchart showing the main structure of the software used for the combined regular-optimal strategy is shown below.

94

.

Input demanded frequency f

Yes No r---+--------<f<20 Hz??-----:~~_--,

Fetch Yf's and Z.'s. J . update RAM look-up table to produce regular strategy pulses (75 pulses per cycle)

Input f

.Yes A. ~~L

No

Output the 3-phase regular PWM outputs

, No ~ end f ne cycle?

Yes ,

Fetch NR's from look-up table to produce the 29-pulse optimal strategy and output the 3-phase PWM outputs

Check frequency demand each 1200 i,e. each time INTO occurs

~ ___ NO ______ ~~ Is f new? ~Y_e_s __ __

95

CHAPTER 6

COMPUTER SIMULATIONS

6.1 INTRODUCTION

The following sections describe the computer simulations of the PWM signals produced by the Regular and Optimal- PWM switching strategies. The development of computer programs simulating the phase and line-to­line voltages, the voltage harmonic spectra and the motor line currents for both PWM str~tegies are described. The results obtained from these computer simulations are presented in Chapter 7 together with the experimentally-obtained results in order to facilitate comparisons between theoretical and practical results.

6.2 SIMULATION OF THE REGULAR SWITCHING STRATEGY WAVEFORMS

Computer simulation of the Regular-PWM switching strategy waveforms has been developed for 18, 30 and 75 pul ses per output cycl e. However, the following sections will describe the simulation programs for the Regul ar PWM waveforms with any number of pul ses per cycl e. The simulation results for the three cases with 18, 30 and 75 pulses per output cycle are presented in Chapter 7.

6;2.1 Simulation of Phase and Line-to-Line Voltages

The expressions describing the 'ON' and 'OFF' time pulse widths of the regular PWM strategy with P pulses per cycle are developed in Chapter 3. - These are for phase A.

tpA(j) = {Jr + iP- sin ~ (4j-3)} 21Tf

and { 1 tpA(j_l) + tPA(j)} 21Tf

toA(j) = l'T - 2

96

and for phase B

and { 1 _ tpB (j - l) + tPB (j )} 21ff

toB(j) = Jl1 - 2 - - .

In the simulation of the A and B phase voltage waveforms, the required output frequency as well as the pul se number are first entered into the program. The computer calculates the 'ON' and 'OFF' time pulse widths for both A and B phases for· a complete cycle of inverter output frequency. The level of each individual pulse, i.e. whether it is a high-level or a low-level pulse, is determined at the same time as the pulse widths. The results of these calculations are then transformed into a suitable format for plotting the PWM waveforms and are stored in two different files, one for each phase. The program then jumps to the part simulating the line-to-line voltage, which subtracts the simulated phase B voltage from the simulated phase A voltage as shown in Figure 6.2. The results of these subtractions are then arranged in the format required by the plotting subroutine and the program proceeds to the harmonic spectra simulation routine. The flowchart of the computer simulation program is shown in Figure 6.3.

Flowchart symbol definitions

The symbols used in the program flowcharts shown in Figure 6.3 are defined in the table below:

Symbol j

k

m

n

Subscri pt used to desi gnate the order of the 'ON' and 'OFF' pul se wi dths t pA ' tPB and t oA ' toB respectively.

Subscript used to designate the order of switching angles XA and XB shown by the arrows on Figure 6.1.

Subscript used to deSignate the order of switching angles XB shown by the arrows on Figure 6.2.

Subscript used to deSignate the order of switching

1

P

yA

yB

Yab

97

ang1 es XA shown by the arrows on Figure 6.2.

Subscript used to designate the order of switching ang1 es Xab shown by the arrows on Figure 6.2.

Number of pulses per output cycle of PWM

Level of the pulses of phase A PWM shown in Figure 6.2.

Level of the pulses of phase B PWM shown in Figure 6.2

Level of the pu1 se of the 1ine-to-1 ine voltage waveform shown in Fi gure 6.2.

6.2.2 Simulation of Voltage Harmonic Spectra

The harmonic contents of the phase voltage and the 1ine-to-1ine .vo1tage have been determined by using Fourier analysis of the waveforms previously developed by the simulation program. The general Fourier analysis for a waveform f(wt) is

where

and

'" f(wt) = I [an sinllwt + bn cos'nwt]

n=l

2TT an = 1 J f(wt) sin nwt dwt

TT 0

1 2TT bn = - f f(wt) cos nwt dwt

TT 0

With reference to Figure 2.16. it can be shown that for any PWM waveform the all and bn coefficients of the Fourier series are descri bed by

and

1 --nTT

bn = - 1 ITTT

2P-1 {L (y(i) - y(i+l) x cos[nX(i)]} i =1

2P-1 {L (y(i) - y(i+l)) x sin[nX(i)]} i =1

98

where y(i) and y(i+1) are the voltage levels of the ith and (i+1)th pulse widths shown in Figure 2.16 and X(i) is the ith switching angle shown by the arrows in the same'figure.

The expression giving the magnitude of the nth,harmonic voltage I

component is

(6.1 )

In the simulation program, the desired frequency output arid the full scale frequency (i.e. the frequency of the highest simulated harmonic) are first chosen then the magnitude of the individual harmonic voltages are 'then calculated and stored in a file in a form ready for pl ott i ng.

The flowchart of Figure 6.4 describes the steps that the simulation program has to perform in order to create the file storin~ the different harmonic magnitudes.

6.2.3. Line Current Simulation

For the simulation of motor line current, the harmonic equivalent circuit of the induction motor and the principle of superposition are used. The component values of the induction motor equivalent circuit were determined by means of the open-circuit test and the rotor-lock test using the arrangements shown in Figure 6.5. In each test, ~eadings of power, line current and voltage were taken at 50 Hz inverter output frequency and are tabulated in Table 6.1. The determination of the induction motor equivalent circuit r'esistance and inductance component values is presented in detail in Appendix VI.

Since the phase voltage applied to the induction motor is of non­sinusoidal nature, it is bound to contain harmonics. In the line current simulation process, each phase voltage harmonic is taken separately as an input to the induction motor with a stator current

99

component calculated for each voltage harmonic. The summation of harmonic currents then yields the motor line current. The general expression describing the line current is developed in Appendix VI.

In the simulation program, a period of inverter output cycle is divided into 2000 intervals and the value of the current at each specific time interval is calculated from the line current expression described in Appendix VI. The flowchart of the current simulation program is shown in Fi gure 6.6.

6.3 SIMULATION OF THE OPTIMAL SWITCHING STRATEGY WAVEFORMS

Computer simulations of the optimal PWM switching waveforms have been carried out for 17 and 29 pulses per inverter output cycle. Simulations of line-to-line voltage harmonic spectra and line current have been performed in a similar way as that for the regular PWM strategy. The slight difference between the simulations of regular and optimal strategies is explained below.

The optimisation programs given in Appendix I calculate the switching angles (XA's) for 17 and 29·pulses per cycle for 128 different voltage levels corresponding to the whole inverter frequency range. The results of these programs are stored in two different files in the form of look-up tables organised as Figure 4.10. In the simulation program, the inverter output frequency and the pul se number are fi rst entered and then the address of the subtable from which the values of switching angle XA's are to be read for thi s specified frequency are cal cul ated. The switchi ng angl es XA's need to be cal cul ated for one complete cycle of inverter output frequency since only a quarter cycle of XA's is stored in the look-up table. These XA values are then stored in a file in a form ready for plotting.

The phase-B voltage waveform has to be deduced from the phase-A simulated voltage waveform since the optimal PWM strategy does not have an analytic expression describing pulse widths.

.100

Calculation of phase B pulse widths is based on the fact that phase B

lags phase A by 1200 , wi~h phase A possessing quarter-wave symmetry. Because of the 1200 phase shift imposed on phase B, the pulse widths

of the phase B PWM from the 120 0 point onwards are the same as the

pul se· wi dths of phase A PWM from 00 onward. Thi s is cl early

illustrated in Figure 6.7. Phase B pulse widths from 00 to 1200 are

the same as pulse widths of phase A PWM A(j) from the 240 0 to 360 0

point. It can be seen from the figure that the first switching angle

of phase B PWM i.e. XB(1) is XB(1) = A(3) - [XA(3)-120 0 ].

In the simulation program, all the phase B switching angles XB(j)'s

are calculated using pointers and counters before arranging them in a

format required by the plotting subroutine •.. The flowchart of the

program simulating phase A and phase B voltages of the optimal PWM

strategy are shown in Figures 6.8 and- 6.9 respectively.

101

TABLE 6.1:

Open-Circuit Test

V (volts) I (mAl Wl (Watts) 2xW2 {Watts) Po (Watts)

60 90 0 4.25 2.125 I

80 105 -0.25 5.75 2.625 100 125 -1 8 3 120

I 145 -1 .75 10.5 3.5

140 165 -2.75 14 4.25 160 190 . -3.5 17 5 200 230 -6.25 25.5 6.5 240 275 -9.25 35.75 8.625

Short-Circuit Test

V (Volts) I (mA) W1 (Watts) 2xH2 (\1atts) Po (Watts)

50 270 -1 -12.5 7.25

102

I r-- r-'- -

, , Phase A ,

1xA(1) • '- .......

YA

YB

. Yob

• XA(3) :.

r-

, I

XB(1) ,; :. X8(2.1 P ,:

XB(3)

,

I

"

XA(k)

L- '-

, •

r-

'-I

I I I I .

I I

Phase 8

______ ~X~B~(~k~) _______________ ;

Fig_6_1 Phases A and 8 ofa quarter-wave symmetrical PWM waveform

.

X A (1) • XA(2)

XA(3) XA(nX ----:...~::!.l.!.U'___"-- ___ _

• I

• I I • I

X 8(1) • • • I I • X8(2) I

• I I

• •

Fig-6-2

I __ -:-~ • .!..:.XAIq!.!!rnL.;1 :"""""'c- - _____ _

I . I I I • I • I

• • I I 1

Xab(11 f-- • • • I I • Xab(21 I , I , I • • I •

Xab(31 I-- 'r-

Xab!41 . L-- XabUl

. . .

Two phases of a PWM vol tage waveform an d their resul ting line vol tage ,

No

103

Start

Enter desired output frequency fout. Enter desired pulse number P

Increment j i.e. (j=j+ 1)

Calculate the phase A and B 'ON' and 'OFF' time pulse widths from .

tpA(j) = {Jr + fr sin"; (4j-3)} 21ff

toA(j) = {~ - tpA(j_1~ + tPA(j)} 21ff

t = {l k'. [1f (4' 3) 21f]"} 21ff pB(j) m +"2l'" Sln "2l'" J- - j

tOB(j) = {p} - t pB(j_1)/ tPB)j)} 21ff

Calculate the level of the pulses i.e. . " j yA(j) = 1 +2(-1)

yB(j) = 1 + (-l)j . 2

yes Set XA(O) = XB(O)=O

104

yes no

XA(k)=XA(k-l)+toA(k)

XB(k)=XB(k-l)+toB(k)

No

k=k+l

Yes

Arrange the format and store results in files in the form (XA,YA) and (XB,YB)

Go to line-to-line voltage simulation routine

XA(k)=XA(k-l)+tpA(k)

XB(k)=XB(k-l)+tpB(k)

FIGURE 6.3(a): Flowchart describing phase A and phase B computer simulation program .

No

Xab(l) = XB(m) Yab(t) = yA(n)-yB(m) 1 = t + 1

m = m + 1

No

/ 105

Set subscripts m, n and ~ to 1 i.e. m = n = I = 1

Yes

Yes

xab(~) = XA(n) Yab(L) = yA(n)-yB(m) £=2+1

n = n + 1

Arrange the format of results as (Xab ' Yab) ready for plotting and

, store them in a file

Go to subroutine simulating the harmonic spectra

Figure 6.3(b): Flowchart describing the line voltage computer simulation program

FIGURE 6.3: Flowcharts describing the voltage waveform computer simulation for the Regul ar-PWM strategy , '

No

106

Enter the full-scale frequency, f-scale,enter the desired output frequency, fout, set the harmonic order to zero, n~O

Calculate the magnitude of the phase and line-to-line voltage harmonic by replacing the underlined terms of the an and bn expressions by XA's and yA's for phase voltage harmonic simulation and by xab'sand Yab's for line-to-line voltage harmonic simulation

1 2P-l a = - - { L (y(i) - y(i+l)) x cosn~.:UJ n n1l i=l

b = n

H(n)

1 2P-l - n1l' { )

1 = 1 (y(i) - y(i+l)) x sinn~)}

=(a2+b2)~ n n

Yes

Create files (X,H) in a form ready for plotting

FIGURE 6.4: Flowchart describing the computer simulation of voltage harmonic spectra

107

W #~ ..... /' ,

I \

R , \

I \ I \ ... / - -

y------+---~A.r_~

-.... " , I ( \

8---+-'1"0'-107---------' \ I ' .... _/

( b)

Fig -65 (a) Open.circuit test arrangement (bl.Rotor.lock test circuit arrangement

.

No

,

108

I Start I 1

Set the initial value of current to zero i.e. Io(t) = 0

..J

Enter motor equivalent circuit ,

component values i.e. Rl , R2, Xl, X2, Xm, slip

, .

Set counter j to 1 i .e. j=l I ,

Set harmonic order n to 1 i.e. n=l

,

Calculate the line current at each time interval

t(j} = 2005xf as

In(t) = Ireal(n)2+imag(n)2xsin(2nnft+~(n))

I(j) = In(t) + In_l(t)

n '= n + 1

1-s n = f.scale?

Tout .

, Yes FIGURE Increment counter j Current i.e.j=j+l flowcha

.Q1=~~ Keaa va lues ot tlJ 1, aria ! q 1 ana arrange them in a form ready for plotting

J, I FiniSh!

6.6: simulation

rt

o

AU)

L.-

A(1)

120'

120

M3) ~ , I I ,

.IL-

I Alt) I

, ,..' I

I I

180

A(i)

---'-.All)

109

240 360 I

./>I)Jo ,:::> I . &2.1 A(1)

I I

~ XB(i)-o Phase A I~ t-.

At'5} I A(I)' , I

I I I I

I ,

:XA'1}':dI.AlO}+.A (11 --: I I

:~A(2) =XAU)+ t f I

All)

I I , I ,

: XAl~) =X Al2..) + '. ~(3) .... ' . ..::..:.:..:,....;,,;,-.:.....-

, A(l) .-:.

, A(l) A('5) A(l) A(~) F-'

Phase B ..,..,. '- I,-

I I I I

, :A(I) , :', I

" I

A(1) A(1.) Ml) :

:XB(1) I, I ,.' I I

I , I , I ,

XB(l)=XS(I);+: A(~) , , XB(3l: XB(1) + A~)

~ ,

XBl'-):: XBt~) + A(1) •

XBlP.1)= XB(P.l) + .A(I)

XB(P)= 360' •

Fig - 6-7 0 i agram showi n 9 the relati on shi p betwee n the pulse widths of two PWM phases

110

Start

Enter the desired output frequency fout and speci.fy the l7-pulse or 29-pulse strategy

~

Read the appropriate values of switching angles XA's for 1 cycle from the appropriate subtable

[,

Calculate values of XA's for one complete cycle .

Store results in a file in the form required by the plotting subroutine

,

Stop

FIGURE 6.8: Flowchart describing the computer simulation of phase A PWM voltage for the optiilal strategy

111

Set XA(O)=O, j=l and i=l

XA(j) = A(j) + XA(j-l)

Yes

XB(i) = A(j) - [XA(j)-120o]

i=i+l j=j-l

Yes

i=i+l j=j+l

No

No

FIGURE 6.9: Flowchart describing the computer simulation of phase-B PWM voltage for the optimal strategy

112

CHAPTER 7

SIMULATION AND EXPERIMENTAL RESULTS

The simulation and experimental results obtained from the regular; the optimal and the combined regular-optimal PWM switching strategies

, are presented below.

7.1 RESULTS FOR REGULAR SWITCHING STRATEGIES

Two versions of the regular-sampled PWM strategy have been implemented using respectively 18 and 30 pulses per output cycle, both producing output frequencies up to 50 Hz with a resolution of 1 Hz. Although higher frequency outputs with better frequency resolution can easily be produced by making sl ight changes to the software, the main objective in the study of the regular strategy was to provide a basis for comparison of its performance with that of the optimal strategy. Regular switching strategies with 18 and 30 pulses per cycle were developed separately in order to study the improvement produced by a high number of pulses per cycle.

The study of the regular-sampled PWM switching strategy formed the fi rst, part of the research programme, and attention was focused on the microprocessor implementation of the strategy rather than other elements of an open-loop induction motor drive system, e.g. the inverter, motor etc. The results presented below (except for line currents) are those obtained at the outputs of the microprocessor­based control ci rcuit, and the experimental PWM waveforms shown in various photographs are, therefore at TTl voltage levels. If the semiconductor switches of the inverter power circuit are considered to be ideal switches turning on or off instantaneously, the output voltage waveforms that would be obtained from the inverter become repl icas of the presented PWM waveforms but with a correspondingly larger magnitude. However, the relative magnitudes of harmonics in

113

the frequency spectrum of a PWM waveform do not change when the peak­to-peak ampl itude of the waveform is scaled up or down. The spectrographs presented below can therefore be regarded as representations of the harmonics at the inverter output, although they were obtained from the PWM waveforms at TTL voltage levels.

The ideal PWM voltage and current waveforms as well as voltage harmonic spectra, obtained from the computer simulations described in Chapter 6, are presented below as a basis for comparison between the ideal and practical conditions •

. Figures 7.1 and 7.2 illustrate the simulation and experimental results, obtai ned for the 18-pul se regul ar PWM strategy, for output frequencies of 5 Hz and 40 Hz respectively. Part (a) of these figures show phase-A and phase-B voltage waveforms produced by the computer simulation in per-unit magnitude. Part (b) of these figures shows the same phase-A and phase-B waveforms at TTL .1 evel s as they were experimentally obtained from the outputs of the PPI (Programmable Peripheral Interface) chip of the 80/24 microcomputer board (shown in Figure A4.1 of Appendix IV). An oscilloscope connected between the PPI (8255) output pins and the microcomputer board ground was used to displ ay these PWM switching waveforms. A good resemblance between Figures 7.I(a) and (b) and between 7.2(a) and (b) is evident. In Figures 7.1(a) and 7.1(b), the modulation pattern is not very clear and the waveforms resemble a square-wave pulse train. This is because the modulation frequency in this case is only 5 Hz, and at such a low modulation frequency, the modulation depth of the PWM waveforms becomes very small to produce a low inverter output vol tage, as necessitated by the constant Vlf ratio. Therefore the difference between the widths of two consecutive pulses is very small, making the waveforms look like square-wave pulse trains. As evident from Figures 7.2(a) and (b), the width-modul ated pul se pattern becomes easily discernible when the output frequency and hence the output voltage is increased~ This illustrates the in-built feature of the system by which the inverter output voltage-to-frequency ratio is kept constant.

114

The waveforms in Figures 7.1(a) and (b) and in Figures 7.2(a) and (b)

ill ustrate the property of the regul ar sampl ed strategy that the

width-modulated pulses are equidistant i.e. the distance between the

mid-points of any two consecutive pulses is constant. In these

waveforms, eighteen width-modulated pulses correspond .to one cycle of

the inverter, since constant P of equation (3.3) was chosen as 18.

One cycle of the sinusoidal modulating signal is indicated by period

T in Figures r.1(b) and 7.2(b). In Figure 7.1(b) it is difficult to

locate the beginning and the end of a modulating signal cycle, since

the pulses look like square waves. The time delay representing the

phase difference between phase-A and phase-B signals, indicated by

period 0 in these figures, is seen to be approximately equal to one

thi rd of the periods T, proving the. 1200 phase shift between the two

PWM signals. The time-delays between phases A and B, Band C, and C

and A were measured from the oscilloscope screen and were found,

within the accuracy provided by the oscilloscope (e.g. ± 5% error), to

correspond to 120 0 phase-shift at any of the inverter output

frequencies. Si nce the regu1 ar PWM strategy is based on the

consideration of the modulating and carrier wave signals being

synchronised to each other, the 1200 phase-balance among the PWM

output signals is maintained irrespective of the modulating frequency

required at the inverter output.

The switchi ng pattern of Figures 7.1(a) and 7.2(b) are representati ons

of phase vciltages Va and Vb shown in Figure 7.3 •. However, the motor

terminals a and b in Figure 7.3a are subject to the line-to-line

voltage VAB = VA - VB' Parts (c) of Figures 7.1 and 7.2 show, for

inverter output frequencies of 5 Hz and 40 Hz respectively, the

computer simulations of the 3-leve1 1ine-to-1ine voltage experienced

by the motor. Parts (e) of the same figures show the motor 1 ine-to­

line voltage obtained experimentally. Note that, as opposed to 18

pulses per cycle in the phase voltage waveforms of Figures 7.1(a) and

(b), there exists 36 (positive or negative) pulses per cycle in the

1 ine-to-1 ine voltage waveforms of Figures 7.1(c) and (e); The

symmetry between the positive and negative half cycles of the line

115

voltages is also discernible from these figures.

Figures 7.1(d) and 7.1(e) give the simulation and experimental

results showing the line current waveforms experienced by the motor.

A current probe (Tektronix AM 503) was used to display the actual

current waveforms on the oscilloscope. It can be seen from the

figures that the envelope of the line current follows a sinusoidal

variation and that the current lags the line-to-line voltage by a

certain phase angle, as expected from the inductive power factor

imposed by the motor.

Parts (f) and (g) of Figure 7.1 present respe~tively, the simulation

and the experimental results showing the harmonic contents of the

phase voltage waveforms at f = 5 Hz •. The harmoni c spectra of the

corresponding line voltages are given in parts (h) and (i) of Figure

7.1. At 40 Hz inverter output frequency, the line voltage harmonic

spectra are shown in Figure 7.2(f),. as obtained from the computer

simulation, and in Figure 7.2(g) as obtained experimentally. A

spectrum analyser' (Hewlett-Packard 3582A) was used to display the

spectrographs of Figures 7.1(g), 7.1(i) and 7.2(g). It can be seen

from Figures 7.1(f) and 7.1(g) that large harmonic components are

present in the phase voltage at the 18th, 54th. 90th multiple of the

fundamental frequency f = 5 Hz. The 18th harmonic with the largest

magnitude represents the carrier switching frequency, which is always

. equal to 18f, since P of equation (3.3) was chosen as 18. The 54th

and 90th harmonics seen in the figures therefore correspond to the 3rd

and the 5th harmonics of the carrier frequency, respectively. The

components at frequencies 35f and 37f discernible in Figures 7.1(f)

and (g) and Figures 7.2(f) and (g) represent the sidebands .that result

from the modulation strategy.

Bearing in mind that a line voltage is equal to the difference

between two phase voltages, a comparison of the line-voltage harmonic

spectra to the corresponding phase-voltage spectra shows a

significant decrease in.the magnitude of the harmonics at the carrier

frequency and an increase in the magnitude of the sidebands (i.e. the

116

16th, 17th, 19th, 20th, 35th and 37th harmonics) of the line-voltage spectra. A considerable increase in the fundamental harmonic component is also discernible in the. line-voltage spectra. In general, a good correlation exists between the harmonic spectrum patterns produced by the computer si mul ati on and those obta ined from the practical experiments. It may be noticed that the fundamental component magnitudes are slightly lower in the experimental results than those produced by the computer simulation. Moreover, some slight discrepancies exist between the theoretical and experimental harmonic magnitudes. Apart from the experimental inaccuracies and· losses (e.g. unequal voltage dropsetc), these effects are mainly due to practical implementation of the regular strategy, since an unavoidable time delay in each pulse width is introduced as a result of the microprocessor operation relying on interrupt service routi nes.

Figure 7.3b shows the variation.in the line-voltage fundamental magnitude when the modulating frequency is varied from 1 Hz to 42 Hz. The figure illustrates that the microprocessor-based system presented is capable of maintaining a constant Vlf ratio, as the fundamental magnitude of the line voltage is increased linearly with inverter output frequency.

The disadvantages of using a constant Vlf ratio with a low P number (P =f = ~he number of pulses per cycle) is immediately apparent from Figures 7.1(f) and (g), where the fundamental magnitude is very· small in comparison with the magnitude of the 18th harmonic. Obviously, for lower frequencies than 5 HZ, the fundamental magnitude would be even smaller than those displayed in the figures. For instance, at 2 Hz fundamental frequency, the 18th harmonic at 18 x 2 = 36 Hz falls into the range of frequencies where the induction motor normally operates. It is thus possible for the motor to run at 36 Hz, even though it is intended to run at 2 Hz. In order to avoid this situation and to permit the speed range to be extended towards lower speeds, the pulse number P must be chosen much higher than its present value of 18. With a large value of P, the frequency

117

separation between the fundamental and the first significant

harmonic, i.e. the one at the carrier frequency P.f, becomes much

wider, leading to easier filtering of the unwanted harmonics. To

demonstrate this and to investigate in more detail the differences in

performance, the regular-sampled PWM. strategy was implemented with 30

pulses per output cycle, by following the same practical steps as for

the implementation with 18 pulses per cycle. The results obtained

from the 30 pulse-per-cycle regular PWM strategy are presented in

Figures 7.4 to 7.6 for output frequencies of S Hz and 40 Hz,

respect i ve 1 y •

It can be seen from Figures 7.4(a) and (b) and Figures 7.S(a) and (b)

that, as wfththe 18 pulses per cycle, the width-modulated pulses

resemble a square wave at a low inverter output frequency and the

sinsuoidal modulation pattern becomes more easily distinguishable as

the output frequency is increased. The general pattern of the

harmonic spectra remains the same as for the 18 pulse-per-cycle

implementation. The harmonic content at the switching frequency, the

sideband components around the switching frequency, and the 3rd, Sth,

etc ••• harmonics of the s'witching frequency itself still remain in

the spectra shown in parts (f) and (g) of Figures 7.4 and 7.S. The

main difference resulting from the increased pulse number P is that,

with 30 pulses per output cycle, the large-magnitude component at the

switching frequency now falls at 30 times the fundamental frequency.

Hence, it can be more easily filtered than the switching frequency

harmonic produced by the 18 pulse-per-cycle implementation.

Filtering is necessary if the motor winding inductance is not

sufficiently high to provide smoothing on the stator-current

wavef6rm. The high frequency harmonics must be prevented from

reaching the. motor terminal to avoid torque pulsations and extra

losses and heating.

Figures 7.4 (c), (d) and (e) show a difference between the simulated

and the practical results of the line-to-line voltages and

consequently the line currents. In order to obtain a practical line

voltage like the simulated one, the individual pulse widths as well as

118

the 1200 phase shift should be implemented with considerable accuracy. At a low frequency, and with a high number of pulses per cycle, the pulses in the phase voltages appear to look like square waves as shown in Figures 7.4(a) and (b) although they are modulated. Due to inaccuracies in the pulse width production which results from the use of interrupts in the software implementation,a line-to-line voltage similar to the quasi-square wave is produced as shown in Figure 7.4(e).

7.2 RESULTS FOR THE OPTIMAL SWITCHING STRATEGY

The microprocessor-based control system described in Chapter 4 implements the optimal PWM strategy for inverter output frequencies up to 50 Hz. The two versions of the optimal PWM strategy with 17 and 29 pulses per output cycle were both implemented on the same hardware and their performances were.compared with the regular switching strategy. The pulse numbers 17 and 29 used in the optimal strategy are the nearest possible values to the pulse numbers 18 and 30 used in the regul a r st rategy. Thi s enables a compa ri son to be made bet we en the two strategies using a similar number of pulses per output cycle. The computer simulation and the experimental results for 17-pulse and 29-pulse versions of the optimal strategy are presented below.

7.2.1 17-Pulse Optimal PWM

Figures 7.7 to 7.9 show the results obtained with the 17-pulse optimal switching strategy for inverter output frequencies of 5 Hz and 40 Hz, respecti vely. At 5 Hz output frequency, the phase voltage waveforms of Figure 7.7(b) exhibit a time·delay indicated by D on the figure, which is equal to one third of a cycle indicated by T on the figure. Similarly, the 1200 phase-shift between the two phase voltage waveforms is also illustrated in Figure 7.9(b). Within the accuracy obtainable from an oscilloscope, measurements of the time delays between the phase voltages confirmed that a + 1200 phase-shift exists between any two phases, regardless of the inverter output frequency.

119

The waveforms of Figure 7.7(a) and (b) can be seen to possess half­wave and quarter-wave symmetry, while maintaining the 1200 phase­shift. This is a direct result of the particular method employed for the implementation of the optimal PWM strategy. As described in Chapter 4, the method of implementation maintains the phase-balance amongst the PWM signals by taking into account the short delays introduced by the microprocessor during the production of each single pulse. The phase voltage waveforms in Figures 7.7(a), (b) and 7.9(a), (b) contain 17 pulses per output cycle. The PWM pulse pattern changes as the inverter output frequency is. increased. It is clear in Figure 7.7(a) and (b) "that the individual pulses over a cycle are not sine­weighted and that the pulses at 900 and 2700 points in a cycle are much wider than the other pulses in the cycle. This is because the optimisation process yields the pulse pattern shown in the figure and, at such a low inverter frequency as f = 5 Hz, the magnitude of the

,. fundamental component is very low. However, the pulse pattern is optimised to produce a sinewave component at the fundamental frequency of f = 5 Hz, with the next harmonic being the 25th. As the inverter frequency is increased, the pattern of 17 pulses in a cycle changes as dictated by the contents of the look-up tables. Although this change of pattern cannot be described in an analytic manner, a comparison of Figures 7.7(a) and (b) with 7.9(a) and (b) shows that the pulses at 900 and 2700 points in a cycle still remain comparatively wider than the other pul ses in a cycle. As evident from the figures, a resemblance exists between the simulated and the experimental phase vol tage waveforms.

Figures 7.7(e) to (g) display the simulation and experimental results for. the line voltage and current waveforms at f = 5 Hz. The same waveforms are shown in Figure 7.9(c) to (e) for the inverter output frequency of f = 40 Hz. As opposed to the phase voltages with 17 pulses per cycle the line-to-line voltage waveforms contain 34 pulses per cycle, providing a three-level switching pattern.. The symmetry between the positive and negative half cycles of the line-to-line waveforms is evident both in the simulation and the experimental

120

results given.

The experimental line current waveform shown in Figure 7.7(g) is far from being as close to a smooth sinewave as the sim~lated current waveform of Figure 7.7(f) is. The distortion in the experimental current waveform is due to the incompatibility between the (ENSIGN) inverter used and the optimal PWM strategy operating at frequencies below 10 Hz. The.causes of the difference between these waveforms were investigated. It was found that the pulse transformers used in the power transistor base-drive circuits of the ENSIGN inverter were not designed to pass pulses longer than a certain duration. As a consequence, when a switching pulse" is applied with a duration longer than the pulse transformer can pass through, this saturates. The pulses at the 900 and 2700 points of the optimal PWM at 5 Hz shown in Figure 7.8 exceed 20 ms and this clearly saturates the transformer core. To remedy this problem, the number of pulses in the primary winding of the transformer must be increased.

The individual pulses in the line-to-line voltages are seen to change from al most constant widths in Figure 7.7(e) and (g) to a .more sine­weighted width variation in Figure 7.9(c) and (e). This is a result of the constant Vlf ratio maintained by the optimal PWM strategy, i.e. the effective modulation depth increases as the inverter output frequency is increased. It can also be seen from Figure 7.9(d) and (e) that, at 40 Hz output frequency, the simulated and the actual line current waveforms follow a quite well-defined sinusoidal envelope.

The simulated and experimental frequency spectrographs of the line-to­line voltage and phase voltage waveforms are included in Figures 7.7(c) and (d), 7.7(h) and (1) and 7.9(f) and (g) for inverter output frequencies of 5 Hz and 40 Hz, respectively. The experimental spectrographs were recorded with a Hewl ett Packard (Type 3582A) . spectrum analyser. For the fundamental frequency of 5 Hz the harmonic spectrum of the 17-pulse-per-cycle phase voltage is shown in Figure 7.7(d), where the harmonics below the 25th are seen to be at negligible magnitudes, except for the triplen harmonics. Figure

121

7.7(h) and (1) illustrate that these triplen harmonics become eliminated in the frequency spectrum of the line voltage waveforms. Optimisation on the basis of harmonic elimination thus ensures that. relative to the level of the fundamental component. most of the harmonics below the 25th are reduced to an insignificant level. if not

completely eliminated. As seen from Figure 7.7(h). the 25th and the 49th harmonics have larger magnitudes than the fundamental. with the. other significant high-order harmonics as indicated in the figure. In general. the high-order harmonics are the ones at [(25xf) + n.(F-f)] HZ. where F is the frequency of the first uncontrolled harmonic (the 25th in this case) and n is an integer taking values of 1.2.3 ..... etc.

The harmonic spectra given in the figures clearly illustrate that this particular implementation of the optimal PWM strategy eliminates all the harmonics up to but excluding the 25th. The elimination of low-order harmonics is. however. at the expense of increased magnitudes of the high-order harmonics.

For a fundamental frequency of 40 HZ. the simulated and experimental frequency spectra of a line voltage are shown. respectively. in Figure 7.9(f) and Figure 7.9(g). where a frequency range up to 2.5 kHz is covered. In the latter figure showing the experimental spectrum. the 23rd harmonic is seen not to be el iminated completely. This can be attributed to the delays caused by the interrupt service routines used for implementing this strategy. These time delays are more significant at higher output frequencies. as the time duration in which one output cycle is to be completed with 17 pulses becomes

shorter. The spectrum beyond the 25th harmonic frequency (i.e. 25 x 40 Hz = 1000 Hz) contains a number of harmonic components amongst which the 49th is of the largest magnitude. As necessitated by the constant Vlf ratio. the fundamental magnitude at 40 Hz has increased as shown in Figure 7.9(g) and is even larger than the 25th harmonic.

The re lat i onshi p between the fundamental magni tude and frequency of the 1 ine voltage waveforms is given in Figure 7.9(h). The different

122

points on the figure are readings of the fundamental magnitude for

different output frequencies from the spectrum analyser. Clearly, the

magnitude of the fundamental component increases linearly with the

inverter output frequency, confirming that,the microprocessor-based

controller successfully maintains the inverter Vlf ratio constant

throughout the operating range of the inverter.

7.2.2 29-Pulse Optimal PWM

As for the regular PWM strategy, the frequency spectrum provided by

the optimal PWM strategy is considerably improved when the number of

pulses used per output cycle is increased. The optimal PWM strategy

with 29 pulses per output cycle was also implemented using the same

microprocessor hardware. The simulation and experimental results

obtained with the 29-pulse-per-cycle strategy are given in Figures

7.10 to 7.12 for output frequencies of 5 Hz and 40 Hz, respectively.

Fi gures 7 .10(a), (b) and 7 .11(a), (b) show that the 29-pul se-per-cycl e

optimal PWM yields a pulse pattern similar to that of the 17-pulse­

per-cycle optimal PWM. Wide pulses at the 900 and 2700 pOints are

produced at low frequencies. These pul ses tend to decrease gradually

when the output frequency is increased. A good phase balance is

discernible from these figures. Figures 7.10(c), (e) and 7.1l(c),

(e), illustrate that the pulse number in the line voltages is doubled

(i.e. 58 pulses as opposed to 29 pulses in the phase voltages). Also,

the individual pulses are seen to change from almost constant widths

at low frequencies to a more sine-weighted width variation at high

frequencies. Figure 7.10(e) illustrates that practical line current at

f = 5 Hz is far from being a smooth sinewave as predicted by Figure

7.10(d). As for the 17-pulse-per-cycle version of the optimal

strategy. these current distortions are caused by the saturation

effect of the pulse transformers used in the (ENSIGN) inverter.

'The frequency spectrum provided by the 29-pulse optimal PWM also

retai ns the same general shape as that of the earl ier version., The

only difference is that the first significant harmonic is now the 43rd

123

harmonic, as opposed to the 25th for the 17-pulses optimal PWM strategy. This is illustrated in Figure 7.10(f), (g) and Figure 7.11(f), (g) for two different fundamental frequencies. These figures show that the most significant harmonics that appear in the spectrum are the ones at [(43xf) + n x (F-f)] Hz, where n is an integer number,

f the modul ati ng frequency and F is the frequency of the fi rst uncontrolled harmonic (i.e. the 43rd in this case).

Figure 7.12 shows the variation of the fundamenta.l voltage component as the inverter output frequency is varied. The points in the figure ill ustrate the different voltage 1 evel s read from the spectrum analyser for different output frequencies. As for the 17-pulse optimal PWM, the fundamental voltage varies linearly with the inverter output frequency, thus illustrating the constant Vlf ratio produced by the mi croprocessor-based controll er.

7.3 RESULTS FOR THE COMBINED REGULAR-OPTIMAL SWITCHING STRATEGY

The combined regular-optimal PWM strategy employs the 75-pulse regul ar PWM withi n the output frequency range OA Hz to 20 Hz and the 29-pul se opt i ma 1 P WM from 20 Hz to 50 Hz. Va ri ous experi menta 1 and theoretical results obtained with the combined regular-optimal strategy are given in Figures 7.13, 7.14, 7.15 and 7.16 for output frequencies of 5 Hz (regular), 20 Hz (regular), 20 Hz (optimal) and 50 Hz (optimal) respectively.

Parts (a) and (b) of Figures 7.13 to 7.16 illustrate respectively, the

simulated andexperimental phase voltage waveforms. In Fi gure 7.13 (a). and (b), the waveforms resemble a· square-wave pulse train since, at a frequency as low as 5 Hz, the modulation depth is very small to produce a low inverter output voltage as required by the constant Vlf ratio. At 20 Hz output frequency, the sinusoidal variation in the pul se widths becomes more easily di scerni bl e as in Figures 7.14(a) and (b). The high number of pulses used per output cycle (75 pulses) is evident in the figures. For output frequencies of 20 Hz and above,

124

i.e. when the number N displayed on the 7-segment LED display

(described in Section 4.5) increases from 799 to 800 and above, the

modulation strategy is changed to the 29-pulse optimal PWM. The pulse

pattern obtai ned with 29-pul se opt i ma 1 stategy at 20 Hz is shown in

Figure 7.15(a) and (b). Figures 7.16 (a) and (b) show the two phase

voltage waveforms obtained with the 29-pulse optimal PWM strategy at

50 Hz.

The line voltages shown in Figures 7.13(e) and 7.14(e) look different

from those obtained from the simulation results given in Figures

7.13(c) and 7.14(c). The cause of thi s difference is the same as for

the 30-pulse regular strategy and is explained in Section 7.1. Figures

7.13(f), (g) and Fi9ures 7.14(f), (g) show that the fi rst Significant

harmonic that appears above the fundamental frequency is the 75th

harmonic, which, is at the switching frequency. The magnitude of the

fundamental component is also seen to increase as its frequency is

increased. Figures 7.13(d) and 7.i4(d) show that the motor line

currents have a sinusoidal waveform with a superimposed high frequency

oscillation. These currents are in phase lag with the line voltages

shown in Figures 7.13(c) and 7.14(c).

The simulated and experimental phase voltages obtained with 29-pulse

optimal PWM are shown in Figures 7.15(a) and (b) and 7.16(a) and (b)

for frequencies of 20 Hz and 50 HZ, respectively. The time intervals

indicated on these figures illustrate that the 1200 phase-shift is

maintained regardless of the time delays introduced by the interrupts

in the system software. The arrows on the figures indicate the last

pulse of the cycle. It may be noticed that this pulse is not exactly

equal in width to the first pulse in the cycle. This is mainly due to

the way the phase balance is kept constant at avalue very close to

1200 • As described in Section 4.3.3, a certain delay time (D)

proportional to the output frequency is added to the number to be

loaded into the timer producing 1200 delay to allow for the time

delays introduced by the interrupts. Figure 7.17 shows an expanded'

view of the phase-A PWM voltage and the main interrupt Signal INTD

which allows for the time delays. It is seen that, at the 3600 point,

125

this INTO signal lasts for about 200 ps which is more than the

duration of the last pulse in the cycle at high fr~quencies. The

200)< s interrupt time is the cau se of the s 1 i ght 1 engtheni ng of the

29th on-time pulse in the cycle. However, this does not affect a

great deal the,frequency spectrum of the line voltages, as can be seen

from parts (f) and (g) of Figures 7.15 and,7.16. The fi rst

significant harmoni cwhi ch appears above the fundamental is the 43rd

harmonic, despite the 29th pulse being slightly widened. A good

resemblance exists between the simulated and the practical line

voltage wavefonns given in parts (c) and (e) of Figures 7.15 and 7.16. '

The number of pul ses per cycle of these waveforms is twice that for

the phase voltages.

With the combined regular-optimal strategy, the inverter output

frequency was varied throughout its range and the magnitude of the

fundamental was recorded from the spectrum analyser. The resulting

Vlf characteristic is shown in Figure 7.18, where the fundamental

magni tu de increases 1 inearly with frequency up to 20 Hz with a

constant Vlf ratio provided by the regular PWM strategy. At 20 Hz,

the microprocessor-based controll er switches from the regul ar to the

optimal PWM strategy, which causes the jump in the fundamental

magnitude. Above 20 Hz, the fundamental magnitude again increases

linearly with frequency, following the constant Vlf ratio provided by

the opti mal PWM strategy.

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e'.00 0.13 0'.2<;

t.i'1l~ (5ec:)

f'i g'-7,·5<1 SI MUI.A T(D MOTO'! 1.1 NE CURRENT

Fig-7-Se

Experimental line voltage and current waveforms f =40hz

UPPER tRACE: LINE TO LINE VOllACE Isv/DIV' lOWER tRACE: LINE CURRENt(.3 A/OIV'

~

'" .0> ~

o >

v

E , " .c

3.

2

0,,!rlu.-nl,.----~3~OIJ,.lh-..:.---~~~ reg30ab "10

, o i250 is'75 :1500

Frequl?ncy (hz)

Fig-7-Sr SIMULATED LINE VOLTAGE HARMONIC SPECTRA

Fig -7-5g Experimental line voltage harmonic spectra

2.20

-.. == 1.&6

~ ., 1.61 '0

" :!: c 011.32 " E

;::; 'l:1l9G ., a 0.70 'tJ C ::> ...

0.27

· ,

I I I

frequency ('Hz )

5 10 15 20 25 30 35 40

Fig- 7-6 V/f characteristic for the 30-pulse version of the regular switching strategy

optl7. '5

0,

, , , (.'50

, 0.00 0.50 1.00 2.00

>:10- 1

lime (SE'C)

] optl7b 5

, I I , I 0.00 0.50 1.00 1.50 2.00

>:10- 1 lime (se>c)

Fig-7-7.a SIMULATED PHASE VOLTAGE MB F=5hz

1 __ .. __ 1 =0.25 ____ _+1

Fig-7-7b Experimental ph'lse voltage A t B f= 5 hz upper trace: phaseA (2V/DIV) lower trace: phaseB ( 2V/DIV)

~

w w

2.00.

0. f-LLU...L.J.-Y-+'r'rt-rrrTl,,-Hffl

::~ mbL .. rI 139152125 49

" C"l"l IJ '5

e'.00 0'.50 1'.00 1 '.~0 i.00 X10- 1

lime (sec) Fig-7-7e SIMULATED LINE VOLTAGE WAVEFORM f'=5hz

0.30

F'requenc.:y <hz)

Fi g'-7"7 c: SIMUI.ATED HARMONIC SPECTRUM 0" PHASE VO!. nGE ~

Fig-7-7d Experimental harmonic spectrum of phase voltage

.. a. • o ~.

L

~j - .:30 .. u

e. -0-0----~0."....,.1"::0------::O0'.10 t.imo (~ec.;)

Fig"7"7F SIMUI.ATLO MOTOR LINE CURRENT

Fig-7-7g

Experimental

tine voltage. and current Wtlveform

f= 5hz

UPPER TRACE: LINE 10 LINE VOLTACE (5V/0IV)

>

w '" < t--, 0 > u ~

z 0 .. '" <: :I:

0.90

0.SB.

0.~5.

0.23.

0.00 .. 1~------------~--~-1~-4~~~ , + lu.

0'.00 0'.G3

25th 29th 4749th

1 '.25 1 '.SB 2'. '50 X102

Frequency (hz)

op117 ob 5

Fig-7-7h SIMULATED LINE VOL:rAGE HARMONIC SPECTRA

Fig-7-7 i Experimental .Iine voltage harmonic spectrum

(10 mS/DIV'

(a)

(2V/DIV)

( b)

(10V/DIV)

(c )

(200V IDlV)

Fig-7_B (a) TTL microprocessor PWM output A (b) Pulse transformer input A

(c) Phase A output of inverter

" '" o ." ~

o > :l

a.

" '" o ." ~

o >

" a.

] ,

0.00

, ' 0.00

0'.63 1'.25 1'.88 '2'.~0 X10-2

lime (sec:)

, 1.25 1'.88 2'.~0

X10-2

lime (sec)

optl'!o 40

opt17b 10

Fig-7-9a SIMULATED PHASE VOLTAGE MB F-'40hz

Fig-7-9b Experimental phase voltage A t B . f = 40hz UPPER TRACE: PHASE A «2V/01Vl LOWEQ TRACE: PllASE 11 «2V/01V J

" '" .3 0 . ~

o >

" a.

-1.

opt17ob 10

0"-.0';"0~~0~'.~G~3~~1 '~.2~5~~1~'.~8-9~~2'.~0 X10-2

0.30

C L :) - .30. u

Fig-7-9c SIMULATED LINE VOLTAGE WAVEFORM F=40hz

. F'ig--7--9d SIMULATED MOTOR LINE CURRENT

Fig-7-ge

Experimental line·

vol tage and current WQV eforms f= 40hz

UPPEQ TRACE: LINE TO LINE VOUAGE (10VI OIVl InWFR TRACE: lItlF. CUAAFttf fO.3A/DlV]

X10 1 O,,50 ~ ." ~

o >

1t:37 .. ~

~ > ~ ~

0.13

0.00.

, 0

run

625

L, rl 11 opt17ob i0

2S'h29'h 491h , , , 1250 1875 2500

F'rE>quency (hz)

Fig-7-9F SIMULATED HARMONIC SPECTRUM Of' LINE VOI.TAGE

Flg-7-9g Experimental harmonic spectrlll1 of line voltage

1.&3

E 1.71 "0 > QI ", :::> ~

1.49

'2 1.2 g' e 1.07

Cl _ 0.& c: ~. 0.659

" ."

5 0.42 ..... 0.2S

, . ,

frequency! Hz) O~~L-~~~~~~~--__ ~ __ ~ __ __

16 21.2 24 2 33.6"5l

Fig-7-9h V/f characteristic for the 17-pulse version of the optimal strategy

~ IJI 0' n ." - 0,

opl290 5 0 > ~

C. ,'I. , • , , 0.00 0.50 1.00 L50 2.00

X10- 1

lime (sec)

:u opl29b 5

~ ~u I 0'

" ,0> -0 > ~

c. • , , , , 0.00 0.50 1.00 1.50 2.00

X10- 1

limC" (sec.: ~ Fig-7-10a SIMULATED PHASE VOLTAGE A8.13 F~5hz

Flg-7-10b Experimental phase voltage At B f = 5hz UPPER TRACE PHA SE A (2V/O I V ) lOWER TRACE PHASE B (2V/OIV)

'" ~ 0'

" ." -o > ~

c.

..

-1.

0·.~0~0~-0~'.-'j0~~'" '~.0~0~~'~'.-50-~i.00 X10- 1

t.jm~ (sec)

opl290b 5

Fig-7'.10c SIMULATED LINE VOLTAGE W,~\fEFORM F=5hz

0.30

5 ... J0. u

I~----------~~---------' 0.00 0.10 0.10

Lime? (!'iec.:)

FJ g··7·~Od SI MULATE!J MOTOR L! NE CURRENT

~ig-740e

Experimental line v 01 tage and current

waveforms f=5hz

UPPER TRACE: LINE TO liNE VOLTAGE ( 2V/OIV) InWI:DTDArt. Ill.le rIlDDc ... T fn.,COll./nIV'

~

~ ., ~

0 > v

~ .. > ..

. i ~

• , " .c

0.90

0.68.

0.15,

0.23

o .00'LL-----------~"_!'_4t---'-run 43r.4&lh

opl290b 5

, 0.00 1'.88 2'.50 0'.63

XI02 Frequencq (hz>

Fig-7-1OF SIMULATED HARMONIC SPECTRUM OF LINE VOLTAGE

Fig-7~Og ExperimentQI hQrmonic spectrum of line voltage

.. 0'

" .> ~

0 > ~

"-

.. 0' 0 . .> ~

0 > ~

"-

c>pl290 '0

, , , , , 0.00 0.G3 1.25 I .98 2.';0

>:10-2 t.im~ ( st>c.: )

l"eg291> 10

0'.00 , , ""'---.-.-.--

(.99 ,

0.63 1.25 2.50 X10--2

Lime < SI?c.: )

r'lg'-7-11<l SIMULATE!) PH.~SE VOLTAGE A 8.. B f""40h:z ~

w \.0

Fig_7~1b Experimental phase";;olrageA U B f=40hz UPPER TRACE: PHASE A I 2 v I DIV , LOWER TRACE: PHASE B I 2V 101'1'

'"

.. Cl' d ." ~

o >

" 0.

.~

" 0. • d ~

llm@ (s<?c;)

hg·-7Alc: SIMULlITlD 0.30

0.00 0'.13

li'me (sec)

opU9,u 10

LINE VOLTAGE WAvEFORM F-'''I13h"

opt29 10

0'.25

Fig-7-11 d SIMULATED MOTOR LINE CURRENT

Fig-7-11e

E xp erimental line "voltage and current.

wavefonms f= 40hz

UPPER TRACE: LINE TO LINE VOLTAGE 110 V/OIV) _.'_-_ .. -. - - .. _ ....

X10' 0,.: 50

" .~ .~

o >

"it:37. "" .. > " ."

0t25. " r.

0.13. I 0.00 . .1J---'-----L_..p--~ I

A3'" 47th

opl290u 10

fun' " ,

i250 is"15 r-','equel"lC:Y (h2)

Fig·-7·11F SIMULATED ~1.~RMONIr. SPECTRUM OF LINE VOLTAGE

Fig-7~19 Experimental harmonic spectrum of tiDe vol tage

, 2,16 2.12

~ 1.61

~ 1.65

-------------- .. ------ --- - - --- --------

.g 1.50 ... - ... ------------­

.2 '.41 -------_._.---------c: g' e

d 1.09 ~ o.e7 c:

* d -g 0,SS6 :> "- 0.4Zl

0.269

0

-----

4.& ze 10,6

, I I , , , , , I , , , ,

16.& 20.6 2626,2nl34£ JUCO

frequency ( H z)

Fi g-7-12 Vlf charocteristic for the2'1-pulse version of ,the optimal strategy

~

'" " .> ~

o > , a.

o reg750 5

0'.00 0'.50 , 1'.00 .'.50 2'.00 X.0-'

lime- (sec'

reg75b 5

0'.00 0'.50 ,.'.00 "~50 2'.00 X'0-'

lime (sec)

Fig-7-13a SIMULATED PHASE VOLTAGE A 8. B f'=5hz

Fig-7_13b' Experimental phase voltage A f B f=5hz UPPER TRACE: PHASE A 12 V /0' V) LOWER TRACE: PHASE B (2V/DlV)

reg75ab 5

0'.00 0'.50 1'.50 '2'.00 X10- 1

lime (sec)

Fig-7-13c SIMULATED LINE VOLTAGE WAVEFORM F=5hz

~.391 ~.15.

~ • e .eB. 0. • o

..... - .13.

" 0.00L-________ ~_~--------L-------

7S'h fun

0r"~'~~~2T'5-0~~~75~00~~~77~50~~~~i000

FrequE?ncy (hz)

reg75a 5

Fig-7~3f SIMULATED HARMONIC SPECTRUM OF PHASE VOLTAG

L +>. 3 -.10.. N

" r--~-"~"-' ','--'" .... T " , .-........ '"." • 1

0.~0 Z.IC' 0.:?C

Lllno (5""C.)

f- i 1-7··13d j j I';IILA TEG I1fJTrr. LI NE L.L'flr:E".N f

Fig-7-13e

. Experimental line voltage and current wavefonn;

f = 5 hz

UPPER TRACE: LINE TO LINE VOLTAGE (IOV/ OIV, . LOWER TRI!.CE: LINE CUARF.NT r n 1C;" I n IV 1

Fig-7-13g Experimental harmonic spectrum of phqse voltage

" '" " ., ~

o > , a.

" '" " ., ~

o > , a.

reg75a 20

0'.37 0'.50 X10- 1

ti me> (Sl?c)

reg75b 20

0'.37 0'.50 X10- 1

lime (s@c) Fig-7-14Q SIMULATED VOLTAGE OF PHASES A 8. B F=20hz

Flg-7-14b Expe-rimentQI phase voltQge A ~ B f=20hz UPPER TRACE PHASE A (2 V IDIV, LDWER TRACE PHASE B (2 V IDIV J

" '" " ., ~

o > , a.

, 0.13

reg75ab 20

0'.37 0'.50 X10- 1

lime> (sec) Fig-7-14C SIMULATED LINE VOLTAGE WAVEFORM F=20hz.

0.50_

~ 0.25 .. /- -.-~ ., 0.00. a. • ~.. "". v ~ . • :.25. -_~ .. L

5 .. . !'Sa .. u

I' j g--7--14d SIMULATED MOTO~ LI "If: [UP-RENT

Fig-7-14e

ExperimentQI line

voltclge and

current WQvpfonns

f = 20 hz

UPPER TRACE: LINE TO LINE VOLTAGE ( 10 V I DIV J LOWER TRACE: LINE CURRENT (O.ISA IDIV'

e L

" .c

.,

3

2

0 ! reg7Sob 20

'un 7s.h , , , , , 0 625 1250 1875 2500

Frequency (hz)

Fig-7-14f SIMULATED HARMONIC SPECTRUM OF LINE VOLTAGE

Fig-7-14g Experimental harmonic spectrum of line voltage

" '" " "" ~ o > ~

a.

" '" " "" ~ o > ~

a.

opl29. 20

0'.00 0'.13 0'.25 0':37 0'.50 X10- 1

lime (SE'C)

opl29b 20

0'.00 0'.13 0'.25 0'.37 0'.50 X10- 1

lirnQ (s~c) Fig-7-1Sa SIMULATED PHASE VOLTAGE A " B F=20hz

.,

Fig-i-15b Experimental phase voltage Ai B f=20hz UPPER TRACE: PHASE A (2V/0IV) LOWER TRACE: PHASE B (2 V/OIV)

'" '" " .., ~

o >

" "

~ c. o "

limE' (se-c)

0'.':17"'" 0'.50 X10- 1

opt29ab 20

Fig-7-15C SIMULATED LINE VOLTAGE WAVEFORM P=20hz

opt29 20

i. i!TIt> (c;et: > Fig-7-15d SIMULi\TlD MOTOR LINE CURRENT

UPPER TRACE: LINE TO LINE II)lTAGE (10VI'OIV) I nWF'R fRACF: ~ UII!! CURR~NT (Q.3 A /OIV )

Fig~7-15e

Experimental line

voltage and

wrrent waveforms f = 20 hz

3.00

~

!l ~

g 2.25 v

~

'" >

'" -' 1 .513. E c , "

0,75

0.00'JJ ____ -"li' . ..uII..J.,~, ~-""ulJ...1 Ll>11,..uIl..l."~~'..J.',-"' , , opt29ab 20

fun 43'"

1875 ':2500 f.rE'quency (hz)

Fig-745f SIMULATED HARMONIC SPECTRUM OF LINE VOLTAGE

-..,. <11

Fi~-1-15g Experimental harmonic spectrum of line voltage

~

'" " .., ~

o > , 0.

o

XI0'- 1 lime (sec:)

J //11/111 11111I

opt29. '50

opt20b 50

~

'" " .~ ~

o > , 0.

lime (sec) ""

r:ig-7~16Q ,SIMULATED PHASE VOl TAGES A @., B P:-:.:50h2 ~.

. Fig-7-16b Experimental phase voltages A (B f = 50hz

UPPER TRACE: PHASE A (2 V I OIV ) LOWER TRACE: PHASE 8 (2 V I OIV )

E

" v

L ~j u

opt29.b 50

'-1

0"_-0~0"-'~~~~::-0c-. 1:O:0:-~~~~-;;;0'. 20

X10- 1 lime (sec:)

F i g-7-16C SIMULATED LINE VOLTAGE WAVEFORM F=50hz

0.30

0.15:

0.00

opt29 50 ~ -.15 ... a>

-.30

, , , 0.00 0.10 0.20

X10- 1 lime (sec)

Fig-7-16 d SIMULATED MOTOR LINE CURRENT

Fig-7-16e

Experimental line

voltage and current

waveforms f=SO hz

UPPER TRACE: LINE TO LINE VOLTAGE (IOV IDIV ) LOWER TRACE: LINE CURRENT (0,15A IDIV)

~ '0 :::1 '

(-a,17. o E

E o

(r.l5

o '3.

(J.r,o,.l .. '-_______ -:-____ +-\;', fun 43rd 47th 49th

~

HJ7S 2500 i, ! ~ eql:cnq (Ih)

f)p!2:3

l' i 9_ 7_16 f ',' MULATED L I NE 'iARMuN I C SPECTRUM I" 50h z

Fig-7-16g Experimental harmonic spectrum of

li n e voltage

360 degree point

INTO

Phase A PWN (IV/DIVI

( IV/DIVI

Fig-7-17 PWM phase vDI tage A

1.04

";; 1.&9

-------- ------_ ...... -_ ... --- -- ... ---... - - - _ .. --- -_ .. --------- --_ .. ....

'0 > 1.66

Q) '0 :::J 1.3& .... ... --- -- -_ .. --- - ..... -----'c 1.17 Cl ------------ ------ i><' , I

" e _ 1.02 -------- ------E,~·4.2 c 1l! '0.76 -------------" , '0 0.635 -- - - ---- I 5 0.532 ___ -'-___ I "- I

0.40 I I I , , ,

, , , , , , , , , , , I

6 9612& 1661014 2&3032

, I , I I , ,

36 U 47

frequency (Hz I

Fig-7_16. V/f characteristic forthe regular_optimal strategy

14B

7.4 DISCUSSION OF RESULTS

This section considers the variation of line voltage harmonics with

fundamental frequency for the different PWM strategies used. A number

of figures are given to illustrate in a graphical form the per-unit

(p.u) variations of harmonic magnitudes recorded from the spectrum

analyser at different output frequencies. The theoretical p.u. values

of harmonic magnitudes for different output frequencies obtained from

the simulation programs are also presented.

Figures 7.1ga and 7.19b show respectively the simulated and practical

harmonic magnitudes of the line voltage at different fundamental

frequencies for the 1B-pulse regular strategy. It can be seen from

these figures that the significant harmonics which appear in the

spectrum are only the switching frequency and its sidebands. The

practical results of Figure 7.19b show a larger 1Bth harmonic as well

as non-l inearities. These differences are caused by the time delays

introduced by the software interrupt service routines; It is obvious

from the practical results of Figure 7~9b that. apart from the

switchi ng frequency harmoni c (i .e. the 1Bth) all the other harmoni cs

are small compared to the fundamental. The small errors between the

theoretical and practical results can be attributed to the existence

of delays produced by interrupts in the software implementation of the

strategy.

Figures 7.20a and 7.20b show respectively the simulated and practical

harmonicmagnitudes against output frequency for the 30-pulse version

regular strategy. It can be seen that the Significant harmonics are

the sidebands around the switching frequency i.e. the 2Bth. 29th. 31st

. and 32nd as well as the switchi ng frequency component i.e. the 30th

harmonic. Figure 7.20b shows a higher 30th harmonic than that

theoretically predicted. As for the 1B-pulse version. this can be

attributed to the use of interrupts in the strategy implementation.

It can be seen from both figures that the magnftudes of the sideband

components are very small at frequencies .below 15 Hz approximately and

they tend to grow as the output frequency is increased. Thi s can be

149

attri buted to the modul ati on index increasing with output frequency

and the time delays introduced by the interrupt service routines

having a more significant effect as the output frequency is increased.

Figures 7.21a and 7.21b show respectively the theoretical and

practical results of harmonic magnitude variation against fundamental

frequency for the 17-pul se version of the optimal PWM strategy. It

can be seen from these figures that. apart·from the 25th harmonic. all

the other harmonics are small compared to the fundamental. There are

some extra harmonics that exist in the practical results but not in

the theoretical results. These are due to the way in which the optimal

strategy has been implemented in practice. Nevertheless. these extra

harmonics are very small in magnitudes and have therefore

. insignificant effect since they are of high frequency •

. Figures 7.22a and 7.22b illustrate respectively the theoretical and

practical resul ts of the harmonic magnitude variation versus

fundamental frequency for the 29-pul se version of the optimal PWM

strategy. Clearly. the first significant harmonics in the spectra are

43rd accompanied with the 47th. and 49th. A large 41st harmonic caused

by the inaccuracies in the pulse widths production is discernible in

the practical results of Figure 7.22b.

Figures 7.23a and 7.23b show the si mul ated and practi ca I results for

the combi ned regul ar-optima 1 PWM strategy. The onl y harmoni c which

appears in the spectrum when the output frequency is varied from 0 to

20 Hz is the 75th. When the output frequency is increased above 20 Hz

and the switching strategy changes from the regular to the optimal

PWM. the 43rd. 47th and 49th harmonics appear in the spectrum. as

would be expected from the optimal strategy. It can also be seen from

Figure 7.23. that the magnitude of the fundamental component is

stepped up at the 20 Hz point when the transition from the 75 pul se

regular strategy to the 29-pulse optimal strategy occurs. The

practical results show a higher 75th harmonic magnitude for the 0 to

20 Hz fundamental frequency range. Similarly. larger harmonic

magnitudes are discernible in the practical results of Figure 7.23b

150

for the fundamental frequency range 20 to 50 Hz. These harmonics are of high frequencies and have therefore insignificant effects on the motor since they can easily be filtered.

For the different PWM strategies used, Figure 7.24 shows the p.u.

magnitude variation of the fundamental component of the line voltage when the output frequency is varied from 5 to 50 Hz. Clearly, a comparison between the optimal and the regular strategies in terms of per-unit fundamental magnitudes confi rms that the optimal PWM strategy produces fundamental frequency components with magnitudes higher than those produced by the regular PWM strategy. The combined regul ar­opt i mal strategy produces fundamenta 1 magnitudes lower than those produced by the optimal strategy and higher than those produced by the regul ar strategy.

The first significant harmonic produced by the 17-pulse and the 29-pulse versions of the optimal strategy are, respectively, the 25th and 43rd voltage harmonics. In contrast, the 18-pulse and the 30-pulse versions of the regular PWM strategy yield, respectively, the 18th and 30th harmonics as the first significant voltage harmonics. This clearly illustrates the advantages of the optimal strategy over the regular strategy in terms of harmonic content, in addition to that obtained in terms of fundamental magnitude. The combined regular­opt i mal strategy produces better performances than the regul ar and optimal in terms of harmonic content.

Another advantage of the optimal strategy over the regular strategy is the higher fundamental magnitude at the nominal output frequency of 50

Hz. For regular strategy the theoretical maximum line-to-line output voltage that can be obtained at 1001 modulation depth is equal to: 82.71 of the AC input voltage. In contrast; the maximum output voltage for the optimal strategy is theoretically (1.16 x 82.7)1 of the AC input voltage. Thus, the optimal strategy may avoid the need for using such techniques as overmodulation or third harmonic injection into the modulation waveform. These techniques may be necessary with the regular-sampled and natural PWM strategies in· order to avoid the

151

need for 1nduction motors of reduced voltage rating.

The ma1n disadvantage of the opt1mal strategy over the regular strategy 1s the diff1culty 1n finding the optimal solutions for the pulse-widths, s1nce an opt1mal solution is not always guaranteed when a large number of pulses are used in a cycle. In contrast, PWM waveforms usi ng a high pul se number can easily be produced by the regular PWM strategy, part1cularly at low inverter output frequencies.

'" 0 E

E 0

"" ::;,

0-

152

1.00

0.88 fun

0.75

0.63

.0.50

0.37

al7 o 25

0.13/~ . ~a16

0.00, ~~;09 0.00 0.13 • 0.25 0.37 0.50

XI02 1requency(Hz)

Fig. 7 . 19 Q 5 i mu I a led ha r mo n i c ma 9 nil u d e v s I un dame n I a I f r e que n c y

1.00

0.88

'" fun 0 0.75 E E 0

"" 0.63

::;,

0- 0.50

0.37

0.25 018

0.13

0.00 6

I~ /~~~016 )~ 17

10 20 30 40

al9

frequencJ(Hz)

Fig.7.19b Practical harmonic magnilude vs fundamenlal frequency

·, ... 153

1.00

0.88

'" 0.75 0 E

E 0 0.63 "" ::> .. D- 0.50

0.37

0.25

0.13

0.00 0.00 0.13 ).\.......;.;.....~:;;;,:=:=:::::=~:;::;:;:~8 2\lJ

0.25 0.37 0.50 . XI02

f requency(Hz)

Fig.7.20a Simuloled harmonic magni lude vs fundameni"al frequency

1.00

0.88

'" 0.75 0 E E 0

"" 0.63

::> D- 0.50

0.37

0.25

0.13

0.00 0 io 20 30

frequency (Hz)

lun

030

)

031

40

Fig.7.20b Praclicol harmonic magnilude vs fundamenlal frequency

154

! .30

1.14"

'" 0.98 0 E

E 0 0.8! ~

=> a: 0.65

0.49

0.3 a29

0.16 a25

0.00 0.00 0. 13 0.25 0.37 0.50

XI02 frequency (Hz)

Fig.7.21a Simulated harmonic magnitude vs fundamental frequency

1.00

0.88

'" 0.75 0 E E 0 0.63 ~

=> "- 0.50

0.37

0.25

0.13

0.00 6 ~.

10 20

fun

a25

a24

<--a25 .

~. 30 40.

f requencyfHz)

Fig.7.21b Practicat harmonicmagnitude vs fundamental frequency

'" 0.9 D E

~ D ~

O.SI

=> a: 0.65

0.49

0.3

O. !

0.0 0.00 O. !3

155

tun

047

049 a43

0.25 0.37 0.50 XI02

frequency(Hz)

Fig.7.220 Simulaled harmonic mognilude vs fundomenlol frequency

1.0

0.S8 tun

'" 0.75 D E

~ D 0.63 ~

=> a: 0.50

0.37

0.25 043

0.13

0.00 b 10 20 30 40

f, equency (Hz)

Fig.7.22 b Practle.al ~armonic magnitude .. vs fu~damentQI frequency . .'

156

tun

a43 a47

a49

~~~E~~~~a75 0.25' . 0.37 0.50

XI02 1requency(Hz)

Fig.7.2~a Simulated harmonic magni tude vs fundamental frequency'

'" c E

E c '" '" Q.

1.00'

O.SS fiJn

0.75

0.63

0.50

0.37

0.25

0.13

0.00 0'.00 0.13

a75 ~~~~~~~~--~~--~

0.25 0.37 0.50 XIOZ

lrequencylHz)

Fig.7.2Jb Practical harmonic magnilude vs fundamental frequency'

0.65

0.49

'. 0.3

0.16

XI02 frequency(Hz)

Fig.7.24' VII CHARACTERISTICS OF DIFFERENT STRATEGIES

158

CHAPTER 8

CONQUSIONS

Two different methods of PWM control of 3~phase bridge inverter, namely the regular and the optimal PWM switching strategies, have been implemented by microprocessors for use in variable-speed induction motor drives.[ Microprocessors permit implementation of novel PWM switching strategies which would be very difficult, or perhaps impossible, to realise by means of analog methods. A particular example is the optimal PWM strategy, which is not su,itab1e for analog imp1 ementati on.]

[ The use of microprocessors 'also resu1ts'in considerable flexibility in the control of induction motor drives, since only simple software alterations are needed when the motor' characteristics are to Change.]

[ThiS is in contrast to analog methods which require parts of the hardware to be modified, adjusted and reca1ibrated in order to cater for different characteristics of a new motor.]

Two particular versions of the regular-sampled PWM strategy have been implemented with frequency ratios (F/f) of 18 and 30 (F carrier frequency, f modulating frequency). These two versions resulted in , harmonics up to the 17th and 29th respectively, to have small or negligible magnitudes compared with the fundamental magnitude of the motor line vo1tages. However, harmonics higher than the 17th in the first version, and the 29th in the second version are present with considerable magnitudes. Specially-designed LC filters are therefore needed to prevent these harmonics from reaching the motor terminals, when the inductance of the motor is not sufficiently large to smooth thei r effects on the motor current waveform. The voltage/frequency rati 0 is kept constant over the full range of inverter output frequencies to maintain a constant flux inside the motor.

'.

159

Ghe two particular implementations of the optimal PWM strategy have been achieved with 17 and 29 pulses per output cycle •. They result in voltage harmonics up to the 23rdand 41st. respectively. to hava negl i gi bl e magnitudes throughout the operati ng range of the i nverter.J

l The implementation method employed for the optimal PWM strategy enables a good three-phase balance to be maintained when the inverter voltage and frequency are both varied. The hardware developed for this switching strategy offers considerable flexibility since it can be employed to implement other optimal strategies based on different

. performance criteria:J The implementation of another optimal PWM( j .

strategy. such as that based onthe minimisation of the RMS ripple current, does not involve any hardware modifications but only requires changing the contents of the look-up table where NR values are stored. This flexibility was demonstrated by implementing the combined regular-optimal strategy on the same hardware.

For both regu1ar~samp1ed and optimal PWM switching strategies, the three-phase balance has been achieved 'simply by software without requiring comp1~x hardware circuitry.

The combined regular-optimal PWM strategy results in negligibly small vol'tage harmonics up to the 74th for the output frequency range 0 to 20 Hz and up to the 41st for the output frequency range 20 to 50 Hz.

The magnitudes of the fundamental voltage component produced by the regular switching strategy at different inverter output frequencies are lower than those produced by the optimal strategy.

The comparison in terms of harmonic spectra between the regular and optimal strategies on the basis of both the computer simulation and experimental results indicate that the spectra produced by the optimal strategy is superior to that produced by the regular strategy.

However. the combined regutar-optimal strategy provides a good compromise and can be said to be superior to both of the above strategies when the full output frequency range 0-50 Hz is considered.

160

The regular switching strategy is easier to implement than the optimal

strategy since it does not need a PLL to control the inverter output

frequency. The facility for varying the inverter frequency is included

in the analytic expression describing the widths of the regular

sampled PWM pulses. Furthermore, the phase balance is achieved more

easily in the regular switching strategy (as described in Chapter 3)

without requiring the extra timers and software routines necessitated

by the optimal strategy. The regular strategy is therefore cheaper to

implement than the optimal strategy and requires less hardware and

software. However, the much superior performance offered by the

optimal strategy makes it a preferred choice in induction motor drive

applications which do not involve very low speed operation.

The combined Regular-Optimal strategy is the best choice for use in

microprocessor-based PWM inverter drives since it solves the problems

encoun~ered by the optimal strategy at low output frequencies and

retains the high performance of the optimal strategy at high output

frequencies.

161

CHAPTER 9

SUGGESTIONS FOR FURTHER WORK

The method employed for implementing the optimal PWM switching strategy may not be suitable for appl ications requi ri ng high inverter output frequencies, e.g. 400 Hz. This is because the delays introduced by the interrupt service routines into the PWM waveforms may cause errors which become significant at high frequencies, leading to the loss of the half-wave symmetry and to the ex i stence of some

. perhaps significant even harmonics in the PWM waveforms. Although the use of a faster microprocessor can alleviate the problem to some extent, an alternative method based on the hardware shown in Figure 9.1 is suggested below to extend the inverter frequency range while retaining the benefits of the optimal-strategy.

As before, the optimal switching angles are first calculated on a mainframe computer and then stored in the form of a look-up table in the ROM memory of the microprocessor system. In Figure 9.1, the addr.ess 1 ines of RAM-A are di rectly connected to the outputs of the bi nary counter A. The rate at whi ch the bi nary counter is i ncremented is controlled by its clock frequency obtained from a PLL circuit in the same manner as before. The RAM and counter combination is used to achieve what may be termed as a "fill ing up" process. Assume that one

cycl e of a square wave is fed into data 1 i ne Do of RAM-A as shown in Figure 9.2 while WR signal is asserted. With the counter clock frequency fc being adjusted to increment the counter everyone degree of the square wave input, information concerning the level of the square wave becomes stored in the least significant bits of RAM memory as a series of l's and O's describing the shape of the square wave

input signal. This is termed the "filling up" process because the RAM-A is filled with· data describing the input signal. There will be 360 entries in the' RAM-A each corresponding to one degree interval.

If the signal appl ied to the Do 1 ine of RAM-A during the read cycle (i.e. filling up process) is a PWM signal rather than a square wave,

162

the logical level of this signal becomes sampled at each one degree interval and the corresponding data (l's and a's) become ,stored in Bit o locations of RAM-A. If it is now desired to output the data stored in the least significant bit locations of RAM-A. a low-level signal is applied to the RD pin to output the data which produces the PWM signal

for one phase only onto the data line Do. For three-phase operation. information concerning the other two phases can easily be obtained from the data already stored in the Bit 0 locations of RAM-A for phase A. The data for phase B. whi ch are to be stored in Bi t 1 1 ocati ons of RAM. are obtained by a simple 1200 rotation of phase A data. as illustrated by Figure 9.3. The data combined in Bit 0 of RAM-A location with address 000 (decimal) is shifted to Bit 1 of address 120 •. Similarly. the data in Bit 0 of address 001 is shifted to Bit 1 of address 121. etc. The data in Bit 0 column thus becomes duplicated in Bit 1 column of the RAM-A but with a rotation' corresponding to 1200

phase-shift. The data for phase C can be assembled into the Bit 2 col umn of the RAM in the same manner. Once the Bi t O. Bi t 1 and Bi t 2 columns are complete with data corresponding to logic level of phase. A. Band C signal s at one degree interval s. the RAM-A is put into a read cycle and the three-phase PWM signals are taken out of data lines

DO' 01 and 02 of the RAM •.

The microprocessor reads the demand inputs every inverter cycle while the three-phase PWM signals are being output from RAM-A of Figure 9.1. If the demands have changed. a new switching pattern is required. This new pattern is produced by the microprocessor and is output via the PPI into RAM-B to be filled with data in exactly the same way as it has been done for RAM-A. During the process of filling up RAM-B. the PWM outputs are still taken from the data lines of RAM-A and are not di sturbed in any way by the "fill i ng up" process for RAM-B. As soon as RAM-B is filled uP. the new PWM pattern starts being output vi a the data 11 nes of RAM-B. whil e RAM-A wi 11 be ready to accept new data necessitated by the changing demand inputs. In this way. the microprocessor is used only to create the switching pattern necessitated by' the demands and to fill RAM-A or RAM-B with correspondi ng data. Hence the mi croprocessor wi 11 be freed from the

163

time consuming task of PWM pulse production and will be able to perform other tasks such as fault diagnosis and protection.

The counter clock frequency fc which is used to increment the address lines of the RAM's at every 10 interval of the PWM signal, is obtained from the PlL circuit in Figure 9.1. To ensure that the counters are

incremented at each 10 interval, the Pll circuit needs to produce an output frequency of

fc = 360f

where f is the inverter output frequency. Therefore, whenever the inverter frequency is to be changed, the number N to be loaded into the divide-bY-N counter of the PLL circuit is calculated from

N = 360f fi

where fi is the input frequency to the PLL ci rcui t. When 360 pul ses are counted by the counters at the frequency fc, one inverter cycl e becomes complete. However, rather than using 10 intervals, a better resolution can be obtained in the PWM pul se widths simply by i ncreasi ng the PLL output frequency to e.g.

fc = 1024f

This simply means that the RAMs will contain 1024 entries rather than 360, for one inverter cycle, and two consecutive locations in the RAM will then correspond to

360 = 0 35 degrees 1024 •

The method roughly outlined above promises the capability for producing three-phase optimal PWM switching signals for high inverter output frequencies such as 400 Hz, with the inverter retaining benefits of the optimal PWM strategy.

8253

TIMER ROM RAM R S T 7.5

f. _ fmol• _1_ • logic gates ,-

~ , r-~ 3 PHASE PWM

Nmol 360 OIP

1 . I , I

B085A2 '-_ -I

PLL!-i MICRO- .-- -i DO 1 , 01 fc/N PRQC 8255 address fo 1 ,

02 BINARY 'I. N r '----' PP I RAM COUNTER N input A

. dock fo A

I - - -, I ., , - - 1-'

Ird Iwr , DO 131 02 address BINARY

3 PHASE P WM 0/.2 __ I :

RAM COUNTER 1 B dock fo , I B

L_J , ,

rd wr

Fig-9-1 Block diagram of the hardware which could be used for very high frequency applications

165

wr fcJ Frg-9-2 RAM A/Counter A block diagram

bit2 bit1 bito memo!), cddress in decimal

0000·

120

240

360·'

Fig-9-3 Rough description of content of RAM A showing , o·

~he 120 rota ti on between each phase

166

REFERENCES

. 1. J. HINDMARSH:

"Electrical Machines and thei r App1 ications", pp 335-341,

Pergamon.

2.· P. BOWLER:

"The App1 ication of a Cyc10converter to the Control of Induction

Motors", IEEE, Conf. Pub1. No. 7, Power Applications of

Controllable Semiconductor Devices, November 1965.

3. J. HINDMARSH:

"Electrical Machines and their Applications", pp 430-431, Pergamon.

4. CYRIL W. LANDER:

"Power Electronics", pp 334-336, McGraw Hill.

5. L.C.P. HAMBLET, F.G.G. De BUCK:

"A Realization Example of a Microprocessor Driven PWM Transistor

Invertor", 2nd International Conf. on E1ec. Variable Speed

Dri ves, pp 151 .. 156, 25-27 Sept. (1979).

6~ J.M.D. MURPHY, L.S. HOWARD and R.G. HaFT:

"Mi croprocessor Control of a PWM Inverter Induct 1 on Motor Dri ve",

PESCA '79 Rec. IEEE Power Electronics Special ists Conf. (1979),

San Diego, pp 344~348, June 18-22 (1979) •

• 7. R.M. GREEN and J.T. BOYS: "Imp1 ementati on of Pul se-width Modul ated Inverter Modu1 ati on

Strategies", IEEE Trans. on lA, Vol. 1A-18, No. 2, pp 138-145,

March/ April (1982).

167

8. S.R. BOWES and M.J. MOUNT: "Mi croprocessor Control of PWM Inverters", lEE Proc. Vol. 128, Pt

No 6,pp 293-305, Nov. (1981).

9. D.A. GRANT, J.A. HOlDSWORTH and K.N. lOWER: "A New Hi gh Qual ity PWM AC Dri ve", IEEE Trans. on Ind. App., Vo.l.

1A-19, No. 2, pp 211-216, March/April (1983).

10. G.S. BUJA and P. FIORINI: "Microcomputer control of PWM Inverters", IEEE Trans. on lE, Vol.

IE-29, No. 3, pp 212-216, Aug. (1982).

11. D.S. lAKOUTSIS: "Di gi tal Control by Mi crocomputer of PWM Inverters", Conf. Rec.

lA Soc., IEEE, 16th Annual Meeting, pp 873-880, 5-9 Oct. 1981.

12. C. FIELD, R. JARI and C. SAlERNO: "Apply PWM to Produce Variable DC Voltages", EDN, pp 133-136,

August 19 (1981).

13. B.K. BOSE and H.A. SUTHERLAND: "A ~igh-Performance Pulse Width Modulation for an Inverter Fed

Dri ve system Usi ng a Microcomputer", IEEE Trans. on lA, Vol. 1A-

19, No. 2, pp 235·243, March/April (1983).

14. E.S. TEZ and D. AKHRIB: "Microprocessor-Based Implementation of Regular Sampled PWM

Switching Strategy", Proc. of European Power Electronics Conf.,

Brussel s, pp 2.99-2.103, 16-18 October 1985.

15. S.R. BOWES and R.R. ClEMENTS: "Computer-Aided Design of PWM Inverter Systems", lEE Proc. Vol.

129, Pt. B, No. 1, pp 1-13, January 1982.

168

16. Ph. LATAIRE. N. VENLET and B. KACZMAREK:

"Pulse Width Modulation with Hybrid Sampling Techniques". PCI

Proc •• pp 268-271. Sept. 1982.

17. P. MATHYS and J. KOULISCHER:

"Modu1 ateur a hautes performances pour ondu1 eurs a transi stors".

Proc. of European Power Electronics Conf •• Brussels. pp 22.105 to

2.111. 16-18 Oct. 1985.

18. S.R. BOWES:

"Mi croprocessor Control of PWM Inverters". lEE' Proc.. Vol. 128.

Pt. B. No. 6. pp 293-304. November 1981.

19. B.G. STARR and J.C.F. van LOON:

"LSI Circuit for AC Motor Speed Control". Mullard Technical Publ ication M82-0015.

20. P. MATHYS:

"Microprocessor-Based Multimode Synchronous Pulse-Width

Modulation". Microelectronics in Power Electronics and Electrical

Drives. pp 237-243. 1982.

21. D.A. GRANT and R. SEIDNER:

"Ratio Changing in Pulse-Width Modulated Inverters". lEE Proc ••

Vol. 128. Pt. B. No. 5. Sept. 1981.

22. E. DWYER and B.T. 001:

"A Look-up Table Based Microprocessor Controller ,for a Three

Phase PWM Inverter". IECI '79 Proc. Ind and Control App. of

Microprocessors. March 19-21. pp 19-22. 1979.

23. D.A. GRANT:

"The Use. of Ratio Changing in. PWM Inverters. 4th European Conf. on Electronics. Eurocon '80. W. Germany. pp 420-422. 24-28 March

1980.

169

24. S.R. BOWES and A. MIDOUN:

"Suboptimal Switching Strategies for Microprocessor-Controlled

PWM Inverter Drives", lEE Proc., Vol. 132, Pt. B. No. 3, pp 133-148, May 1985.

25. G.N. ACHARYA et a1:

"Microprocessor-Based PWM Inverter Using Modified Regular

Sampling Techniques", IEEE-IAS 1984 Annual Meeting Conf. Record,

pp 1377-1385, Chicago, 30 Sept.-4 Oct. 1984.

26. MARLEN VARNOVITSKY:

"A Microcomputer-Based Control Signal Generator for a Three-Phase

Switching Power Inverter", IEEE Trans. on lA, Vol. IA-19, No. 2,

pp 228-234, March/April 1983.

27. E.S. TEZ:

"UK Researcher Claims Revolution in PWM Motor Control", Electrical Drives and Controls, p 9-13, January/February 1986.

28. F. De BUCK and D. De BACKER:

"Loss-Optimal PWM Waveforms for Variable-Speed Induction Motor

Drives", lEE Proc., Vol. 130, Pt. B, No. 5, Sept. 1983.

29. G.S. BUJA and G.B. INDRI:

"Optimal PWM for Feeding AC Motors", IEEE Trans., IA-13, pp 38-

44, 1977.

30. S. HALASZ:

"Opti mal Control of Voltage-Source Inverters Supplying Inducti on

Motors", International Federation on Automatic Control (IFAC),

Second Symposium, Conf. Proc., pp 379-395, 1979.

170

31. H.S. PATEL and R.G. HOFT:

"Generalized Techniques of Harmonic Elimination and Voltage

Control in Thyristor Inverters, Part I: Harmonic Elimination",

IEEE Trans. on Ind. App., Vol. IA9, No. 3, pp 310-317, May/June

1973.

32. H.S. PATEL and R.G. HOFT:

"Generalized Techniques of Harmonic Elimination and Voltage

Control in Thyristor Inverters, Part 11: Voltage Control

Techniques", IEEE Trans. on rnd. App., Vol. IA-lO, pp 666-673,

Sept/Oct. 1974.

33. G.K. CREIGHTON:

Lecture notes on "Control of Electrical Machines Using

Thyristors", pp 1-12, Loughborough University of Technology.

34. J. HINDMARSH:

"Electrical Machines and their Applications", pp 367-381,

. Pergamon.

35. J. HINDMARSH:

"El ectri cal Machi nes and thei r Appl i cati ons", pp 431-433,

Pergamon.

36. CYRIL W. LANDER:

"Power Electronics", pp 158-172, McGraw Hill.

37. CYRIL W. LANDER: "Power Electronics", pp 177-183, McGraw Hill.

38. INTEL:

"Component Data Catalog", pp 6.10 to 6.25, January 1981.

39. INTEL:

"Component Data Catalog", pp 8.59 to 8.69, January 1981.

171

40. INTEL:

"Component Data CCltalog", pp 8.85 to 8.105, January 1981.

41. INTEL: "iSBC 80/24th, Single Board Computer Hardware Reference Manual,

Manual Order No: 142648-001.

172

APPENDIX I

OPTIMISATION OF SWITCHING ANGLES

A1.1 STATEMENT OF THE PROBLEM

The problem of maximising the fundamental component and eliminating harmonics up to the 25th is solved by the Quasi-Newton minimisation us i ng the sequenti a 1 augmented Lagrangi an functi on method. Si nce no even harmonics exist in the frequency spectrum of the PWM waveform in Figure 2.16 and the triplen harmonics will be cancelled via the 3-phase connection of the motor, the harmonics to be considered for el imination are the 5th, 7th, 11th, 13th, 17th, 19th, 23rd and the 25th. These harmonics can be eliminated with a PWM waveform containing C = 8 chops per ,half cycle.

With C = 8 and the switching angles'denoted by Xi's, the magnitude of the fundamental component is obtained from equation (2.33) as

8 al = i [1 + 2 I (_l)i cos Xi]

11 , 1 1=

and the magnitudes of the harmonics to be eliminated as

4 ,8 all = TIii [1 + 2 ,I (-1)i cos llXi]

1=1

(A1.1)

(A1.2 )

4 a13 = 13; [1 + 2

4 a17 = TTrr [1 + 2

4 a19 = T9n [1 + 2

173

8 2

i=l

8 2

i =1

8 2

i=l

(_1)i cos l7Xi]

(_l)i cos 19Xi]

4 8 a23 = ~ [1 + 2 ,2 (_l)i cos 23Xi]

, =1

4 8 a25 = 'Z5ii' [1 + 2 ,2 (_1)i cos 25Xi]

, =1

(Al.2)

The problem can now be defined as the maximisation of equation (Al.l)' subject to the constraints obtained by equating each of equ'ations (Al.2) to zero.

For the solution of the problem to the physically realisable the following constraints

(30 10-6 x 2nf) < Xl < X2 < X3 < X4 < X5 < X6 < X7 < X8< I

also need to be imposed on the values of the 'switching angles Xi. The mainframe computer subroutine employed (E04UAF) attempts to find a minimum of a function. For this reason. al needs to be transformed to -al' since a minimum of -al corresponds to a maximum of al' giving

8 (-al) =.::.![l + 2 I (-1)i cos Xi]

n i=l , (A1.3)

174

It can be deduced from equation (Al.3) that any sol.ution which B .

minimises the function fc = - I (_I)i cos Xi would also minimise

the value (-a1). i=l

Thus, the whole problem is transformed to finding a minimum of

8 fc = -.2 (_l)i cos Xi

1 =1

subject to the equality constraints

8 (_1); cc(l) = (2 I cos 5Xi) + 1 = 0

i =1

8 (_1); cc(2) = (2. l- eas 7Xi) + 1 = 0

i =,

8 (_1); cc(3) = (2 I cos 11X i ) + 1 = 0

i =,

8 (-2) i cc(4) = (2 l cos 13X;) + 1 = 0

i =,

8 (_1); cc(5) = (2 L cos 17X i ) + 1 =0

; =1

8 (_1); cos 19Xi) + i = 0 cc(6) = (2/:

i =1

8 (_1)1 cos 23X i ) + 1 = 0 cc(7) = (2 I

i =,

cc(8) = (2 ~ (_I)i cos 25Xi) + 1 = 0

and i =1

(A1.4 )

(Al.5)

175

(30 10-6 21lf) < Xl < X2 < ,X3 <X4 < X5 < X6 < X7 <, X8 < i (Al.6)

The inequal ity constraints of (Al.6) can be transformed into:

cc(9) = Xl - X2 - Const. 1 = 0

cc(10) = X3 - X2 - Const. 1 = 0

cc(ll) = X4 - X3 - Const. 1 =0 (Alo7)

cc(12) = X5 - X4 - Const. 1 = 0

cc(13) = X6 - X5 - Const. 1 = 0

cc(14) = X7 - X6 - Const. 1 = 0

cc(15) = X8 - X7 - Const. 1 = 0

where Const. 1 is a very small positive number used in order to reject the solutions which may give Xi+1 ~ Xi' The value of Const.1 is (3010-6 x 21lf) radians and the lower bound imposed on all Xi is also (30 100-6 x 21lf) radians with the higher bound being, f radians.

A feasible initial guess of the solution has been found, by trial and error, to be

Xl = 8.1862 10-3

X2 = 8.9108 10-2

X3 = 2.1052 10-1

X4 = 2.6607 10-1

176

X5 = 4.1714 10-1

X6 = 4.4701 10-1

X7 = 6.1746 10-1

X8 = 6.2823 10-1

The above stated problem, minimisation of equation (A1.4) subject to

the constraints of equations (A1.5) and (A1.7) has been solved by

means of the NAG 1 i brary routi ne E04UAF, avail abl e at Loughborough

University of Technology. The software program and the results are

gi ven inSect ion A1.2.

The minimum value for fc of equation (A1.4), under the set of.

constraints given by equations (A1.5) and (A1.7), has been found to

be 0.0885. The fundamental magnitude of equation (A1.1) becomes a

maximum given by

a1 = almax = 1. [1 + (-fc )] = 4 [1-0.0885] = 1.160558 11' .1T , ,

- - --------The optimisation process for the 29 pulses-per-cycle version of the

optimal PWM strategy is done in exactly the same manner as described

above.

i) the

Xl =

X2 =

X3 =

X4 =

X5 =

11)

1 i i )

The minor differences are

initial guesses taken as:

0.06675 X6 = 0.3612

0.1198 X7 = 0.4632

0.1995 X8 = 0.4833

0.2401 X9 = 0.5943

0.3316 XI0 = 0.6066

the number of chops per cycle C = 14

the number of the constraints = 27.

X11 = 0.7248

Xl2 = 0.7310

X13 = 0.8545

X14 = 0.8565

177

iv) the number of vari abl es X = 14.

almax' the fundamental harmonic component's magnitude is found to be equa 1 to almax = 1.163.

Al.2t.ortware proyl'Rl. nn~l rODuIte

c •• fteolanl In comrnn •• double precision COn3L1. xS Int.eller Imq. Illloeq. wnge

c •• arrllys In common •• double precision clll).cutl)

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• h. noul. hX loalcal lamet

c •• local arrays •• doubl_ precision ell51. rlelllt1SI. w(691." x(S'.xH8,. xu(O) tnteller 1"(~21

e •• runcUon'rererences .. double precisIon dsqrt.. X0288r

e •• lIIubrout.lne rererences •• e 'eOlluar o

external eOllway common/conats/const.1 cOllVlOn/rnonl cl. cu, llleq ... Ineq. nrnlle' cOlMlOn/reuse/ .8 data nout 161

c set. const.ent. needed In cont ........ const1 _O.OOOld.O

n •• ....... lllneq • 1 ",",Qe -0 • • .eq * _Inaq * Mrnie lprlnt. • 10 nle _ n • Illlneq • III"OQfI

INIxc,,1 _ tOO_(n,S'lnx et.a • 0.5d.0 xtol - lOO.OchOldsqrt.lx02aer (xtol)) stepmlC' • IOOOOO.Od+D lclu • I

-ibound _ 0

xlii) - O.OOOIOd.O xurll - I.S7OOd.O dl21 - O.OOOld.O xul2' • I.S700d.0 x1l3) - O.OOOld.O xull,. I.S7OOd.O xl (tu - O.OOOldtO xullll. I.S7OOd'0 xllS) ·O.aoo'd.O ICulS, _ I.S70Dd.0 d16' - O.OOOld.Q xul6' • I.S70Dd.0 xl171 - O.OOOld.O xul7) _ I.57OOdtO x1(8) - O.OOOldtO xulB) - 1.5·~.O la~et _ .reI8e. xlll·8.t662d-03 x12. 8.9108<1-02 x13' 2.IO"j2d-01 xl." 2.6601d-Ol xf~1 ".17flld-OI xlbl .... 001d-DI xf'" b,I"'Ir.d··OI l(t) ~ ':tli'!W.~l

o o

260

o 2'0

Ilw • la Iv - 69" wlte Cnout..99999} Irall -I coil ~uatln. meq •• Ineq. MrnQe. M. eQa,way, Iprlnt. mox cal.

I ete. xtol. stepml(. cl. CUt Iclu. lbound, xl. xu, Jamet. x. • rho. rla ... r. c. lw, Ilw. w. lw. Iroll'

since Ifall was set to 1 before enterlnQ eOquar~ It Is essent.lal to test whelher Ifoll I. non%ero on exit Ir Clrell.ne.O' wrlLe (nout.9999S) Irall If (Irall.aq.') stop write Inout.99997' f If (frsll .ne.2) QOt.o 2 .. 0 writ.. Cnout,9999.,1 wlt.e Cnout.99993' If.cUI.I- ••• , lr IIrall.ne.2J stop wlte (nout,999921 rho wlte Cnoul.99991) CrlaMU 1.1-1 ••• atop end of eOlluaf exaJnple INIln prows. wlte lnout.99995' CI,xet I.I-l,n' Roto 260 '

99999 rormat 111/131h eOlluar example proRra~ results/, 99990 rormat CII/16h error exit type.13. 22h -Bee routine documen.

I lht.) 99997 format. I/t127h runctlon value on exit. Is • r12.~' 99995 rormat. C3h x(. It. trh) - • eI2.lI' 9999.. rormat (36hOcorrespondlnQ constraint yaluea are' 99993 (orlNlt. C3h cl. 11. lIh' - • r13.8' 99992 rorllllllt. IlI7hOlr restart.lnQ rrom t.he final point. dYeR In x

• "'h aet rho to. ,peI2.lI. 26h and the elewent.s or rla .. tol 99991 ro~t (lh , lp3eI2.lI)

end o

aUbrout.lne runctll1rlll. n , xc • re , c routine to eveluate obJecUve tuncUon. c thla rout.lne must. be clUed (unct.l. c , •• scelar erQUment.s ••

double precision re InteQer Irle" n

c •• arraY arQUment. •• double precision xcln)

c c •• scalara In common ••

doubJe preclalon conat •• x8 o

o

o

o o. o

o

0 ••

o

common /constat conaM common Ireusel x8 put. x8 Into common ror reuse In con' x8 - ICc18}

•• The rollowlnQ I. the runctlon to optlmlse •• rc-2* (dcosCXc I1 ) '~dcosfxc 12) I.dcoslxc 13' l-dc08lxc III I 1 .dcoslxc (51)

*_dcoslxcI6"tdcos1xCI71'-dcOBlxcI0',' relurn end, subrout.lne conll1rtalZ. n. Ill, xc. cc, routine to evaluate constraint runctlons. thlB routine 1IIU~t. be called con'. .,scaJers erguments •• IntelZer Irte« ••• n •• array arguments •• double prr.clfllon ccl.'. xcfnl

,.scalars in common ••

c double lu'eelslon const1. xlt

corrmon Iconsts/const.l co-non Ireusel xO

c •• 1be folJowlnlf are t.he equallt.y const.ralnt.s Impnned on fc ••

CCII,.21 IdcosfS1xcCII'·dcosfSlxcI2"tdcosISlxcI31'·dcosI5Ixcl~') .tdcosIS1xcIS'.-dcoSIS1xCI6IJtdcosIS1xCI7"-dcoaISlxcle", ,., .0eltO ccI2'.2ICdcosC7Ixcll')·dcoSI7IxcI2"+dcosf7IxCI3"_dcasl7lxcf~J'

,+dcosI7-xcf5'J-dcosC7 I XCI6,)+dcosf7I xcf7J'-dcosC7IxcCe,Jt .·I.OeltO cc C3 1-21IcasU' Ixcn ) '-cosllllxc 12' .. cosU "xc 13' '-cosU'_xc I~"

,+cosll1IxcI51'.coslll1xcI6')tcoslll,xcI7"_cosf'l,xcl8'" .-I.OdtO ccC~ '·2. Icoen;'I.c Cl' '-cosIUlxcI2' hcasU 3_xc(]1 J-cosiI3Ixcl~' J

- +cos(l]_xc IS I I-C08113-.cI6, heosll31JCc C7' '-cosU3_.c 101 J' 1 .I.OehO ccf!5'·21IcosCt7I.cC' , '-coal 17ll1cI2' "cos I 17_xc Cl J J-collllt7IxCt .. }}

• tcos(l7_xc IS' l-co_1I7'xcI6 I )teosfl7Ixcl?1 '-cosfl7IxcI81' J • -1.O<ItO cel6 "21 Ccosl"_xc Cl, ,-cos I IgI.cU J '+cosI19_xc Cl J I-cos 119lxc I .. , J

• +eosllg1xe IS' I-eosl 19'xc16, hcosl19lxcl1, '-coaI19Ixc (81)' • -1.Od+O cc 17 "2.lcoaI23_xc I I , I-cos 123'xc t2" teos 123.xc (3' I-cos 1231xc I .. ' J

IteosI23_xcCS', -cosf23IxcI6"tcoSI23'xcI7"-coaI23Ixct8'" I-I.Od+O ccI8'.2,'coel25l xcCI,,-cosf25l xcC2"+Cosl25l xcI3"-cosC25lxcl""

• tdcos 125lxc 151 l-deosC1Slxc 16. , +dC09C25_xc 17' '-dcoIl125'xcC8')

1-I.OdtO C •• The foHowlnlf are the Inequality constraints bposed on fc ••

ccI9"xcI2'-xclll-const,

c

cc(10'·xcI31·xcC21-cor.!lt.l ccCl11'xcIQI-xcC3'-constl cc(12)·xcfSI~xcl"J-constl

ccllll'xc(6'-xcC51-const' ccf'Q'-xcC7'-xcI61-constt cc('S"xcI61-xc{7'-constl return end

aubroutlne amanltln ••• x. r. c, nlter. nr.lflnon.. cond, _posdef. rho. rI_m)

c JI'On I tor I nlf routl ne c •• scalars enguments ••

double precision cond, f,lflnon.. rho InteQer a, n, nf, nlter JOlflcal posder

c •• err.ya erlifUlnent •• double precision clllll. rl.IIIIII', xln'

c c •• acat.rs In corrmon ••

InteRer meq. mlnaq, .mlfe c •• ar-rays In eotN'nOn ••

double precision cl It ,.cull' c c •• local acal.rs ••

double pree 1,.lnn cnnra, cteap. dUIm\)' InteQer I. I. nout. r, s. t

c •• runet.lon ref' .. rences •• dOUble precl31un dsqrt

c (:ollllJOn /IIonl r.1. cu, mP'I. IIIlnt"', /11111", data nnut. /(,1

Ir Inlt.er.~e.OJ CO 1.0 1140 C hlnltorlnfl ot. ehd or cycle:!' .

dutml)' I O.Od.o Ir (mdq.eq.O. If 0 to 140 do 20 r' I.lroq

dUlm\Y' • dUIIIIIY + c(r'lIl 20 continue "0 Ir Calneq.eq.O' RO to eo

do 60 s •••• Ineq J • lleq + 11 cteJI'P. cUt If Cctemp.~t.O.Od.O) dummy • dummr + ctempl'2

60 continue 80 continue

Ir hrnRe.eq.O, to to 120 do 100 t • 1.MrnQe

I • llleq t mlneq t t ctemp • cU) If (cternp.lt.clCtJl dttmlly dullftlY. Cclltl-cternp, .. 2 Ir Icternp.lft.cuCt'l d~ dummr. (ctemp-cult.I'I'2

100 continue 120 cnorm • dsqrtCdummyl

write Cnout,99990' Iflnora. cnor •. 111'1 te C nout.. 99989' rho write Inout.99988' Irla.Cl 1,1-1.111' \lE" I te I ROut. 99987 , return

c ~nltorln, within routine ror solution of .ubproblelll '''0 write Inout..99999' nr

write (nout,lJ9998' Ixfll,l·'.n' write Inout.999971 f write Inout,99996' (cU 1.1.1 .a) write (nout.99995' nlter write (nout.9999~' Iflnon. It Icond.eq.O.Od+O) return Ir Icond.Jt.I.0d+6) If 0 to 160 M"'lta Inout ,99993) eo to '80

'60 write lnout,999921 cond c the fol1ouln, at.atement. Is Included 110 that. this amontt. c en be used In conjunction with any of the routines c eOquar, eO .. vaf. eOqvbf, eoquaf

180 If l.not..posdefJ write (nout,99991' return

c end of monltorlnlf routine 99999 format 11/6hoarter,15.26h function evaluations the.

" 20h elltt.te of the BoluLlon I.' 99998 format (Ix, lp6eI2.'" 9999'1 for_to U .. h where the userll funct.lon value 111. lpeI2.q. Ih.' 99996 format. f30h and the constraint values ~re/llx, lp6eI2.~" 99995 format CI6hOthere have been. 13, 2~h It.eratlons on the current

,Iht, 20h subprublem. the nor", of the' 9999 .. format. , .. fth projected gradient of the auamented IalfrenlfSen,

• llhfunctlon Ill, lpeI2.'" 99993 format Cllt.h end estlllllltf!d condition nu~r of It9 project.

I 25hed hessian exceeds 1.0~h61 99992, format. ,"6h end est.IMated condition number or Its project,

I ,qhed hessian Is • Ipe9.2' 99991 for"""t ,1"/hOthr. projected hr.solAn Is' nnl, f.'SII.lve del'lnlt.r.) CJt)'Y1O rorlMt. fl/lll'llOend of t.lM! eycle.lllnor .. dnd cnorlll Iderl ned ,

I 2~h In lJuc:tlon 10 or r(Jutlne/lllll ct()(!ullllmtJ are. lpeI2 .... • Sh and. 11>p.12.lt, ISh respe<:tlv~ly.1

99')(19 r(JrlMt. CCoh rho a. IreI2.11. Ih.' 99900 forJllO'lt l33h ond thl! IIJQronRe Mult.lplle":1 ... relflX, 'IJC·<'l17.~11 999U7 I'nrfll;]t IIho)

,

' ..

180

art.er 192"/ function evaluations the. e~timate of the solution Is 1.0810E-Ol 1.8250E-Ol 3.2128E-Ol J.6'152E-Ol 5.3230E-Ol 5.561IlE-Ol 7.4087E-Ol 7.1l900E-Ol

where the users function value is 8.61l70E-02. and the constraint values are

-2.861l0E-06 4.9022E-08 -'1.5997E-08 '1.8828E-08 -6.4169E-08 5.0250E-08 -2.0917E-08 9.8821E-09 7.43OOE-02 1.3868E-Ol 4.6142E-02 1.6468E-Ol 2.3741E-02 1.8463E-Ol 8.0285E-03

there have been 4 iterations on the current subproblem. the norm of the projected ~radient of the augmented lagrangian.function is 1.9916E-09 and estimated condition number of its projected hessian is 1l.78E+03

end of the cycle.~lnorm and cnorm (defined. in section 10 of routine document) are 2.21l66E-18 and 1.4963E-07 respectively. rho = 4.0348E+00. and the la~ange multipliers are •

1.7828E-Ol -1.1398E-Ol 5.2009E-02 -3.5031E-02 1.4520E-02 -8.631l8E-03 2.2571E-03 -8.6912E-04 O.OOOOE+OO O.OOOOE+oo O.OOooE+oo O.ooooE+OO O.OOOOE+oo O.OooOE+oo O.OOOOE+OO

function value on exit is 'x(l) = 0.1081E+00 x(2) = 0.1825E+00--

1 X (3) = 0.3213E+00 ! x (4) = 0.3675E+00

x(5) = 0.5323E+00

/

1 x(6) = 0.5561E+00 "x (7) = 0.7409E+00

x(8) = O.7490E+00

0.0885 .'-",

corresponding constraint values are , c (1 ) = -0.0000000 c(2) = 0.00000005 c(3) = -0.0000000 ::(4) = 0.00000008 :: (5) = -0.0000000 ::(6) = 0.00000005 : (7) = -0.0000000 :(8) = 0.00000001 :(9) = 0.071l29973 ::(*) = 0.13867547 ::(*) = 0.04611l199 ::(*) = 0.16468095 ::(*) = 0.02374081l :: (* ) = O. 181163499 c(.) = 0.00802847

STOP

c c c

c

c

c

c

c c c

c

12optim. fort ran 05/06/66 1046.4 bot 'rue

e04uat example proiram text. mark 6 release. naR' copyrlaht. 197". •• scalars in common •• double precisIon const1, xPI, const2 inteier meq, mIneq, mrnRe •• errsys in common •• double precision cl(1 ),cue1) •• local scalars.. . double precisIon eta. f. rho, stepmx. xtol inteeer i. ibound. ffail. {print, lclu, 11101, lw. m, maxcal,

• n, nout. nx lORlcal lamset .. local arrays •• double precision c(27). rlam(27). w(174S). x(1',).xl(14). xu(14) int.eQer tw(80) •• runction references •• double precIsion dsqrt. x02aaf •• subroutine references •• e04uar

external e04way common/consts/const1, const2 common/mon/ cl, cu, meq, mineq, mrnQe common/reuse/ x14 dot. "out 16/ set constant needed in con1 conet1 c6.915d-03 const2 cQ.72d-03 n"c 14 meq • 14 mIneq =r; 13 mrnie -0 m. meq +"mineq + mrnQe iprint =r; 10 nx • n + mineq + mrnee

maxcsl =r; 100*(n.S)*nx eta .. O.Sd+O xtol • 10.0d-12 stepmx • 100000.0d+O lclu • Ibound • 0 xln)·4.72d-03 xu C l' • 1.5700d.O xl (2) • xl f1 )+6 .91Sd-03 xu(2) • 1.S700d+O xl(3) .. xl(2).'1.72d-03 xu(3) 1.5700d+O xl(lIl • xl(3)+6.915d-03 xulll) • 1.S700d+O xllS) • xJ(Ql+lt.72d-03 xu(S) • 1.S700d+O xJ(6),. xl(5).6.9~5d-03

xu (6) ~ 1.5700d+O xl('ll • xI16'+4.72d-03 xu(7) '. 1.5700d+O ' xltS) • xIC7'+6.915d-03 xu(8) ~ 1.S700d+O xl(9)= xl(8)+4.72d-03 xu(9)= 1.57 xl (10'· xI19'+6.915d-03 xu(lO" 1.57 xl (11)· xlI10h4.72d-03 xu(ll'= 1.57 KI(12)-= xl(11l+6.915d-03 xu(t2)2' 1.57 xl(l3" xl(l2'+4.72d-03 xu(t3)" 1.57 xl (t 4 )zxI (13 )+6.915d-03 xu(flt)·'.57 lamset = .ralse. x(1) O.06G76d+O xl2l 2 O.1196d+O x(3) O.1995d+O x(lI) O.2401d+O x(S) O.3316d +0 x(G) O.3612d+O x(7) 2 O.4632d+O xIS) O.4833d+0 x(9): 0.5943 x(lO'= 0.6066 xlll'= 0.72116 x(12}= 0.7310 xC1l)= 0.BS115 x(l4'=0.6565 rho =3.6365d+08 11 w = 60

Iw = 1745 wrt te (nout-, 99999) Ira!! =1

~ I UJ

NO -0'0 I -+

-g 3

1/1 P -+

3 0 a--.. 1/1 -+ .... =r ~ro p

call e04uar(n, meq, mineq, mrn~e, m, e04way, iprint, max cal, eta, xtol, stepmx, cl, cu, lclu, lbound. xl, xu, lamset, x, rho, rlam. f, c, lw, liw, w, lw, trail) since Irail was set to t berore enterine e04uar, it Is essential to test whether ifail is nonzero on exit ir (frail.ne.O) write (nout,99998) fraIl if Ofall.eq.t) stop write (nout,99997) r If (ffafl.ne.2l goto 240 write (nout,99994) write (nout,9999) (I,cCi).i=1,m) Ir (irail.ne.2) stop WI~ 1 te I nout, 99992) rho wl~lte (nout,99991) (rlam<i J,I'" ,m) atop end of e04uaf example main pro~ram write (nout,9999Sl (f,x(il,J=1,n) Rote 260

99999 99995

format format

* 1 ht)

(11113th e04uaf example proeram results/) Clllt6h. error exit type.!3, 22h -see routine documen"

99997 format (///27h function value on exit Is , fI2.4) format (3h x(, 1" lIh). , e12,1.j) 99995

9999 11 format (36hOeorrespondlna constraint values are) format f3h c(, It, 4h) = , fI3.8) 99993

99992 format (47hOlf restartinQ from the final point Qiven in x 11th set rho to, tpeI2.lI, 28h ~nd the elements of rlam to)

format Oh , Ip3eI2.4) •

99991 end

c subroutine functl(lClaQ, n , xc , re )

c routine to evaluate objective function. c this routine must be called fUnet1. c •• scalar arquments ••

double precision rc inteaer tflalil. n

c •• array araument •• double precision xc(n)

c c •• scalars in common ••

c double precision const1, x14, const2

common /con8ts/ con8t1,' cO(l8t2 common /reuse/ x1~

c put xt3 into common ror reuse in conl x 11J = xc ( 1 tj )

re~(-1·2.(cos('.xc(1 )-cos(1~xc(2))~cog(1*xC(3))-cos(1*xc(~)) *+COS(1*XC(S')-cos(1*xc(6')+cOS(1'xc(7»_cOS(1*XC(6') * +cos (1 *xc (9) ) -cos ( 1 *xc ( 10' ). cos ( 1 'xc (11 ) ) - Cos ( 1 ~xc ( 12 ) , *+cos(1*xe(13»-cos(1*xc(1~)"), . return . end subroutine con1ftrlaQ, n, m, xc, cc)

c routine to evaluate constraint runctions. c this routine must be called conl. c •. scalars arQuments ••

integer ir18~, m. n c •• array arguments ••

double precision cc(m), Xc(n) c •• c •• scalars In common ••

c· double precision constl, xt~, const2

. common Iconsts/const1, const2 common Ireusel x14

cc (1 ) = 2* (deos (5*.xc (1 ) ) -dco~ .(5*xc (2) J+dcos (5* xc (3' )-deos (S*xc (4» *+dcOS(S*XC(S»-dC08(S*XC(6»+dcos(5*xC(7»_dc08(S*XC(6» ·+C08 (S*xc {9' ,-cos (5*xc (10) >+cos (5*xc (11) )-cos (5*xc (12» *+C09(S*XC (13) )-c08(S*xc(111) }-1.0

cc (2' =2* (dcos (7*xc (1 , )-deos f7 .xc (2) '+dcos (7*xc (3) )-dc08 {7*xc (11 ) , *+dcos(7*xc(S»-dcos(7*xc(6»+dcos(7*xc(7)J_dcos(7*xc(6» I-+CO:!! C7*xc (9) )-cos (7*xc C 1 0' )+cos (7*XC (11) )-cos (7*xc (12» *+cos(7*xc(13"-c08(7*xc(111)"_1.0 .

cc (3 )" 2 * (cos ( 11 *x c (1 ) , -cos ( 11 * xc (2) >+C08 {1 I • xc (3 , ) -cos ( 1 I *xc (1.1 ) , *+COS~11*xc(5')-cos("*xC(6')+coS(ll*xc(7»_C09(11*xC(6)

I *+cos(11 *XC (9' )-cos(11*xc (10) '.C09 (11 *xc (11) )-cos(11 *xc(12)) *+cos("'xc(13' )-cos(" *xc(,II') '-1.0 cc (Lt )=2*(C09 (13*xc (1, ,-cos (13*xc(2) '+c09(13*xc (3' '-C09 (,3*xc (I,»)

* +c08(13*xc(S)-C09('3*xc(6)'+C09(13*xcI7)'-cos(13*xc(6') *+COS (13*xc (9' '-C09 (13*xc (10' >+cos (t 3*xe (11 ) )-cos (13*xc (12') *+C08 (13*xc ('3) )-cos (13*xc (1 Lt» '-I .0 cc (5 ''''2* (cos (17*xc (, , '-c05(17*xc (2) )+cos(17*xc (3) )-cos(17*xc(~»

- +c08('7*xc(5"-c08(17*xc(6)'+C09(17*xc(7)'-C03(17*xc(6» *+c08('7*xc (9) )-c08(17*xc (10) '+c08('7*xc (11) '-C09t 17.xc (12" *+c08(17*xc (13) )-c08(17*xc (, Lt») )-1.0

cc (6 )=2* (cos (19*xc (1 ) )-cos (19*xo (2) '+C08 (19*xc (3) )-cos (1 q*xc (Lt») .. +c09(19*xc(5»-cos(19*xc(6)+C05(19*xc(7))-008(19*xc(6), *+cos (19*xc (9) '-c09(19*xc (10' '+cos(19*xc (11) )-c08(19.xc (12" *+C08« 19*xc (13) '-cos( 19*xc (1 tj.,) )-1 ,0 cc(7''''2*(c08(23*xc(1 )-c05(23*xc(2))+cos(23*xc(3')-C09(23*xc(Lt))

*+c08(23*xc(5)' -c08(23*xc(6"+C08(23*xc(7"-C09(23*xc(6,) *+cos(23*xc(9')-c09(23*xC(10);+c08(23*xc(11 )'-c08(23.xc(12" *+C09 (23*xc (13' '-C08 (23*xc (I ll»)' -1,0 cc(8)"2*(C09(25*xc(1 )-cosC25*xc(2"+cos{2S*xc(3)1-cos(2S*xc(q,)

• +c09(25*xc(5)-cos(25*xc(6»)+C09(25*xc(7')-C09(25*xc(8» *+C09 (25*xc (9' '-C09 {2S*xc (10' heos (25'.xc (11) ,-cos (25*xc (12) .+c09(25*xc(13»-C09(25*xc(1~»)-1.0

CC(9''''2*(C08(29*XC(1 )-c08(29*xc(2')+C08(29*xc(3')-cos(29*xctLt)) *+cost29.xc(5»-cos(29*xc(6»+cos(29*xc(7}}-cosC29*xc(6) *+cos(29*xc(9).)-cos(29*xc(10)'+C08(29-xc(" "-cos(29Ixc(12» *+cos (29*xc (13) ,-cos (29*xc (111') '-1.0 cc(10)=2*(C08(31*xc(1 »-cos(31*xc(2'J+cos(31*xc(3»-cos(31*xc(4»

*+c09(31*xc(S»-cos(JI*xC(6})+cos(31wxc(7»-cos(31*xc(6») *+cos(3'Ixc{9»-cos(31*xc(10)'.eos(31rxc(11 »-co~(31*xc(12') *+cos(31*xc(13)}-cosf31*xc(lLt»)) .. '.0 . cc (11 )=2*(cos(35*xc (1)" )-cos(3S*xc (2) l+cos(lS*xc (3) )-cos (35*xc ClI»

*+cos(35*xc(S)'-cos{35*xe(6)'+cos(3S*xc(7})·cosI35*xc(6» *+cos(JS*xc(9)'-cos(35*xc{10»+cos(3S*xc(ll »-cos(3S*xc(12) *+c08(35.xc (13) )-C08 (35*xc (111» )-1.0 cc(12)=2*fcos(37*xc(t)'-cos(37*xc(2"+cos(37*xc(3')-cos(37*xc(~')

"*+cos(37*xc(S»-cos(37*xc(6"+cos(31*xc(7)'·C08(37*xc(6" M+cos(37*xc(9"-cos(37*xc(10»)+co8(37*xc(11 »-cos(37«xc{12" *+cos (37*xc (13) '-c08(37*xc('~') )-'.0 cc{13'=2*(cos(~I*xc(1 »)-cos{~1*xc(2')+C08(~1*xc(3')-C09(1I1*xc(q»

*+cos(1I1.xc(S»-cosClll*xc(6"+C08(1I1*xc(7)-cOS(I,,*xc(6') *+cos(II1*xc(9»-cos(LtI*xC(10»+cos(41Ixc(11 )'-co~(ql*xc(12') *+cos(~1*xc(13')-cos(1I1*xc(111")-1 ec(1 11)=2*(cosI43*xc(' )-COS(4JkXC(2.')+CostI13rxc(3»)-cos(43Ixc(Lt» *.c09(43*xc(5»-C09(~3*xc(6)'+C09(Lt3*xc(7»-C08(113'xc(6')

HC09 (l13*xc (9) )-cos (l13*xc (10.) '+cos (113 *xc (11) )-cos (l13*xc (12» * +cos (q 3 *xc (13 ) ) -C09 (~3 * xc ( 1 Lt ) ) , -1 .0 cc(15l=xc(2)-xc(1 )-const' cc(16)=xc(3)-xct2'-const2 cc(17)=xc(4)-xcf3)-constl cc(16)=xc(5)-xc(~)-const2

cc(19'=xc(6)-xc(5)-constl cc(20'=xc(7)-xc(6'-const2 cc(21 )=xc(8'-xc(7'-constl cc(22'=xc(9)-xc(8'-const2 cc(23)zxc(10)-xc(9)-constl cc(2I1'=xc{11 )-xc(10)-con9t2 ccf25l=xc(12'-xc(11 )-const1 cc(26'=xc(13)-xc(12'-const2 cc(27)=xc(14'-xc(13)-co(lstl

c

return end

subroutine amonit(n, rn, x, f, c, niter, nr,glnorm, cond, .posdef, rho, rlam,

c monitoring routine c •• scalars arguments ••

double precision cond, r,elnorm, rho integer rn, n, nf, niter logical" posdef

c •• arrays argument •• 'double precision e(m), rlam(m), xcn',

c c " scalars in common ••

integer meQ, mineq, mrn~e c •• arrays in common ••

double precision cl (1) ,cun) c c •• local sCAlars ••

double precision cnorm, ctemp, dummy integer i, 1, nout, r, s, t

c •• function references •• double precision dsqrt

c common Imonl cl, cU, meq, mineq, mrnae data nout 161 if (niter.2e.0) go to 1110

c monitoring at end of cycle dummy = O.Od+O if (meq.eq.O) go to. ~O do 20 rt: 1,meq

dummy: dummy + c(r).*2 20 continue 110·lf (mlneq.eq.O) go to eo

do 60 s ~ 1,mlneq I ~ meq + s ctemp .. cO) If (ctemp.lt.O.Od+O) dummy dummy + ctemp**2

60 continue 80 continue

If (mrnge.eq.O) go to 120 do 100 t ,. '.mrne:e

I • meq + mlneq + t ctemp .. cn) If (ctemp.lt.cl(t)' dummy dummy + (cl(t)-ctemp)~.2 If (ctemp.at.cuCt)' dummy dummy + (ctemp-cuCt) )**2

100 continue 120 cnorm x dsqrtCdummy)

",rite (nout,99990) glnorm. cnorm write (nout,99989) rho write Inout.99988) (rlamlf).ld ,m) write (nout,99981) return ,

c monitorine within routine for solution of subproblem 140 write (nout,?9999) nf

write fnout,99998) (x(!).!"".n) write (nout,99997) f wr 1 te (nout, 99996) (c (I ) .1" 1 ,m) wrl te (nout, 99995' n 1 ter write (nout,9999Q) glnorm

if' (cond.eq.O.Od+O) return if (cond.lt.1.0d+6) eo to 160 write (nout,99993' !l0 to 160

160 writ.e (nout,99992) cond c the following statement, Is included so that this amonJt c can be used in conjunction with any of the routines c eO'Waf, eO'lvaf. eOllvbf, eOllwaf

180, if t.not.posdef) write (nout,99991> return

c end of monitorine routlnp. 99999 format (116hOafter.i5,26h function evaluations the,

• 28h estimate of the solution is) 99996 format (Ix, 1p6eI2.4) 99997 format (3 'lh where the users function value is, Ipe12.4. lh,) 999?6 fOI'mat (30h and the constraint values are/Clx, 1p6eI2.4') 99995 format (16hOthere have been, i3, 25h iterations on the curren,

.'ht, 28h subproblem. the norm of the) 99991.1 format (118h projected er'adlent 0(" the augmented laeranglan"

• l1hrunctton Is, Ipel2.I.I' 99993 format C~6h and estimated condition number of its project,

• 25hed hessian exceeds 1.0d+6) 99992 format (lIGh and estimated condition number of its project,

* 14hed hessian Is , lpe9.2) 99991 format (~7hOthe projected hessian Is not positive definite) 99990 format f 1141~hOend of the cyc le. 111 norm and cnorm fdef I ned,

• 25h in section 10 of routine/14h document) are, lpeI2.4, .5h and, lpI!12.1I, ISh respec'tively,)

99989 format f6h rho :, IpeI2.Q, th,) -99~aa format (33h and the lagranee multlpli~rs ar~/(1x. lp6el~.~»)

99987 format (tho) :( end

~

00 w

184

Al.4 SOLUTION OF NONLINEAR EQUATIONS FOR VOLTAGE CONTROL

In order to implement voltage control on the inverter output and at •

the same. time eliminate a number of harmonics, the fundamental

~agnitude al is varied from almax (given in Section· Al.l as

almax = 1.160558) down to zero in 127 equal steps. Each time al ·is

varied, a new set of eight non-linear equations with eight unknowns

needs to be solved to eliminate the voltage harmonics. These

equations are:

4 8 1i [1 + 2 r {_I)i cos Xi] - Al = 0

i =1

4 8 a5 = 51T[1 + 2 L {_I)i cos 5 Xi] = 0

i=l

4 8 a7 =7iT [1 + 2 ,2 (_l)i cos 7 Xi] = 0

1 =1

4 8 all = Ih [1 + 2) (_I)i cos 11 Xi] = 0

1 =1 .

4 8 a13 = ffi [1 + 2.2. {_l)i cos 13 Xi] - 0

1 = 1

4 a17 = T7rr [1 + 2

8 , 2 {_I)l cos 17 Xi] = 0

i =1

8 L (_l)i cos 19 Xi] = 0

i =1

4 8 a23 = 73iT [1 + 2 L (-I) i cos 23 Xi] = 0

i =1

(A1.8)

where Al of the first equation is the quantity varied from zero to

almax in 127 steps. Since equation (Al~) also includes the equation

•

•

185

involving the fundamental component, the number of equations by which higher harmonics can be eliminated is C - 1 = 7, and this permits elimination of harmonics up to the 23rd.

The method used for solving these 8 non-linear equations with 8 unknowns is the Powell-Hybrid method. A NAG library routine C05PBF based on this method has been used to solve the set of equations.

The computer program for solving the equations is given in Section AI.S together with the results obtained.

These results need to be transformed into the actual numbers to be loaded in the 8254 timers to produce the pulse durations. The calculation of these numbers, which are stored in a look-up table in the microprocessor based controller is shown in Appendix Ill.

The pulse width durations for the 29 pulse-per-cycle version of the optimal strategy when the fundamental voltage is varied in 127 steps are calculated in exactly the same manner as stated above. The differences here remain the same as the ones stated in Section Al.l.

A L5· rrogram 118t.l~ an:'! re9ul t.t=

c .. locol scAlara.. . double prClchllon rnorM.lol.const,I.t,1 ,tl,t.;i.t,II, t.!I,t.6.t.',. us Int.eQer lI'all, J. nout.. q. c. nbUU. nebUlI, n1C9'. k

C •• locllJ arraYII •• double precluion rJacl~,8'. fvecCe,. val8ijl, xlal. ai, 112, Ill. a",

.115. 86 •• 7, ae. yI81, xrl8', drClU. zCO',hrCO', pI8'.exrCH'.dI8'. • xel8', nela,. xvI9'.qeIBJ. rIO'. COhSU. xd(9)

c •• runcUon rererences .. double precision rOSabr. daqrt, _02a.r

C •• COIllllOR constants •• coemon/cona~/cona~'

c •• Bubrout.t ne rer ereneea .. c cOSpbr

• external rcn dat.a nout./6/ write Cnout..99999' wrlt.e Inout..99997, wrlt.e Inout.,99900'

c the rollovlnQ start.lnQ values ~vlde a rouQh aolution. xf1'~O.IOOld.O xI2'-O.1825d.O xI3'-O.3213d.O xlll,-0.3675d.0 xIS'-O.5323d.O xI6J-0.556'd.O x(7)-O.71109d.O xC81-0.7119OdtO tt-xCI) t.2-x(2) U-x(3) t.1I-xlll) ~S-xI5' t.6-xI6' t.7-_17'

ta-xIB) c .. tol 8peclrSell the accurac, at uhich t.he reault. c I. required.

tol-10.0d-08 constl-,.160558d.0 const.2-1.160558dtO/128.0d.0

c .. const.' represents the I!IIIIxlmu .. value or the rundaNntal C cOqx)nent or t.he voltaQe found by tha opthnlsaUon pro(fralll c and const.2 represent.. the amallest Increment vi t.h which c the vol taQe level can be varied . c 1be roUowlna will test. \fhet.her the' contoralnts hnposed c on the resulta are aatiarled .Ir the)' are not. ,the Inltla. c values or the Queased solutions are chanQed and the cOSpbr c rout.lne la called alnln.1,,1. III repeated untlll • lIolut.lon c I. round which .atl.rles these.ln t.hls cese, t.he results c are output. and t.he solut.lon or the next. set.. or equat.lons c correspondlnQ to t.he next. voluQ8 level I. calculated. c t.hls rputlne I_ repeated unt.IlI 8lJ the 127 vol tlllll levels c are' round.

'do 60 .... ,.12'"1 const.l·constl~conai2

.·0 k·'26~.

Ir.I1-1 tOO call cOSpbrlrcn. 6. x. rv~c. rJac:, 8, tol. WII. 011. Iralll

It flrall .eq.II' IOt.o 60 fnorM-r06abrlfvcc.6, dn 'liD Q21.1

, I

I

e2'xI7".2~.161"2 8l-xC6"'2~xC5"'2 s~·xI51"2~.CIII.·2 8S'xIQ)'12-xl,,1'2 86_.13'112 __ 1211'2 II7-xI21 .. 2-xll, .. 2 80-XU 1 .. 2

1110 continue If C.t .1 •• 0.Od.01 aoto 60 If Ce2.1 •• 0.Od.0' IOto 60 Ir C.3.1e.0.Od.0' aoto 60 If (s.,.l •• O.Od.Ol "oto 60 Ir CaS.le.O.Od.Ol goto 60 ir 1&6.1 •• 0.Od.0) Iota 60 Ir '.7.1 •• 0.Od.0) ROta 60 If C.8.1 •• 3.969d·07) ROta 60 do 800 1-1.8

xdll'_C'80/3.14'IXCI' 800 continue

xdI9'-ISO-xd(8) write (nout,99998' k, IxdIJ),J",9'

. c-o do 30 .-0,11

• •

If l1.eq." ROto 30 Ir l1.eq.'" Iota 30 If Il.eq.7J Iota 30 If Cl.eq.IOI Iota 30 \II01211h' temp-14.Od.O/Cll.0d.0'w' "",,," .OdfO.2.coslv.xll , '+2Icol CVlxI211 .. 2IcosIW1.C3 I»

t2Idcoslwl.IIIIJ-2IdcosCv1xISJlt2IdcoslwlxI6') _2Idcoslv'xI7".2Idcolllv1xIB'1

c'Ct' It(C'- t.e"P1 templ

30 continue IOto 80

60 xli )_t'.().02dtO xI21·t2+0.003d.0 xI3,_U.O.00Id.0 xllll-tQ+O.OOijd+O .151-tStO.OO6dtd .(6)-t6+0.007d.O' xI7'_t7_0.00ldtO xIB,_t8.0.002d.O tl-xn) t.2-x(2) U-xClI t~-xlll 1 tS-x(S' t.6-x161 t.7-xI7. t8-xC6' •• 0 lfall-'

iota 100 80 conU nue

.Lop 99999 formatCIIChlJ.3lh e05nbr ellOll1,lc proRrR" results/h' Qq<.}QA rn.· ... :.t_· .nw_I.1 Ih.rs." (31C.(',.I' UIC.I'S.I, I1I1.r5.11

I /

/) l~

CO' 0>

, •

'.

I

;.

99900 ror .. t f] •• ·k·._ •• ·.C11·._.,·.C21· ..... ·.C]I·, ... ,·.I_I·._ •• co!illhl' f!k,unpteo proQrOM renut La • ·.151· ..... ·.161· ..... ·.171·._ •• ·.18'·.-•• ·.191·'

99997 torlllillt C20 ••• nE VALUES )( CML\ILAU~U IN [EClfEES ARE·IIJ 11l:,VflUIliS X CAI.l':\lI.A1Ell IN ,":UU:ES ,.

end subroutine rcnln ••.• tvec, t Jac, IdtJoc, Uhll

c •• scalare arlUfN!nt.s •• • xn) xC2' .C31 x' .. 1 '15' .161 .C7' x18, .", Integer Itlal2. Idr jac, n. w .127 '.7 11.] 20.] 23.1 "".0 35.] 117.9 118.2 131.8

c •• arra, arlUMent.a •• 126 '.7 11.5 20.6 23." 311.6 36 .• 0 "9.5 1f9.9 130.1

double precision rJaclldtJac.nJ. rvecCnl. xln) 125 '.7 11.6 20.7 23.6 311.9 36." 50.2 50.7 129.]

c 124 '.7 11,7 20.8 23.8 35.2 36.7 50.6 51.3 128.7 123 '.7 11.7 20.8 211.0 3S.3 37.0. 50.9 51.6 120."

c •• lacal scalars •• 122 '.7 11.8 20.9 211.1 35.5 :H.2 51.0 51.9 128.1

double precision LeMP. te...,'. te..,2. c. cons tI 121 '.7 11.6 20.9 2".2 35.6 37._ 51.2 52.1 127.9

c~/conet/coneLI 12. '.6 '1.9 21.0 214.14 35.7 37.6 5' .2 52.3 127.7

Int.epr k,v', J , 11. • •• '2.0 21.0 211.5 35." 37.8 5' .3 52.5 12'/.5

Ir Utlal.eq.2' 10to '20 11. • •• 12.0 21.0 211.6 35.8 J·I.9 5\.3 52.6 127."

c·. 117 6.5 12.1 21.0 211.~1 35.8 38.1 51.3 52.8 127.2

c •• 1be rollovlnl are the eqUlltlontll to be sobed. 116 '.5 12.1 21.0 21t.8 35.9 36.2 51." SZ.9 ,27.' do 20 1_0,11 "' '.5 lZ.2 21.0 21f.9 35.9 3B.3 SI." 53.0 121.0

Ir CI.eq.1 I ROto 20 11. ••• 12.2 21.0 25 •• 35.9 38.5 51.3· 53.1 126.9

Ir Cl.eq ... , goto 20 113 '.4 12.3 21.0 25.1 36.0 38.6 51.3 53.2 126.8

Ir fl.eq.71 toto 20 112 ••• IZ.3 21.0 25.2 36.0 38.7 51.3 53.3 126.7

Ir C1.eq.'O) toto 20 III '.3 12." 21.0 25.3 36.0 38.6 5' .3 53.1, ,26.6

v-f211h' 11. '.3 12." 21.0 25.3 36.0 38.9 51.3 5].5 ,26.5

le..,- t 111.0.hOl/f 111.0chOII,,1 lOO '.3 12.5 21.0 25.' 36.0 39.0 51.2 53.5 126.5

te.., •• ,_2.coaCvlxCII'+2.coafv1xI2'1-2Icoatvl.f3'1+2Icoalv,x("'I I •• '.2 12.5 21.0 25.5 36.0 39.1 51.2 53.6 126."

• .. 2IcosCvl.C5' ,.2IcoaC,,'. C6, 1-2Icoslwlxf7, '.2Icosfvl xC8" '.7 '.2 '2.6 21.0 25.6 36.0 39.2 51.2 53.7 126.3

t.e..,2 _ conet' 106 '.2 12.6 • 21.0 25.7 36.0 39.3 51.2 53.8 126.2 IOS '.1 12.7 21.0 25.7 36.0 39._ 51.1 53.9 126.1 ....

Ir Cv.ne.11 te..,2 -O.OchO I •• '.1 12.7 21,0 25.8 35.9 39.5 51.1 5l.' ,26.1 (XI

c-c+1 ,.3 ••• 12.8 20.9 25.' 35.9 39.6 51.0 511.0 126.0 ..... fvecCc'. Lemp_temp'_tempZ ,.2 ••• IZ.8 20.9 26.0 35.9 39.7 51.0 511.1' 125.9

20 continue ,., ••• 12.9 20.9 26.0 35.9 ' 39.7 5' .0 511.' 125.9

10 to 200 100 5.' 12.9 20 •• 26.1 35.9 39.8 50.9 514.2 125.8

120 cont.lnue •• 5.' '2.9 20.' ·26.2 35.8 39.9 SO., 511.3 125.7

c •• The rollowlnl evaluates the JaccobJan .atrlx. •• 5 •• .' 13.0 20.8 26.Z· 35.8 "0.0 50.8 511.3 125.7

do 'Ita k-t ,n .7 5 •• 13.0 20.8 26.3 35.8 110.1 50.8 5"." 125.6

do 160 j-I_n •• 5 •• '3. I 20.8 26.11 35.8 .,0.' 50.8 511.5 125.5

Ir Ck.eq.l, vI·' 95 5.7 13 •• 20 •• 26." 35.7 "0.2 SO.7 511.5 125.5

Ir Ck.eq.2) vl-5 •• 5.7 13.2 20.7 26.5 35.7 110.3 50.7 514.6 125." .3 5.7 13.2 20.7 26.6 35.7 I,D ... 50.6 511.7 '25.3

Ir Ik.eq.3) v'-7 .2 5.' 13.3 20.7 26.6 35.7 1I0.1f 50.6 514.7 125.3

Ir Ck.eq.'H ,,1-" " 5 •• 13.3 20.7 26.7 35.6 ItO.5 SO.S 5i1.8 ,25.2

If Ck •• q.51 v'-Il .. 5.5 1l.3 20.' 26.8 35.6 "0.6 SO.S 514.9 125.1

Ir Ck.eq.6, ,,1-11 •• 5.5 13." ZO.6 26.8 3S.6 "0.6 50." 514.9 125.1

It (k.eq.7J vl-" •• 5.4 13." 20.6 26.9 35.5 110.7 50." 55.0 125.0

ItCk.eq.81 v'-23 .7 5 •• 13.5 20.5 26.9 . 35.5 110.8 50." 55.1 1211.9

rJ.clk,J) __ 128.0d.0/11.0d~)ICf-I.0d~IIIJ'ld.lnCvll.CJI' .. • •• 13.5 20.5 27.0 35.5 110.8 SO.3 55.1 1211.9

". continue .5 5.3 1l.6 2O.S 27.1 35." 110.9 SO.3 55.2 1214.B

14. continue •• 5.3 13.6 20.5 27.1 35." "".0 SO.2 55.2 1214.6

200 continue .3 5.2 "'.7 20." 27.2 35." 1f1.0 50.2 55.3 121t.7

return .2 5.2 1l.7 20.14 27.3 35.3 111.1 50.1 55 ... 121f.6

end ., 5.2 13.7 20.11 27.3 35.3 tl1.2 50.1 55." 121 •• 6 .. 5.1 13.B 20.3 21." 35.Z "1.2 50.0 55.5 1214.5 7. 5.1 13.8 20.3 27." 35.2 111.3 SO •• 55.5 1211.5 7. 5 •• 13.9 20.3 27.5 35.2 .. 1· ... "9.9 55.6 12".11 77 5 •• 1l.9 20.2 2'1.5 35.1 111.11 "9.9 55.7 12".3 ].. 7. ••• IIt.O 20.2 27.6 35.1 "1.~ "9.8 55.7 12" .3 '/5 ••• 1".0 20.2 2'1.7 3~).0 '.1 .(, "9.ft ~S.8 17.".2 .,. ".8 llt.O 2U.l 27.1 . 15.0

"' .1 • 119.7 55.8 1211.1

73 ••• '''.1 20.1 2'1.11 ,t5.0 ,,1 .'1 119.7 5!j.9 121'.1 n ••• 111.1 20.1 2'1.0 3" .9 111.6 "'.& .... 12".0 71 4.7 11t.2 20.n 7." .Q .\".9 "I.n 49.& .... 1211.0 711 .,7 "'.i' ' '".Cl "J.' " U, H '"

., "" " 0::,. , '''·l .,

•• 0.' '''.2 19.9 :28.0 3".H 111.9 119.5 51 •• 1 123.9 5 1.0 Ib.9 17.3 31.3 31.8 0 0 •• IIS.6 116.1 t;,'J.6 '20.2 •• 0.' 111.3 19.9 28.' '''.8 112.0 "'." 56.2 123.8 "1.0 17." 31." 31.8 115.b 0" 0.5 'II.J 19.9 28.' 3lt," 112.' 1t9." 56.3 123.7 l 0 •• 17.0 17.3

116.1 59.0 120.2 31." 31," ifS," .. 0.5 , ..... 19.8 26.2 3,..7 "2.1 "9.3 56.3 123.7 2 0.' 17.0 ,17.2

116.0 59.9 120.1 31.S 31.7 '.5.7 .S 0.0 , ..... 19.8 20.2 31t.6 112.2 "9.3 S6.1;t 123.6 1 0.0 17.1 17.2 31.5 If 5.9 59.9 120.t

310ft "S.t! • 1.15.9 00 0.0 'Q.5 19.8 28.3 31f.6 112.2 "'.2 56.0 12l.6

(,0.0 120.0

63 •• 0 '11.5 19.7 28.3 3".6 lI2.3 "9.2 56.5 123.S S1TJf'

.2 0.' 'Q.5 19.7 26." '''.5 '12." 119.1 56.5 123.S .. 0.' ,q.6 19.6 28 ... 311.5 "2." 119.1 56.6 123."

.0 0.2 '''.6 19.6 28.5 3 ... It .. 2.5 "'.0 56.7 123.3 5. 0.2 111.1 19.6 28.6 l ..... 142.5 "9.0 56.7 123.3 SO- 0.1 11,1.1 19.5 28.t. '''.3 "2.6 !f8.9 56.8 123.2 57 0.1 '''.8 19.5 28.7 '''.3 "2.7 lta.9 56.8 12'.2 50 0.0 '''.8 19.5 28.7 3l1.2 .. 2.7 lI8.8 56.9 123.1 55 0.0 '''.8 19." 28.8 3".2 "2.8 lI8.8 56.9 .. 123.1 50 ••• IlI.9 19.1I 28.8 3l1.2 .. 2.8 lI8.7 57.0 123.0 5. • •• '''.9 19.3 28.9 31f.1 lI2.9 lIB.7 57.1 122.9 52 ••• 15.0 19.3 28.9 31f.1 lI2.9 1f8.6 57.1 122.9 51 ••• 15.0 19.3 29.0 3".0 "3.0 .. e.5 57.2 122.8 SO '.7 15.0 19.2 29.0 3 ... 0 .. 3.1 .. 8.5 57.2· 122.8 ,. '.7 15.1 19.2 29.1 33.9 .. 3.1 "8." 57.3 122.7 ,. '.0 15.1 19.1 29.1 33.9 .. 3.2 "8." 57.3 122.7 07 ••• 15.2 19.1 29.2 33.8 "3.2 118.3 57 ... 122.6 O, ••• 15.2 19.1 29.' 33.8 .. 3.3 "8.3 57.5 122.5 OS '.S 15.3 19.0 29.' 33.7 lt3." "8.2 57.5 122.5 00 '.0 15.3 19.0 29.0 33.7 '43.1f lt8.2 57.6 122 ... O. '.0 15.3 18.9 29.0 33.7 lt3.5 .. e.1 57.6 122.1f 02 ••• 15.11 18.9 29.5 33.6 113.5 lt8.1 57.7 122.3 01 ••• 15.11 18.9 29.5 33.6 .. 3.6 .. e.o 57.7 122.3 '0 '.2 15.5 18.8 29.6 33.5 .. 3.6 118.0 57.0 '22.2 ~

•• '.2 15.5 18.8 29.6 33.5 lI3.7 "7.9 57.9 122.1 ex>

•• '.1 15.6 18.7 29.7 33." 113.1 117.9 57.9 122.1 CO

37 '.1 15.6 18.7 29.7 33." .. 3.6 "7.6 58.0 122.0 3. '.0 15.6 18.7 29.' .... 43.9 117.0 58.0 122.0 .5 '.0 15.7 18.6 29.' 33.3 113.9 117.7 58.1 121.9 '0 2 •• 15.7 UI.6 29.' 33.2 ,,".0 47.7 58.1 12'.9 .. 2.' 15.8 18.5 29 •• 33.2 "lI.O lI7.6 58.2 121.8 .2 2.' 15.8 18.5 30.0 33.' ..... 1 "7.6 58.2 121.8 .. 2.' 15.8 18." 30.0 33.1 ..... 1 117.5 58.3 121.7 .0 2.7 15.' 18." 30.1 33.0 "".2 "7." 56." 121.6 29 2.7 15.9 18.4 30.1 33.0 ..... 3 117.11 Se ... 121.6 2. 2.0 16.0 18.3 30.2 33.0 "".3 "7.3 58.5 121.5 27 2.6 16.0 18.3 30.2 32.9 ""." 117.3 56.5 121.5 26 2.' 16.0 18.2 30.3 32.9 "If." 117.2 5e.6 12' ... 25 2.0 t6.1 "'.2 30.' 32.8 "".5 "7.2 5e.6 121." 20 2.0 t6.' 18.2 30.0 32.8 ..... 5 117.t 50.7 121.3 2. 2.' 16.2 18.1 30." 32.7 ..... 6 "'.1 58.7 121.3 22 2.' 16.2 t8.1 '0.5 32.7 ..... 6 lI7.0 58.8 121.2 21 2.2 16.3 18.0 30.5 32.6 ..... 7 "".0 56.9 121.1 20 2.1 .... IB.O 30.6 '2.6 ..... 1 06.' 58.' 121.1. . .. 2.1 16.3 17.9 30.' 32.5 ..... 8 "6.9 59.0 121.0 18 2.0 16.iI 17.9 30.7 32.5 1t".9 "6.8 59.0 121.0 17 2.0 l6.lI 17.9 30.7 32." ..... 9 "6.8 59.1 '20.9

" 1.' 16.5 17.8 JO.' 32.11 ItS.O. "6.7 59.' 120.9 15 1.8 16.5 ,7.8 30.8 32.3 .115.0 116.6 59.2 120.8 10 1.7 16.5 17.7 30.9 32.3 1.5.1 116.6 59.3 120.7 .. 1.7 16.(, 17.7 30.9 32.2 1I~.1 "6.5 59.] 120.-1

12 I.. 16.6 ,".6 31.0 32.2 115.2 116.5 59.11 120,6 11 1.5 '6.7 17.6 Jt.u 32.' 115.1 1,6.11 5 fl." 1~().I'i

10 1.5 16," 17.& J1.1 J1.' ·,5.J "6.lI 59.5 ,;W.';)

• 1.0 16.6 11.S :".1 Jl.U lI~." "6.3 ~9.S 120.5

• 1.' 16.8 17.5 31.1 J2.0 .. S.lI lI6.] ,59.6 120." 7 1.2 lb.8 1'/.1, 31.2 31.1 1.5.5 "'.1 59.6 120.'1

0 1.1 16.9, 1"/." 31.3 31.') II~.S 116.2 59.7 '20.J

189

APPENDIX 11

LOOK-UP TABLES AND PROGRAM LISTING FOR REGULAR-SAMPLED PWM STRATEGY

A2.1 LOOK-UP TABLES

The actual contents of the Yf • ZjA' ZjB andZjC look-up tables shown in Figures 3.3 and 3.4 for the 18-pulse-per-cycle version of the regular PWM strategy are as follows:

()OOO":·o: (!I~I 'lil· !.:i:~: :::.:t".) I::l , .....

:~:~;' HI ~:14 1} '/0 1 ::: (.1,9 10 ':,/l, OE: Le· I)' '1,IU!::iIJ: F!:j I.IC HI" I.Id W, 1.11" J3a U'~) I:: ';) t.I :,) !:j,~ 1.1:,) CrS I)';' '!\H t) j'

()()OOi:o() : l~tI:: 0(:, 71~ Got, ',. ... ~. ~ .. ~.' 0(:, ))~I O!.:' e:ll O~I IHI O!:i 1;?: O!,;I [lC O/{.

t.JI,I,IIJ?t.I: "H~ u4 "le \)4 !:) 1. 114 2,:..) u4 l.1~i UL\ I' "I :-.. ; 1.13 C:3 I,U ':"~i 1.1:3

0000::::0: ~::f.: ()~: t,I:: c":' .. ,.' ~:I!:i c";' , ,.' :'::):1 ():,:: :!:) 0::: 11 0:';: I'll O:!: E,{.', (Y~ , •.. 1'1" '1.191): D::l 1)2 C6 1)2 ~~6 1)2 ,,·,6 02 ';>1 t)2 ::~'9 1)2 lE! u2 61::. t.l:~!

OO()Oi;,O: 61 ();r. ~I~i 0;;': ()() ~:lf' 00, .' C

00 {~(:. 01 HI Cl':" ~:i:.~ o:!: /H) , •.. 1,)1)1.)1.131,1:. \}2 F'" 'll 56 ' II 914 1)1) CC H::, l.I,q FF !:')I~l f'E E:3 FD ~lE .. , OOC'OI.:O: 1''1:1 CO 1'1:t 1"1 FE: '~ti~1 FE: 66 I' I: COO 00 00 00 O() 00 00

The contents of the Yf. ZjA' ZjB and ZjC look-up tables for the 30-o pulse-per-cycle version of the regular PWM strategy are as follows:

OOOO/:,.(): I:'C it~:i 1"1:: ~l::;~ ~:if.l; 1l )'1' 11 1"1' 0[1 PIP, Ol,: 1"1" ·07' m:' Of'::

1)1,11.11)51'» : C6 u7 ~:F 1.16 !5C 1)6 D!:) (15 '"- .~~ (I!5 1::1" 1.14 AI"! (t,q ~:;F t)L\ "".

OOON,O: 1[1 0 /+ E:::': ()~: f!,I:: O~: '11" 0;:: I~'I~' O~: ~{:E ()~:: O(.i ()~:: Ef!, 0;1: .... 1 .... 1

(H)I ,I1YlU: CC ,):2 DJ. 02 'ill 02 'IF 02 6"1 0:2 5'" 0:2 41. 02 :2F tJ2 . , ' ,.1

OOO():::O : 11:: 02: OI~ o;! H' ()1 1"1 01 E4, 01 1)'/ 01 Ct:: 01 E:F 01

A!.l IH ';1'7 1)1. :3E 1)1. 13!5 1)1. 'lD 1)1. ~II.:" 1)1. 1.I1,)I.h.l'::>0: i34 1)1. AA 1.11. / ,;:,

oooor,o: 61) 01 c.c. ()1 ()() R)F 00 /~,(~ O() . ElL: ()O 1::4 00 [lE O() 1"1'

1,)1')'''1.181.1 : I,H) 1.4 1.tJ. I.E ul. J.i3 1)1. !.lEl IH Ft) I,ll) CA I.H) 9C t)1J b6

OO()O(:() : 00 le: 00 ["1 FF E:<:-I' .'

'lE 1'1', q,(: f' F ~~~{: 1'1' ()1 fF El:

I.h.1 l l1)wi): FE E2 FE E5 FE F'= FE I. (I FF 36 f'F ( 1:. ~:F ';)A FF D'~\ ,J I.).:>

OO()OE:O: 1"1' 00 ()() ()() COO or) ()() or) 00 ()() O() , O() ()o 00 O() or)

190

A2.2 ASSEMBLY LANGUAGE PROGRAM IMPLEMENTING THE REGULAR STRATEGY

The assembly language program used to implement the three-phase regular-sampled PWM strategy is presented below.

';S:'I60 :n:~tGUl2.S:;C ItCDB' ISIS-iI 6060/606' MC~G ASs£'~aLEiI, uc.o II{IDUL£ PAGE 2 liS-I! 8060/6085 llACiIC ASS<.IBLER. ".0 "CDULE "GE 3

LOC CSJ LINE SClJRCE STATCIt[NT lCC OSJ LU>! SCU'CE STATEllEn

15:5-11 6080/6085 iWlOO ~6W. ".0 IICO:.u: PAGE 0171 210031 SS LXI H.3100K OIC: D' 110 PUSlI D 017A 2:0C30 :6 SIU TCAM I . 1T1t) OICE et III PDP a

LOC ~J LINE SOURCE STATEi'IEJd 017D ZlOC30 57 LXI M.FLAG OICF 23 112 '"X H olao 461£ ss "VI ".IEH ; ..... fruJ'lBER OF' Jp PEiI CYClE 01~0 23 113 I~X H

OODF I .ODC EOU OilF1l 0192 2600 59 11111 H.OO8 0101 23 11< l'X H

DOce 2 c_ EiIII OOCH 01B4 DBER 60 IN PORTC I INPUT THE OEl'AHllED FREIilJENCY 01D2 221230 115 5HLD TPAOR

cono 3 ClAM Eau OOOH Oi66 SF 61 oav L.A Oi~S 2AiA30 us LHLD TPIZVAl.. conE • C2AO' EOU ODEH 0167 22CS:JO S2 SilD '~REG 01DS IS 117 D'D D OOEI 5 .GDm EDU OEIH Cl6A AF S3 !!lA A Oit2 AF till DIViU: XlA A C'ES 6 PORiA EGU DESH OlBa 7D 6' ,C. A.L OiDA 7D 119 I'!DIJ. Aol 00E9 7 PORiB EOU OESH OISC 17 65 'AL OHl; iF 120 'Ai OOE' 8 PllInc EDU . DEAH Oi6D 6F SS .DV L.' ;~UlTIPLY THE liP FREGU£NCY BY 2 olte SF 121 'CV L.' om 9 PORiA2 EGU DECH OIBE Ea S7 XCHtl OIDD AF :12 X,. • 3000 , 10 TP~aR EOU 30008 016; 213EOO 6S LXI H.003En OiDE 7C 123 'OV A.' 3002 11 JtADII EGIJ 30G,H OiS, 1S ss D<D 0 ; INLI-Y' ADD~ESS DiDF iF 12( 'AA 300' 12 I!ADR EGU 3CI)4H Oi!3 liE 70 'GO C •• OlEO ;~£101 12' JC ODD

lOCS n l:IADR EOU 3COSH 01S4 ,3 71 I'X H 0.£3 S1 1,S 110" H.A

!iOOB .. INFIl'ED EGU 31)OSH 0:5' cs 71 .DV 9.' ; CBCI-Y'-T/2 OIE( wECCl 127 ~I'IP SUBTA

llCO " srA~q EGU 3100H OlS6 ~:FS:03 II LXI H.3FE'r4 OiE1 S7 12S tDD: ~ H., 300t ,S TOADa Eau lOOC1l "SS .9 7C DAD D Olta iD 1::9 !'!Dv A.L 300[ ,7 FLAG Eau 3COEll Oi~A 'E' 15 ~ E.:t Ott9 e690 130 ADI SOH

30iO 18 T[I.'\8a EGIJ 31I10H 0:S8 ~:; 73 r~'X • Olea 6F 131 'DV L.A

30tZ 19 TPADR EDU 31)12H Glse ss n l1li" D.:. GiEe D1 In SUSTR: pop 0 : GET T ;IWI'I STAt~

:lOa( :0 . TPlVAL EGC 301(H O:SD 05 10 ruSlI 0 : lDE':T OIEiI AF III X>! A

30iS 21 !PS .... EGU 31)IS' • OlSE 21A!OO 79 LXi •• 0QA5H ; Z. ROIl lOClUiP TllaLE ADDRESS OIEE 7S 13' ". A.E " lOlS 22 TI'9'';~ EIiU 301811 O1I1J 'E so OPE~Ai: ItGV E •• OH:;:- SD 135 sa8 L

301A 2l TPl2V'" E3U lOIAH OHl, 23 SI I~X H OIFO !if 136 'DV L.A

lOIC :. Tl/ALUE EGU 30lCH OlAl 56 S2 :tli:' D •• ; IDEI-hl OIF: 7A 137 !'lO!! •• 0

lCot 25 iPCVAL EDU 30lac 01A4 23 Sl INX • 0lF2 se '38 SBS H

30:0 26 F ..... AG, Eau l02," OUI5 E' 6' PUSi-I H ; IHlI-Za2 ADDRES9 01;3 67 139 • OV H ••

3022 27 TTABlE EGIJ 3022H OIAS Ea 65 XCIiG . ; IDEI-Za2 ADDRESS. IHlIIZ.t OIFt 05 140 PUSlI 0 : 5TooE T It: ST~C~

3e2' 2S TESI EDU 3024H 01A7 09 66 DAD S : TpI IITI2+Z.tI oln Ea 141 XC'G

3026 2S TIANS EGU 3026H O,A9 Ea S7 XC;G : IDEI-Tpl, tHLI'ZII O:F6 2AOC30 1'2 LHLD TOADR

3028 lO HTACR EGU l02SH OiA9 2AiZ30 SS lHLD TPAOR O:FS II It] . ,,;V "-E 31 : tlUTIAlISATION OlAC 73 S9 .ev M Oif'A 23 1U INX H

GIn 32 O~"'IE: GRS 14~iI OiA~ 23 so I~X H 01ra 7Z 1'5 'DV '.0

C1U 31OO3D 33 LXI 5P.3DOOlf OiA;; 72 SI .OV '.0 : T,I IN ITS UiQtUP TABLE ADDRESS Oife :3 14S It.:X H

01.7 :lESa 3. 11111 II.88H OiA; 23 52 :t.:x H 0IfD 23 1<7 '"X M 0149 03Ea 35 OUT IIIlDPPI OlEO 23 53 iNX K O,Fc 23 I<S 1NX H 01" 3'E3Q 38 "I A.:;OH Oia. ~3 S' I~-X H Oi.fF 2ZCWO I'S Sil'I..D TeAM

. O"D ~J~ 37 OUT .onc 0;32 22~230 ss SHlD TPADR 0202 210E:;0 150 LXI H.fLAG

01(1= ~t70 38 "I A.7OH 0.B5 2100:0 56 LXt K. TPNBIl 0205 7E 15i l.DV A."

0151 D3~ 35 OUT I'!ODC 01B8 Tc: S1 'C. A.II 02es :ro 152 Dc:! A

Oj53 :lEaO <0 11111 A.OMH 0:39 3D ss DC~ A 0207 C:';E02 IS3 JZ FiNIS'''

Oi" D3DF " CUT IIIlDC Ot3A CIIC~OI S9 J: GcTOf; 02GA 77 15' . ,C. '.A

Oi57 ~ '2 X:iA A OiBC 77 iOO '.cv '.A 020B ZA1Z3G ,55 UolD TFAD:t

Oi:; ClES '3 OUT PaIlTA OIBE Et 101 POP H OZOE ~c: 1·- 'DV E.:t "' Ol'A 210030 " LXI H,TPt.:8A Oiar C3AtOt iOI! J~P Ol'£ilAi . 020F :3 1S1 INX H

Gi~~ 36iE " '01 ".IEH :..... ~aER OF PULSES PER CYCLE Oit, Ea 103 (iEi(FF": l:CHG UI..I:T,12 IDEI:TpI3iidr t •• ru~Ufll 02:0 ::S i58 'C, M Ol5F 2:0230 'R UI H.IIACR 01C3 Ut 10' POP 0 OZ:1 23 15S 1Nl: H

0162 3601 47 .. I ".OIH OtC~ 221A:iO ,05 SHlD TPl2VAL 0212 ,3 IS' :~X H

0164 210.e30 .• S LXI H.I2ADR 0lC7 210231 106 LXI H.3102H 0213 2l ISI I"X H

0187 l62S '9 11111 '1.2SH ; ..... POiNTER PHASE a ((lp/3)'Cltt OICA 5E 107 1111. E., OZI4 221230 IS2 5HlD mDR

0169 2101;:10 50 LXI H.J3AOR OiCB 23 i08 m H 0217 05 163 PUSH 0

OlSC 36U SI 11111 11.1,.. ;" ... POINTER PI{ASE C f(Tpl3lf21+1 01ee S6 JOS .CV D." 0218 Ea 16' XC"O

OiSt 2iom S2 LXI H.3t02H Gi7l 22:230 5l SHLO T~~DR ; .IIAI'IltiOKUi' TA3t.E ADDRESS IT,1)

ISIS-II 6010/80n I!IICaO ASSEJmLEa. vu /!COIl! PAGE C iSiS-iJ 6060/6C6' MUG ASSE/!at.ER, UC.O IIOIM.E . PAGE , I5IS-11 SO&0/8~ IlAC"l ASSEllBm. VC,O I!CDIlLE . PAGE 8

LIIC OSJ LIKE sctmCE SIATE!m LCC e8J LlHE SIlUI1CE SrATEK£NT LOC D8J LINE sOllm SIAIElIEHI

Olls 09 Is:t DAD 8 02&5 CA1802 220 J2 LOAD 02C7 C3t002 m JHP AlFAI

02IA Cl 168 POP .8 0258 :m.t30 221 SIA lEST 02CA SF 27& CORECI: IIGV E,A

0218 C3OS01 1&7 m DIVII 0268 2A26~O 222 LllD TRA~S 02ca ISOI 277 II'JI D.OIH

om 3[03 lIi8 FINISH: II'JI A.OOH 02&< 112800 223 LXI D.2BH ;1111111 Ufy,)l3 OZCD 210031 l78 ALFAI: LXI H,'5':'IIDII

0220 32ZC30 ISS SIA TEST 0271 19 22' DAD 0 0200 19 21S DAD 0

0223 El 170 POP H 027Z 22Z6JO 225 Sfl.O nAo':S 0201 1E 2SO I<C'J A.ft

022' E5 171 PUSH H om 2A2830 2'26 Lfl.O HIAOR 02D2 D~DC 281 OIlT COAOR

022" At 172 X'A A 0278 1:33B02 ZZ? J" ACAIN 020< 23 292' I'X H

0228 70 173 'DV A.L D27a 01 22& LCAD: PCP 0 ozn5 7E 283 'DV A,'

0227 IF '" ~AIl 027C El 229 PCP H 01&8 D30C 28' OUT COADR

om SF '" IIO'J L.A 02~ 7" 230 'DV A.L 02&8 DaE8 2s:t i' PC:nA

02~ AF "8 XlIA A om 030) ZJi OUT CiAD" 020A IF 208 'All .

011A 7C 177 ,CV A,i{ 0280 1e 232 :':0\1 A.M 02DB :iF 287 c~c

0223 iF 178 RAIl 0281 DlOD 'i.:W OU' CIADR mc 17 . 268 RAI.

02~ DAllOZ I7S JC coor 0263 El 23' 'OP H OZDD DlEa 289 OllT PORTA

022F 87 ISO I11lV H,A inS' 7D 23!1 'OV A,L 02" 210230 2S0 LXI JI.I1AD;f

0230 03802 181 JHP AOlT 028' D3D[ ,,,s OUT C2AOR om 7E G:l IIOV A.'

0233 87 162 ODDT: HOV H,A 0287 7C 2:17 l'I(JU A.M om 3t zs=z IHR A

023' 70 183 'OV A.L 02E8 030E 238 OUT. C2AOR 02E' 77 i93 xCtl N.A

0235 C880 18' ADI 80M 028A El 239 POP H 02E3 DG3e 29' SUI 3eH :.HfI (2fTPI

om SI' ISS IIIIV L,A 02Ea 70 2'0 'DV A.L 02E7 C2£,02 m J'Z RESffiR

02:!1I 222830 196 AOIT: 5>1.0 HTADA 028C mc 2et CUT COAOA OlEA 210230 25'S LXI M.IIAD!l

0233 Ea 187 ACAIN: xrom 028E 7C 2'2 'DV A,H 02ED 3800 297 "'I II,OON

0230 2A2630 188 LhtD TAA" 02SF D3DC 2'3 OUT COIIOR OlEF Cl 2S8 'ESTIIl!: POP 8

023F lE :69 IICV c., 02S1 3E08 2" 'VI A.OSM 02FO 01 zes POP 0

0240 23 190 INM H 0253 30 2'5 SIn 02F1 El 300 POP H u: '"

02et 18 191 HDV 8,. 025' F8 2'6 El 02F2 Ft 301 lOP PS'.

02'2 Ea is! xoro 0295 IS 247 \/All: lilT 0213 F8 302 ET

02'3 09 193 DAD 8 0296 crSC02 2.8 CALL SUBROI 02" C9 303 REi

02" /l 19. XRA A 0299 C39502 2'9 J)<I,P WAli om " :;c. 1,12: PUS;; PSW

0245 7D ISS HOV A.L 02se caES 250 Sua,OT: I' PORTS 02F8 E' 305 PUSH H

02es IF IllS RM C:sf E601 251 AX! ou: 02n os 308 pusa 0

0217 SI' iST 'flV l.A . 02110 ~~602 252 JZ IPFAE8 02F8 C, :;01 IWI 8

02'8 AF IS8 XRA A 0213 C39S02 253 m RUN (lZFg 210430 30a Ui H,t2AOR .

02CS 7C 199 'm~ A,if om 240630 2S( IPF~EG: uu ·IIIFREG 02FC /l 309 XAA . A

02eA tF' 200 ,All 02A9 Ea 255 XCHG C2FD 7E 310 'CV M

02'8 OA5202 201 JC ODDTA 02M r.: 258 m A D2re: 17 31\ 'AL

02'E 87 202 HCV N.A 02Aa DiiEA 257 IN POaTC 02FF DA0803 312 'C tlmEtZ

02" =02 203 JHP S'JaTA 02AD SF 258 ~DV L.A 0302 " 313 >CV E.A

02~Z 67 20' ODDTA: '011 N.A 02AE as 2SS CMP E 0303 1600 3" ,VI I.DOH

0253 70 si 205 .DV A.L 02A' CAaE02 280 J2 am'! 0305 C30803 315 J" ALFAZ

\ om C6 208 AD! 80H 0282 F3 261 01 0308 " 318 CORm: .DV E,A

... -~ 0258 6F 207 IleV L,A Ota3 C30000 2&l JftP OOI1!l<lE 0309 ISOl 3.7 'VI D.01H

om 01 20B SUBTA: POP 0 0188 CS 263 RHIII: AET 030a 210031 liS II:"FII2: u: H,SrAtiR

025B /IF 209 MRA A 0287 FS 264 n.:Tt: Ptr.iH PSW 030£ 19 319 OAD 0

0259 78 210 .DV RoE 0288 ES 265 PUSH H 030F 7E 3,0 'OV A.~

02'A SD 211 S38 L 028S DS 2GE i't;SH 0 0310 0301) 321 CUT CIADR

02S3 6F 212 HOV L,A 0~8A cs ,S7 PUSH 8 0:112 23 m IXM H

O2IC 7A 213 rrov A,O 023S 210230 2GB LX: f4.I1ADiI 0313 7E 323 'DV A.'

0230 se 214- saa H 028E AF ,65 XJA A 0314 D3DD 3" OUT CIAOA

025£ El 215 I11lV H,A 0281' 7E 210 ~OIJ M 03t8 DSES 3,' iN P&RTA

02" E' 218 PUSH H otco 11 271 RAL 0318 IF 3,6 OAR

0280 0' 217 PUSII 0 OZCi UACA02 m JC COIlECI 0319 IF 327 "I 0251 3f1Z4:JO 218 LDA TEST azce SF 2J3 HOV E.A 031A 3F . 318 CIIe

OZ1i43D 219 DCa A 02CS IEOO 27C 1'11)1 D.OOl( 0318 17 3ZS AAt

ISlS-1t 8C60/6~ 'AClIO ASS<r.SLEiI. lll.O

laC CiJ 1I1<!: stlio1C£ SIAIEl'iKT

03IC 17 330 >Al

0310 DlES 331 cur P(IilTA

031' 210430 332 LXI H.12ADIl

0322 lE 333 '1l'I A.' 03Z3SC 33' I~R A

032' 77 335 ...oil •• A

0:;25 116~ 336 SUI 3CH 0327 CZEFC2 337 J~Z 1/ES'l'CR 03211 210.:30 338 LXI H.i2ADl

O32D 3600 339 !lV1 ",DOH 031' m;02 3'0 J" ~sro" 0332 '5 3tl H1T3: FL'SI-I FSU

0333 E' 3'2 PUS' , 033' D5 343 P\JSH D 0335 C5 3" PUSH 8 03:!S 2:0630 3" LXI H.flADR 0339 AI' 3'8 IllA A 033A 7E 3., tI(]V A.' 0338 17 3'S 'AL 03:JC OA<503 3'9 JC CO.Et3 0331' SI' 350 .CV E.A 03'0 1600 3S1 l1li1 D.OOH 0342 Cl4BOl 352 JOP Al'A3 034' SF 353 c=: 1I0Il E.A 03'S 1601 35' ,VI DrGtH

0348 21003:' 355 AlFA3: LXI M.srADA G:I!3 19 356 DIID 0 03lC 7£ 3S7 /10. A •• 03<0 mE 356 O~'1 ClAD. 03",23 359 ImI , 0350 7E 360 r.ov 11.;1 om D3GE 361 DUT ClADII 03$3 tau 362 IN pmA 0355 IF 363 RM

0356 I' 36' ". om IF' 305 'A' 0358 3F :166 ~'.c 0359 11 367 'AL 03SA 17 368 .At 03SS 17 369 RAt 035C D3Ea 370 CUT 'mA om 210630 371 LXI H,I3ADR OlGa 7E 372 '011 A •• 03G2 :JC 373 1Nl! A 0363 71 374 IIGV '.A 0:Jll' OO::C 375 SUI 3C' 036G CIE'02 376 J'2 RESTOR 0369 2t0630 371 LXI Il,I3ADR mc :!SOO 378 'VI ".OOH 03SE cJt:;oZ 379 JOP RESTOR

:!SO END

PIJ8lIC SYIIOIllS

ftODUlE PAGE 7

: ..... (2.T,1

[X'l'EifliAL S'tt.BOlS

~~E' SY!IOOLS ;'Cl: A o,~ AGAIN A 0738 ALlAI A 02eD CZAnR A coDE CC;;ECl A 02eA OlREC2 A 0301 nAG A :iCCC: nAG2 A 3020 GETOFF A OtCZ ;XF';C::G A 3009 :~T1 A 0467 1012 A OIFS 1'(CDPPI A oon CDD A 0lE7 ODDI A 0233 ;:c:r="a A OO(:S 1'1lRlC A 'OEA RESTOR A OlE' S~S";":l A OifC iEST A 302' illADR A 300c ~P~!;At A :iOiG TPlNAL A 3018 Ti'ADR A 3012 .AIl A 04:55

AS3C:IIBLY CC.'1.:'L£ic. HO ERIIORS

; .... , t2.T"

IIODIJI.E PAGE 8

AI.'A2 A 0:108 ALl'A3 U318 CCREC3 A 0345 DIVID A OlD! HTAIR A 3028 !lADR A 3002 1"3 A 0332 IP"(I A 02AS ODDlA A 0252 onaAl A OtAt REIN A 02B6 STADIl A 3100 TDNBlI A 3010 TI'O',:-AL A 30tE TI'~BR A 3000 "OHS A 3046

COAD' A OODC DOI!II'E A OCOO IIADR A 30(\4 LDAD A 027l! PORTA A 00E8 SUB'OI A DISC TPIZVA A 301'1 TTAaLE A 3022

ClAD. A OODD FlNlSIf A 021E 1:lA0. A 3006 "DDC A 000' 1'1lRTAZ A OOEC sum A 0257 TPlVAL A 3014 TVAlllt A 30lC

...... <.0 W

194

APPENDIX III

PULSE-WIDTH NUMBERS AND SENSITIVITY TEST

A3.1 CALCULATION OF INTEGER NUMBERS TO BE LOADED INTO TIMERS AND SENSITIVITY TEST

The optimal switching angles Xl to Xs listed in Appendix I for different inverter voltage levels are given in radians. These need to be converted "to integer numbers to be loaded into the timers for producing the pulse durations. Since each Xi (i = 1 to S) is' an angle defined with respect to the initial point of a cycle, it is zero radians, the widths of individual pulses are given by (X i +1) ;. Xi) = .'>Xi radians.

The. numbers NRi to be loaded to the timers can therefore be calculated from

NRi = fomax fmax

.'>x. .~

211 (A3.1)

where fmax = 50 Hz is the maximum inverter output frequency which corresponds to the maximum output frequency of fomax = 1 MHz from the PLL circuit. With these values of f omax and fmax ' equation (A3.1). becomes

7 .' . NRi = 22 • 104 • .'> X i (A3.2) .

Thedimensionless numbers NR calculated from the above equation are rounded to the nearest integer value and these are then stored in the EPROM memory in the form of a look-up table shown in Figure 4.10 of

Chapter 4.

195

As described in Figure 4.12 of Chapter 4, a delay is inevitably introduced into the PWM waveform by the interrupt service routines. The overall time delay that becomes accumulated over an inverter cycle was measured on an'oscilloscope at the worst case corresponding to an inverter output frequency of 50 Hz and was found to be approximately 10 degrees over a complete cycle (3600) •

. It should be noted'that the effect of this delay is worst' at the maximum inverter output frequency (50 Hz) and becomes negligible for low output frequencies. The 100 delay corresponds to the time delay represented by 3d in Secti on 4.3.3, whi ch is of

3d = 20 1I1S X 100 = lQ. ms 3600 18

duration. This is a fixed time interval, which does not change with the inverter output frequency. When the inverter frequency is

reduced from 50 Hz, the lQ. ms interval corresponds to an angular interval 'less than lOo.l~s an inverter frequency of f Hz, the corresponding angular interval is equivalent to

30Rd " Z"f lQ. x 10-3 radians 18

The effect of the angular delay 30 Rd on the PWM waveform harmonic content has been studied by means of the 'Sensitivity Test'program •

. 3D The results of the program after introduction of a delay R5d (since

, 3 the total number of interrupts serviced over a cycle is 35) to each pulse in the PWM cycle showed that the change in harmonic magnitudes that resulted after the introduction of delays with those that should theoretically exist with integer values of NRs (after rounding) is

quite small. It can therefore be concluded that the delays introduced by servicing of the interrupt routines cause the magnitude

196

of the unwanted harmonics to increase to some extent but not in unreasonable proportions.

The listing of the complete memory area containing the look-up tables for 17 and 29 pulses-per-cycle versions of the optimal PWM strategy are as shown in Secti on A3.2.

197

A3-2 Listing of look-up table for the 29 and 17 pul~e_per_cycle versions of the optimal strategy'-... -.

________ :-)9 pulse per cycle version 000100: c:,:: OF f'F FFo 10 00 EO 01 04 00 A$' 01 oe; 00 AS 01

. ,"',.1111): I)~ 01.1 ~I) IJl 1)0 1)1) ~E 01 06 01) 90 01 1)7 1)1) ')le 01 000lZ0: OA OB 14 00 DB 01 06 00 A? 01 07 00 AO 01 09 00 'J'-"I18I,I; '?C 01 1.19 1.10 99 01 OM 01) '99 01 [lA (1) 99 01 DE l.Ia 0001::'0; le 00 (IQ 01 oe 00 A3 01 OA 00 S'I.1 01 OE: 00 9A. 01 1,"JlI151): I)C 00 9:3 1)1 I'»: 1.11) 97 01 OD 1)(1 96 01 Et) 0\3 IB 1)1)

000",0, D2 01 OB 00 AI 01 OD 00 ~A 01 O~_ 00 ~, 01 01" 00 1.11,111111.1: '?5 01 11) .)(1 ';13 01 10 1)1) 9:3 01 E4 OB lOOt) CE 1)1 000180: 01:: 00 91:' 01 OF 00 98 01 11 00 94 01 12 00 91 01 1.l1I0.tl9u; 13 0') 91) IJl 14 IJI) SF 01 E:3 013 20 C)O CA 01 It) 1)1)­

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199

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13SS 71; '85 ~OV A.H mc 540 'DAiA m O£I?ZCH :nc A 1:70 nnD A I:D3 ~AuO; A EOO! (~ilDq A EOl3 j(;;~tT A OEIt!. LABlEl A 1 !3C L~~i.:::

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t~9C DSMl 'B7 iN PO~T;'I £030 5'1 ~;o<nATA EDU OE030H t!O~C3 A 00S3 I':cm::c A 0063 1I0Dr;i A OOAl . ~IS!lI\T A E03Q HI'!ATA A E02C flEj,'!( A 1:':73 c~:;!~,

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'wo 0000 11'3' III'XII 311'1'1/.1 0004 :t[30 IIQh60343 .... 1>383 (11')(l1li 0363 OOOC .'0 O'XI( 0343 0010 03~3 (1012 3E1IO 00'4 0343 (1016 3£16 0018 1r.J63 oolA 3E~ 0011: UU3

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ttOOlLE PAQE

LI .. IOl.RCI 8TAT£HEHT

I • , . , THE DJAH FIll CONTAINS A PRQ(lflAlft! WHICH PRODLICIS A IHREE PHASE ·P. W." NAVEl'otm USING THE IJPTlttJtt SWIClHINO STNATEDV IN URDER

• • • • • , . • •

TO REDUCE ne OfWEA OF THI HMHONICS ...... ----_ .... -....... _ .. _ ............................ . ............ _ ..... __ ............. __ ........................... . THE FOLLOWING It THE 'INnlAl.ISATlllN SEotENT ,. 'IC PAOORAI't'tE

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34 ""'I A.OF6H 35 OUT ItwlAlI 34 HIli A. OEH 31 OUT ItW21110 3e I THIS PROORAttS THI 82'9 INTEARlPT CONTAfJU.EA'S IAQ, IAI,IA2, IAl AS 39, rOOl TRlooERED INTERRU>'9. Fu...LV NESTEtt 4(t ,._.-............. _ .............................................................. .. 41 HIlI A. OF"," 42 0Ul C21 43 HYI A, ;,m'l 44 0IJ1' t21 45 STARI: HYJ A. OFFH 4& OUT C(IC 41 OOT I;CC: 48 OUT CIC 4., OUT CIC ~ HIli A,IOH ~I OUT PORTA 02 IAA A ~3 WT PORTA ••

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INPUT THe: .TATII Of'" THE ST""T SWITCH

'S IT 0N1 NO. 00 TO OFII' • INPUI AGAIN INITlALLV N.t. THIS 19 THE "INIt .... " N YOU CAN LOAD INTO TI~

85 FINISH: SHLD!(VOLT INITlALLV k-o " LU H. SI2H I 'AS( ADtlRf:SS OF LOOk LP ,,,lit. .. ", THE ~BOIII! LOOkS AT THE 9T""T SNITCH FIRST. Ill' IT IS ON. THEN IT ae .1Nf't..lTS THE FREQENCV ANO TNl LEVEL OF" VOLTAOI: REWIRED 119 , ...................................... _ ..... _ ..................... _ •••

'0 &'K.D STAUNI 'I St-LD STADR2 .,,2 SK.D "A'R.t 93 110'" A." 94 OUT COADDR: "" INX H 96 t1(IV A." ." 001 COADDA • ITOotCAORII ~9 ,THIS CN..ClILATES THE STARTlND ADL1RESS Of'" DATA TO Ill. LOAIlED IN'" TJ"EAO 9'P • f-RtII't LOIJKUP TABlE CORRESPONOIHf) TO TNl MQlJIRED YI1.TAOIE LEVEL K

100 • AHtI LOAI1S 11 INTO THE AI/O"'E 8PESIFIEO TI"EN 1(11 , ................................................... _ ••••••• _ ............. . 102 l'1li1 A.OIH 1('" OUT PORTA. W4 1 THI' PUT~ PHAgE A OUTPUT TO (IIH AND STOftES THIS STATE IN OA'" OUTPUT I O~ 1 f"HAb'E A ootJTPA 11)6 I AIIOIH 11)', ......................................................................... . 10. H"

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1515-11 908O1~ ftACfIO NSDIlIl.£R. Y4.0 ItDIllU ....

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'2' LXI H.IIADM

'22 IIY' ",OlN • JI-oIM l2J . , 124 WAIT, .LT 12S ..... ... IT 126 ,- -_.--......................... . 127 I THIS 18 THE lNT£mtlIPT SU9ftOUTIN! SOFTWARE OF THE Ut"THUSED PY1 128 ,WAVEf'<Rt GENERATION 129 , ...... - ......... _ ... _-••••••••••••••• _-.--................ ,

'30. 131 INTA. PUSH PSW 132 f'U!IH H 133 PUSH D 134 PUSH" I" THIS PUSlES THE FLAG ANO THE REGISTER S3~ f PAIRS INTU THE STACK 137 ,.--_ •••••• _ •••• __ .. _ •••••• ___ • __ .............. _.,

'38 • '39 , .. ,., "2 ,., , .. ,., 146 I

147 I 148 ,

L .. .... ..... IIADDA ,

• "'-'I 0. DOH f'IOV E. A

ClET YAt.. .. OF I1 INTO NXUttJLATOft

fIlE I CONTAINS 2. I1 LH...O STADRI I STARTlNO AOOM:SS OF REWIRED SUI.I:TA9LE IN HI. DA. •

ne AIOVE CALCtJl.ATE.' THE ADDMSS OF TIE DATA TO lE LUADEO THE TlI1ER1I. THIS IS STORED IN HI.

INTO

149 , 'AD'U.STADRI .2.IU I~ , .. _ ................ _ ................................... - ...... . 151 HOV A." 152 WT COADDR I otT DATA' LOAD IT INTO TIMER 0 1:11 INX N 1'4 I10V AI.K 1:1' ooT COADDA , ... 1~7 , THtS GETS DATA F",," SUlITAElLE FOft PHASE A • LOADS IT INTO TItteR U 19 ,_ .............. _ ..................................................... , I" IN f'()RTA 160 RM IoU ate 162 kM. 161 OOT PURTA 10/04 , THI9 I.)ET9 THE PREVII'JU':I VALUE OOTPllTEO .INIJf;RT":I IT ',tJIIJTPlJl9 THE

1515-11 8080/8085 ~O fIISS£H9LEH. "4.0 11OtU.£ PAUl < 4

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(1108 210AE0 0101 :UOI (11(10 3A(I8£0

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(1118 F5 0119 E5 (IliA 0:1 0119 t;5

<'IIC 3A(EEO OIIF A7 "120 Ii'

~ STATEI1ENl

16:1 11NIIERTEp YAl.~ 166 , .................................... --_ .................... _ ••• , le.' SENS, LUA UAOOR 168 sut (1(,"

1e.9 "" LooP , 170 WI (ISH

171 "" ""-lUST IS 11*81 VES ...... TO Ao.A.IS f

In. LA81.EW, LOA .JAODR 173 ttOY E.A 174 LOA IIAOOR 17' ADD E 17. STA IIAODR 177 , 178 ,THIS ,liDOS 11 .,J THIS It so IN ORDER TO tcNO&<I THE DtRECTlQN IN WHICH .79 , WE OUDHT TO 00 THROUOH THE TAIlLE TO OET THE REWIHED DATA 190, IIlI , U·II+J 182 , .................................................................... -., 183 RtSTOA, POP I Ht4 PUP 0 195 PUP H

• IS. POP PSW IS7 HIli A.:tOW IEIS lJIJT OCW'lAO 189 11 1'\10 RET 1"1 LOOPl LDA PIA~ .'2 SUI (H)H

193 "" 00BACtC 11'4 XRA A 195 'STA, PIADDR 11'. '"" RESTOft 11'7 ,THII alT. THE YALUE OF PI" ., IT I1 NOT ZERO IT PUTS IT TO lERO , ... 11'1' I IS pt.O?-ooNO. THUII 1'1·0 200 , ........... --............ ---.------............ . 201 OOSACK: LXI H.PIAOOR 202 ""'I ".OIM 293 AJU9T LPA JAODR 204 CHA .... , ... • 20. STA .. .... 207 ..... \.ABLEW 200 • 20'1 11"100(17---"£9. THEN PUT 0., • pl.l. INVERT THE YM..UE OF ..... 00 TO LAILE :t 1 0 ..... - ................ _ •• _._ ........................................ . 21' INT8, PUSH psw 212 PUSH" ::lt3 POSH 0 214 PIhH" 2" I THIS PIJSHE':I REUISTER PAIRS" F\.M INTO THE 'TACk AREA 21 e. I ••••••••••••••••• - ...................................................... .

211 \.DA 12ADDR 218 ANA A 219 RAL

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012871 0119 D341 01282:1 "IX 7E. 01200341

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(1131 3A(ltEO 0139 0600 (1130 CA:5BOl 0140 \l~ot (1"'2 CA6FOI 0145 3AI3E:0 "148 :If 0149 aAOUO Ul4C 83 0140 :rlOltO

0150 Cl tlI51 Ot 0"2 El 11153'1 OJ54 fa (115$ 31:2 .... 0157 ErJCO "I!U' F. O'!IA 1."9 (11'. 3A15£0 Ol~ 0600 ,'160 CAIoAOI Olfl.:I "., UI64 3215£0 01.7 Casool

LINE

220 .wl D. DOH 221 I10Y IE.A 222 1. ... 0 eTALlR~ 221 DAb 0 224 ,lHII CALI.u....A1ES lHIE ADDRESS 0= PHASE • bATA TO 11£ LOADED INTO T II1ER 22'S ,THE RtSUl..l IS IN ... 226 , fAOfl2·S1ADfl2+2_121 227 ,-_ ..... - .... - •• __ • __ •• __ ............................... .

228 ..uv A." 22f OUT CIADDR 2~ 1Nl H 231 I10Y A." 232 OUT CIADbR 233 I THIS OETS OATA OF PHASE • FROtt SlJ8TAIIlE • LOADS IT INTO TlI1IERI 234 1-.----........ --..... ---.··---·····················. 2" IN I'tIRTA 236 RAR 237 FlNI 2:H1 CH(: 21'1 FlAI... 240 ~AI. 241 (JUT POftTA 242 .011 PRtVIOUI STATt OF OUTPUT. INYERTS 11 • OUTPUT THE INllEflTED STATE 243 ....................................................................... , 244 IlENSI, LDA 12ADDFI 245 . "VI OOH 246 ... 1 LOOf'l 247 SUI OeH 248 ... 1 A.AIST I 249 LAIIILII, LOA kAOIlR 2:50 I'tOY lE. A 251 I.OA 12AL"l0It "2 flOO I: 253 8 U. I2ADIIM' 2'4 I THII AUDS 12 • te IN ORDEM TO DIRECT THE DATA ADDAlESSrNO 2!15 I 112-12+10 "' ,._-_ ....... __ ........ -.. _ ........................... , 257 "'8TItI, POP 8 258 p()fI D 2"9 f>OP If 2-"0 p()fI PSW 2H DJ 262 ""I A.2OH 2f1.3 OUT OCY2AD 264 !El 265 FIlET 266 LOOPI, LDA I"2AODR U7 SUI 00tt 268 ... 1 00IIAk1 269 IAA A 210 STA P2AODfI 271 .)IIfI> Rli:SlItJ 272 ,OI.T WlLUI 0= P2. IF NOT lERG PUT 11 ZERO. 273 , 18 PZ"O?---NU. THUS P2-o 274 , •••••••••••••••• __ ..................... --................. • .. ·········1

1511>-11 8080/8085 ftACRO ASSEt19LER. V4.0 ......... .... • lOC 08..J

01'" 2IJ:IoEO 11160 36<11 016F 3lA13E0 ul72 2F 0113 3C 11174 3213£0 0177 C~4S01

('11A f"~ 017' ($ (.t1( M 0170 C:5 "I7E 3Al'lllV olln A7 ~1182 17 0193 Ie-OO 11185 !5F 0186 2AI7EO "'89 19

OleA 7E (1188 0342 0191.1 23 (IUI~ 71t OIW 0342 (.,,, OtMO

oln IF (11'" I" 0"5 IF ('1'116 :.: 0'" 17 011'81 17 0199 17 019A 03A(t

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01114 Cl 0118' 01

UN< SOURt;E SlATEtEN1

275 008AIC1, lXl 276 ""I 277 AJUSTI, lDA 278 CM

H."2AbOR ".OIM teAl/Ok

279 IHR A 280 STA KAODR 281 ...,..,. I.A9LEI 282 .P2oo(1?----YES.1HEN P2.1. IHY£Al THE. STATE fJ/P k t .• IF 1e.I.k WII.L (lE (I

• 283 ,-_ .......... __ •••• _ •• _ •• _ ............................ __ ••••••• 284 INTC: f'IJStf .. sw 285 PUSH H 296 PUSH 0 Z87 PUSH '" 2~8 LOA 13ADtlR 289 ANA A 29(1 RAt. 2" 11\11 O. DOH 2'12 I'tOV lE. A 2'3 LHLD 8TADfI;1 2'114 DAD 0 29~ ,CAlCUlATE nE "OOR£SI t:# PHAS! c: DATA TO 8! I.OADED INTO 1I11E"2 2!16 , CADft3s"TAl1R3+2.13) 2"97 , .................................................. _ .......................... 1 Z\oI8 t«)\I A.H 2'11' OUT C2ADDR 300 INX H \fQ1 twH A." 302 OUT C2AI.JOR 3(13 IN PORTA 304 RAR 305 RM 306 kM 307 CHe :roe MAl. ... . ... :1ll0 MAl. 311 OUT PORTA ~I:t ,LOAD TlHEFl3 WITH PHASE. C OATA. OET PftEVIOUS STATE Of PHIWI. C OUTPUT 313 ,1NVERT If ~TPUT THIE INVERTED STATE :t14 , .......... __ ...................................... _ ............... _._ •• _. 315 BENS2, lDA I3AOIJR 316 SUI OOH 317 "'Z UJOf>2 318 SUI 08H 319 ... 1 A.AI8T2 320 LAEII..l2, LDA LAOOR 321 MOll E.A 322 LOA .3AOOR 3:t3 ADD E 324 STA I3AODFI 32'S .ADU 13' L IN ORDEIt TO DETE","INE THE DIRECTION fJ/P DATA ADDRtSSINO 32f1. I C 13·t3.U :n? , •••••• _._ ..... _ .................................................. -_ ••• :1'l8 RESTR2, f>OP • 321' p()fI D

N o '"

1118--11 808O/BODS Mam ASSErtR...ELIt. "'4.0

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(11(:0 2111"10 OHIO 3601 ('102 3AlDE.(I OIOS 21" ('106 3C 0101 3210£0 (llOA C3A'jI!)'

6100 " 011.11 1"5 ('lOF ., 0110 OS 011E1 ~

(tU!2 3A2AE0 011E5 ac (lIE" 32211£0 011E9 <IF tllEA D6.03 on:c CASC02 lllEF 79 0""01)602 C'IF2 CA2£(l2 0lF5211004EO ('IFe 2217EO

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SQUAt:! STATVtENT

O'JO ..... 331 POP 331: MYI 333 OUT 334 El 3~ MT 3:M> LOOPZ: LDA P3AODH 331 SUt (IOH 338 oil 008All:lI: 339 )lNA" 340 8T" P3AlItIft 341 .... RESTRZ 342 f 0£1' VALOE UI" P3. 11" NOT ZERO PU' 1 T TO ZERO :t,,:t • la P3-<J1---NO. THUY P3.t) 34" • _ ........ -.-._ ... - ••••••••••••• - ................... . 34' 008111(2, LXI H. P:MOOR 346 """I ".OIH 3U UlS12, LOA LRUOR :I.. CM 349 INIt A

~ "" LAOPIt :~ 'P3-O?-~VE" L~~2 P3-I. INVERT THE STATI!: OF L • 00 TO LA8l.E2 as3 • ----........... - •••••••••••••• -.-•• - ••• --............ . 354 INTDI PUSH P9W 3:1' PUSH PSW 3~ f'USH H 357 I'1J$;H U

:: .THlt ....= T .. I

FLAG AND ALL THE RlOISTERS INTO THE STACIC AREA 360 .-............ -.---.------.-•••••••••••••••• 361 LOA OAODR

362 .NIt" 363 STA PADDA 3:64 ftOV C. A 36' SUI 03H 3U> oil L'1<I" 367 f10Y A.C 361 SUI 02H 3"'. .It ,.HASH 310 Uf,.O STAORI 371 Stt..O STADR3 :172 :173 '14 ." 376 317 • n on ... .. I

:." ... : ...

I«J\I OUT I"' ..., OUT IN ORI OUT .. " STA

••• n .... • ••• C2ADDR ..... T. .,. PPltTA A.OIH 1:~llloR

I "'~.I

• It o-o3H? YEs. TKI8 00 AND CHECk T." INPUTIt

18 D-O:.l:H? VES. THEN UO AND DEAt. WITH • PHII~,£ NO. o-oU4. OIT START UfO ADDRESS OF' PHAES A WHICH IS THE STARTING AUL1NESS [IV PHASE I: lAND STOR£ UT IN STARTING ADDRESS PHRSEC I •• 8A1)I(C

LDC 09.1

(I2('D 321 DE(.I 0210 321FEO C'2133E('t2 D2'5 3221'£0 fr2IIJ 3232E(.I 02192A2EEO 1121E 7U 0211" 0360 11221 7e 0222 D'J60 (t2".l4 Cl 022501 ('2:l6 El 0221 Ft (I2:lIJ 3£20 022" DleO 112:tC FB (lUD C9

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APPENDIX IV

CIRCUIT DETAILS OF HARDWARE FOR REGULAR SAMPLED SWITCHING STRATEGY

To construct the hardware for implementing the regular PWM strategy. the iSBC 80/24th single board computer has been used. The hardware block diagram shown in Figure 3.1 has been effected by adjusting some links on the microcomputer board. Details concerning the links can be found in reference 41. The detailed circuit diagram of the microcomputer board is shown in Figure A4.1.

The board contains 32 kilobytes of EPROM memory and up to 8 kilobytes of RAM memory. The address ranges for. these memory areas are 0000 to OFFFH for the EPROM area and 2000H to 3FFFH for the RAM area •

. The I/O device addresses used for the peripheral device registers are shown below:

I/O Port Address in Hexadecimal

OE4H OE5H OE6H OE7H

ODCH ODDH ODEH ODFH

.

I/O Device Regist~rs

------------1

8255 PP I Port A 8255 PPI Port B 8255 PPI Port C 8255 Control

8253 PIT Counter 0 8253 PIT Counter 1 8253 PIT Counter 2 8253 PIT Control

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215

APPENDIX V

OPERATOR'S INTERFACE CIRCUIT DESCRIPTION

The signal generator module of the operator.'s interface of Figure

4.19 contai ns the cl rcuitry shown in Fi gure A5.1, where the 55S timer is used as an astable oscillator producing a pulse train TA, the frequency of which is selected as high as (40 Hz)or low (10 Hz) by means of the fast/slow switch. The pulse train TA appears at the output of logic gate AND 1 when push button switch INC is depressed. A lternati vely, when push button switch DECis depressed, pul se train TA becomes steered to appear at the output of logic gate AND 2. When neither of the push buttons is depressed, the AND gates become disabled and no pulses appear at their outputs. The pulse trains at the output of the AND gates are called FPT (forward pulse train), and RPT (reverse pulse train), and their comp1ementaries FPT and RPT are obta ined via the Schm idt-tri gger inverter gates, before these pul se trains are fed into the display module of the interface. Pulses from FPT and RPT are also counted by the microprocessor, as described in Section 4.S, to· determine the frequency demand input number N.

The display module, whose circuit diagram is given in Figure AS.2, uses the counter/display driver IC 7217, which contains an up/down counter and display drive circuits for controlling a 4-digit 7-segment LED display. From pulse trains FPT and RPT and their comp1ementaries, coming from the signal generator module in Figure AS.l, a number of logic signals are derived to control the pins of

the counter IC chip. The up/down signal, U/D, indicates to the counter chip whether it should count up or down the GPT pulses at this count input. The GPT pulses are inhibited by the gating signal G, which becomes asserted when the count reaches a maximum value fixed by the jumper 1 inks between D1 to 04 and MSB to LSB outputs of the chip. The operator's interface ci rcuitry of Figures AS.1 and AS.2 provide a convenient means for the operator to set the frequency demand input number as follows.

216

The number displayed on the LED display keeps increasing as long as . switch INC is depressed. When the display number reaches the fixed maximum value, the display becomes frozen at. this value· even though the operator might still be depressing switch INC. If the operator then pushes down the push button switch DEC, the number displayed starts decreasing towards zero. When it reaches the zero value while switch DEC is still being depressed, the displayed number starts increasing in magnitude but the LED indicating the sign of the displayed value becomes lit to indicate that a negative number is displayed. Depressing switch DEC continuously causes the display to be frozen at a negative ~aiimum value. Switch iNC may then be depressed to increase the negative number displayed towards zero (reducing in magnitude).

217

NAND 1

~IC

A

~~~~~~;-~~Q~--~ ~~. rL--~

~NP B

~~~~-+C[)-~Q~--~ QEBOUNCER CIRCUIT

( DB )

+"cc..

.. t

.. O,\dt6 e

J[/~~~~~---------J ~ ~/IIlJ ':: ~""O'

r ...

Fig_AS-1 Signal generator module circuitry

- )

FfT

7. c/.c4s 0' V1.'54 tu .. ,. • .s

I

kura ~"r - (0.) f"'iJ Dl II

L3;:::-l)\ Il!' 1i

1

~"M' .1>3 2.' D ~

t· 1 I"ro.., 1-, cl(

. " T •• ,.,a." 1It .... d ""~~/. I "'--.!.

L _ ,,\12" ti.t tI<--E 'fufrn --=-~,--/tl'r 1 rt:l . 04£ t3

. O;tY·mr· e_

le 9 lJ}JIML' 10.1 1C10 . l.

'-\'" L......!O.3 1I."r..,. .- 11,/0 , /. e .. ",. It 4'~ , ~L r- .",,, .....

1 ...

~ • l' 'I' 11., , ., , '. rc B , f ,

• c '-I/D L.~,

.

" .& , 0 ~ ~ to.

} ~-1. ~

F/i Rlf ~ .J ~~ ~ T ..... ,ll.y ...... reI ~; .')11 ',I' ~I

"PT "7-3 l 8.t. •

~~~,. r--1 .... u l tr-' 0. tol, .

1"'\( " L,q. ~v. 2. ~-" .- ~~ r / .. ,.' JI.'r Rf , I> Lo ,. If IIcur

(;NO

, \

, . " sn;u I)

'1-::1. 1.'J... + s... P.. s ... " .

PT rp m . , -, I c .. ....,.

\ IN~f}r ~

I rOt 6-.-: ' I

, Fi9-:AS-2 Circuit diagram of display module,IT

219

APPENDIX VI

DETERMINATION OF THE INDUCTION MOTOR EQUIVALENT CIRCUIT PARAMETERS AND STATOR CURRENT CALCULATION

A6.1 DETERMINATION OF INDUCTION MOTOR EQUIVALENT CIRCUIT PARAMETERS

From the open-circuit equivalent circuit of the ,induction motor shown in Figure A6-1. and from the results of this test tabulated in Table 6.1. the value of magnetising inductance 1s found.

The expression of the power 1s given by

(A'6.1 )

The power factor cos ~ can thus be obtai ned . from equati on A6.1 and is

cos9 Po 8.625 = "773"-"x'-'VrT"o-=""x -'1'--0 = ,13 x 240 x O. 275 = 0.07545

and sin<P = ,t] - {0.07545)2 = 0.99715

The open-circuit current measured can be divided into two components. one flowing through the magnetising resistance Ro and the other through the magnetising reactance Xo as

10 = In + Ix = 10 cos</>-j. 10 sin</> (A6.2)

The current flowing through the magnetising resistance can be found

220

as

amd the current flowing through the magnetising reactance as

I = x v 100 V 0- 0

X 1900 = Xo 0-

~900 •

Substituting for currents In and Ix in equatior A6.2 yields

giving

. and

V V o . 0 10 = ~ - J X- = 10 cos~ - j 10 sin~

o 0

V / = 10 sin~ o

The values of the magnetising resistance and inductance can

calculated from equations A6.3 and A6A respectively and are

R = Vo = 240/13 6678 188 o 10 COS$ 0.275 x 0.07545 = • " "

and

V

(A6.3)

(A6.4)

thus be

L - 0 m - 2lTf 10 sin~

_ 240/13 - 2 xrrx 50 x 0.215 x 0.99715 = 1.608H

From the rotor-lock equivalent circuit shown in Figure A6-2 and from

the rotor-lock test results shown in Table 6.1. the values of

resistance Rt and reactance Xt can be calculated. The power factor

221

cos<P for this case is,

cos <P = 73 Ps/c 7.25 031 Is/cVs/c = 13 x 0.270 x 50 = •

and consequently,

sin<P = 11 - (0.31 )2 = 0.95

The short-circuit current I s/c measured can be divided into two components and is,

Is/ c = Isl c cos<P - j Is/ c sin<P

= 0.0837 - j 0.2565

From Figure A6.2, the 'short-circuited magnetising current I~ can be evaluated as,

Vs/c 100 X IsOo = 0.05743 m --

and

12 = Is/c - I~ = 0.0837 - jO.2565 + jO.05743

12 = 0.21588 1-67.1880

Theshort-cfrcuit rotor impedance is evaluated from the roto-rlock ' equivalent circuit and is

222

50/13 0 = 0.21588 \67.188

= 51.84 + j 123.26

The stator and rotor resistance

and the stator and rotor inductances

A6.2 STATOR CURRENT CALCULATION

With reference to the standard equivalent circuit of the induction motor shown in Figure A6.3, the nth harmonic voltage magnitude at the

motor terminals is

v(n) = H(n) Vdc \tan-1 %ffit

where H(n) is the nth harmonic magnitude givenbyequation 6.1 and calculated by the harmonic spectra simulation program, as described. in Section 6.2.2, a(n) and b(n) are the components of the Fourier

series and Vdc the DC voltage level of the input signal.

The nth harmonic line current I(n) is,

I(n) = Io(n) + 12(n) (A6.5)

where 10(n) and 12(n), the nth harmonic magnetising and rotor currents respectively are

223

and

The values of the nth harmonic angles $m(n) and $2(n) are,

$ (n) = tan-lbtn ) - 2!. m arnr 2

and

where b(n) and a(n) are the components of the Fourier series calculated in Section 6.2.2 and RT and XT the induction equivalent resi stance and reactance shown in Figure A6.3.

The harmonic slip S(n) is defined as,

the + or - signs in the sl ip expression represent the direction of the flux rotations.

Substitution of I~(n) and 12(n) into equation A6.S yields,

I(n) = H(n) Vdc

(X 2+R 2); T T

=H(n) Sin$m(n) sin$2(n)

+ j [2 [ + -_-'O-,-t1} nn m (XT2+RT2) 2

If

real (n) = H(n)

and

224

imag{n) = H{n) Vdc sin<pm(n)

[211n Lm

~(n) = tan-1 (imag(n» rea:TfiiT

then the general expression describing the nth order harmonic current is

225

I • ,..0

Vc 1 Rc ......... ,--'-'~ X~ I

Fig-A6-1 Open-circuit equivalent circuit of induction motor

I

, .

Fig.A6-2 Rotor-lock equivalent circuit of induction motor

I,CI\) Xt

V,Cn)

Xt=27r fn( Lt lJ.}

Xm27rfnlm

Rt= R, + . R( S~n)

Fig-A6-3 Standard equivalent circuit of induction motor

c c c c

c

c c C

'­C

.:fm ... laUC,lr,.fortr::rm 04/24/86 16(1:?1 bst lhu

,JtM.nshm AC::5QO) ,g( 10) ,xC 1000) ,1)( 1000) ,r-mC 16, 1'~"') ,8(:100) ,CC 1), * U",(2000), yb(2000),sl.lma(ZOOO),.UfUb(2000),

* .' • * •

*

!Jab ( I ~OO), X.,Il ( 1500), xbl 151)0) j x~b{ t ~::c)O) , a-" ( 1 ':SOO) , bb ( t 500) , hm t ZOOO) ,vv(2000) ,\\'\0,1(2.000' ,result (200), dip( 200',

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r ... l (200) , XiM:a,~ (200) , )Cm( 2.00) ,)W',.,o:tt 2( 200) ,'1 ei2 (?OO) int~Sler p,q,I"', •• , t.t, u"" v, w,z, S ,lit, t. ,n, oo,nn, f fo, flf ,.ncl, fl asl d"'-IblE' l~r""ei .1","1 u,' ,pl~,rl ,r2,x1,x2,xLm, si ipi ,voltp"'d.l<, xm,a) I ,count., l'con.t ,XE'm

.:.p.n (u'''Ilt-S, ,t le-' rad1'!', form'" form~t.t.~d')

op""n (unit-fl, fil.-'APWM', fo,"m-'form:atted') "p.n (ul",it-10, rt 1~.' BPI,)W, form"" form-lt.t.F?d') op.n (unit"ll, fil",-'VABPWM', form-'f<"Jrm:a,tted')

opeon(ul'li t .... 33, '11 o!I'-' LHOP' 1 7' , form""" form .... l l!(!!od' ) op~n(unlt-34,file""r~d29' ,form.'form~tted') open(ul' .. t t-3~, li '''''~, LHOP29' , fort,.",' f'orM-'\t. t.ed' ) open(un! t-38. f·11e-' op<":l.lrr' , form"" fO'''mltltted' ) ******·It>> II-***.*·lt :t******lt Mo •• ** •• "''' ••• _». Mo,:~* •• *".·lt,. ... *,.*It.)I-* CHANGE "·kE:'QUENCV AND PULSE NUM8~,k AS WEl.L AS * * FUU~ SCAL~ OF. HA~MI)NIC AX1~3 HI:-:R€ " * .... -Itff'*******ff*** •• *":'*******.'*******ff*.·.***** .. ·*****"'.JI**** '-49,0

p .... Z9 ' ... 2~OI),O

*****« *******« -( *******ff·*******. ******« ****** •.• *******«. ** nn-U'l/f') ff'f"4*p .nd-C4l1-p)+1 oo"'(:"~*nn)+l

pt eo-3.14 Q"'Cp+3)/2

I"'-q+l sfoL.(Z*p)+l suma(l)-O.O suml,.( 1 )-0.0 tt"'pcH uuc..fJ+q v_2*,\s ""-(4",,.)-1 % •• ,,+1

do !OO k-12b,1,-1 do 1 J":l,Cl ****ff. ******"'ff ff ******* ****** .. *******« -M.******""._._**'" * THE t='OLLQWING READ S"ffrrEMEN-r HAY VAHY ACCORIHNG * * TO THE NUMBER OF PULSES PER CYCLE. J F P=l7. lH·EN • * READ t="AOI'1 t='IU~ 8,-IF P-=~9 REAl) t=ROM FlU;': 34 * ***** .,.******* *******« .,*******.'******fI fI *****fI·J/·.·******

read(34.~"50' t"h'lej ,k) --- - ...,

200

400

300

101

102

103

104 105

lOb

107

'-----,:6I ... t,'tftU/!o - ... -

COf"ltinv9 t<-( 17.8*{) 150

At 1 )IC.O,O 8(1)=(),O

do ZOO j"'Z,q A( j )=rmej ,14)/(~,O*pl~'''f)

cont.! nu8' do 400 j=r, ss 11 (j.gt.q) 1"(2*q)-j i' Cj,~t,tt) l~j-p if (j.~t,uu) l-C6s+Z)-j

-ACj)"ACj-l) + ef-l(\)-AC1·l» contln .. 'f!' do 300 ' .... l,v

.-(-"«·*1 Lf Cs,n'Jo,t) l' (f.I.f:oq,l) :onCl). ACj)

ju(O.5*1)+O.' j ... O,~*l

yaCi) .... J*({-l''''*(l+j+i») wrtte(9,10) x~(t),y~(t)

continuEI' '-2

j"2 u=1.0/(3.0*')

if (A(j).g~.u) ~oto 102 j-j+l g"to 101 ... =j BCt ).u-r\( j-1) t ... l +:1. BC.).BC.-I)+CACJ-I)-ACJ-2)) J-J-I 1f' (j,eq.2) 90tO 104 90,)to 1tX-S C(l) ... ~(f)

i-i +1 IH1)=C(1)+A(j) J-J +I If (j.~q,%) goto 106 90.)to lO:i 1 =2*1 do 10·, j"'l,l

s2.(-l)«*j tf (9.n'1'.1) i=«).5*j)+0.'S If (s.(~q,l) t&.O.5:*j xbej)"'fHl)

yb(j)=«-l)**(~+i+j)}

..... rH"" (\C;',tO) xbCj), yb(j) cont inlJ~

Vl 3 c ~

p ..... 0 ::J

-0 -, 0

ID -, p 3

0 -0 ..... '" 3 '" "" p -VI ..... -, p ..... ID ID '< -

108

109

110

10 20 30 2000 III

2 c c c

c .

4

t-I .,-1 J-I if (xb(t)t~@.xa(n» soto 109 )(~b( j )"'xbU) yabej).yaCn)-ybCt) writ_ Cll,10) x~bCJ)t y~bCJ) \-\+1 J-J>I it <J.*q,w) Sloto 111

Cloto 108 it (xttU),eoq.xaCn)' thlPn

xabC.J )·x:aCn) V:;.bej >·ya(n'-ybCt)

tSlt.+t

\Jot t.· xabej'-xaCn) VAb(j) "').(n)-I,)I)(\)

endl'

9C)to 110

writ.a> (11,10) xabCj', yabCj) n'"'n+l j-J+I it (j.eq.wJ gote 111 ~to lO:i 'orm~t(5x,2@lZ.4)

·"Ol"'"..t. ('';x t i t2) f'orl'lli'ltC'x,.1?,4)

format C~xI2~12.1) do 2: 1-2,end

x(i)-xab(2.0*1-1)·(2tO*pl~*') yti )·.yabC2*i ·1)

cont lr,ue • ***«******«*****.*«***************.*****.*«*******.* • MOrOR SP~Clt='ICATION$ TO et:: COMPLETt£1) HF.RF.: * *** .' •• ____ *..: ... ******« .*.*****fI •••• *.":-'1 *****.* .*.****.« vol tp"",\l.-c-60.0 rl·2~j.9Z rZ ...... l xl-2.0*pi.*O, 196*f' x2-2,O»pie*'»O.196 ~.M~2,O*pte«f*1.608 .ltpluC),2

***'. '11.******« '11 ******-IC *******.********« *******-11.*******«-* .-1 r •• ",I1t.(1)-O.o tla~1·"2

do 3 t"'l,nn do 4 j-2,'" vv(j '-Cy( j )-yCj+ 1) ).co.( i*~Cj) "um:,( j )"SUh'h'!;( j -i) +vve j) wwej,·cv e j)-yCj+l»*5tnCt*xCj» .urnl) C J ) .. sumb ( j -1 ) +\\1\<) (j )

continue ~~(i)-(-1.0/(pt@«t)*C{v(~nd'-y(2))+SUM.(fff))

bbC 1 )-c -1.01 Cpie .. t , )*.ulYlb (t,t> "mU ,-( 4. S*sqrt (:RaU )**2+bbU '*«;0)1 (2. O«sqrt (2.0»)

f'l ... U '--,HAN2Cbh( t ) ,a.ae 1" if'(i •• q.f'la~1' g('}toZ2 l'U,lP.q.l' t.h"n .UpCU .... lip1

22 '

.23

e1'toE!' slipCt)-1.0-«1.0-.1ipl)/t) •• ",\tif

writ9Cb,*' dil=,(1) 'iI·)to2:S

m"m+l '·""sl-C3.0·m)-1 .lipCi )0;:.1.0+( (I,O-.Up!)/I)

r~4(1)-rl~Cr2/.1ip(i)'

xeq(i ''''i*(xl+x2) xmC!)-=!II-XtlJoM

)(modz(:l)~sqt"'t(t"lP.q(i)**Z+x.q(i)*«2:)

,t ~r.( i )=A rt--lN2 C )Clltq ( l ) ,reoq( t » xmodi2(i)=Chm(i)«vo1tpe8~)/xmod2(i)

ti,,,i2C i ) ... f!,go(t )-f'iO;loZU) xmodiM(l'-(hmCt).voltpe&k)/xmCi) 't~im(t)=fle(t)-(pi./2,O)

r~al(i)=(XMOdI2(i)*cos('j.12(i»)+(xmodlm(i'*co~(fl~lm(i»

xl m~ClC l )aC xmodl2( 1 '*d 1",( fi et2 Cl», +(XIrI.,r.I'rflU, »dn( fioaoi rlllC i) » xm(')dl Ci ) ""'I'lqrt {t'E!'81 (i , * ... ·2+)(1 m:aEl ( 1 ) **2) H 1,,1 Cl );;IA rnN2 C xi mAge t ) , r"t.al ti ) )

.- """3-"------- - C(}tltinl..llP.'- - -- ... -. ~.,.

'S6

55

80

90

1100

.\101

c C C C 70 c

do ~.j j a 1 f 2000 ttmeCj)-C(1.0)/(f*2000.0»*j

do .JJ" 1-=2,1"11'"1 curt" (1 )-xmodi U -1'* (si n( (U -1 )*2 ,O*J.oi e*f'*Um ... C J')+fi et U -1) ) ,

rl!'!lyl t. (1 )-I"'EI'fuJl tU -1) +o.:'Jt"'r (t) c,.,)"t 1 nye

wrt te(:'~B,2000) time( j), rllt,l.r11. (nn) cl)"t1nYe

1-< .... 1 ,aO d~Cl0.0*(fs/f.)*f*k)/fs

do -05 1-1,0'.) . . if, (1.e-Cl.O) goto AO if ( •• eq.l) ~oto f~O if Cs.P.q.Z) goto 1100

iF (s, ... '-1,':S) Sloto \tOl x(1)-0.0

1)( t '-0,0 goto 70 x ( 1 )-C« 'sI fs )*f*k)-d

\JU ,-0.0 9"to 70 xCi)a(fs/'s)*'~k IlC i )=hl«( (l-k)/Z) goto PlO x(I)~«r~/f.)*'~k)+d y( i )-=0.0

.-0 k=l(+l

*~·-t:·II*"'·**""« .f:.******«. ***** .... «.******. t·* *if ***-M.-II: «****** * rH~ FOLLOl"(NG WR( rp- STATI::::M~NT MAY VARY. »

. * 1,..1f(ITE. TO fJLE 3; .. IF pal·' AND TO 35 IF P"'Z9 -M ***.» It*.·».* It »* **** 11- It .******.» * .• *** *.)1-.» .**_*.» ' •• ***

wri teC:~5, 10) xC i) ,yU) ***. »******. »******,. .'.**** It· .. >>·It*** .. >> ')104* It.** ._**** ._,+1

t~ont in\.le stop ~nd

'" '" ....

c c C

c

10

20

30

sllnul atl onregul ar. fortrar. 04/24/86 1603,"

dlmo,tnllion t..p:a(SO). \.pb(SO). t.o .. C8(), tob(80), A«3(0), * 8(400), x.(400), xb(400), y&C400', !:,Ib(400), x:Rb(SOO), * 'J",bC 800) , '5UM'I «800) , s'-lmbC 8')0) , vvt 41 '0) , wwC 40Q) , aa (AOO) • * bb(BOO),hm(BOO),xeSOO),y(SOO)

d,,\lbI9 pr ..... cilion 'I, plof!', k, z, f~ Int.e!iler f, c, t, n, w, v, p,nr.,f"nd, 'ff ,00

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f-20 p"'75

,.-1:501) ,0 c·« *****'*****.***« tr·*****tr·.., *******,tr ok·****** lHI **** •• '. tr *****.

v-C2*p) "1 nn-(fs/f)

.• oo-e=5)1o ... n)+1"-­fff-4 ok p end-( .... pHl

wo::S*p pie-Jj,141:i9

opll"!'n (unit-1, 'il .... 'fiPWMR', form-'f(l,...rt,att'i'd') op.n (vnl\-2, '11. -'BPWMR' , 'orln-'formatte~')

op ... r. (unlt""3, '111P.,,'VADPWMfi', form"" formattlP.d') op.n (unit.a3b, file"" LHREGI8', form"" 'ormat.t,O!'r.I') open (unlt""~"'7, file""LHREG:'~O', form-'formatted"

k"'l ,01 (2. f):tp*') z"'pi e/( 2.0ilp) do la t-I,p

tpa( i )o::k+ (.021 (, .O*p' '*l'If n( (z*( 4. O*c+l. 0») tpb(l )ak+( .O:U(2.0*p) )*sinC (z-lI-(4.0If-Cf.l.0) )-(~,C)*pi ... )/,S,O)

cue: + 1 cor.t.1 nV9

to.(1)-e1,O/Cp*f»)-CCtp~(p)+tp~el))/2.0'

tol,( 1 )-( 1 ,O/Cp*") -( (tpbCp) +tpbC 1 ) )12.0) do 20 i-Z,p t.oa U )c( t ,01 (pt:f'» - (ctp .... U -1 )+t~la (1) )/2,0) \.,,1,(1 )-t 1,O/C'.P) )-( ctpb(1 -IHt.pb( i) )/2,0)

cor,tinu4!' "le l' -0.0 IH 1 )-0,0

_Jo 30 t ... ·I.,v ,.-(-1.0)··i If' (9.19',1,1,0) t.htli',l j"'1/Z UU) ... Ael-t,+to:'!I;(j) B(i ,-aCt"l )+t.obej)

• I'1"t j-i/2.0-0,:S A(I)eA(i~1)+tp3(j)

9u)·aCi-l)Hpb(j) "'Ild!,. .

cont.i nl..,@o l-Z*v

do 40 j a l, 1 .-C-l.0).·j if (".ne.l.0) l-CO.5*j)+O.5 if (9.o!!'('J.l.0) l=O,S*j

40

loa

109

110

JOO 111

:1

•

x:aej )-A(1) xb( j )uBH ) ya ( ,j ) 111- e"l • 0) ** ( 1 • 0+1 + j ) .

'::IbC"j'''''):at.{j) • wr:ltll!!' (1,100) xa(j), ya(j) writ.tt (2,100) xbCj). 'jbfj)

..:ont 1 rtlJ9

t-! 1'l.l:1 j !"I 1

if Cxb(t) ,98',x,,(n» !ilot.o 109 x~b( j )=xb( t.) yab<j)~ya(n)-yb(t)

..... rit.e (;'5,100) x..;tl)(j', 'J-,b(j) t-t+l j-J +I if (j.eq.w' ~oto 111 90to 11).'\ 1 f exbct' ... q,xa(n» then xab(j' "x:a(n) ~ab(j)-!Ja(n)-yb(t)

t u t+1 : -···'_·g'i:sto 110 .... _or' - "

writ. n-n+1 jap!

.1 !'!Ii' x:abCj )-xa(n)

,=,~bCj)"y~Cn)-yb(t)

.ndif eJ,100) xabCj), I)ab(j)

if Cj •• q.w) goto JU got.o l08

forMat (5x,2.J.2.4) do 2 i"'f!,end·

xC i )-xab(:?',O*i -1 ).·(2.0*pi",*f) yCt) 'yabC2M-\··1)

c ont i mlEo .10 3 i"-l,''lll

do 4 j-:Z,fff vv(j ,-Cy(j J-VCj+t) ).·0.:0.< t*xej») II'-Im:,( j )-=!iUnM( j -1) +vv e j' WW(j)aCyej)-V(j+f»)*slnCi*x(j» sum!' (J ) -=tlumb C j -1 ) +ww (J )

COfltinu9'

Vl

3 s=.. ~ o ::J

"C ., o la ., p 3 ., ro la C ~

P ., VI -f­., P ...... ro la '<

:<tit (1 )a( -1.01 C pi e*1 ) '*( Cye II!!'nd)-!J( 2) ) +suma( ffr» bb(1)1IIII C -1. I)/Cpl.*. ) ) •• '-Imb C ",.,

hrn(1 , .. (1 ,41 *sqrt e (:Ra (i ,,,HI2) + (bbCi )**2), ) I (2.0*.q~t (2.0 cOI'lt.inl.llit k"'l .:''''''.1

du.( (fs/f'&)*f*k)/f •

'" '" 00

80

90

1100

1101

c C C C 70 c

:5

· 229

do ·S i=l to':' if (s,eq,O) ~oto 80 if (s,eq,l) ~oto 90 i f (s , eq , Z ) ~ot rJ 11 00

i f (5, eq , ,S ) ~ot 0.:> 11 (I 1 x (i) =0, 0 y(i)=O,O

soto 70 x(\)=«'s/fs)*f*k)-~

y( i) =0,0 sot.::. 70

x(i )=( fs/'s )*fi:'k 'J(i )=1"0",( (i-k)/Z) soto 70 x(i )=( ("5/'s)*""'~)+d y(i )=0,0· ~=O

I~=I<+ 1

,

o!o('-K'-J:'******i:'~'******-K *'-N'**'If*-M'*~ -M·****-H·-K·*******iC'******'*' * THr~ FOLLO'')ENG WRI r;:;: STATEM:-::NT MAY VARY, * * ("Fn l'E 1'0 FI LE 36 IF P= l. 8 AND TO :"~7 IF P'-':SO * **.*.~ It-.******* :.*****.)t- *" *******.~.)to **'if-**'*)(o * lE-*****'}fo)t )1-**

IIIt'i t e (:"\7 • 1 (0) >d i ) • \,J ( i ) ***)t. *******)to ~;.****** It ***,..*** )(0.),.. ***** )t.,. :'*****'M-)(o ****

5=5+1 -.: ont i n'.Je stop ::?rld

c c c

c

8

3

£Ira'. for t. t"'an 04/24/86 1600.8 bst Thu

'rhl. pro~r"tfll plot.!I up to t5 •• t. of dat.a on the- ~~m. a.)(~!I

~r 1n different pa~9'

DIMEN810N X CZO(JO" Y(2000) ,AYe 15,2000) DIMENSION ITlTL~U'\O), NAI'II:£(20), LI~8X(20), LABY(2Q) CHARACTl::R*8 FINPUT

~RI NT 1 FORMAT(' 1 _ 85/,01 2 ... 14010 :s • C10!51N') I~I-::AD *,KP PRINT ~~ I-!"ORHATPn-tm. of input. '11,.,,') RF.AD *,FINPUT OPENCUNJT - 1, FILE'" FINPUT, fORM .. 'fORMATT~D') PlHNT 111

111 FORMAT('No. of' points t.("1 plotS" HEAD * ,NPS PRINT El f:t)RMAT. ' N,). 0 f <: Ut'VI!tS I' , READ *,NDS PIUNT 2

2 F-ORMAT('oP.nter J fol" drawing u!I:lrJg line !H!'smenta ohww151Po 0') R'::AD *, K~.C DO 20 1 al ,NPS RJ.::AO( 1 ,*)X (l), (AY(J,I ) ,.1 . .&\ ,NOS)

20 CONTI NUl::: IF (KP.EQ,1)CALL S:'5bOl IF (V,P,F.Q,2)CALL T4010 If' U<P.EQ,;5)CALL Cl0S1N CALL f.HRMAX (1000) Ir (KP,EQ,l)CALL UNITS(O,'l) CALL OI:::Vf'AP(ZIO.0,297 ,0,1) no lOO JJ ai I, ND!:;

2~ CONTI NtJE 1~lnNT 33.'5

333 FORMA1.'tmteo,·" 1 to plot thIS' next let, 0 to bypass it') A~An *,IOHW IFCIDHW,E:.Q,I' GO TO 30 J.' • ,JJ t 1 GO TO 2~

30 CONTlNl'E: PRINT Y

Y ~ORMA1('~nt.r 1 for n~w ~xi. , otherwi~e 0'» t~AD *, I :lAME IF( ISAM(: .• EQ,O) GO TO 17 PF(1NT 11

lJ FORMAT('eont.r X_:tI)(is l"o9ition,XOR,YOR, :cmd 1entlth') Hr-iAO *, XnRX, YOBX, XAXL PRINT 1~

12 FORMAT(tlP.nte-r XbIP.sf, Xeud, NO. of' lnt@t"v:al." Hr~AO .-, XlW-G, Xt::N)), NINrX PRINT 1:5

13 FORMAT('enter V_axl' p( •• ition, XOR, VOR, and loP.ngth') U~AD *, X1lRY, YOHV, YAXI. PRINT 14

.14 f.ORMAT('lP.nteo,· Ybeg, V..,.,.d, NO. of' inter'vals') Hj:.:AJ} *. Y!!I'EG, YI::':N)), NINrV

J!i CONTINUE:: --10 " .. ....,~l)rqTINUE-' -'-

6

c

c

"'

PRINT 5 F-='IJRMAT(, X-axi,. \ .... "-.11') READ 5~5,LABX P~INT 6 FORMAT ( , Y":a.xt's I ab@'ll' ) R~An SSS,LABY PRINT 7 ~OkMA1('enter position ~f t:ltl~" Hr~ftD *, X rL, V rl. PRINT 16 . FOkf'1ATC'enter title of plot, not more than 80 chil,"act""", A:f-iAD 5SS, t r t TU:: f=.·ORMAT ( 1 OOA 1 )

17 CONTI NUE l::>tUNT 4, ·1J

4 FORMAl (' ent.r r'~lne of graph no:' 12) BI£AO 5S~, NAM~ n040K-=l,NPH

40 YCK' - AV(.JJ,W)

IF(ISAM~.EQ,O) GO TO 50 l~nLL CHA~H Z C 2,5,?, ':5) CALL WJNIJOW(2) CnlJ .. AXIPI)BC1, XIJBX, YORX, XAXL, l)

CALL AXl,..,Of:l(l, XORY, YCtf<Y, VAXL, 2) cm...! .. AXI BI'::AI 3, NINTX, XHI'::-:n, XEN)), l) CALL FtX1RCA(3, NINTV, VHEG, VENJJ,2) CULL AXIDHAI2,1,1) CALL MOVHYZ(-50.0, -06,0) Cnt_L CHnt-ll(l.ABX,?O)

. CALL AXIURA(-2,-1,2) CIU.L MOV8Y2C-15.0, -50.0) CALL CHf-IANG ('10.0) CnLL CHAA1(LA9Y,2Q) CALL CHAANG(O.O)

50 CONTlNlIE 1f:(J(LC.EI.),t, co rn ~2 CALL GRH(;UR(X, Y. NPS)

N W 0

Cl .., P "0 ::r

"R 0 ..... ..... ::J

lO

VI c: er .., 0 c: ..... ::J ro

c

231

1;') TO 54 5Z CALL GRAPOL<X,Y,NPS) 54 CALL MOVBY2<0.,2.)

CALL CHflA 1( NAME::, 20)

PRINT 57 '57 FORMAl (' enter NSYMEiOl.: 1 - B; or 0 f ...... r no symbol s' )

HI£AD *, N:,YM . IF (NSYM.EQ.O) GO TO ~8 N:,PACE -= NPS/ to CALL GF~ASYM ( X, Y, NPS, NSYM, N="~ACE)

58 CONTINUE CALL CHASIZ(3.,3.) , ,;:-lLL MOVT')2 ( X TL , Y rLl CALL CHFlA 1 ( I Tl TLE, 80)

60 G')N rI NUE PRINT "15

75 FORMAT('..,.nter 1 for new page,O fo.' the same p:;3ge', 11- , ,q to q'Jit tt-,e prograr~' )

READ (O,*,ERR=1000) KPAG 1~ (KPAG.~a.O) GO ro 100 CALL fo'l CCLE

100 CI)NTI NUl:: 1000 CALL DEVEND

CnLL EXI r END' .. ,". . -:

C-----------------------------------------------------------

/