microelectronic circuits ii ch6 : buildingblocks of integrated-circuit...

CNU EE 6.1-1

Microelectronic Circuits II

Ch 6 : Building Blocks of Integrated-Circuit

Amplifier

6.1 IC Design Philosophy6.A Comparison of the MOSFET and the BJT6.2 The Basic Gain Cell

CNU EE 6.1-2

Introduction§ Basic building blocks of IC (Integrated Circuit) Amplifiers

- design philosophy of integrated circuits : difference from discrete circuits- comparison between MOSFET & BJT circuits à Appendix 6.A- basic gain cell of IC amplifiers à current-source-loaded common-source (common

-emitter) amplifier- cascode amplifier & cascode current source - current mirrors circuits à biasing and load elements

§ IC Design Philosophy- limited chip area à avoid large-valued resistors & capacitors (coupling & bypass)- use MOS transistors only & small MOS capacitors in the picofarad- Present CMOS IC processing technology (2009)

* 45-nm minimum channel length* dc voltage supply : 1V à reduced power dissipation* overdrive voltage : 0.1 ~ 0.2V

à currently the most widely used IC technology for analog, digital & mixed circuit- Bipolar circuit

* higher output currents* higher reliability : suitable for automotive industry

CNU EE 6.1-3

Table 6.A.1 Typical Values of CMOS Device Parameters

0.8µm 0.5 µm 0.25 µm 0.18 µm 0.13 µm

Parameter NMOS PMOS NMOS PMOS NMOS PMOS NMOS PMOS NMOS PMOS

tox(nm) 15 15 9 9 6 6 4 4 2.7 2.7

Cox(fF/µm2) 2.3 2.3 3.8 3.8 5.8 5.8 8.6 8.6 12.8 12.8

µ(cm2/V·s) 550 250 500 180 460 160 450 100 400 100

µCox(µA/V2) 127 58 190 68 267 93 387 86 511 128

Vt0(V) 0.7 -0.7 0.7 -0.8 0.43 -0.62 0.48 -0.45 0.4 -0.4

VDD(V) 5 5 3.3 3.3 2.5 2.5 1.8 1.8 1.3 1.3

|V′A|(V/µm) 25 20 20 10 5 6 5 6 5 6

Coυ(fF/µm) 0.2 0.2 0.4 0.4 0.3 0.3 0.37 0.33 0.36 0.33

Typical values of MOSFET parameters

CNU EE 6.1-4

Typical Values of MOSFET Parameters

§ Typical values of MOSFET parameters (submicron MOS)- Classification by the minimum allowed channel length Lmin :

L = 0.8 mm à 0.13-mm commercially available à 90-, 65, 45-nm process (22-nm)- Reduced Lmin à higher speed or wider bandwidth, 2.3 billion transistors onto one chip- Oxide thickness, tox à 2.7 nm @ 0.13 mm (1.2 nm @ 65-mm)- Cox ~ 1/tox à increased Cox- Increased transconductance parameters kn

/=mnCox , kp/=mpCox

à achieves required level of bias current at lower overdrive voltageà higher transconductance

- Threshold voltage Vtn & Vtp : 0.7 – 0.8 V à 0.3 ~ 0.4 V- Power supply VDD : 5 V à 1.3 V for 0.13-mm process

à reduced power dissipationà much larger number of transistors in the IC chip

- Overdrive voltage |VOV| : 0.1 ~ 0.2V (|VGS| = |Vt| + |VOV| )à saturation mode : VDS > VOV

- pronounced channel length modulation effectà VA

/ decrease, VA=VA/L decrease à low output resistance

- higher operating speeds & wider amplifier bandwidth : fT ~ 10GHz

CNU EE 6.1-5

Table 6.A.2 Typical Values for BJTs¹

Standard High-Voltage Process Advanced Low-Voltage Process

Parameter npn Lateral pnp npn Lateral pnp

AE(µm2) 500 900 2 2

IS(A) 5×10-15 2×10-15 6×10-18 6×10-18

β0(A/A) 200 50 100 50

VA(V) 130 50 35 30

VCE0(V) 50 60 8 18

τF 0.35ns 30ns 10ps 650ps

Cje0 1pF 0.3pF 5fF 14fF

Cµ0 0.3pF 1pF 5fF 15fF

rx(Ω) 200 300 400 200

Typical values of IC BJT parameters

CNU EE 6.1-6

Typical Values of IC BJT Parameters§ Typical values of IC BJT parameters (low voltage process)

- standard, old process : high-voltage (HV) processadvanced, modern process : low-voltage (LV) process

- lateral pnp is much inferior to the vertical npn: low b & large forward transit time tF à higher Cdeà unity-gain frequency fT is 2 orders of magnitude lower than npn

- dramatic reduction in device size in the advanced low-voltage processà scale current IS reduces by 3 orders of magnitude à base width WB : order of 0.1 mmà dramatic increase in speed : tF = 10 ps (HV process tF = 0.35 ns) à fT : 10 ~ 20 GHz (HV process 400~600 MHz)

- Early voltage VA : 35V- Collector-emitter voltage : 8V (HV process : 50 V or so)

à power supply : 15V à 5V or 3.3 V

CNU EE 6.1-7

Comparison of the MOSFET and BJTNMOS npn

Circuit Symbol

To operate in the Active Mode, two conditions

have to be satisfied

(1) Induce a channel : υGS ≥ Vt , Vt = 0.3 - 0.5 V

Let υGS = Vt + υOV

(2) Pinch-off channel at drain :υGD < Vt

or equivalently,υDS ≥ VOV , VOV = 0.1 - 0.3 V

(1) Forward-bias EBJ :υBE ≥ VBEon , VBEon ≈ 0.5 V

(2) Reverse-bias CBJ :υBC < VBCon , VBCon ≈ 0.4 V

or equivalently,υCE ≥ 0.3V

CNU EE 6.1-8

Comparison of the MOSFET and BJT

NMOS FET PMOS FET

CNU EE 6.1-9

§ VBE > 0 : forward biases EBJ§ VCB > 0 : reverse biases CBJ


: switch off: amplifier: switch on

CNU EE 6.1-10


§ Operating conditions- active mode or active region

: active mode in BJT: saturation mode in MOSFET

- threshold Vt in MOSFET ~ VBE(on) in BJT (almost same)- pinching off the channel in MOSFET drain ~ reverse biased CBJ in BJT

à iD is nearly independent of vDà iC is nearly independent of vC

- Asymmetry of BJT à VBC(on) is not equal to VBE(on)Symmetrical MOSFET à same Vt at source & drain

- active mode operation in BJT & MOSFETà vDS, vCE must be at least 0.1 ~ 0.3 V

CNU EE 6.1-11

NMOS npn

Current-Voltage Characteristics in the

Active Region

Low-Frequency Hybrid-π Model

( )2

2

1 12

1 120

DSD n ox GS t

A

DSn ox OV

A

G

Wi C VL V

WCL V

i

um u

um u

æ ö= - +ç ÷

è øæ ö

= +ç ÷è ø

=

/ 1

/

BE TV CEC S

A

B c

i I eV

i i

u u

b

æ ö= +ç ÷

è ø

=


CNU EE 6.1-12


§ Current – Voltage Characteristics- iD – vGS in MOSFET : square-law characteristiciC – vBE in BJT : exponential characteristic (more sensitive)

- Effects of the devices dimensions on its current1) BJT : area of emitter-base junction (EBJ), AE à IS

variation in a relatively narrow range : 10 to 12) MOSFET : aspect ratio W/L

variation in a wide range : 1.0 to 500 à significant design parameter- Dependence of iD (iC) on vDS (vCE) in the active region

: channel length modulation in MOSFET & base-width modulation in BJTà finite input resistance ro in the active modeà VA in BJT : process-technology parameter & No relation w/ dimension

VA in MOSFET = VA/L : L is design parameter

- Gate current in MOSFET = 0 & Rin looking into the gate = infinitefinite base current in BJT : iB = iC/b & finite Rin looking into the base

CNU EE 6.1-13


by ID, W/L & mnCox=387 mA/V2 from Table 6.A.1

Ex. 6.A.1 (a) NMOS w/ W/L=10 in 0.18 mm process. Find VOV &VGS for ID=100mA, No channel-length modulation

( ) 212D n ox OV

WI C VL

m æ ö= ç ÷è ø

21100 387 102 OVV= ´ ´ ´ 0.23OVV V=

(b) Find VBE for npn transistor fabricated by LV process & w/ IC=100mA, No base-width modulation

/BE TV VC SI I e=

6

18

100 100.025ln 0.766 10BEV V

-

-

´= =

´

by IC, IS=6x10-18 A from Table 6.A.2

VVVV OVtnGS 73.023.05.0 =+=+=

CNU EE 6.1-14

NMOS npn

Low-Frequency T Model

Transconductancegm

( )

( )

( )

/ / 2

2

m D OV

m n ox OV

m n ox D

g I V

Wg C VL

Wg C IL

m

m

=

æ ö= ç ÷è ø

æ ö= ç ÷è ø

/m C Tg I V=


CNU EE 6.1-15

Comparison of the MOSFET and BJT§ Low-Frequency Small-Signal Models

- BJT modelfinite base current (finite b) à rp in the hybrid-p model

à unequal iE & iC in the T model, a < 1- LF model of MOSFET = BJT w/ b= inf. (a=1)- open-circuit voltage gain from G(B) to D(C) w/ grounded S(E) : -gmro

gmro : maximum gain available from a single transistor of either type à intrinsic gain A0

- Body effect in the MOSFETbody (substrate) : 2nd gatebody-source voltage vbs à drain current gmbvbs (gmb : body transconductance)gmb=cgm (c = 0.1 ~ 0.2)

§ Transconductance- gm in BJT = IC/VT (VT ~ 25 mV at R.T à depend only on IC) - gm in MOSFET depends on ID, VOV & W/L

1st : similar to BJT gm but small (VOV/2 ~ 0.05 ~ 0.15V)2nd : proportional to VOV for a given W/L.

higher gm by higher VOV but VOV is limited by VDD3rd : proportional to for a given W/L.

gm in BJT is directly proportional to IC

DI

CNU EE 6.1-16

NMOS npn

Output Resistancero

Intrinsic GainA0 ≡ gmro

Input Resistance with Source (Emitter) Grounded ∞

'

/ Ao A D

D

V Lr V II

= = /o A Cr V I=

( )0

'

0

'

0

/ / 2

2

2 2

A OV

A

OV

A n ox

D

A V V

V LAV

V C WLA

Im

=

=

=

0 /A TA V V=

mr = /gp b


CNU EE 6.1-17

Comparison of the MOSFET and BJT§ Output resistance

- ratio of VA to the bias current (ID or IC)- ro is inversely proportional to the bias current

§ Intrinsic gain A0- A0 of BJT : ratio of process parameter VA (35 to 130V) & physical parameter VT

à independent of the device junction area & of the operating current (1000~5000V/V)- A0 of MOSFET

1st : denominator VOV/2 is a design parameter. (>> VT)numerator VA is process- & device-dependent, steadily decreasingà 20 ~40V/V for a modern short-channel technology

3rd : A0 for a given VA/, mnCox & W/L is inversely proportional to DI

§ A0 vs. ID plot- gain A0 increase as ID is lowered- higher gain A0 at the lower bias currents

à lower gm, lower capacitive load drivecapability, decrease in bandwidth

CNU EE 6.1-18


§For NMOS

Ex. 6.A.2 Compare gm, Rin at G (B), ro & A0 for 0.25-mm NMOS and LV-tech. npn Tr.Assume ID (IC) = 100mA. For L=0.4mm, W=4mm NMOS, specify VOV.

§For npn transistor

( ) 212D n ox OV

WI C VL

m æ ö= ç ÷è ø

21 4100 2672 0.4 OVV= ´ ´ ´

' 5 0.4 20k0.1

Ao

D

V LrI

´= = = W

0 0.73 20 14.6V/Vm oA g r= = ´ =

0.27 VOVV =

( )2m n ox DWg C IL

m æ ö= ç ÷è ø

2 267 10 100 0.73mA / V= ´ ´ ´ =

inR = ¥

Thus,

35 350k0.1mA

Ao

C

VrI

= = = W

0100/ 25k

4mA/Vin mR r gp b= = = = W0.1mA 4mA/V0.025V

Cm

T

Ig

V= = =

0 4 350 1400V/Vm oA g r= = ´ =

CNU EE 6.1-19

NMOS npn

high-Frequency

Model


CNU EE 6.1-20

CNU EE 6.1-21

Comparison of the MOSFET and BJT§ High-Frequency Operation

- unity-gain frequency (transition frequency) fT* a measure of the intrinsic bandwidth of the transistor itself w/o capacitive load effect* inversely proportional to the square of L for MOSFET & WB for BJT* fT of BJT is entirely process determined but fT of MOSFET is proportional to VOV

: higher-low frequency gain by low VOV but wider bandwidth by high VOVè trade-off between gain and bandwidth

* fT of npn Tr. in LV process : 10 ~ 20 GHz, NMOS in 0.18-mm process : 5~15GHz

§ Effect of a capacitive load on the bandwidth of CS (CE) amplifier- Assume frequencies of interest << fT à neglects the transistor internal capacitances- CS amplifier w/ capacitive load CL

* voltage gain from gate to drain

1o m o

gs L o

V g rA

V sC ru = = -+

1

1

oL

m gs

oL

rsCg V

rsC

= -+

- gain Av at low frequency : gmro=A0- freq. response of single-time-constant (STC) low-pass type w/ a break (pole) freq. at

1P

L oC rw =

)//( LOgsmO CrVgV -=

CNU EE 6.1-22


- unity-gain frequency or, gain-bandwidth product wt : ratio of gm and CL* the gain crosses the 0-dB line at wt

- For a given CL, higher gm à larger gain-bandwidth productà bandwidth increases as bias current is increased

( )01

t P m oL o

A g rC r

w w= = mt

L

gC

w =

CNU EE 6.1-23

Comparison of the MOSFET and BJT§ Design Parameters

- design parameters for BJT : IC, VBE, & IS (or area of emitter-base junction AE)* IC is exponentially related to VBE (DVBE=60mV à 10 changes in IC)* AE can vary over the narrow range

à IC is only effective design parameter- design parameter for MOSFET : ID, VOV, L & W

* trade off in L value- higher speed (wider bandwidth) à lower L- higher intrinsic gain à larger L- L : 25% to 50% greater than Lmin

* VOV : range of 0.2 ~ 0.4 V* for a given L & VOV, ID is proportional to W/L

- ID (or W/L) : No bearing on A0 & fT- ID affects gm à gain-bandwidth product

- dc gain remains unchanged, increasing W/L(or ID) increases bandwidth proportionally(gm ~ ID & ro ~ 1/ID)

CNU EE 6.1-24

Comparison of the MOSFET and BJTEx. 6.A.3 (a) npn transistor in LV process w/ Cm~Cm0. Find gm, ro, A0, Cde, Cje,Cp, Cm, fT &

ft in 1-pF load capacitance for IC=10mA, 100mA & 1mA.

35Ao

C C

VrI I

= = W40 A/V0.025

C Cm C

T

I Ig I

V= = = 0

35 1400V/V0.025

A

T

VAV

= = =

12 910 10 40 0.4 10de F m C CC g I I Ft - -= = ´ ´ = ´ 02 10je jeC C fF@ =

de jeC C Cp = + 0 5fFC Cm m@ =

( )2m

Tg

fC Cp mp

=+ 122 2 1 10

m mt

L

g gf

Cp p -= =´ ´

ICgm

(mA/V)ro

(kΩ)A0

(V/V)Cde

(fF)Cje

(fF)Cπ

(fF)Cµ

(fF)fT

(GHz) ft

(MHz)

10µA 0.4 3500 1400 4 10 14 5 3.4 64

100µA 4 350 1400 40 10 50 5 11.6 640

1mA 40 35 1400 400 10 410 5 15.3 6400

CNU EE 6.1-25

Comparison of the MOSFET and BJT(b) NMOS in 0.25-mm process w/ L=0.4mm, VOV=0.25V. Find W/L, gm, ro, A0, Cgs, Cgd,Cp,

fT & ft in 1-pF load capacitance for ID=10mA, 100mA & 1mA.

212D n ox OV

WI C VL

m=1 12672 16

WL

= ´ ´ ´ 0.12 DW IL=

8 A/V/ 2 0.25 / 2

D Dm D

OV

I Ig IV

= = =' 5 0.4 2A

oD D D

V LrI I I

´= = = W 0 16V/Vm oA g r= =

2 2 0.4 5.8 0.63 3gs ox oC WLC C W Wu= + = ´ ´ +

2m

tL

gf

Cp=

0.6gd oC C Wu= =

( )2m

Tgs gd

gf

C Cp=

+

ID W/Lgm

(mA/V)ro

(kΩ)A0

(V/V)Cgs

(fF)Cgd

(fF)fT

(GHz) ft

(MHz)

10µA 1.2 0.08 200 16 1.03 0.29 9.7 12.7

100µA 12 0.8 20 16 10.3 2.9 9.7 127

1mA 120 8 2 16 103 29 9.7 1270

CNU EE 6.1-26

Basic Gain Cell§ CS and CE amplifier with Current-source loads

- basic gain cell in an IC amplifier = CS or CE transistor loaded with a constant-currentsource à replace RD & RC with constant-current source

- difficulty for R with precise values in IC à current sources using transistors- current source = CS & CE amplifiers w/ a very high (ideally infinite) load R à muchhigher gain = current-source loaded or active loaded

CNU EE 6.1-27

CS & CE Amplifier w/ Current-Source Loads§ Small-signal analysis of the active-loaded CS & CE amplifiers

- Q1 is biased at ID = I & IC = I- DC bias voltage VDS & VGS (VCE & VBE) are determined by negative feedback

à MOSFET is biased in saturation region & BJT is in active region à refer to “active region” for MOSFET & BJT

- Small-signal equivalent circuit : ideal current-source à infinite resistance à open circuit- active-loaded CS amplifier

- active-loaded CE amplifier

- both voltage gains = gmro à maximum gain obtainable in a CS or CE amplifier à intrinsic gain Ao

ooomvoin rRrgAR =-=¥=

ooomvoin rRrgArR =-== p

CNU EE 6.1-28

Intrinsic Gain Ao§ Intrinsic gain of BJT

- Early voltage VA : 5 ~ 35V (100 ~ 130V), thermal voltage VT : 25mV @ room temperatureà Ao : 200 ~ 5000 V/V & independent of transistor junction area & its bias current

T

Aomo

C

Ao

T

Cm V

VrgAIVr

VIg ====

§ Intrinsic gain of MOSFET

- Overdrive voltage VOV : 0.15 ~ 0.3V à VOV/2 ~ 3 to 6 higher than VT- Ao is increased by using a longer L & lower VOV à decrease in amplifier bandwidth à Ao : 20 ~ 40 V/V, an order of magnitude lower than a BJT

OV

A

OV

Ao

D

A

D

AoDoxn

OV

Dm V

LVV

VAI

LVIVrILWC

VIg

// 22

)(22

====== m

CNU EE 6.1-29

Effect of Output Resistance of Current-Source Load

Current-source load à PMOS transistor biased in the saturation region to provide the required current I

CNU EE 6.1-30

Effect of Output Resistance of Current-Source Load

- Q2 large-signal MOSFET model:

( ) [ ]I

VrVVV

LWCI A

otpGDDoxp2

2

2

221

=--÷øö

çèæ= m

- current-source load has a finite output resistance ro2 such as (b)

- Voltage gain is reduced to gm1(ro1||ro2) from gm1ro1

( )211 || oomi

ov rrg

vvA -=º

- If Q1 & Q2 has the same Early voltage,ro1 = ro2 & half gain

oomv ArgA21

21

-=-=

CNU EE 6.1-31

Increasing Gain of the Basic Cell§ How can we increase the voltage gain obtained from the basic gain cell?

- raise the level of the output resistance of both the amplifying & load transistor

- CS amplifying Tr. Q1 + output equivalent circuit

- A black box between D of Q1& a new output terminal d2- The black box passes the sameQ1 output current gm1vi but with the output resistance increased by a factor K à current buffer

CNU EE 6.1-32

Increasing Gain of the Basic Cell

- Current buffer passes the current but raises the resistance levelà common gate (CG) or common base (CB) amplifier : unity current gain

- Voltage buffer passes the voltage but lowers the resistance level à source (CD) & emitter (CE) follower

- How to raise the output resistance of the amplifying transistor and current-source load à use a current buffer

- Placing a CG (or CB) circuit on top of the CS (or CE) amplifying transistor to implementthe current-buffering action à cascoding

The black box passesthe current gm1vi rightthrough but raise theresistance level by afactor K à currentbuffer

microelectronic circuits ii ch6 : buildingblocks of integrated-circuit...

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