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GE Energy ConnectionsGrid Solutions

MiCOM P40 Agile P54A, P54B, P54C, P54E

Technical ManualSingle Breaker Multi-End Current Differential IED (Non Distance)

Hardware Version: M,PSoftware Version: 01Publication Reference: P54xMED-TM-EN-1.1

Contents

Chapter 1 Introduction 11 Chapter Overview 32 Foreword 42.1 Target Audience 42.2 Typographical Conventions 42.3 Nomenclature 52.4 Compliance 53 Product Scope 63.1 Ordering Options 64 Features and Functions 74.1 Current Differential Protection Functions 74.2 Protection Functions 74.3 Control Functions 74.4 Measurement Functions 84.5 Communication Functions 85 Logic Diagrams 96 Functional Overview 11

Chapter 2 Safety Information 131 Chapter Overview 152 Health and Safety 163 Symbols 174 Installation, Commissioning and Servicing 184.1 Lifting Hazards 184.2 Electrical Hazards 184.3 UL/CSA/CUL Requirements 194.4 Fusing Requirements 194.5 Equipment Connections 204.6 Protection Class 1 Equipment Requirements 204.7 Pre-energisation Checklist 214.8 Peripheral Circuitry 214.9 Upgrading/Servicing 225 Decommissioning and Disposal 236 Regulatory Compliance 246.1 EMC Compliance: 2014/30/EU 246.2 LVD Compliance: 2014/35/EU 246.3 R&TTE Compliance: 2014/53/EU 246.4 UL/CUL Compliance 246.5 ATEX Compliance: 2014/34/EU 24

Chapter 3 Hardware Design 271 Chapter Overview 292 Hardware Architecture 302.1 Coprocessor Hardware Architecture 303 Mechanical Implementation 323.1 Housing Variants 323.2 List of Boards 334 Front Panel 354.1 Front Panel 354.1.1 Front Panel Compartments 354.1.2 Keypad 36

4.1.3 Front Serial Port (SK1) 364.1.4 Front Parallel Port (SK2) 374.1.5 Fixed Function LEDs 374.1.6 Function Keys 374.1.7 Programable LEDs 385 Rear Panel 396 Boards and Modules 416.1 PCBs 416.2 Subassemblies 416.3 Main Processor Board 426.4 Power Supply Board 436.4.1 Watchdog 456.4.2 Rear Serial Port 466.5 Input Module - 1 Transformer Board 476.5.1 Input Module Circuit Description 486.5.2 Transformer Board 496.5.3 Input Board 506.6 Standard Output Relay Board 516.7 IRIG-B Board 526.8 Fibre Optic Board 536.9 Rear Communication Board 546.10 Ethernet Board 546.11 Redundant Ethernet Board 566.12 Coprocessor Board 586.12.1 Current Differential Inputs 586.12.2 Coprocessor board with 1PPS input 58

Chapter 4 Software Design 611 Chapter Overview 632 Sofware Design Overview 643 System Level Software 653.1 Real Time Operating System 653.2 System Services Software 653.3 Self-Diagnostic Software 653.4 Startup Self-Testing 653.4.1 System Boot 653.4.2 System Level Software Initialisation 663.4.3 Platform Software Initialisation and Monitoring 663.5 Continuous Self-Testing 664 Platform Software 684.1 Record Logging 684.2 Settings Database 684.3 Interfaces 685 Protection and Control Functions 695.1 Acquisition of Samples 695.2 Frequency Tracking 695.3 Direct Use of Sample Values 695.4 System Level Software Initialisation 695.5 Fourier Signal Processing 705.6 Programmable Scheme Logic 715.7 Event Recording 715.8 Disturbance Recorder 725.9 Fault Locator 725.10 Function Key Interface 72

Chapter 5 Configuration 73

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1 Chapter Overview 752 Settings Application Software 763 Using the HMI Panel 773.1 Navigating the HMI Panel 783.2 Getting Started 783.3 Default Display 793.4 Default Display Navigation 803.5 Password Entry 813.6 Processing Alarms and Records 813.7 Menu Structure 823.8 Changing the Settings 833.9 Direct Access (The Hotkey menu) 843.9.1 Setting Group Selection Using Hotkeys 843.9.2 Control Inputs 843.9.3 Circuit Breaker Control 853.10 Function Keys 854 Line Parameters 874.1 Tripping Mode 874.1.1 CB Trip Conversion Logic Diagram 874.2 Residual Compensation 884.3 Mutual Compensation 885 Date and Time Configuration 905.1 Using an SNTP Signal 905.2 Using an IRIG-B Signal 905.3 Using an IEEE 1588 PTP Signal 905.4 Without a Timing Source Signal 915.5 Time Zone Compensation 915.6 Daylight Saving Time Compensation 926 Settings Group Selection 93

Chapter 6 Current Differential Protection 951 Chapter Overview 972 Current Differential Protection Principle 982.1 Numerical Current Differential Protection 982.2 Multi-ended Line Differential Protection 992.3 Basic Principles and Algorithm Design for Multi-ended Differential Protection 992.3.1 Fault Discrimination 992.3.2 Differential Characteristics 1002.3.3 Basic Algorithm 1022.3.4 Features of Multi-Ended Line Differential 1022.3.5 Algorithm Overview 1022.3.6 Communication Requirements 1033 Charging Current Compensation 1044 Synchronisation of Current Signals 1064.1 Time Alignment using Ping-Pong Technique 1064.2 Remote Terminal Time Alignment 1074.3 Time Delay Interpolation 1085 CT Saturation 1096 CT Compensation 1127 Current Differential Intertripping 1138 Stub Bus Differential Protection 1149 Application Notes 1159.1 Multi-End Current Differential Protection 1159.2 Feeder Topology 1169.3 Configuring the Feeder Topology 1169.4 Line Parameter Data 117

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9.5 Configuring the Protection Communications 1189.6 Setting Up the Phase Differential Characteristic 1199.7 Sensitivity Under Heavy Loads 1209.8 Permissive Intertripping 1219.9 CT Ratio Correction Setting Guidelines 1219.10 Feeders with Small Tapped Loads 1229.11 Setting a Two-Terminal Phase Current Differential Element 1229.12 Setting a Three or More Terminal Phase Current Differential Element 123

Chapter 7 Autoreclose 1271 Chapter Overview 1292 Introduction to Autoreclose 1303 Autoreclose Implementation 1313.1 Autoreclose Logic Inputs from External Sources 1323.1.1 Circuit Breaker Healthy Input 1323.1.2 Inhibit Autoreclose Input 1323.1.3 Block Autoreclose Input 1323.1.4 Reset Lockout Input 1333.1.5 Pole Discrepancy Input 1333.1.6 External Trip Indication 1333.2 Autoreclose Logic Inputs 1333.2.1 Trip Initiation Signals 1333.2.2 Circuit Breaker Status Inputs 1333.2.3 System Check Signals 1333.3 Autoreclose Logic Outputs 1333.4 Autoreclose Operating Sequence 1343.4.1 AR Timing Sequence - Transient Fault 1343.4.2 AR Timing Sequence - Evolving/Permanent Fault 1343.4.3 AR Timing Sequence - Evolving/Permanent Fault Single-phase 1354 Autoreclose System Map 1364.1 Autoreclose System Map Diagrams 1384.2 Autoreclose Internal Signals 1434.3 Autoreclose DDB Signals 1455 Logic Modules 1515.1 Circuit Breaker Status Monitor 1515.1.1 CB State Monitor Logic diagram 1525.2 Circuit Breaker Open Logic 1535.2.1 Circuit Breaker Open Logic Diagram 1535.3 Circuit Breaker in Service Logic 1535.3.1 Circuit Breaker in Service Logic Diagram 1535.3.2 Autoreclose OK Logic Diagram 1545.4 Autoreclose Enable 1545.4.1 Autoreclose Enable Logic Diagram 1545.5 Autoreclose Modes 1545.5.1 Single-Phase and Three-Phase Autoreclose 1555.5.2 Autoreclose Modes Enable Logic Diagram 1565.6 AR Force Three-Phase Trip Logic 1565.6.1 AR Force Three-Phase Trip Logic Diagram 1565.7 Autoreclose Initiation Logic 1565.7.1 Autoreclose Initiation Logic Diagram 1585.7.2 Autoreclose Trip Test Logic Diagram 1585.7.3 AR External Trip Initiation Logic Diagram 1595.7.4 Protection Reoperation and Evolving Fault Logic Diagram 1605.7.5 Fault Memory Logic Diagram 1605.8 Autoreclose In Progress 1605.8.1 Autoreclose In Progress Logic Diagram 1615.9 Sequence Counter 161

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5.9.1 Autoreclose Sequence Counter Logic Diagram 1625.10 Autoreclose Cycle Selection 1625.10.1 Single-Phase Autoreclose Cycle Selection Logic Diagram 1625.10.2 3-phase Autoreclose Cycle Selection 1635.11 Dead Time Control 1635.11.1 Dead Time Start Enable Logic Diagram 1645.11.2 1-phase Dead Time Logic Diagram 1655.11.3 3-phase Dead Time Logic Diagram 1665.12 Circuit Breaker Autoclose 1665.12.1 Circuit Breaker Autoclose Logic Diagram 1675.13 Reclaim Time 1675.13.1 Prepare Reclaim Initiation Logic Diagram 1685.13.2 Reclaim Time Logic Diagram 1685.13.3 Succesful Autoreclose Signals Logic Diagram 1695.13.4 Autoreclose Reset Successful Indication Logic Diagram 1695.14 CB Healthy and System Check Timers 1695.14.1 CB Healthy and System Check Timers Logic Diagram 1705.15 Autoreclose Shot Counters 1705.15.1 Autoreclose Shot Counters Logic Diagram 1715.16 Circuit Breaker Control 1725.16.1 CB Control Logic Diagram 1725.17 Circuit Breaker Trip Time Monitoring 1735.17.1 CB Trip Time Monitoring Logic Diagram 1735.18 Autoreclose Lockout 1735.18.1 CB Lockout Logic Diagram 1745.19 Reset Circuit Breaker Lockout 1755.19.1 Reset CB Lockout Logic Diagram 1755.20 Pole Discrepancy 1765.20.1 Pole Discrepancy Logic Diagram 1765.21 Circuit Breaker Trip Conversion 1765.21.1 CB Trip Conversion Logic Diagram 1775.22 Monitor Checks for CB Closure 1775.22.1 Check Synchronisation Monitor for CB Closure 1785.22.2 Voltage Monitor for CB Closure 1795.23 Synchronisation Checks for CB Closure 1795.23.1 Three-phase Autoreclose System Check Logic Diagram 1815.23.2 CB Manual Close System Check Logic Diagram 1826 Setting Guidelines 1836.1 De-ionising Time Guidance 1836.2 Dead Timer Setting Guidelines 1836.2.1 Example Dead Time Calculation 1836.3 Reclaim Time Setting Guidelines 184

Chapter 8 CB Fail Protection 1851 Chapter Overview 1872 Circuit Breaker Fail Protection 1883 Circuit Breaker Fail Implementation 1893.1 Circuit Breaker Fail Timers 1893.2 Zero Crossing Detection 1894 Circuit Breaker Fail Logic 1914.1 Circuit Breaker Fail Logic - Part 1 1914.2 Circuit Breaker Fail Logic - Part 2 1924.3 Circuit Breaker Fail Logic - Part 3 1934.4 Circuit Breaker Fail Logic - Part 4 1945 Application Notes 1955.1 Reset Mechanisms for CB Fail Timers 1955.2 Setting Guidelines (CB fail Timer) 195

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5.3 Setting Guidelines (Undercurrent) 196

Chapter 9 Current Protection Functions 1971 Chapter Overview 1992 Phase Fault Overcurrent Protection 2002.1 POC Implementation 2002.2 Directional Element 2002.3 POC Logic 2023 Negative Sequence Overcurrent Protection 2033.1 Negative Sequence Overcurrent Protection Implementation 2033.2 Directional Element 2033.3 NPSOC Logic 2043.4 Application Notes 2043.4.1 Setting Guidelines (Current Threshold) 2043.4.2 Setting Guidelines (Time Delay) 2043.4.3 Setting Guidelines (Directional element) 2054 Earth Fault Protection 2064.1 Earth Fault Protection Implementation 2064.2 IDG Curve 2064.3 Directional Element 2074.3.1 Residual Voltage Polarisation 2074.3.2 Negative Sequence Polarisation 2084.4 Earth Fault Protection Logic 2094.5 Application Notes 2094.5.1 Residual Voltage Polarisation Setting Guidelines 2094.5.2 Setting Guidelines (Directional Element) 2095 Sensitive Earth Fault Protection 2115.1 SEF Protection Implementation 2115.2 EPATR B Curve 2115.3 Sensitive Earth Fault Protection Logic 2125.4 Application Notes 2135.4.1 Insulated Systems 2135.4.2 Setting Guidelines (Insulated Systems) 2146 High Impedance REF 2166.1 High Impedance REF Principle 2167 Thermal Overload Protection 2187.1 Single Time Constant Characteristic 2187.2 Dual Time Constant Characteristic 2187.3 Thermal Overload Protection Implementation 2197.4 Thermal Overload Protection Logic 2197.5 Application Notes 2197.5.1 Setting Guidelines for Dual Time Constant Characteristic 2197.5.2 Setting Guidelines for Single Time Constant Characteristic 2218 Broken Conductor Protection 2238.1 Broken Conductor Protection Implementation 2238.2 Broken Conductor Protection Logic 2238.3 Application Notes 2238.3.1 Setting Guidelines 223

Chapter 10 Voltage Protection Functions 2251 Chapter Overview 2272 Undervoltage Protection 2282.1 Undervoltage Protection Implementation 2282.2 Undervoltage Protection Logic 2292.3 Application Notes 230

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2.3.1 Undervoltage Setting Guidelines 2303 Overvoltage Protection 2313.1 Overvoltage Protection Implementation 2313.2 Overvoltage Protection Logic 2323.3 Application Notes 2333.3.1 Overvoltage Setting Guidelines 2334 Compensated Overvoltage 2345 Residual Overvoltage Protection 2355.1 Residual Overvoltage Protection Implementation 2355.2 Residual Overvoltage Logic 2365.3 Application Notes 2365.3.1 Calculation for Solidly Earthed Systems 2365.3.2 Calculation for Impedance Earthed Systems 2375.3.3 Setting Guidelines 238

Chapter 11 Frequency Protection Functions 2391 Chapter Overview 2412 Frequency Protection 2422.1 Underfrequency Protection 2422.1.1 Underfrequency Protection Implementation 2422.1.2 Underfrequency Protection logic 2432.1.3 Application Notes 2432.2 Overfrequency Protection 2432.2.1 Overfrequency Protection Implementation 2432.2.2 Overfrequency Protection logic 2442.2.3 Application Notes 2443 Independent R.O.C.O.F Protection 2453.1 Indepenent R.O.C.O.F Protection Implementation 2453.2 Independent R.O.C.O.F Protection Logic 245

Chapter 12 Current Transformer Requirements 2471 Chapter Overview 2492 Recommended CT Classes 2503 Current Differential Requirements 2514 Determining Vk for IEEE C-class CT 2525 Worked Examples 2535.1 Calculation of Vk for Current Differential Protection 2535.2 Overcurrent Elements 2535.3 Overcurrent Elements 253

Chapter 13 Monitoring and Control 2551 Chapter Overview 2572 Event Records 2582.1 Event Types 2582.1.1 Opto-input Events 2592.1.2 Contact Events 2592.1.3 Alarm Events 2592.1.4 Fault Record Events 2602.1.5 Maintenance Events 2602.1.6 Protection Events 2602.1.7 Security Events 2612.1.8 Platform Events 2613 Disturbance Recorder 2624 Measurements 2634.1 Measured Quantities 263

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4.2 Measurement Setup 2634.3 Fault Locator 2634.4 Opto-input Time Stamping 2635 CB Condition Monitoring 2645.1 Broken Current Accumulator 2655.2 CB Trip Counter 2655.3 CB Operating Time Accumulator 2665.4 Excessive Fault Frequency Counter 2665.5 Reset Lockout Alarm 2675.6 CB Condition Monitoring Logic 2685.7 Reset Circuit Breaker Lockout 2685.7.1 Reset CB Lockout Logic Diagram 2695.8 Application Notes 2695.8.1 Setting the Thresholds for the Total Broken Current 2695.8.2 Setting the thresholds for the Number of Operations 2705.8.3 Setting the thresholds for the Operating Time 2705.8.4 Setting the Thresholds for Excesssive Fault Frequency 2706 CB State Monitoring 2716.1 CB State Monitor Logic diagram 2727 Circuit Breaker Control 2737.1 CB Control using the IED Menu 2737.2 CB Control using the Hotkeys 2747.3 CB Control using the Function Keys 2747.4 CB Control using the Opto-inputs 2757.5 Remote CB Control 2757.6 CB Healthy Check 2767.7 Synchronisation Check 2767.8 CB Control AR Implications 2767.9 CB Control Logic Diagram 2778 Pole Dead Function 2788.1 Pole Dead Logic 2789 System Checks 2799.1 System Checks Implementation 2799.1.1 VT Connections 2799.1.2 Voltage Monitoring 2809.1.3 Check Synchronisation 2809.1.4 Check Syncronisation Vector Diagram 2809.2 Voltage Monitor for CB Closure 2829.3 Check Synchronisation Monitor for CB Closure 2839.4 System Check PSL 2849.5 Application Notes 2849.5.1 Predictive Closure of Circuit Breaker 2849.5.2 Voltage and Phase Angle Correction 284

Chapter 14 Supervision 2871 Chapter Overview 2892 Current Differential Supervision 2902.1 Current Differential Starter Supervision 2902.1.1 Current Differential Starter Supervision Logic 2922.1.2 Current Differential Start Logic 2932.2 Switched Communication Path Supervision 2932.3 Communications Asymmetry Supervision 2943 Voltage Transformer Supervision 2963.1 Loss of One or Two Phase Voltages 2963.2 Loss of all Three Phase Voltages 2963.3 Absence of all Three Phase Voltages on Line Energisation 296

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3.4 VTS Implementation 2973.5 VTS Logic 2984 Current Transformer Supervision 3014.1 Differential CTS 3014.2 Differential CTS Logic 3024.3 CTS Implementation 3024.4 Standard CTS Logic 3034.5 CTS Blocking 3034.6 Application Notes 3034.6.1 Setting Guidelines 3034.6.2 Differential CTS Setting Guidelines 3045 Trip Circuit Supervision 3055.1 Trip Circuit Supervision Scheme 1 3055.1.1 Resistor Values 3055.1.2 PSL for TCS Scheme 1 3065.2 Trip Circuit Supervision Scheme 2 3065.2.1 Resistor Values 3075.2.2 PSL for TCS Scheme 2 3075.3 Trip Circuit Supervision Scheme 3 3075.3.1 Resistor Values 3085.3.2 PSL for TCS Scheme 3 308

Chapter 15 Digital I/O and PSL Configuration 3091 Chapter Overview 3112 Configuring Digital Inputs and Outputs 3123 Scheme Logic 3133.1 PSL Editor 3143.2 PSL Schemes 3143.3 PSL Scheme Version Control 3144 Configuring the Opto-Inputs 3155 Assigning the Output Relays 3166 Fixed Function LEDs 3176.1 Trip LED Logic 3177 Configuring Programmable LEDs 3188 Function Keys 3209 Control Inputs 321

Chapter 16 Fibre Teleprotection 3231 Chapter Overview 3252 Fibre Teleprotection Implementation 3262.1 Communication Setup 3262.2 Protection Communications Channel 3272.3 1.1.1.Protection Comms Message Slot Allocation for Each Protection Scheme 3272.4 Error Handling for Protection Communications 3312.5 Fibre Teleprotection Scheme Terminal Addressing 3322.6 Physical Connection 3322.6.1 Direct Connection 3332.6.2 Indirect Connection 3333 Communications Supervision 3344 IM64 Logic 3355 Application Notes 3375.1 Scheme Reconfiguration 3375.2 Alarm Management 3375.3 Alarm Logic 3375.4 Two-ended Scheme Extended Supervision 338

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5.5 Three-ended Scheme Extended Supervision 339

Chapter 17 Electrical Teleprotection 3411 Chapter Overview 3432 Introduction 3443 Teleprotection Scheme Principles 3453.1 Direct Tripping 3453.2 Permissive Tripping 3454 Implementation 3465 Configuration 3476 Connecting to Electrical InterMiCOM 3496.1 Short Distance 3496.2 Long Distance 3497 Application Notes 350

Chapter 18 Communications 3531 Chapter Overview 3552 Communication Interfaces 3563 Serial Communication 3573.1 EIA(RS)232 Bus 3573.2 EIA(RS)485 Bus 3573.2.1 EIA(RS)485 Biasing Requirements 3583.3 K-Bus 3584 Standard Ethernet Communication 3604.1 Hot-Standby Ethernet Failover 3605 Redundant Ethernet Communication 3615.1 Supported Protocols 3615.2 Parallel Redundancy Protocol 3625.3 High-Availability Seamless Redundancy (HSR) 3635.3.1 HSR Multicast Topology 3635.3.2 HSR Unicast Topology 3645.3.3 HSR Application in the Substation 3645.4 Rapid Spanning Tree Protocol 3655.5 Self Healing Protocol 3665.6 Dual Homing Protocol 3675.7 Configuring IP Addresses 3695.7.1 Configuring the IED IP Address 3705.7.2 Configuring the REB IP Address 3705.8 PRP/HSR Configurator 3735.8.1 Connecting the IED to a PC 3735.8.2 Installing the Configurator 3745.8.3 Starting the Configurator 3745.8.4 PRP/HSR Device Identification 3755.8.5 Selecting the Device Mode 3755.8.6 PRP/HSR IP Address Configuration 3755.8.7 SNTP IP Address Configuration 3755.8.8 Check for Connected Equipment 3755.8.9 PRP Configuration 3755.8.10 HSR Configuration 3765.8.11 Filtering Database 3765.8.12 End of Session 3775.9 RSTP Configurator 3775.9.1 Connecting the IED to a PC 3775.9.2 Installing the Configurator 3785.9.3 Starting the Configurator 3785.9.4 RSTP Device Identification 378

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5.9.5 RSTP IP Address Configuration 3795.9.6 SNTP IP Address Configuration 3795.9.7 Check for Connected Equipment 3795.9.8 RSTP Configuration 3795.9.9 End of Session 3805.10 Switch Manager 3805.10.1 Installation 3815.10.2 Setup 3825.10.3 Network Setup 3825.10.4 Bandwidth Used 3825.10.5 Reset Counters 3825.10.6 Check for Connected Equipment 3825.10.7 Mirroring Function 3835.10.8 Ports On/Off 3835.10.9 VLAN 3835.10.10 End of Session 3836 Simple Network Management Protocol (SNMP) 3846.1 SNMP Management Information Bases 3846.2 Main Processor MIBS Structure 3846.3 Redundant Ethernet Board MIB Structure 3856.4 Accessing the MIB 3896.5 Main Processor SNMP Configuration 3897 Data Protocols 3917.1 Courier 3917.1.1 Physical Connection and Link Layer 3917.1.2 Courier Database 3927.1.3 Settings Categories 3927.1.4 Setting Changes 3927.1.5 Event Extraction 3927.1.6 Disturbance Record Extraction 3947.1.7 Programmable Scheme Logic Settings 3947.1.8 Time Synchronisation 3947.1.9 Courier Configuration 3957.2 IEC 60870-5-103 3967.2.1 Physical Connection and Link Layer 3967.2.2 Initialisation 3977.2.3 Time Synchronisation 3977.2.4 Spontaneous Events 3977.2.5 General Interrogation (GI) 3977.2.6 Cyclic Measurements 3977.2.7 Commands 3977.2.8 Test Mode 3987.2.9 Disturbance Records 3987.2.10 Command/Monitor Blocking 3987.2.11 IEC 60870-5-103 Configuration 3987.3 DNP 3.0 3997.3.1 Physical Connection and Link Layer 4007.3.2 Object 1 Binary Inputs 4007.3.3 Object 10 Binary Outputs 4007.3.4 Object 20 Binary Counters 4017.3.5 Object 30 Analogue Input 4017.3.6 Object 40 Analogue Output 4027.3.7 Object 50 Time Synchronisation 4027.3.8 DNP3 Device Profile 4027.3.9 DNP3 Configuration 4107.4 IEC 61850 4117.4.1 Benefits of IEC 61850 4127.4.2 IEC 61850 Interoperability 4127.4.3 The IEC 61850 Data Model 412

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7.4.4 IEC 61850 in MiCOM IEDs 4137.4.5 IEC 61850 Data Model Implementation 4147.4.6 IEC 61850 Communication Services Implementation 4147.4.7 IEC 61850 Peer-to-peer (GOOSE) communications 4147.4.8 Mapping GOOSE Messages to Virtual Inputs 4147.4.9 Ethernet Functionality 4157.4.10 IEC 61850 Configuration 4157.4.11 IEC 61850 Edition 2 4168 Read Only Mode 4208.1 IEC 60870-5-103 Protocol Blocking 4208.2 Courier Protocol Blocking 4208.3 IEC 61850 Protocol Blocking 4218.4 Read-Only Settings 4218.5 Read-Only DDB Signals 4219 Time Synchronisation 4229.1 Demodulated IRIG-B 4229.1.1 IRIG-B Implementation 4239.2 SNTP 4239.2.1 Loss of SNTP Server Signal Alarm 4239.3 IEEE 1588 Precision time Protocol 4239.3.1 Accuracy and Delay Calculation 4239.3.2 PTP Domains 4249.4 Time Synchronsiation using the Communication Protocols 424

Chapter 19 Cyber-Security 4251 Overview 4272 The Need for Cyber-Security 4283 Standards 4293.1 NERC Compliance 4293.1.1 CIP 002 4303.1.2 CIP 003 4303.1.3 CIP 004 4303.1.4 CIP 005 4303.1.5 CIP 006 4303.1.6 CIP 007 4313.1.7 CIP 008 4313.1.8 CIP 009 4313.2 IEEE 1686-2007 4314 Cyber-Security Implementation 4334.1 NERC-Compliant Display 4334.2 Four-level Access 4344.2.1 Blank Passwords 4354.2.2 Password Rules 4354.2.3 Access Level DDBs 4364.3 Enhanced Password Security 4364.3.1 Password Strengthening 4364.3.2 Password Validation 4364.3.3 Password Blocking 4374.4 Password Recovery 4384.4.1 Password Recovery 4384.4.2 Password Encryption 4394.5 Disabling Physical Ports 4394.6 Disabling Logical Ports 4394.7 Security Events Management 4404.8 Logging Out 442

Chapter 20 Installation 443

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1 Chapter Overview 4452 Handling the Goods 4462.1 Receipt of the Goods 4462.2 Unpacking the Goods 4462.3 Storing the Goods 4462.4 Dismantling the Goods 4463 Mounting the Device 4473.1 Flush Panel Mounting 4473.2 Rack Mounting 4484 Cables and Connectors 4504.1 Terminal Blocks 4504.2 Power Supply Connections 4514.3 Earth Connnection 4514.4 Current Transformers 4514.5 Voltage Transformer Connections 4524.6 Watchdog Connections 4524.7 EIA(RS)485 and K-Bus Connections 4524.8 IRIG-B Connection 4524.9 Opto-input Connections 4524.10 Output Relay Connections 4524.11 Ethernet Metallic Connections 4534.12 Ethernet Fibre Connections 4534.13 RS232 connection 4534.14 Download/Monitor Port 4534.15 GPS Fibre Connection 4534.16 Fibre Communication Connections 4535 Case Dimensions 4545.1 Case Dimensions 40TE 4545.2 Case Dimensions 60TE 4555.3 Case Dimensions 80TE 456

Chapter 21 Commissioning Instructions 4571 Chapter Overview 4592 General Guidelines 4603 Commissioning Test Menu 4613.1 Opto I/P Status Cell (Opto-input Status) 4613.2 Relay O/P Status Cell (Relay Output Status) 4613.3 Test Port Status Cell 4613.4 Monitor Bit 1 to 8 Cells 4613.5 Test Mode Cell 4623.6 Test Pattern Cell 4623.7 Contact Test Cell 4623.8 Test LEDs Cell 4623.9 Test Autoreclose Cell 4623.10 Static Test Mode 4633.11 Loopback Mode 4633.12 IM64 Test Pattern 4643.13 IM64 Test Mode 4643.14 Red and Green LED Status Cells 4643.15 Using a Monitor Port Test Box 4644 Commissioning Equipment 4654.1 Recommended Commissioning Equipment 4654.2 Essential Commissioning Equipment 4654.3 Advisory Test Equipment 4665 Product Checks 467

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5.1 Product Checks with the IED De-energised 4675.1.1 Visual Inspection 4685.1.2 Current Transformer Shorting Contacts 4685.1.3 Insulation 4685.1.4 External Wiring 4685.1.5 Watchdog Contacts 4695.1.6 Power Supply 4695.2 Product Checks with the IED Energised 4695.2.1 Watchdog Contacts 4695.2.2 Test LCD 4705.2.3 Date and Time 4705.2.4 Test LEDs 4715.2.5 Test Alarm and Out-of-Service LEDs 4715.2.6 Test Trip LED 4715.2.7 Test User-programmable LEDs 4715.2.8 Test Opto-inputs 4715.2.9 Test Output Relays 4715.2.10 Test Serial Communication Port RP1 4725.2.11 Test Serial Communication Port RP2 4735.2.12 Test Ethernet Communication 4745.3 Secondary Injection Tests 4745.3.1 Test Current Inputs 4745.3.2 Test Voltage Inputs 4746 Electrical Intermicom Communication Loopback 4766.1 Setting up the Loopback 4766.2 Loopback Test 4766.2.1 InterMicom Command Bits 4776.2.2 InterMicom Channel Diagnostics 4776.2.3 Simulating a Channel Failure 4777 Intermicom 64 Communication 4787.1 Checking the Interface 4787.2 Setting up the Loopback 4787.3 Loopback Test 4798 Setting Checks 4808.1 Apply Application-specific Settings 4808.1.1 Transferring Settings from a Settings File 4808.1.2 Entering settings using the HMI 4809 IEC 61850 Edition 2 Testing 4829.1 Using IEC 61850 Edition 2 Test Modes 4829.1.1 IED Test Mode Behaviour 4829.1.2 Sampled Value Test Mode Behaviour 4829.2 Simulated Input Behaviour 4839.3 Testing Examples 4839.3.1 Test Procedure for Real Values 4849.3.2 Test Procedure for Simulated Values - No Plant 4849.3.3 Test Procedure for Simulated Values - With Plant 4859.3.4 Contact Test 48610 Current Differential Protection 48710.1 Current Differential Bias Characteristic 48710.1.1 Lower Slope 48710.1.2 Upper Slope 48810.2 Current Differential Operation and Contact Assignment 48811 Protection Timing Checks 49011.1 Dependency Conditions 49011.2 Overcurrent Check 49011.3 Connecting the Test Circuit 49011.4 Performing the Test 49111.5 Check the Operating Time 491

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12 System Check and Check Synchronism 49212.1 Check Synchronism Pass 49212.2 Check Synchronism Fail 49213 Check Trip and Autoreclose Cycle 49314 End-to-End Communication Tests 49414.1 Remove Local Loopbacks 49414.1.1 Restoring Direct Fibre Connections 49414.1.2 Restoring C37.94 Fibre Connections 49514.2 Remove Remote Loopbacks 49514.3 Verify Communication between IEDs 49515 Onload Checks 49615.1 Confirm Voltage Connections 49615.2 Confirm Current Connections 49615.3 Measure Capacitive Charging Current 49715.4 Check Differential Current 49715.5 Check Current Transformer Polarity 49715.6 On-load Directional Test 49716 Final Checks 498

Chapter 22 Maintenance and Troubleshooting 4991 Chapter Overview 5012 Maintenance 5022.1 Maintenance Checks 5022.1.1 Alarms 5022.1.2 Opto-isolators 5022.1.3 Output Relays 5022.1.4 Measurement Accuracy 5022.2 Replacing the Device 5032.3 Repairing the Device 5042.4 Removing the front panel 5042.5 Replacing PCBs 5052.5.1 Replacing the main processor board 5052.5.2 Replacement of communications boards 5062.5.3 Replacement of the input module 5072.5.4 Replacement of the power supply board 5072.5.5 Replacement of the I/O boards 5082.6 Recalibration 5082.7 Changing the battery 5082.7.1 Post Modification Tests 5092.7.2 Battery Disposal 5092.8 Cleaning 5093 Troubleshooting 5103.1 Self-Diagnostic Software 5103.2 Power-up Errors 5103.3 Error Message or Code on Power-up 5103.4 Out of Service LED on at power-up 5113.5 Error Code during Operation 5123.5.1 Backup Battery 5123.6 Mal-operation during testing 5123.6.1 Failure of Output Contacts 5123.6.2 Failure of Opto-inputs 5123.6.3 Incorrect Analogue Signals 5133.7 Coprocessor board failures 5133.7.1 Signalling failure alarm (on its own) 5133.7.2 C diff failure alarm (on its own) 5133.7.3 Signalling failure and C diff failure alarms together 5133.7.4 Incompatible IED 513

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3.7.5 Comms changed 5133.7.6 IEEE C37.94 fail 5143.8 PSL Editor Troubleshooting 5143.8.1 Diagram Reconstruction 5143.8.2 PSL Version Check 5143.9 Repair and Modification Procedure 514

Chapter 23 Technical Specifications 5171 Chapter Overview 5192 Interfaces 5202.1 Front Serial Port 5202.2 Download/Monitor Port 5202.3 Rear Serial Port 1 5202.4 Fibre Rear Serial Port 1 5202.5 Rear Serial Port 2 5212.6 Optional Rear Serial Port (SK5) 5212.7 IRIG-B (Demodulated) 5212.8 IRIG-B (Modulated) 5212.9 Rear Ethernet Port Copper 5222.10 Rear Ethernet Port Fibre 5222.10.1 100 Base FX Receiver Characteristics 5222.10.2 100 Base FX Transmitter Characteristics 5232.11 1 PPS Port 5232.12 Fibre Teleprotection Interface 5233 Protection Functions 5243.1 Phase Current Differential Protection 5243.2 Fibre Teleprotection Transfer Times 5243.3 Autoreclose and Check Synychronism 5243.4 Phase Overcurrent Protection 5243.4.1 Phase Overcurrent Directional Parameters 5253.5 Earth Fault Protection 5253.5.1 Earth Fault Directional Parameters 5253.6 Sensitive Earth Fault Protection 5263.6.1 Sensitive Earth Fault Protection Directional Element 5263.7 High Impedance Restricted Earth Fault Protection 5263.8 Negative Sequence Overcurrent Protection 5273.8.1 NPSOC Directional Parameters 5273.9 Circuit Breaker Fail and Undercurrent Protection 5273.10 Broken Conductor Protection 5273.11 Thermal Overload Protection 5274 Monitoring, Control and Supervision 5284.1 Voltage Transformer Supervision 5284.2 Standard Current Transformer Supervision 5284.3 Differential Current Transformer Supervision 5284.4 CB State and Condition Monitoring 5284.5 PSL Timers 5295 Measurements and Recording 5305.1 General 5305.2 Disturbance Records 5305.3 Event, Fault and Maintenance Records 5305.4 Fault Locator 5306 Ratings 5316.1 AC Measuring Inputs 5316.2 Current Transformer Inputs 5316.3 Voltage Transformer Inputs 5316.4 Auxiliary Supply Voltage 531

Contents P54A/B/C/E

xvi P54xMED-TM-EN-1.1

6.5 Nominal Burden 5326.6 Power Supply Interruption 5326.7 Battery Backup 5337 Input / Output Connections 5347.1 Isolated Digital Inputs 5347.1.1 Nominal Pickup and Reset Thresholds 5347.2 Standard Output Contacts 5347.3 High Break Output Contacts 5357.4 Watchdog Contacts 5358 Mechanical Specifications 5368.1 Physical Parameters 5368.2 Enclosure Protection 5368.3 Mechanical Robustness 5368.4 Transit Packaging Performance 5369 Type Tests 5379.1 Insulation 5379.2 Creepage Distances and Clearances 5379.3 High Voltage (Dielectric) Withstand 5379.4 Impulse Voltage Withstand Test 53710 Environmental Conditions 53810.1 Ambient Temperature Range 53810.2 Temperature Endurance Test 53810.3 Ambient Humidity Range 53810.4 Corrosive Environments 53811 Electromagnetic Compatibility 53911.1 1 MHz Burst High Frequency Disturbance Test 53911.2 Damped Oscillatory Test 53911.3 Immunity to Electrostatic Discharge 53911.4 Electrical Fast Transient or Burst Requirements 53911.5 Surge Withstand Capability 53911.6 Surge Immunity Test 54011.7 Immunity to Radiated Electromagnetic Energy 54011.8 Radiated Immunity from Digital Communications 54011.9 Radiated Immunity from Digital Radio Telephones 54011.10 Immunity to Conducted Disturbances Induced by Radio Frequency Fields 54011.11 Magnetic Field Immunity 54111.12 Conducted Emissions 54111.13 Radiated Emissions 54111.14 Power Frequency 54112 Regulatory Compliance 54212.1 EMC Compliance: 2014/30/EU 54212.2 LVD Compliance: 2014/35/EU 54212.3 R&TTE Compliance: 2014/53/EU 54212.4 UL/CUL Compliance 54212.5 ATEX Compliance: 2014/34/EU 542

Appendix A Ordering Options 545

Appendix B Settings and Signals 547

Appendix C Wiring Diagrams 549

P54A/B/C/E Contents

P54xMED-TM-EN-1.1 xvii

Contents P54A/B/C/E

xviii P54xMED-TM-EN-1.1

Table of FiguresFigure 1: Key to logic diagrams 10

Figure 2: Functional Overview 11

Figure 3: Hardware architecture 30

Figure 4: Coprocessor hardware architecture 31

Figure 5: Exploded view of IED 32

Figure 6: Front panel (60TE) 35

Figure 7: Rear view of populated case 39

Figure 8: Terminal block types 40

Figure 9: Rear connection to terminal block 41

Figure 10: Main processor board 42

Figure 11: Power supply board 43

Figure 12: Power supply assembly 44

Figure 13: Power supply terminals 45

Figure 14: Watchdog contact terminals 46

Figure 15: Rear serial port terminals 47

Figure 16: Input module - 1 transformer board 47

Figure 17: Input module schematic 48

Figure 18: Transformer board 49

Figure 19: Input board 50

Figure 20: Standard output relay board - 8 contacts 51

Figure 21: IRIG-B board 52

Figure 22: Fibre optic board 53

Figure 23: Rear communication board 54

Figure 24: Ethernet board 54

Figure 25: Redundant Ethernet board 56

Figure 26: Fully populated Coprocessor board 58

Figure 27: Software Architecture 64

Figure 28: Frequency Response (indicative only) 71

Figure 29: Navigating the HMI 78

Figure 30: Default display navigation 80

Figure 31: Circuit Breaker Trip Conversion Logic Diagram (Module 63) 87

Figure 32: Sample multi-ended system 100

Figure 33: Current differential discriminative criterion 101

Figure 34: Overall scheme designed for multi-ended differential protection 103

Figure 35: Two-ended transmission line 104

Figure 36: Ping-pong measurement for alignment of current signals 106

Figure 37: Snapshot of available data for processing at each terminal 108

Figure 38: CT saturation technique 109

Figure 39: Original current waveforms 110

Figure 40: Ipos and Ineg current waveforms 111

Figure 41: Internal external fault binary 111

Figure 42: CT Compensation 112

Figure 43: Permissive Intertripping example 113

Figure 44: Stub Bus protection 114

Figure 45: Six terminal, four junction topology and ring structure 115

Figure 46: Six terminal ring structure with channel allocation 115

Figure 47: Six terminal, four junction topology 116

Figure 48: Typical two-terminal plain feeder circuit 123

Figure 49: Typical three-terminal plain feeder circuit 124

Figure 50: Autoreclose sequence for a Transient Fault 134

Figure 51: Autoreclose sequence for an evolving or permanent fault 135

Figure 52: Autoreclose sequence for an evolving or permanent fault - single-phase operation 135

Figure 53: Key to logic diagrams 137

Figure 54: Autoreclose System Map - part 1 138





Figure 59: CB State Monitor logic diagram (Module 1) 152

Figure 60: Circuit Breaker Open logic diagram (Module 3) 153

Figure 61: CB In Service logic diagram (Module 4) 153

Figure 62: Autoreclose OK logic diagram (Module 8) 154

Figure 63: Autoreclose Enable logic diagram (Module 5) 154

Figure 64: Autoreclose Modes Enable logic diagram (Module 9) 156

Figure 65: Force Three-phase Trip logic diagram (Module 10) 156

Figure 66: Autoreclose Initiation logic diagram (Module 11) 158

Figure 67: Autoreclose Trip Test logic diagram (Module 12) 158

Figure 68: Autoreclose initiation by external trip or evolving conditions (Module 13) 159

Figure 69: Protection Reoperation and Evolving Fault logic diagram (Module 20) 160

Figure 70: Fault Memory logic diagram (Module 15) 160

Figure 71: Autoreclose In Progress logic diagram (Module 16) 161

Figure 72: Autoreclose Sequence Counter logic diagram (Module 18) 162

Figure 73: Single-phase Autoreclose Cycle Selection logic diagram (Module 19) 162

Figure 74: Three-phase Autoreclose Cycle Selection logic diagram (Module 21) 163

Figure 75: Dead time Start Enable logic diagram (Module 22) 164

Figure 76: Single-phase Dead Time logic diagram (Module 24) 165

Figure 77: Three-phase Dead Time logic diagram (Module 25) 166

Figure 78: Circuit Breaker Autoclose Logic Diagram (Module 32) 167

Table of Figures P54A/B/C/E

xx P54xMED-TM-EN-1.1

Figure 79: Prepare Reclaim Initiation Logic Diagram (Module 34) 168

Figure 80: Reclaim Time logic diagram (Module 35) 168

Figure 81: Successful Autoreclose Signals logic diagram (Module 36) 169

Figure 82: Autoreclose Reset Successful Indication logic diagram (Module 37) 169

Figure 83: Circuit Breaker Healthy and System Check Timers Healthy logic diagram (Module 39) 170

Figure 84: Autoreclose Shot Counters logic diagram (Module 41) 171

Figure 85: CB Control logic diagram (Module 43) 172

Figure 86: Circuit Breaker Trip Time Monitoring logic diagram (Module 53) 173

Figure 87: AR Lockout Logic Diagram (Module 55) 174

Figure 88: Reset Circuit Breaker Lockout Logic Diagram (Module 57) 175

Figure 89: Pole Discrepancy Logic Diagram (Module 62) 176

Figure 90: Circuit Breaker Trip Conversion Logic Diagram (Module 63) 177

Figure 91: Check Synchronisation Monitor for CB closure (Module 60) 178

Figure 92: Voltage Monitor for CB Closure (Module 59) 179

Figure 93: Three-phase Autoreclose System Check Logic Diagram (Module 45) 181

Figure 94: CB Manual Close System Check Logic Diagram (Module 51) 182

Figure 95: Circuit Breaker Fail logic - part 1 191




Figure 99: CB Fail timing 196

Figure 100: Phase Overcurrent Protection logic diagram 202

Figure 101: Negative Phase Sequence Overcurrent Protection logic diagram 204

Figure 102: IDG Characteristic 207

Figure 103: Earth Fault Protection logic diagram 209

Figure 104: EPATR B characteristic shown for TMS = 1.0 212

Figure 105: Sensitive Earth Fault Protection logic diagram 212

Figure 106: Current distribution in an insulated system with C phase fault 213

Figure 107: Phasor diagrams for insulated system with C phase fault 214

Figure 108: Positioning of core balance current transformers 215

Figure 109: High Impedance REF principle 216

Figure 110: High Impedance REF Connection 217

Figure 111: Thermal overload protection logic diagram 219

Figure 112: Spreadsheet calculation for dual time constant thermal characteristic 220

Figure 113: Dual time constant thermal characteristic 220

Figure 114: Broken conductor logic 223

Figure 115: Undervoltage - single and three phase tripping mode (single stage) 229

Figure 116: Overvoltage - single and three phase tripping mode (single stage) 232

Figure 117: Residual Overvoltage logic 236

Figure 118: Residual voltage for a solidly earthed system 237

P54A/B/C/E Table of Figures

P54xMED-TM-EN-1.1 xxi

Figure 119: Residual voltage for an impedance earthed system 238

Figure 120: Underfrequency logic (single stage) 243

Figure 121: Overfrequency logic (single stage) 244

Figure 122: Rate of change of frequency logic (single stage) 245

Figure 123: Fault recorder stop conditions 260

Figure 124: Broken Current Accumulator logic diagram 265

Figure 125: CB Trip Counter logic diagram 265

Figure 126: Operating Time Accumulator 266

Figure 127: Excessive Fault Frequency logic diagram 266

Figure 128: Reset Lockout Alarm logic diagram 267

Figure 129: CB Condition Monitoring logic diagram 268

Figure 130: Reset Circuit Breaker Lockout Logic Diagram (Module 57) 269

Figure 131: CB State Monitor logic diagram (Module 1) 272

Figure 132: Hotkey menu navigation 274

Figure 133: Default function key PSL 275

Figure 134: Remote Control of Circuit Breaker 276

Figure 135: CB Control logic diagram (Module 43) 277

Figure 136: Pole Dead logic 278

Figure 137: Check Synchronisation vector diagram 281

Figure 138: Voltage Monitor for CB Closure (Module 59) 282

Figure 139: Check Synchronisation Monitor for CB closure (Module 60) 283

Figure 140: System Check PSL 284

Figure 141: Current Differential Starter Supervision Logic 292

Figure 142: Current Differential function Start logic 293

Figure 143: Switched Communication Path supervision 294

Figure 144: Communication Asymmetry Supervision 295

Figure 145: VTS logic 300

Figure 146: Differential CTS 302

Figure 147: Standard CTS 303

Figure 148: TCS Scheme 1 305

Figure 149: PSL for TCS Scheme 1 306





Figure 154: Scheme Logic Interfaces 313

Figure 155: Trip LED logic 317

Figure 156: Fibre teleprotection connections for a six-terminal scheme 327

Figure 157: Two terminal single channel scheme 327

Figure 158: Two terminal dual channel scheme 328


xxii P54xMED-TM-EN-1.1

Figure 159: Three terminal scheme 328

Figure 160: Four terminal scheme 329

Figure 161: Five terminal scheme 330

Figure 162: Six terminal scheme 331

Figure 163: IM64 channel fail and scheme fail logic 335

Figure 164: IM64 general alarm signals logic 335

Figure 165: IM64 communications mode and IEEE C37.94 alarm signals 336

Figure 166: IM64 two-terminal scheme extended supervision 339

Figure 167: IM64 three-terminal scheme extended supervision 339

Figure 168: Example assignment of InterMiCOM signals within the PSL 348

Figure 169: Direct connection 349

Figure 170: Indirect connection using modems 349

Figure 171: RS485 biasing circuit 358

Figure 172: Remote communication using K-Bus 359

Figure 173: IED attached to separate LANs 362

Figure 174: HSR multicast topology 363

Figure 175: HSR unicast topology 364

Figure 176: HSR application in the substation 365

Figure 177: IED attached to redundant Ethernet star or ring circuit 365

Figure 178: IED, bay computer and Ethernet switch with self healing ring facilities 366

Figure 179: Redundant Ethernet ring architecture with IED, bay computer and Ethernet switches 366

Figure 180: Redundant Ethernet ring architecture with IED, bay computer and Ethernet switchesafter failure

367

Figure 181: Dual homing mechanism 368

Figure 182: Application of Dual Homing Star at substation level 369

Figure 183: IED and REB IP address configuration 370

Figure 184: Connection using (a) an Ethernet switch and (b) a media converter 374

Figure 185: Connection using (a) an Ethernet switch and (b) a media converter 378

Figure 186: Control input behaviour 401

Figure 187: Data model layers in IEC61850 413

Figure 188: Edition 2 system - backward compatibility 417

Figure 189: Edition 1 system - forward compatibility issues 417

Figure 190: Example of Standby IED 418

Figure 191: Standby IED Activation Process 419

Figure 192: GPS Satellite timing signal 422

Figure 193: Timing error using ring or line topology 424

Figure 194: Default display navigation 434

Figure 195: Location of battery isolation strip 447

Figure 196: Rack mounting of products 448

Figure 197: Terminal block types 450

P54A/B/C/E Table of Figures

P54xMED-TM-EN-1.1 xxiii

Figure 198: 40TE case dimensions 454



Figure 201: RP1 physical connection 472

Figure 202: Remote communication using K-bus 473

Figure 203: InterMicom loopback testing 476

Figure 204: Simulated input behaviour 483

Figure 205: Test example 1 484



Figure 208: Current Differential Bias Characteristics 487

Figure 209: Possible terminal block types 504

Figure 210: Front panel assembly 506


xxiv P54xMED-TM-EN-1.1

CHAPTER 1

INTRODUCTION

Chapter 1 - Introduction P54A/B/C/E

2 P54xMED-TM-EN-1.1

1 CHAPTER OVERVIEW

This chapter provides some general information about the technical manual and an introduction to the device(s)described in this technical manual.

This chapter contains the following sections:

Chapter Overview 3

Foreword 4

Product Scope 6

Features and Functions 7

Logic Diagrams 9

Functional Overview 11

P54A/B/C/E Chapter 1 - Introduction

P54xMED-TM-EN-1.1 3

2 FOREWORD

This technical manual provides a functional and technical description of General Electric's P54A, P54B, P54C, P54E,as well as a comprehensive set of instructions for using the device. The level at which this manual is writtenassumes that you are already familiar with protection engineering and have experience in this discipline. Thedescription of principles and theory is limited to that which is necessary to understand the product. For furtherdetails on general protection engineering theory, we refer you to Alstom's publication NPAG, which is availableonline or from our contact centre.

We have attempted to make this manual as accurate, comprehensive and user-friendly as possible. However wecannot guarantee that it is free from errors. Nor can we state that it cannot be improved. We would therefore bevery pleased to hear from you if you discover any errors, or have any suggestions for improvement. Our policy is toprovide the information necessary to help you safely specify, engineer, install, commission, maintain, andeventually dispose of this product. We consider that this manual provides the necessary information, but if youconsider that more details are needed, please contact us.

All feedback should be sent to our contact centre via the following URL:

www.gegridsolutions.com/contact

2.1 TARGET AUDIENCEThis manual is aimed towards all professionals charged with installing, commissioning, maintaining,troubleshooting, or operating any of the products within the specified product range. This includes installation andcommissioning personnel as well as engineers who will be responsible for operating the product.

The level at which this manual is written assumes that installation and commissioning engineers have knowledgeof handling electronic equipment. Also, system and protection engineers have a thorough knowledge of protectionsystems and associated equipment.

2.2 TYPOGRAPHICAL CONVENTIONSThe following typographical conventions are used throughout this manual.

● The names for special keys appear in capital letters.For example: ENTER

● When describing software applications, menu items, buttons, labels etc as they appear on the screen arewritten in bold type.For example: Select Save from the file menu.

● Filenames and paths use the courier fontFor example: Example\File.text

● Special terminology is written with leading capitalsFor example: Sensitive Earth Fault

● If reference is made to the IED's internal settings and signals database, the menu group heading (column)text is written in upper case italicsFor example: The SYSTEM DATA column

● If reference is made to the IED's internal settings and signals database, the setting cells and DDB signals arewritten in bold italicsFor example: The Language cell in the SYSTEM DATA column

● If reference is made to the IED's internal settings and signals database, the value of a cell's content iswritten in the Courier fontFor example: The Language cell in the SYSTEM DATA column contains the value English


4 P54xMED-TM-EN-1.1

http://www.gegridsolutions.com/contact

2.3 NOMENCLATUREDue to the technical nature of this manual, many special terms, abbreviations and acronyms are used throughoutthe manual. Some of these terms are well-known industry-specific terms while others may be special product-specific terms used by General Electric. The first instance of any acronym or term used in a particular chapter isexplained. In addition, a separate glossary is available on the General Electric website, or from the General Electriccontact centre.

We would like to highlight the following changes of nomenclature however:

● The word 'relay' is no longer used to describe the device itself. Instead, the device is referred to as the 'IED'(Intelligent Electronic Device), the 'device', or the 'product'. The word 'relay' is used purely to describe theelectromechanical components within the device, i.e. the output relays.

● British English is used throughout this manual.● The British term 'Earth' is used in favour of the American term 'Ground'.

2.4 COMPLIANCEThe device has undergone a range of extensive testing and certification processes to ensure and provecompatibility with all target markets. A detailed description of these criteria can be found in the TechnicalSpecifications chapter.


P54xMED-TM-EN-1.1 5

3 PRODUCT SCOPE

The P54A, P54B, P54C and P54E IEDs provide high-speed, multi-ended differential protection (without the need ofGPS synchronisation) for electrical feeders having between 2 and 6 terminals, for both overhead line and cableapplications. They also include 4-shot phase-segregated Autoreclose protection for single circuit breakerapplications.

The algorithms of these devices work differently from their standard counterparts. The device samples at doublethe speed and does not use Fourier transformation to calculate phasors. It uses sampled values directly, whichenables subcycle tripping.

The P54C and P54E provide more I/O and are housed in a larger cases than the P54A and P54B. The differencesbetween the model variants are summarised in the table below:

Feature/Variant P54A P54B P54C P54E

Number of CT Inputs 4 5 5 5 5 5 5

Number of VT inputs 4 4 4 4 4 4

Opto-coupled digital inputs 8 8 16 16 24 24 32

Standard relay output contacts 8 8 16 8 16 32 32

High speed high break output contacts 4 8Key functions for each product are described below:

● P54A compact (40TE), economical line differential protection without VT inputs, offering non-directionalbackup protection.

● P54B compact (40TE), economical line differential protection with directionalised back-up protection andinbuilt reclosing and check synchronism.

● P54C transmission-class 1/3-pole tripping line differential protection with backup protection and inbuiltreclosing and check synchronism (built from today’s P543 hardware).

● P54E transmission-class 1/3-pole tripping line differential protection with back-up protection and inbuiltreclosing and check synchronism with a large number of binary I/O for traditional hardwired schemes (builtfrom P545 hardware).

Multi-ended line differential relays are not compatible with the conventional line differential MiCOM Agile relays.

3.1 ORDERING OPTIONSAll current models and variants for this product are defined in an interactive spreadsheet called the CORTEC. This isavailable on the company website.

Alternatively, you can obtain it via the Contact Centre at the following URL:

www.gegridsolutions.com/contact

A copy of the CORTEC is also supplied as a static table in the Appendices of this document. However, it should onlybe used for guidance as it provides a snapshot of the interactive data taken at the time of publication.


6 P54xMED-TM-EN-1.1

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4 FEATURES AND FUNCTIONS

4.1 CURRENT DIFFERENTIAL PROTECTION FUNCTIONS

Feature IEC 61850 ANSI

Phase segregated current differential protection DifPDIF1 87L

Between 2 and 6 terminal lines/cables

Self-synchronization feature

InterMiCOM64 teleprotection for direct device-to-devicecommunication (optional)

4.2 PROTECTION FUNCTIONS


Tripping Mode (1 & 3 pole) PTRC

ABC and ACB phase rotation

Phase overcurrent , with optional directionality (4 stages) OcpPTOC/RDIR 50/51/67

Earth/Ground overcurrent stages, with optional directionality (4stages) EfdPTOC/RDIR 50N/51N/ 67N

Sensitive earth fault (SEF) (4 stages) SenPTOC/RDIR 50N/51N/67N

High impedance restricted earth fault (REF) SenRefPDIF 64

Negative sequence overcurrent stages, with optionaldirectionality (4 stages) NgcPTOC/RDIR 67/46

Broken conductor, used to detect open circuit faults 46

Thermal overload protection ThmPTTR 49

Undervoltage protection (2 stages) VtpPhsPTUV 27

Overvoltage protection (2 stages) VtpPhsPTOV 59

Remote overvoltage protection (2 stages) VtpCmpPTOV 59R

Residual voltage protection (2 stages) VtpResPTOV 59N

Underfrequency protection (4 stages) FrqPTUF 81

Overfrequency protection (2 stages) FrqPTOF 81

Rate of change of frequency protection (4 stages) DfpPFRC 81

High speed breaker fail suitable for re-tripping and back-tripping (2 stages) RBRF 50BF

Current Transformer supervision 46

Voltage transformer supervision 47/27

Auto-reclose (4 shots) RREC 79

Check synchronisation (2 stages) RSYN 25

4.3 CONTROL FUNCTIONS


Watchdog contacts

Read-only mode

Function keys FnkGGIO


P54xMED-TM-EN-1.1 7


Programmable LEDs LedGGIO

Programmable hotkeys

Programmable allocation of digital inputs and outputs

Fully customizable menu texts

Circuit breaker control, status & condition monitoring XCBR 52

CT supervision

VT supervision

Trip circuit and coil supervision

Control inputs PloGGIO1

Power-up diagnostics and continuous self-monitoring

Dual rated 1A and 5A CT inputs

Alternative setting groups (4)

Graphical programmable scheme logic (PSL)

Fault locator RFLO

4.4 MEASUREMENT FUNCTIONS

Measurement Function IEC 61850 ANSI

Measurement of all instantaneous & integrated values(Exact range of measurements depend on the device model)

MET

Disturbance recorder for waveform capture – specified in samples per cycle RDRE DFR

Fault Records

Maintenance Records

Event Records / Event logging Event records

Time Stamping of Opto-inputs Yes Yes

4.5 COMMUNICATION FUNCTIONS

Feature ANSI

NERC compliant cyber-security

Front RS232 serial communication port for configuration 16S

Rear serial RS485 communication port for SCADA control 16S

2 Additional rear serial communication ports for SCADA control andteleprotection (fibre and copper) (optional) 16S

Ethernet communication (optional) 16E

Redundant Ethernet communication (optional) 16E

Courier Protocol 16S

IEC 61850 edition 1 or edition 2 (optional) 16E

IEC 60870-5-103 (optional) 16S

DNP3.0 over serial link (optional) 16S

DNP3.0 over Ethernet (optional) 16E

SNMP 16E

IRIG-B time synchronisation (optional) CLK

IEEE 1588 PTP (Edition 2 devices only)


8 P54xMED-TM-EN-1.1

5 LOGIC DIAGRAMS

This technical manual contains many logic diagrams, which should help to explain the functionality of the device.Although this manual has been designed to be as specific as possible to the chosen product, it may containdiagrams, which have elements applicable to other products. If this is the case, a qualifying note will accompanythe relevant part.

The logic diagrams follow a convention for the elements used, using defined colours and shapes. A key to thisconvention is provided below. We recommend viewing the logic diagrams in colour rather than in black and white.The electronic version of the technical manual is in colour, but the printed version may not be. If you need coloureddiagrams, they can be provided on request by calling the contact centre and quoting the diagram number.


P54xMED-TM-EN-1.1 9

V00063

Key:

DDB Signal

Internal function

&AND gate

OR gate 1

Setting cell

Setting value Timer

SR LatchReset Dominant

Internal Signal

0Logic 0

Comparator for detecting overvalues

Energising Quantity

Hardcoded setting

RDQ

S

Comparator for detecting undervalues

Switch

Measurement Cell

Derived setting

SR Latch

HMI key

Pulse / Latch

Connection / Node Inverted logic input

Soft switch

Latched on positive edge

XMultiplier

2

1

NOT gate

XORXOR gate

RQ

S

Internal Calculation

Switch

Bandpass filter

Figure 1: Key to logic diagrams


10 P54xMED-TM-EN-1.1

6 FUNCTIONAL OVERVIEW

This diagram is applicable to several multi-end current differential protection products in the P40L family; P54A,P54B, P54C and P54E. Use the diagram key to determine the features relevant to the product described in thistechnical manual.

CTS VTS50BF 79

Fault records DisturbanceRecord

Measurements

PSL

LocalCommunicationcomm. port

LEDs

conventionalsignalling

protectioncommunication

Self monitoring

85FL

50N/51N

46BC

1 Opticport

2ndst Opticport

25

50/27

27/59 59N

87P 50/51 67

2ndRemotecomm. port

IEC

61850

X

BUS 1

V ref

V

I

Neutral currentfrom parallel line(if present)

IM

I E sen

V ref

64 9467N I/ V67NSEF

67/46

Remote

LINE

Remote

OptionalAlways

available

P54A, P54BP54C, P54E

E00071

Figure 2: Functional Overview


P54xMED-TM-EN-1.1 11

CHAPTER 2

SAFETY INFORMATION

Chapter 2 - Safety Information P54A/B/C/E


1 CHAPTER OVERVIEW

This chapter provides information about the safe handling of the equipment. The equipment must be properlyinstalled and handled in order to maintain it in a safe condition and to keep personnel safe at all times. You mustbe familiar with information contained in this chapter before unpacking, installing, commissioning, or servicing theequipment.


Chapter Overview 15

Health and Safety 16

Symbols 17

Installation, Commissioning and Servicing 18

Decommissioning and Disposal 23

Regulatory Compliance 24

P54A/B/C/E Chapter 2 - Safety Information


2 HEALTH AND SAFETY

Personnel associated with the equipment must be familiar with the contents of this Safety Information.

When electrical equipment is in operation, dangerous voltages are present in certain parts of the equipment.Improper use of the equipment and failure to observe warning notices will endanger personnel.

Only qualified personnel may work on or operate the equipment. Qualified personnel are individuals who are:

● familiar with the installation, commissioning, and operation of the equipment and the system to which it isbeing connected.

● familiar with accepted safety engineering practises and are authorised to energise and de-energiseequipment in the correct manner.

● trained in the care and use of safety apparatus in accordance with safety engineering practises● trained in emergency procedures (first aid).

The documentation provides instructions for installing, commissioning and operating the equipment. It cannot,however cover all conceivable circumstances. In the event of questions or problems, do not take any actionwithout proper authorisation. Please contact your local sales office and request the necessary information.



3 SYMBOLS

Throughout this manual you will come across the following symbols. You will also see these symbols on parts ofthe equipment.

Caution:Refer to equipment documentation. Failure to do so could result in damage to theequipment

Warning:Risk of electric shock

Earth terminal. Note: This symbol may also be used for a protective conductor (earth) terminal if that terminalis part of a terminal block or sub-assembly.

Protective conductor (earth) terminal

Instructions on disposal requirements

Note:The term 'Earth' used in this manual is the direct equivalent of the North American term 'Ground'.



4 INSTALLATION, COMMISSIONING AND SERVICING

4.1 LIFTING HAZARDSMany injuries are caused by:

● Lifting heavy objects● Lifting things incorrectly● Pushing or pulling heavy objects● Using the same muscles repetitively

Plan carefully, identify any possible hazards and determine how best to move the product. Look at other ways ofmoving the load to avoid manual handling. Use the correct lifting techniques and Personal Protective Equipment(PPE) to reduce the risk of injury.

4.2 ELECTRICAL HAZARDS

Caution:All personnel involved in installing, commissioning, or servicing this equipment must befamiliar with the correct working procedures.

Caution:Consult the equipment documentation before installing, commissioning, or servicingthe equipment.

Caution:Always use the equipment as specified. Failure to do so will jeopardise the protectionprovided by the equipment.

Warning:Removal of equipment panels or covers may expose hazardous live parts. Do not touchuntil the electrical power is removed. Take care when there is unlocked access to therear of the equipment.

Warning:Isolate the equipment before working on the terminal strips.

Warning:Use a suitable protective barrier for areas with restricted space, where there is a risk ofelectric shock due to exposed terminals.

Caution:Disconnect power before disassembling. Disassembly of the equipment may exposesensitive electronic circuitry. Take suitable precautions against electrostatic voltagedischarge (ESD) to avoid damage to the equipment.



Caution:NEVER look into optical fibres or optical output connections. Always use optical powermeters to determine operation or signal level.

Warning:Testing may leave capacitors charged to dangerous voltage levels. Dischargecapacitors by rediucing test voltages to zero before disconnecting test leads.

Caution:Operate the equipment within the specified electrical and environmental limits.

Caution:Before cleaning the equipment, ensure that no connections are energised. Use a lintfree cloth dampened with clean water.

Note:Contact fingers of test plugs are normally protected by petroleum jelly, which should not be removed.

4.3 UL/CSA/CUL REQUIREMENTSThe information in this section is applicable only to equipment carrying UL/CSA/CUL markings.

Caution:Equipment intended for rack or panel mounting is for use on a flat surface of a Type 1enclosure, as defined by Underwriters Laboratories (UL).

Caution:To maintain compliance with UL and CSA/CUL, install the equipment using UL/CSA-recognised parts for: cables, protective fuses, fuse holders and circuit breakers,insulation crimp terminals, and replacement internal batteries.

4.4 FUSING REQUIREMENTS

Caution:Where UL/CSA listing of the equipment is required for external fuse protection, a UL orCSA Listed fuse must be used for the auxiliary supply. The listed protective fuse type is:Class J time delay fuse, with a maximum current rating of 15 A and a minimum DCrating of 250 V dc (for example type AJT15).

Caution:Where UL/CSA listing of the equipment is not required, a high rupture capacity (HRC)fuse type with a maximum current rating of 16 Amps and a minimum dc rating of 250 Vdc may be used for the auxiliary supply (for example Red Spot type NIT or TIA).For P50 models, use a 1A maximum T-type fuse.For P60 models, use a 4A maximum T-type fuse.



Caution:Digital input circuits should be protected by a high rupture capacity NIT or TIA fuse withmaximum rating of 16 A. for safety reasons, current transformer circuits must never befused. Other circuits should be appropriately fused to protect the wire used.

Caution:CTs must NOT be fused since open circuiting them may produce lethal hazardousvoltages

4.5 EQUIPMENT CONNECTIONS

Warning:Terminals exposed during installation, commissioning and maintenance may present ahazardous voltage unless the equipment is electrically isolated.

Caution:Tighten M4 clamping screws of heavy duty terminal block connectors to a nominaltorque of 1.3 Nm.Tighten captive screws of terminal blocks to 0.5 Nm minimum and 0.6 Nm maximum.

Caution:Always use insulated crimp terminations for voltage and current connections.

Caution:Always use the correct crimp terminal and tool according to the wire size.

Caution:Watchdog (self-monitoring) contacts are provided to indicate the health of the deviceon some products. We strongly recommend that you hard wire these contacts into thesubstation's automation system, for alarm purposes.

4.6 PROTECTION CLASS 1 EQUIPMENT REQUIREMENTS

Caution:Earth the equipment with the supplied PCT (Protective Conductor Terminal).

Caution:Do not remove the PCT.

Caution:The PCT is sometimes used to terminate cable screens. Always check the PCT’s integrityafter adding or removing such earth connections.



Caution:Use a locknut or similar mechanism to ensure the integrity of stud-connected PCTs.

Caution:The recommended minimum PCT wire size is 2.5 mm² for countries whose mains supplyis 230 V (e.g. Europe) and 3.3 mm² for countries whose mains supply is 110 V (e.g. NorthAmerica). This may be superseded by local or country wiring regulations.For P60 products, the recommended minimum PCT wire size is 6 mm². See productdocumentation for details.

Caution:The PCT connection must have low-inductance and be as short as possible.

Caution:All connections to the equipment must have a defined potential. Connections that arepre-wired, but not used, should be earthed, or connected to a common groupedpotential.

4.7 PRE-ENERGISATION CHECKLIST

Caution:Check voltage rating/polarity (rating label/equipment documentation).

Caution:Check CT circuit rating (rating label) and integrity of connections.

Caution:Check protective fuse or miniature circuit breaker (MCB) rating.

Caution:Check integrity of the PCT connection.

Caution:Check voltage and current rating of external wiring, ensuring it is appropriate for theapplication.

4.8 PERIPHERAL CIRCUITRY

Warning:Do not open the secondary circuit of a live CT since the high voltage produced may belethal to personnel and could damage insulation. Short the secondary of the line CTbefore opening any connections to it.



Note:For most Alstom equipment with ring-terminal connections, the threaded terminal block for current transformer terminationis automatically shorted if the module is removed. Therefore external shorting of the CTs may not be required. Check theequipment documentation and wiring diagrams first to see if this applies.

Caution:Where external components such as resistors or voltage dependent resistors (VDRs) areused, these may present a risk of electric shock or burns if touched.

Warning:Take extreme care when using external test blocks and test plugs such as the MMLG,MMLB and P990, as hazardous voltages may be exposed. Ensure that CT shorting linksare in place before removing test plugs, to avoid potentially lethal voltages.

4.9 UPGRADING/SERVICING

Warning:Do not insert or withdraw modules, PCBs or expansion boards from the equipmentwhile energised, as this may result in damage to the equipment. Hazardous livevoltages would also be exposed, endangering personnel.

Caution:Internal modules and assemblies can be heavy and may have sharp edges. Take carewhen inserting or removing modules into or out of the IED.



5 DECOMMISSIONING AND DISPOSAL

Caution:Before decommissioning, completely isolate the equipment power supplies (both polesof any dc supply). The auxiliary supply input may have capacitors in parallel, which maystill be charged. To avoid electric shock, discharge the capacitors using the externalterminals before decommissioning.

Caution:Avoid incineration or disposal to water courses. Dispose of the equipment in a safe,responsible and environmentally friendly manner, and if applicable, in accordance withcountry-specific regulations.



6 REGULATORY COMPLIANCE

Compliance with the European Commission Directive on EMC and LVD is demonstrated using a technical file.

6.1 EMC COMPLIANCE: 2014/30/EUThe product specific Declaration of Conformity (DoC) lists the relevant harmonised standard(s) or conformitassessment used to demonstrate compliance with the EMC directive.

6.2 LVD COMPLIANCE: 2014/35/EUThe product specific Declaration of Conformity (DoC) lists the relevant harmonized standard(s) or conformityassessment used to demonstrate compliance with the LVD directive.

Safety related information, such as the installation I overvoltage category, pollution degree and operatingtemperature ranges are specified in the Technical Data section of the relevant product documentation and/or onthe product labelling .

Unless otherwise stated in the Technical Data section of the relevant product documentation, the equipment isintended for indoor use only. Where the equipment is required for use in an outdoor location, it must be mountedin a specific cabinet or housing to provide the equipment with the appropriate level of protection from theexpected outdoor environment.

6.3 R&TTE COMPLIANCE: 2014/53/EURadio and Telecommunications Terminal Equipment (R&TTE) directive 2014/53/EU.

Conformity is demonstrated by compliance to both the EMC directive and the Low Voltage directive, to zero volts.

6.4 UL/CUL COMPLIANCEIf marked with this logo, the product is compliant with the requirements of the Canadian and USA UnderwritersLaboratories.

The relevant UL file number and ID is shown on the equipment.

6.5 ATEX COMPLIANCE: 2014/34/EUProducts marked with the 'explosion protection' Ex symbol (shown in the example, below) are compliant with theATEX directive. The product specific Declaration of Conformity (DoC) lists the Notified Body, Type ExaminationCertificate, and relevant harmonized standard or conformity assessment used to demonstrate compliance withthe ATEX directive.

The ATEX Equipment Protection level, Equipment group, and Zone definition will be marked on the

product.

For example:



Where:

'II' Equipment Group: Industrial.

'(2)G' High protection equipment category, for control of equipment in gas atmospheres in Zone 1 and 2.This equipment (with parentheses marking around the zone number) is not itself suitable for operationwithin a potentially explosive atmosphere.



CHAPTER 3

HARDWARE DESIGN

Chapter 3 - Hardware Design P54A/B/C/E


1 CHAPTER OVERVIEW

This chapter provides information about the product's hardware design.


Chapter Overview 29

Hardware Architecture 30

Mechanical Implementation 32

Front Panel 35

Rear Panel 39

Boards and Modules 41

P54A/B/C/E Chapter 3 - Hardware Design


2 HARDWARE ARCHITECTURE

The main components comprising devices based on the Px4x platform are as follows:

● The housing, consisting of a front panel and connections at the rear● The Main processor module consisting of the main CPU (Central Processing Unit), memory and an interface

to the front panel HMI (Human Machine Interface)● A selection of plug-in boards and modules with presentation at the rear for the power supply,

communication functions, digital I/O, analogue inputs, and time synchronisation connectivityAll boards and modules are connected by a parallel data and address bus, which allows the processor module tosend and receive information to and from the other modules as required. There is also a separate serial data busfor conveying sampled data from the input module to the CPU. These parallel and serial databuses are shown as asingle interconnection module in the following figure, which shows typical modules and the flow of data betweenthem.

Communications

Analogue Inputs

I/O

Inter

conn

ectio

n

Output relay boards

Opto-input boards

CTs

VTs

RS485 modules

Ethernet modules

Keypad

LCD

LEDs

Front port

Watchdog module

PSU module

Watchdog contacts

+ LED

Auxiliary Supply

IRIG-B module

Proc

esso

r mod

ule

Fron

t pan

el HM

I Output relay contacts

Digital inputs

Power system currents

Power system voltages

RS485 communication

Time synchronisation

Ethernet communication

V00233

Note: Not all modules are applicable to all products

MemoryFlash memory for settings

Battery-backed SRAM for records

Figure 3: Hardware architecture

2.1 COPROCESSOR HARDWARE ARCHITECTURESome products are equipped with a coprocessor board for extra computing power. There are several variants ofcoprocessor board, depending on the required communication requirements. Some models do not need anyexternal communication inputs, some models need inputs for current differential functionality and some modelsneed an input for GPS time synchronisation.



V00291

Coprocessor board

FPGAComms between main and

coprocessor board

CPU SRAM

Commsinterface

Ch1 for current differential input

Ch2 for current differential inputInt

erco

nnec

tion

Figure 4: Coprocessor hardware architecture



3 MECHANICAL IMPLEMENTATION

All products based on the Px4x platform have common hardware architecture. The hardware is modular andconsists of the following main parts:

● Case and terminal blocks● Boards and modules● Front panel

The case comprises the housing metalwork and terminal blocks at the rear. The boards fasten into the terminalblocks and are connected together by a ribbon cable. This ribbon cable connects to the processor in the frontpanel.

The following diagram shows an exploded view of a typical product. The diagram shown does not necessarilyrepresent exactly the product model described in this manual.

Figure 5: Exploded view of IED

3.1 HOUSING VARIANTSThe Px4x range of products are implemented in a range of case sizes. Case dimensions for industrial productsusually follow modular measurement units based on rack sizes. These are: U for height and TE for width, where:

● 1U = 1.75 inches = 44.45 mm● 1TE = 0.2 inches = 5.08 mm

The products are available in panel-mount or standalone versions. All products are nominally 4U high. This equatesto 177.8 mm or 7 inches.

The cases are pre-finished steel with a conductive covering of aluminium and zinc. This provides good groundingat all joints, providing a low resistance path to earth that is essential for performance in the presence of externalnoise.

The case width depends on the product type and its hardware options. There are three different case widths forthe described range of products: 40TE, 60TE and 80TE. The case dimensions and compatibility criteria are asfollows:



Case width (TE) Case width (mm) Case width (inches)

40TE 203.2 8

60TE 304.8 12

80TE 406.4 16

Note:Not all case sizes are available for all models.

3.2 LIST OF BOARDSThe product's hardware consists of several modules drawn from a standard range. The exact specification andnumber of hardware modules depends on the model number and variant. Depending on the exact model, theproduct in question will use a selection of the following boards.

Board Use

Main Processor board - 40TE or smaller Main Processor board – without support for function keys

Main Processor board - 60TE or larger Main Processor board – with support for function keys

Power supply board - 24/54V DC Power supply input. Accepts DC voltage between 24V and 54V



Transformer board Contains the voltage and current transformers

Input board Contains the A/D conversion circuitry

Input board with opto-inputs Contains the A/D conversion circuitry + 8 digital opto-inputs

IRIG-B board - modulated input Interface board for modulated IRIG-B timing signal

IRIG-B board - demodulated input Interface board for demodulated IRIG-B timing signal

Fibre board Interface board for fibre-based RS485 connection

Fibre board + IRIG-B Interface board for fibre-based RS485 connection + demodulated IRIG-B

2nd rear communications board Interface board for RS232 / RS485 connections

2nd rear communications board with IRIG-B input Interface board for RS232 / RS485 + IRIG-B connections

100MhZ Ethernet board Standard 100MHz Ethernet board for LAN connection (fibre + copper)

100MhZ Ethernet board with modulated IRIG-B Standard 100MHz Ethernet board (fibre / copper) + modulated IRIG-B

100MhZ Ethernet board with demodulated IRIG-B Standard 100MHz Ethernet board (fibre / copper)+ demodulated IRIG-B

High-break output relay board Output relay board with high breaking capacity relays

Redundant Ethernet SHP+ modulated IRIG-B Redundant SHP Ethernet board (2 fibre ports) + modulated IRIG-B input

Redundant Ethernet SHP + demodulated IRIG-B Redundant SHP Ethernet board (2 fibre ports) + demodulated IRIG-B input

Redundant Ethernet RSTP + modulated IRIG-B Redundant RSTP Ethernet board (2 fibre ports) + modulated IRIG-B input

Redundant Ethernet RSTP+ demodulated IRIG-B Redundant RSTP Ethernet board (2 fibre ports) + demodulated IRIG-B input

Redundant Ethernet DHP+ modulated IRIG-B Redundant DHP Ethernet board (2 fibre ports) + modulated IRIG-B input

Redundant Ethernet DHP+ demodulated IRIG-B Redundant DHP Ethernet board (2 fibre ports) + demodulated IRIG-B input

Redundant Ethernet PRP+ modulated IRIG-B Redundant PRP Ethernet board (2 fibre ports) + modulated IRIG-B input

Redundant Ethernet PRP+ demodulated IRIG-B Redundant PRP Ethernet board (2 fibre ports) + demodulated IRIG-B input

Redundant Ethernet HSR + modulated IRIG-B Redundant HSR Ethernet board (2 fibre ports) + demodulated IRIG-B input

Redundant Ethernet HSR+ demodulated IRIG-B Redundant HSR Ethernet board (2 fibre ports) + demodulated IRIG-B input

Output relay output board Standard output relay board

Coprocessor board with dual fibre inputs Coprocessor board with fibre connections for current differential inputs



Coprocessor board with dual fibre inputs + GPSCoprocessor board with fibre connections for current differential inputs + GPSinput.



4 FRONT PANEL

4.1 FRONT PANELDepending on the exact model and chosen options, the product will be housed in either a 40TE, 60TE or 80TE case.By way of example, the following diagram shows the front panel of a typical 60TE unit. The front panels of theproducts based on 40TE and 80TE cases have a lot of commonality and differ only in the number of hotkeys anduser-programmable LEDs. The hinged covers at the top and bottom of the front panel are shown open. An optionaltransparent front cover physically protects the front panel.

Figure 6: Front panel (60TE)

The front panel consists of:

● Top and bottom compartments with hinged cover● LCD display● Keypad● 9 pin D-type serial port● 25 pin D-type parallel port● Fixed function LEDs● Function keys and LEDs (60TE and 80TE models)● Programmable LEDs (60TE and 80TE models)

4.1.1 FRONT PANEL COMPARTMENTS

The top compartment contains labels for the:

● Serial number● Current and voltage ratings.



The bottom compartment contains:

● A compartment for a 1/2 AA size backup battery (used to back up the real time clock and event, fault, anddisturbance records).

● A 9-pin female D-type front port for an EIA(RS)232 serial connection to a PC.● A 25-pin female D-type parallel port for monitoring internal signals and downloading software and

language text.

4.1.2 KEYPAD

The keypad consists of the following keys:

4 arrow keys to navigate the menus (organised around the Enter key)

An enter key for executing the chosen option

A clear key for clearing the last command

A read key for viewing larger blocks of text (arrow keys now used forscrolling)

2 hot keys for scrolling through the default display and for control ofsetting groups. These are situated directly below the LCD display.

4.1.2.1 LIQUID CRYSTAL DISPLAY

The LCD is a high resolution monochrome display with 16 characters by 3 lines and controllable back light.

4.1.3 FRONT SERIAL PORT (SK1)

The front serial port is a 9-pin female D-type connector, providing RS232 serial data communication. It is situatedunder the bottom hinged cover, and is used to communicate with a locally connected PC. It is used to transfersettings data between the PC and the IED.

The port is intended for temporary connection during testing, installation and commissioning. It is not intended tobe used for permanent SCADA communications. This port supports the Courier communication protocol only.Courier is a proprietary communication protocol to allow communication with a range of protection equipment,and between the device and the Windows-based support software package.

This port can be considered as a DCE (Data Communication Equipment) port, so you can connect this port deviceto a PC with an EIA(RS)232 serial cable up to 15 m in length.

The inactivity timer for the front port is set to 15 minutes. This controls how long the unit maintains its level ofpassword access on the front port. If no messages are received on the front port for 15 minutes, any passwordaccess level that has been enabled is cancelled.



Note:The front serial port does not support automatic extraction of event and disturbance records, although this data can beaccessed manually.

4.1.3.1 FRONT SERIAL PORT (SK1) CONNECTIONS

The port pin-out follows the standard for Data Communication Equipment (DCE) device with the following pinconnections on a 9-pin connector.

Pin number Description

2 Tx Transmit data

3 Rx Receive data

5 0 V Zero volts common

You must use the correct serial cable, or the communication will not work. A straight-through serial cable isrequired, connecting pin 2 to pin 2, pin 3 to pin 3, and pin 5 to pin 5.

Once the physical connection from the unit to the PC is made, the PC’s communication settings must be set tomatch those of the IED. The following table shows the unit’s communication settings for the front port.

Protocol Courier

Baud rate 19,200 bps

Courier address 1

Message format 11 bit - 1 start bit, 8 data bits, 1 parity bit (even parity), 1 stop bit

4.1.4 FRONT PARALLEL PORT (SK2)

The front parallel port uses a 25 pin D-type connector. It is used for commissioning, downloading firmware updatesand menu text editing.

4.1.5 FIXED FUNCTION LEDS

Four fixed-function LEDs on the left-hand side of the front panel indicate the following conditions.

● Trip (Red) switches ON when the IED issues a trip signal. It is reset when the associated fault record iscleared from the front display. Also the trip LED can be configured as self-resetting.

● Alarm (Yellow) flashes when the IED registers an alarm. This may be triggered by a fault, event ormaintenance record. The LED flashes until the alarms have been accepted (read), then changes toconstantly ON. When the alarms are cleared, the LED switches OFF.

● Out of service (Yellow) is ON when the IED's functions are unavailable.● Healthy (Green) is ON when the IED is in correct working order, and should be ON at all times. It goes OFF if

the unit’s self-tests show there is an error in the hardware or software. The state of the healthy LED isreflected by the watchdog contacts at the back of the unit.

4.1.6 FUNCTION KEYS

The programmable function keys are available for custom use for some models.

Factory default settings associate specific functions to these keys, but by using programmable scheme logic, youcan change the default functions of these keys to fit specific needs. Adjacent to these function keys areprogrammable LEDs, which are usually set to be associated with their respective function keys.



4.1.7 PROGRAMABLE LEDS

The device has a number of programmable LEDs, which can be associated with PSL-generated signals. Theprogrammable LEDs for most models are tri-colour and can be set to RED, YELLOW or GREEN. However theprogrammable LEDs for some models are single-colour (red) only. The single-colour LEDs can be recognised byvirtue of the fact they are large and slightly oval, whereas the tri-colour LEDs are small and round.



5 REAR PANEL

The MiCOM Px40 series uses a modular construction. Most of the internal workings are on boards and moduleswhich fit into slots. Some of the boards plug into terminal blocks, which are bolted onto the rear of the unit.However, some boards such as the communications boards have their own connectors. The rear panel consists ofthese terminal blocks plus the rears of the communications boards.

The back panel cut-outs and slot allocations vary. This depends on the product, the type of boards and theterminal blocks needed to populate the case. The following diagram shows a typical rear view of a case populatedwith various boards.

Figure 7: Rear view of pop

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