mems process

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MEMS MATERIALS AND THEIR PREPARATION

Crystal Structures:� All crystalline structures are made from a mixture of different

elemental compounds. The shape of a crystal is based on the atomicstructure of these elemental building blocks.

� Atoms within a mineral are arranged in an ordered geometric patternwhich determine its "crystal structure". A crystal structure willdetermine as its symmetry, optical properties, cleavage and geometricshape.

� The recipe or mixture of these compounds becomes the blueprint forhow the crystal will grow. This growth pattern is call a crystal's“habit”.

� The "unit cell" is the smallest divisible unit of a mineral withsymmetrical characteristics unique to a crystalline structure.

� A structure's "unit cell" is a spatial arrangement of atoms which istiled in three-dimensional space to form the crystal.

� The unit cell is determined by its lattice parameters, the length of thecell edges and the angles between them, while the positions of theatoms inside the unit cell are described by the set of atomic positions(xi,yi,zi) measured from a lattice point.

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Crystal System:� The crystal system is a grouping of crystal structures that are

categorized according to the axial system used to describe their"lattice".

� A crystal's lattice is a three dimensional network of atoms that arearranged in a symmetrical pattern. Each crystal system consists of aset of three axes in a particular geometrical arrangement.

� The seven unique crystal systems, listed in order of decreasingsymmetry, are: 1. Isometric System, 2. Hexagonal System, 3.Tetragonal System, 4. Rhombohedric (Trigonal) System, 5.Orthorhombic System, 6. Monoclinic System, 7. Triclinic System.

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1. Cubic:

� The Cubic crystal system is also known as the "isometric" system. TheCubic (Isometric) crystal system is characterized by its totalsymmetry. The Cubic system has three crystallographic axes that areall perpendicular to each other and equal in length. The cubic systemhas one lattice point on each of the cube's four corners.

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2. Hexagonal:

� The Hexagonal crystal system is has four crystallographic axesconsisting of three equal horizontal or equatorial (a, b, and d) axes at120º, and one vertical (c) axis that is perpendicular to the other three.The (c) axis can be shorter or longer than the horizontal axes.

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3. Tetragonal:

� A Tetragonal crystal is a simple cubic that is stretched along its (c)axis to form a rectangular prism. The Tetragonal crystal will have asquare base and top, but a height that is taller. By continuing tostretch the "body-centered" cubic one more Bravais lattice of theTetragonal system is constructed.

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4. Rhombohedral:� A Rhombohedron (aka Trigonal) has a three-dimensional shape that

is similar to a cube that has been compressed to one side. Its form isconsidered prismatic, as all faces are parallel to each other. The facesthat are not square are called "rhombi." A rhombohedral crystal hassix faces or rhombi, 12 edges, and 8 vertices. If all of the non-obtuseinternal angles of the faces are equal (flat sample, below), it can becalled a trigonal trapezohedron.

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5. Orthorhombic:� Minerals that form in the Orthorhombic (aka Rhombic) crystal system

have three mutually perpendicular axes, all with different or unequallengths.

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6. Monoclinic:� Crystals that form in the Monoclinic System have three unequal axes.

The (a) and (c) crystallographic axes are inclined toward each other atan oblique angle, and the (b) axis is perpendicular to a and c. The (b)crystallographic axis is called the "ortho" axis.

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7. Triclinic:� Crystals that form in the Triclinic System have three unequal

crystallographic axes, all of which intersect at oblique angles. Tricliniccrystals have a 1-fold symmetry axis with virtually no symmetry andno mirrored planes.

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Silicon crystal growth from the melt:

� Basically, the technique used for silicon crystal growth from the melt is theCzochralski technique.

� The technique starts when a pure form of sand (SiO2) called quartzitequartzitequartzitequartzite isplaced in a furnace with different carbon-releasing materials such as coal andcoke. Several reactions take place inside the furnace and the net reaction thatresults in silicon is

SiC + SiO2 ----> Si + SiO (gas) + CO (gas)

� The silicon so produced is called metallurgicalmetallurgicalmetallurgicalmetallurgical----gradegradegradegrade siliconsiliconsiliconsilicon (MGS)(MGS)(MGS)(MGS), whichcontains up to 2 percent impurities. Subsequently, the silicon is treated withhydrogen chloride (HCl) to form trichlorosilane (SiHCl3):

Si + 3HCl ----> SiHCl3 (gas) + H2 (gas)

� SiHCl3 is liquid at room temperature. Fractional distillation of the SiHCl3liquid removes impurities, and the purified liquid is reduced in a hydrogenatmosphere to yield electronicelectronicelectronicelectronic gradegradegradegrade siliconsiliconsiliconsilicon (EGS)(EGS)(EGS)(EGS) through the reaction

SiHCl3 + H2 ----> Si + 3HCl

� EGS is a polycrystalline material of remarkably high purity and is used asthe raw material for preparing high-quality silicon wafers.

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� The Czochralski technique uses the apparatusshown in Figure called the puller.

� The puller comprises three main parts:

1. A furnace that consists of a fused-silica (SiO2)crucible, a graphite susceptor, a rotationmechanism, a heating element, and a powersupply.

2. A crystal pulling mechanism, which iscomposed of a seed holder and a rotationmechanism.

3. An atmosphere control, which includes a gassource (usually an inert gas), a flow control,and an exhaust system.

� In crystal growing, the EGS is placed in thecrucible and the furnace is heated above themelting temperature of silicon. Anappropriately oriented seed crystal (e.g. [100])is suspended over the crucible in a seedholder. The seed is lowered into the melt. Partof it melts but the tip of the remaining seedcrystal still touches the liquid surface.

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� The seed is then gently withdrawn. Progressive freezing at the solid-liquid interface yields a large single crystal. A typical pull rate is afew millimeters per minute.

� After a crystal is grown, the seed and the other end of the ingot, whichis last to solidify, are removed. Next, the surface is ground so that thediameter of the material is defined.

� After that, one or more flat regions are ground along the length of theingot. These flat regions mark the specific crystal orientation of theingot and the conductivity type of the material.

� Finally, the ingot is sliced by a diamond saw into wafers. Slicingdetermines four wafer parameters: surface orientation, thickness,taper (which is the variation in the wafer thickness from one end toanother), and bow (i.e. surface curvature of the wafer, measured fromthe centre of the wafer to its edge).

� Typical diameter of silicon wafers are 100mm, 150mm, 200mm.

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� You start growing a “Czochralski crystal” by filling a suitable crucible withthe material - here hyperpure correctly doped Si pieces obtained by crushingthe poly-SiSiSiSi from the Siemens process. Take care to keep impurities out - do itin a clean room - and use hyperpure silica for your crucible.� Make sure that the inside of the machine is very clean too and that the

gas flow - the gas you introduce but also the SiO coming from the moltenSiSiSiSi because parts of the crucible dissolve - does not interfere with thegrowing crystal.

� Dissolve the Si in the crucible and keep its temperature close to themelting point. Since you cannot avoid temperature gradients in thecrucible, there will be some convection in the liquid SiSiSiSi. You may want tosuppress this by big magnetic fields.

� Insert your seed crystal, adjust the temperature to "just right", and startwithdrawing the seed crystal. For homogeneity, rotate the seed crystaland the crucible. Rotation directions and speeds and their developmentduring growth, are closely guarded secrets!

� First pull rather fast - the diameter of the growing crystal will decrease toa few mm. This is the "Dash process" ensuring that the crystal will bedislocation free even though the seed crystal may contain dislocations.

� Now decrease the growth rate - the crystal diameter will increase - untilyou have the desired diameter and commence to grow the commercial partof your crystal at a few mm/second.

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Wafer Technology:� It may appear rather trivial now to cut the crystal into slices which,

after some polishing, result in the waferswaferswaferswafers used as the startingmaterial for chip production.� However, it is not trivial. While a wafer does not look like much, its not

easy to manufacture. Again, making wafers is a closely guarded secretand it is possibly even more difficult to see a wafer production than asingle SiSiSiSi crystal production.

� First, wafers must all be made to exceedingly tight geometricspecifications. Not only must the diameter and the thickness be preciselywhat they ought to be, but the flatness is constrained to about 1111 µmµmµmµm.

� This means that the polished surface deviates at most about 1111 µmµmµmµm from anideally flat reference plane - for surface areas of more than 1000100010001000 cmcmcmcm2222 for a300300300300 mmmmmmmm wafer!

� And this is not just true for one wafer, but for all 10101010....000000000000 or so produceddaily in one factory. The number of Si wafers sold in 2001200120012001 is about100100100100....000000000000....000000000000 or roughly 300300300300....000000000000 a day! Only tightly controlled processeswith plenty of know-how and expensive equipment will assure thesespecifications. The following picture gives an impression of the first stepof a many-step polishing procedure.

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Epitaxial growth:� The method for growing a silicon layer on a substrate wafer is known as an epitaxialepitaxialepitaxialepitaxial

process,process,process,process, in which the substrate wafer acts as a seed crystal.� Epitaxial processes are different from crystal growth from the melt in that the epitaxial

layer can be grown at a temperature very much below the melting point. Amongvarious epitaxial processes, vapourvapourvapourvapour----phasephasephasephase epitaxyepitaxyepitaxyepitaxy (VPE)(VPE)(VPE)(VPE) is the usual process for siliconlayer growth.

� A schematic of the VPE apparatus is shown in Figure. The figure shows a horizontalsusceptor made from graphite blocks. The susceptor mechanically supports the wafer,and, being an induction-heated reactor, it also serves as the source of thermal energyfor the reaction.

� Several silicon sources are usually used: silicon tetrachloride (SiCl4), dichlorosilane(SiH2Cl2), trichlorosilane (SiHCl3), and silane (SiH4). Typical reaction temperature forSiCl4 is ~ 1200oC. The overall reaction in the case of SiCl4 is reduction by hydrogen,

SiCl4 (gas) + 2H2 (gas) ----> Si (solid) + 4HCl (gas) � A competing reaction that would occur simultaneously is

SiCl4 (gas) + Si (solid) ----> 2SiCl2 (gas) � In reaction (1), silicon is deposited on the wafer, whereas in reaction (2), silicon is

removed (etched). Therefore, if the concentration of SiCl4 is excessive, etching ratherthan growth of silicon will take place.

� An alternative epitaxial process for silicon layer growth is molecularmolecularmolecularmolecular beambeambeambeam epitaxyepitaxyepitaxyepitaxy(MBE),(MBE),(MBE),(MBE), which is an epitaxial process that involves the reaction of a thermal beam ofsilicon atoms with a silicon wafer surface under ultrahigh vacuum conditions (~10-10torr). MBE can achieve precise control in both chemical composition and impurityprofiles (if introduced intentionally). Single-crystal multilayer structures withdimensions on the order of atomic layers can be made using MBE.

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ELECTRONIC MATERIALS AND THEIR DEPOSITION

The four important thin film materials in IC fabrication are:� Silicon oxide (Thermal / Chemical)� Dielectric layers� Polycrystalline silicon (poly Si)� Metal films (predominantly aluminum)

Oxide Film Formation by Thermal Oxidation:� Thermal oxidation is the method by which a thin film of SiO2 is

grown on top of a silicon wafer. It is the key method of producingthin SiO2 layers in modern IC technology.

� The apparatus comprises a resistance heated furnace, acylindrical fused quartz tube that contains the silicon wafers heldvertically in slotted quartz boat, and a source of either pure dryoxygen or pure water vapour.

� The loading end of the furnace tube protrudes into a vertical flowhood, wherein a filtered flow of air is maintained. The hoodreduces dust in the air that surrounds the wafers and minimizescontamination during wafer loading.

� The basic thermal oxidation apparatus is shown in Figure.

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900 – 1200 OCSi (Solid) + O2 (gas) -------------� SiO2 and

900 – 1200 OCSi (Solid) + 2H2O (gas) -------------� SiO2(Solid) + 2H2 (gas)

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� Using the densities and molecular weights of silicon and Si02, itcan be shown that growing an oxide of thickness x consumes alayer of silicon that is 0.44x thick.

� The basic structural unit of thermal Si02 is a silicon atomsurrounded tetrahedrally by four oxygen atoms, as shown inFigure.

� The silicon oxygen and oxygen-oxygen inter atomic distances are1.6 and 2.27 A, respectively.

� Si02 or silica has either a crystalline structure (e.g. quartz inFigure (b)) or an amorphous structure (Figure (c)). Typically,amorphous Si02 has a density of ~2.2 gm/cm3, whereas quartz hasa density of ~2.7 gm/cm3.

� Thermally grown oxides are usually amorphous in nature.� Oxidation of silicon in a high-pressure atmosphere of steam (or

oxygen) can produce substantial acceleration in the growth rateand is often used to grow thick oxide layers.

� One advantage of high-pressure oxide growth is that oxides canbe grown at significantly lower temperatures and at acceptablegrowth rates.

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Deposition of Silicon Dioxide and Silicon Nitride:

� There are three deposition methods that are commonly used toform a thin film on a substrate. These methods are all based onchemical vapour deposition (CVD) and are as follows:

1. Atmospheric pressure chemical vapour deposition (APCVD)

2. Low pressure chemical vapour deposition (LPCVD)

3. Plasma enhanced chemical vapour deposition (PECVD)

The appropriate method from among these three depositionmethods is determined by the substrate temperature, thedeposition rate and film uniformity, the morphology, theelectrical and mechanical properties, and the chemicalcomposition of the dielectric films.

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� A schematic diagram of a typical CVD system is shown in Figure;the only exception is that different gases are used at the gas inlet.Figures (a) and (b) show a LPCVD reactor and PECVD reactor,respectively.

� In Figure (a), the quartz tube is heated by a three-zone furnaceand gas is introduced (gas inlet) at one end of the reactor and ispumped out at the opposite end (pump).

� The substrate wafers are held vertically in a slotted quartz boat.The type of LPCVD reactor shown in Figure (a) is a hot-wallLPCVD reactor, in which the quartz tube wall is hot because it isadjacent to the furnace; this is in contrast to a cold-wall LPCVDreactor, such as the horizontal epitaxial reactor that uses radiofrequency (RF) heating.

� Usually, the parameters for the LPCVD process in the reactionchamber are in the following ranges:

1. Pressure between 0.2 and 2.0 torr2. Gas flow between 1 to 10 cm3/s3. Temperatures between 300 and 900°C

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� Figure (b) shows a parallel-plate, radial-flow PECVD reactor thatcomprises a vacuum sealed cylindrical glass chamber.

� Two parallel aluminum plates are mounted in the chamber with anRF voltage applied to the upper plate while the lower plate isgrounded.

� The RF voltage causes a plasma discharge between the plates(electrodes).

� Wafers are placed in the lower electrode, which is heated between100 and 400°C by resistance heaters.

� Process gas flows through the discharge from outlets that are locatedalong the circumference of the lower electrode.

� CVD is used extensively in depositing Si02, Si3N4, and polysilicon.� CVD Si02 does not replace thermally grown Si02 that has superior

electrical and mechanical properties as compared with CVD oxide.� However, CVD oxides are instead used to complement thermal

oxides and, in many cases, to form oxide layers that become muchthicker in relatively short times than do thermal oxides.

� Si02 can be CVD deposited by several methods. It can be depositedby reacting silane and oxygen at 300 to 500°C in an LPCVD reactor.

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� Si3N4 can be LPCVD-deposited by an intermediate-temperatureprocess or a low-temperature PECVD process. In the LPCVDprocess, which is the more common process, dichlorosilane andammonia react according to the reaction.

500 OCSiH4 + O2 (gas) -------------� SiO2+ 2H2

Dichlorosilane can be used as follows900 OC

SiCl2H2 + 2HO2 -------------� SiO2+ 2H2+2HCl

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� A property that relates to CVD is known as step coverage. Stepcoverage relates the surface topography of the deposited film tothe various steps on the semiconductor substrate. Figure (a)shows an ideal, or conformal, film deposition in which the filmthickness is uniform along all surfaces of the step, whereasFigure (b) shows a nonconformal film.

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Polysilicon Film Oxidation:

� Poly silicon is often used as a structural material in MEMS.Polysilicon is also used in MEMS for electrode formation and as aconductor or as a high-value resistor, depending on its dopinglevel. A low-pressure reactor, such as the one shown in Figure (a),operating at temperatures between 600 and 650°C is used todeposit polysilicon by pyrolysing silane according to the followingreaction:

500 OCSiH4 -------------� Si + 2H2

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PATTERN TRANSFER

TheTheTheThe LithographicLithographicLithographicLithographic ProcessProcessProcessProcess:� LithographyLithographyLithographyLithography is the process of imprinting a geometric pattern from

a mask onto a thin layer of material called a resistresistresistresist, which is aradiation-sensitive material.

� First, a resistresistresistresist is usually spin-coated or sprayed onto the wafersand then a mask is placed above it. Second, a selected radiation istransmitted through the 'clear' parts of the mask. The circuitpatterns of opaque material (mask material) block some of theradiation. The radiation is used to change the solubility of theresist in a known solventsolventsolventsolvent.

� The pattern-transfer process is accomplished by using alithographic exposure tool that emits radiation.

� The performance of the tool is determined by three properties:resolution,resolution,resolution,resolution, registrationregistrationregistrationregistration, and throughputthroughputthroughputthroughput.

� ResolutionResolutionResolutionResolution is defined as the minimum feature size that can betransferred with high fidelity to a resist film on the surface of thewafer.

� RegistrationRegistrationRegistrationRegistration is a measure of how accurately patterns of successivemasks can be aligned with respect to the previously definedpatterns on a wafer.

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PATTERN TRANSFER

� ThroughputThroughputThroughputThroughput is the number of wafers that can be exposed per hour for agiven mask level. Depending on the resolution, several types of radiation,including electromagnetic (e.g. ultraviolet (UV) and X rays) and particulate(e.g. electrons and ions), may be employed in lithography.

� OpticalOpticalOpticalOptical lithographylithographylithographylithography uses UV radiation (λ ~ 0.2 - 0.4µm). Optical exposuretools are capable of approximately 1µm resolution, 0.5 µm registration, anda throughput of 50 to 100 wafers per hour. Because of backscattering,electronelectronelectronelectron----beambeambeambeam lithographylithographylithographylithography is limited to a 0.5 µm resolution with 0.2 µmregistration. Similarly, XXXX----rayrayrayray lithographylithographylithographylithography typically has 0.5 µm resolutionwith 0.2 µm registration. However, both electron-beam and X-raylithographies require complicated masks.

� Optical lithography uses two methods for imprinting the desired pattern onthe photoresist. These two methods are shadowshadowshadowshadow printingprintingprintingprinting andandandand projectionprojectionprojectionprojectionprintingprintingprintingprinting....

� In shadow printing, the mask and wafer are in direct contact during theoptical exposure or are separated by a very small gap ‘g’ that is on the orderof 10 to 50 µm.

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PATTERN TRANSFER

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PATTERN TRANSFER

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PATTERN TRANSFER

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PATTERN TRANSFER

MaskMaskMaskMask FormationFormationFormationFormation:� For discrete devices, or small scale to medium scale ICs (typically up

to 1000 components per chip), a large composite layout of the maskset is first drawn.

� This layout is a hundred to a few thousand times the final size. Thecomposite layout is then broken into mask levels that correspond tothe IC process sequence such as isolation region on one level, themetallization region on another, and so on.

� Artwork is drawn for each masking level. The artwork is reduced to10x (ten times) glass reticule by using a reduction camera. The finalmask is made from the 10x reticule using a projection printingsystem.

� The schematic layout of a typical mask-making machine is shown inFigure. It consists of the UV light source, a motorized x-y stagesitting on a vibration-isolated table, and optical accessories.

� The operation of the machine is computer-controlled. Theinformation that contains the geometric features corresponding to aparticular mask is electrically entered with the aid of a layout editorsystem.

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PATTERN TRANSFER

� The geometric layout is then broken down into rectangular regions offixed dimensions.

� The fractured mask data is stored on a tape, which is transferred tothe mask-making machine.

� A reticule mask plate, which consists of one glass plate coated with alight-blocking material (e.g. chromium) and a photoresist coating, isplaced on the positioning stage. The tape data are then read by theequipment and, accordingly, the position of the stage and theaperture of the shutter blades are specified.

� The choice of the mask material, just like radiation, depends on thedesired resolution.

� For feature sizes of 5µm or larger, masks are made from glass platescovered with a soft surface material such as emulsion. For smallerfeature sizes, masks are made from low-expansion glass coveredwith a hard surface material such as chromium or iron oxide.

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PATTERN TRANSFER

ResistResistResistResist::::� The method used for resist-layer formation is called spinspinspinspin castingcastingcastingcasting.

Spin casting is a process by which one can deposit uniform films ofvarious liquids by spinning them onto a wafer. A typical setup usedfor spin casting is shown in Figure.

� The liquid is injected onto the surface of a wafer, which is pressure-attached to a wafer holder through holes in the holder that areconnected to a vacuum line, and continuously pumped during theprocess.

� The wafer holder itself is attached to and spun by a motor. Thethickness x of the spin-on material is related to the viscosity ‘η’ ofthe liquid and the solid content ‘f’ in the solution as well as the spinspeed ‘ω’.

� Typical spin speeds are in the range 1000-10000 rpm to givematerial thickness in the range of 0.5 to 1µm. After the wafer isspin-coated with the resist solution, it is dried and baked attemperatures in the range of 90 to 450°C, depending on the type ofthe resist. Baking is necessary for further drying of the resist andfor strengthening the resist adhesion to the wafer.

ω

ηα

fx

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� A resist is a radiation-sensitive material that can be classified aspositivepositivepositivepositive or negativenegativenegativenegative, depending on how it responds to radiation.

� The positive resist is rendered soluble in a developerdeveloperdeveloperdeveloper when it isexposed to radiation. Therefore, after exposure to radiation, apositive resist can be easily removed in the development process(dissolution of the resist in an appropriate solvent, which issometimes called the developerdeveloperdeveloperdeveloper).

� The net effect is that the patterns formed (also called imagesimagesimagesimages) in thepositive resist are the same as those formed on the mask (Figure).

� A negative resist, on the other hand, is rendered less soluble in adeveloper when it is exposed to radiation. The patterns formed in anegative resist are thus the reverse of those formed on the maskpatterns (Figure).

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PATTERN TRANSFER

LiftLiftLiftLift----offoffoffoff TechniqueTechniqueTechniqueTechnique:� The pattern transfer technique,

referred to as liftliftliftlift----offoffoffoff, uses a positiveresist to form the resist pattern on asubstrate.

� The resist is first exposed to radiationvia the pattern carrying mask and theexposed areas of the resist aredeveloped as in figure.

� A film thickness must be smaller thanthat of the resist. Using an appropriatesolvent, the remaining parts of theresist and the deposited film atopthese parts of the resist are lifted off asshown in figure.

� The lift-off technique is capable of highresolution and is often used for thefabrication of discrete devices.

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ETCHING ELECTRONIC MATERIALS

� Etching is used extensively in material processing for delineatingpatterns, removing surface damage and contamination, andfabricating three-dimensional structures.

� Etching is a chemical process wherein material is removed by achemical reaction between the etchants and the material to be etched.

� The etchant may be a chemical solution or a plasma. If the etchant isa chemical solution, the etching process is called wetwetwetwet chemicalchemicalchemicalchemicaletchingetchingetchingetching. Plasma assisted etching is generally referred to as drydrydrydryetchingetchingetchingetching, and the term dry etching is now used to denote severaletching techniques that use plasma in the form of low-pressuredischarges.

WetWetWetWet ChemicalChemicalChemicalChemical EtchingEtchingEtchingEtching::::Wet chemical etching involves three principal steps:� The reactants are transported by diffusion to the surface to be etched.� Chemical reactions take place at the surface.� Reaction products are again transported away from the surface by

diffusion

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� Let us consider, as an example, etching of silicon. For silicon, themost commonly used etchants are mixtures of nitric acid (HNO3)and hydrofluoric acid (HF) in water or acetic acid (CH3COOH). Wetchemical etching usually proceeds by oxidation.

� The chemical solution used for gallium arsenide (GaAs) etching is acombination of hydrogen peroxide (H2O2) and sulfuric acid (H2SO4)dissolved in water.

� Dielectrics and metals are etched using the same chemicals thatdissolve these materials in bulk form and involve their conversioninto soluble salts or complexes. Generally, film materials will etchmore rapidly than their bulk counterparts.

� SiO2 dissolves in HF acid according to the reaction:

� Where H2SiF6 is soluble in water. The reactions may berepresented with HNO3 by the following overall reaction:

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� Etching processes are characterized by three parameters:1. Etch rate2. Etch selectivity3. Etch uniformity

� The etch rate is defined as the material thickness etched per unit time.� Etch selectivity is a measure of how effective the etch process is in removing

the material to be etched without affecting other materials or films present inthe wafer.

� Quantitatively, etch selectivity can be expressed as the ratio between the etchrate of the material to be etched and etch-mask materials on the wafer.

DryDryDryDry EtchingEtchingEtchingEtching::::� A glow discharge is used to generate chemically reactive species (atoms,

radicals, and ions) from a relatively inert molecular gas.� The etching gas is chosen so as to produce species that react chemically with

the material to be etched to form a reaction product that is volatilevolatilevolatilevolatile.� The etch product then desorbs from the etched material into the gas phase

and is removed by the vacuum pumping system.� The most common example of the application of plasma etching is in the

etching of carbonaceous materials, for example, resist polymers, in oxygenplasma - a process referred to as plasmaplasmaplasmaplasma ashingashingashingashing or plasmaplasmaplasmaplasma strippingstrippingstrippingstripping. In thiscase, the etch species are oxygen atoms and the volatile etch products are CO,CO2, and H2O gases.

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� The characteristic of etching processes, which is becoming more and moreimportant as the lateral dimensions of the lithography become smaller, is theso-called directionality (anisotropyanisotropyanisotropyanisotropy) of the etch process. This characteristic isillustrated in Figure in which the lithographic pattern is in the x-y plane andthe z-direction is normal to this plane.

� If the etch rates in the x and y directions are equal to the etch rate in the z-direction, the etching process is said to be isotropicisotropicisotropicisotropic (or(or(or(or nonnonnonnon----directional)directional)directional)directional) andthe shape of the sidewall of the etched feature will be as shown in Figure (a).Etch processes that are anisotropicanisotropicanisotropicanisotropic orororor directionaldirectionaldirectionaldirectional have etch rates in the z-direction and are larger than the lateral (x or y) etch rates. The extreme caseof directional etching in which the lateral etch rate is zero (to be referred tohere as vertical etch process) is shown in Figure (b).

� Plasma etching is predominantly an isotropic process. However, anisotropy indry etching can be achieved by means of the chemical reaction preferentiallyenhanced in a given direction to the surface of the wafer by some mechanism.The mechanism used in dry etching to achieve etch anisotropy is ionionionionbombardmentbombardmentbombardmentbombardment.

� Under the influence of an RF field, the highly energized ions impinge on thesurface either to stimulate reaction in a direction perpendicular to the wafersurface or to prevent inhibitor species from coating the surface and henceenhance etching in the direction perpendicular to the wafer surface.Therefore, the vertical sidewalls, being parallel to the direction of ionbombardment, are little affected by the plasma.

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� Figure shows the schematic diagram of a planar etching system,which comprises vacuum chamber, two RF-powered electrodes, anetching gas inlet, and a pumping mechanism.

� The planar systems are also called parallel plate systems or surfaceloaded systems. These systems have been used in two distinct ways:1. the wafers are mounted on a grounded surface opposite to the RF-

powered electrode (cathode) or2. the wafers are mounted on the RF-powered electrode (cathode)

directly. This latter approach has been called reactivereactivereactivereactive ionionionion etchingetchingetchingetching(RIE).

� In this approach, ions are accelerated toward the wafer surface by aself-bias that develops between the wafer surface and the plasma.

� This bias is such that positively charged ions are attracted to thewafer surface, resulting in surface bombardment. It has beendemonstrated that a planar etching system, then operated in the RIEmode, is capable of highly directional and high-resolution etching.

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DOPING SEMICONDUCTORS

� When impurities are intentionally added to a semiconductor, thesemiconductor is said to be ‘doped’‘doped’‘doped’‘doped’. Figure shows a hypotheticaltwo-dimensional silicon crystal in which one silicon atom isreplaced (or substituted) by an atom - in this example, a Group Velement in the periodic table, namely, phosphorus.

� Phosphorus has five valence electrons, whereas silicon has onlyfour. The phosphorus atom shares four of its electrons with fourneighboring silicon atoms in covalent bonds. The remaining fifthvalence electron in phosphorus is loosely bound to the phosphorusnucleus.

� The ionization energy of an impurity atom of mass ‘m’ in asemiconductor crystal can be estimated from a one-electron model.If this ionization energy is denoted by the symbol Ed, then

where ε0 is the permittivity of free space, εr is that of thesemiconductor, m* is the effective electron mass in thesemiconductor crystal, and En is the electron energy of a singleatom.

n

r

d Em

mE

=

*2

0

ε

ε

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� When the phosphorus atom in silicon is ionized, the released electron becomesa free electron that is available for conduction.

� The phosphorus atom is, hence, called a donordonordonordonor atomatomatomatom because it donates a freeelectron to the crystal.

� All atoms with five valence electrons, that is, Group V elements, can behavein a similar manner to phosphorus in silicon, that is, donate a free electron tothe semiconductor crystal.

� However, the amount of energy required, Ed, for this process to occur maydiffer from one type of donor atom to another.

� All Group V atoms will donate electrons if they substitute for host atoms incrystals of Group IV elemental semiconductors. Consequently, Group Velements, such as phosphorus or arsenic, are called donor atoms or simplydonorsdonorsdonorsdonors, and the doped semiconductor is now referred to as an extrinsicextrinsicextrinsicextrinsicsemiconductorsemiconductorsemiconductorsemiconductor. This may be contrasted to an intrinsicintrinsicintrinsicintrinsic (undoped)(undoped)(undoped)(undoped)semiconducting material.

� Conduction in this phosphorus-doped silicon will therefore be dominated byelectrons. This type of extrinsic (Group IV) semiconductor, or morespecifically, silicon, is called an nnnn----typetypetypetype semiconductorsemiconductorsemiconductorsemiconductor or nnnn----typetypetypetype SiSiSiSi.

� The term n-type indicates that the charge carriers are the negatively chargedelectrons. The example discussed is specific to silicon doped with phosphorus;however, the conclusion arrived at will apply generally to all elementalsemiconductors doped with a higher group element.

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� Consider the situation in which a Group IV semiconductor is doped withatoms from an element in Group III of the periodic table, that is, atoms thathave only three valence electrons.

� To be more specific, let us take silicon doped with boron as an example, as isshown in the hypothetical two-dimensional silicon lattice in Figure. The neteffect of having a boron atom that substitutes for silicon is the creation of afreefreefreefree holeholeholehole (an electron deficiency in a covalent bond).

� This hole is generated as follows: because boron has three valence electrons,three neighbouring silicon atoms will be bonded covalently with boron.However, the fourth nearest neighbour silicon atom has one of its four valenceelectrons sitting in a dangling bond; that is, the whole system of the boronatom and the four neighbouring silicon atoms has one electron missing.

� An electron from a neighbouring Si-Si covalent bond may replace the missingelectron, thereby creating an electron deficiency (a hole) at the neighbouringbond.

� The net effect is, hence, the generation of a free hole in the silicon crystal.Therefore, this type of extrinsic semiconductor, silicon in this particularexample, is called a pppp----typetypetypetype semiconductorsemiconductorsemiconductorsemiconductor or pppp----typetypetypetype SiSiSiSi. It is p-type becauseelectrical conduction is carried out by positively charged free holes.

� Diffusion and ion implantation are the two key processes used to introducecontrolled amounts of dopants into semiconductors. These two processes areused to dope selectively the semiconductor substrate to produce either an n-type or a p-type region.

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DiffusionDiffusionDiffusionDiffusion::::� In a diffusion process, the dopant atoms are placed on the surface of the

semiconductor by deposition from the gas phase of the dopant or by usingdoped oxide sources.

� Diffusion of dopants is typically done by placing the semiconductor wafersin a furnace and passing an inert gas that contains the desired dopantthrough it.

� Doping temperatures range from 800 to 1200°C for silicon. The diffusionprocess is ideally described in terms of Fick's diffusion equation

where C is the dopant concentration, D is the diffusion coefficient, t is time,and x is measured from the wafer surface in a direction perpendicular tothe surface (Figure).

� The diffusion coefficient D is a function of temperature T expressed asD = D0 exp (-Ea/kT)

where Ea is the activation energy of the thermally driven diffusion process,k is Boltzmann's constant, and D0 is a diffusion constant.

2

2

x

CD

t

C

∂

∂=

∂

∂

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IonIonIonIon ImplantationImplantationImplantationImplantation ::::� Ion implantation is induced by the impact of high-energy ions on a

semiconductor substrate. Typical ion energies used in ion implantations arein the range of 20 to 200 keV and ion densities could be between 1011 and1016 ions/cm2 incident on the wafer surface.

� Figure shows the schematics of a medium-current ion implanter. It consistsof an ion source, a magnet analyzer, resolving aperture and lenses,acceleration tube, x- and y-scan plates, beam mask, and Faraday cup.

� After ions are generated in the ion source, the magnetic field in theanalyzer magnet is set to the appropriate value, depending on charge-to-mass ratio of the ion, so that desired ions are deflected toward the resolvingaperture where the ion beam is collimated.

� These ions are then accelerated to the required energy by an electric field inthe acceleration tube. The beam is then scanned in the x-y plane using thex- and y-deflection plates before hitting the wafer that is placed in theFaraday cup.

� Commonly implanted elements are boron, phosphorus, and arsenic fordoping elemental semiconductors, n- or p-type. After implantations, wafersare given a rapid thermal anneal to activate electrically the dopants.

� Oxygen is also implanted in silicon wafers to form buried oxide layers. Theimplanted ion distribution is normally Gaussian in shape and the averageprojected range of ions is related to the implantation energy.

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Metallisation:

� Metallisation is a process in which metal films are formed on thesurface of a substrate.

� These metallic films are used for interconnections, ohmic contacts,and so on.

� Metal films can be formed using various methods, the most importantbeing physical vapour deposition (PVD).

� PVD is performed under vacuum using either the evaporation or thesputtering technique.

Evaporation:

� Thin metallic films can be evaporated from a hot source onto asubstrate, as shown in Figure.

� An evaporation system consists of a vacuum chamber, pump, waferholder, crucible, and a shutter.

� A sample of the metal to be deposited is placed in an inert crucible,and the chamber is evacuated to a pressure of 10-6 to 10-7 torr.

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� The crucible is then heated using atungsten filament or an electron beam toflash-evaporate the metal from thecrucible and condense it onto the coldsample. The film thickness isdetermined by the length of time thatthe shutter is opened and can bemeasured using a quartz microbalance(QMB)-based film thickness monitor.

� The evaporation rate is a function of thevapour pressure of the metal.

� Therefore, metals that have a lowmelting point Tmp (e.g. 660°C foraluminum) are easily evaporated,whereas refractory metals require muchhigher temperatures (e.g. 3422°C fortungsten) and can cause damage topolymeric or plastic samples.

� In general, evaporated films are highlydisordered and have large residualstresses; thus, only thin layers of themetal can be evaporated. In addition,the deposition process is relatively slowat a few nanometres per second.

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Sputtering:� Sputtering is a physical phenomenon, which involves the acceleration

of ions through a potential gradient and the bombardment of a 'target'or cathode.

� Through momentum transfer, atoms near the surface of the targetmetal become volatile and are transported as a vapour to a substrate.

� A film grows at the surface of the substrate through deposition.� Figure shows a typical sputtering system that comprises a vacuum

chamber, a sputtering target of the desired film, a sample holder, anda high voltage direct current (DC) or radio frequency (RF) powersupply.

� After evacuating the chamber down to a pressure of 10-6 to 10-8 torr,an inert gas such as helium is introduced into the chamber at a fewmillitorr of pressure. A plasma of the inert gas is then ignited. Theenergetic ions of the plasma bombard the surface of the target.

� The energy of the bombarding ions (~keV) is sufficient to make someof the target atoms escape from the surface. Some of these atoms landon the sample surface and form a thin film.

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� Sputtered films tend to have better uniformity than evaporated ones,and the high-energy plasma overcomes the temperature limitations ofevaporation.

� Most elements from the periodic table, including both inorganic andorganic compounds, can be sputtered.

� Refractory materials can be sputtered with ease, whereas theevaporation of materials with very high boiling points is problematic.

� In addition, materials from more than one target can be sputtered atthe same time. This process is referred to as cocococo----sputteringsputteringsputteringsputtering.

� The structure of sputtered films is mainly amorphous, and its stressand mechanical properties are sensitive to specific sputteringconditions.

� Some atoms of the inert gas can be trapped in the film, causinganomalies in its mechanical and structural characteristics.

� Therefore, the exact properties of a thin film vary according to theprecise conditions under which it was made.

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mems process

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