meljun cortes combinational circuits (part 2)

8/8/2019 MELJUN CORTES Combinational Circuits (Part 2)

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converts a number from one system or code toanother

Encoder

converts (at most) 2N inputs to N binary outputs

A hexadecimal-to-binary encoder requires 16inputs to represent each of the hexadecimalnumerals. To represent the hexadecimalnumerals in binary, we will need 4 bits for the

output.

Determine the input and output requirements

the circuit requires 16 inputs and 4 bits for the

out ut

Combinational Circuits (Part 2) * Property of STI Page 1 of 19

Obtain the truth table showing the relationshipof the inputs and the outputs


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the encoder, as shown in the table, has thelimitation that only one input can be active at

Encoder

any given time



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Circuit implementation of the Hex-To-BinaryEncoder

Encoder



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a digital circuit that performs the inverseoperation of an encoder

Decoder

converts n bits of binary code to (up to) 2n unique outputs of coded information

Consider the 2-to-4 line decoder. This decoderis the so-called N -to-m line decoder where m ≤2N .


a 2-to-4 line decoder has two input lines decodedinto four output lines

let the in uts A1 and A0 the out uts 0 u to 3


Obtain the truth table showing the relationshipof the inputs and the outputs


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Decoder

Draw the logic diagram directly from the aboverelationships

Circuit implementation of a Two-to-Four LineDecoder



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the 2-to-4 line decoder can be thought of as asingle block, packaged into single chips, with

Decoder

two inputs and four outputs

A Two-to-Four Line Decoder with Chip Enable

- Block Diagram



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- Lo ic Circuit

Decoder



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Example 1:

A 3-to-8 decoder is needed. However, onl 2-

Decoder

to-4 decoders are currently available.Implement a 3-to-8 line decoder using theavailable line decoder and logic gates. Thetruth table of the function is already given hereas:



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- Lo ic Circuit

Decoder



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sometimes abbreviated as MUX

a combinational circuit that selects binar

Multiplexer

information from one of many input lines andleads the flow of information to a single outputline

Logic Diagram of a Four-to-One MUX



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simply the functional opposite of the multiplexer

sometimes abbreviated as DMUX

Demultiplexer

receives data from one input line and directs itinto one of many possible output lines

Logic Diagram of a Four-to-One MUX



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a collection of devices/components that canstore binary information

Memory

needed by all digital computers to run andexists in almost every digital device

Read-Only Memory (ROM)

the kind of memory that stores datapermanently

Random-Access Memory (RAM)

capable of transferring data and informationfrom memory


also capable of accepting new information for

storageWrite Operation

the process of accepting new information forstorage

Read Operation

transferring out data


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Random-Access Memory (RAM)

fre uentl referred to as a volatile memor

Memory

needs to be always powered on in order for it toretain the interconnections needed for it tofunction

Read-Only Memory (ROM)

nonvolatile in nature it retains its internal programming and

interconnection even when power is turned off

can only be programmed once

a member of a family of devices called


programmable logic devices (PL ) - an IC

with internal logic gates

Programmable Logic Array (PLA)

another member of PLD


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a single line is connected to the gate and allinterconnection is done by intersecting the

Memory

single line and putting an X symbol over theintersection to represent a connection

Alternative Representation

of Multiple Input Gate



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a memory (or storage) device in whichpermanent binary information is stored

Read-OnlyMemory

comes with special internal electronic fuses thatcan be “programmed” for a specificconfiguration

a device that includes both the decoder and theOR gates within a single IC package

Logic Diagram of a ROM


* Digital Design by M. Morris Mano, p. 180.


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Truth Table:

Read-OnlyMemory

• consists of n input linesand m output lines

Address


* Digital Design by M. Morris Mano, p. 180.

• eac t com nat on o

the input variablesWord

• each bit combination that

comes out of the outputlines


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Programming the ROM

Read-OnlyMemory



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programmed using the same method to that of theROM

ProgrammableLogic Array

no decoder is used and not all of the minterms can begenerated

Example 1:

Given the Boolean functions:

D 0 = X’YZ’ + XY’ + XZ + YZ

D 1 = (XZ )’ (YZ )’

Solution:


there are three inputs needed for the circuit each


there are two outputs Simplify the equation

the first function is already a sum of productsexpression

the second may be converted to a sum of productsform by using DeMorgan’s, hence, it is written as

D 1 = (XZ + YZ)’


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Programming the PLA

ProgrammableLogic Array

Combinational Circuits (Part 2) * Property of STI

meljun cortes combinational circuits (part 2)

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