meeting w10 chapter 3 part 3

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Chapter 3 Digital Control System Data Distribution Systems Digital Controller Sampling

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Page 1: Meeting w10   chapter 3 part 3

Chapter 3 Digital Control System

Data Distribution SystemsDigital ControllerSampling

Page 2: Meeting w10   chapter 3 part 3

Demultiplexer

Demultiplexer separates the composite output digital data from the digital controller into the original channels

It (the demultiplexer) is synchronized with the input sampling signal

Each channel is connected to a DAC to produce the output analog signal for the channel

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Page 3: Meeting w10   chapter 3 part 3

Digital-to-analog converter (DAC)

A device that converts a digital signal (numerically coded data or binary numbers) into an analog signal

Needed as an interface between a digital component and an analog component

The output is the voltage signal

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Page 4: Meeting w10   chapter 3 part 3

8 bit DAC

Figure below shows the 8-bit DAC block diagram

8-bit DAC block diagram

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Page 5: Meeting w10   chapter 3 part 3

Cont.

Input is an 8-bit digital word Output is a current that is proportional to the binary input

value and must be converted to a voltage with an op-amp

A stable reference voltage (Vref) must be supplied to the DAC

This voltage defines the maximum analog voltage that is, for a digital input of 11111111, Vout is essentially Vref

If the input is 00000000, the Vout will be 0 Vdc For all values in between, the output voltage is a linear

percentage of Vref

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Page 6: Meeting w10   chapter 3 part 3

Equation to remember:

Vout is DAC output analog voltage

input is decimal value of the digital input

Vref is reference voltage to the DAC

12

n

refout

VinputV

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Page 7: Meeting w10   chapter 3 part 3

Example 1

WHAT IS THE RELATION BETWEEN NUMBER OF BIT OF DAC AND ITS RESOLUTION?

GIVE AN EXAMPLE.

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Page 8: Meeting w10   chapter 3 part 3

Example 2

Find the output value of 8-bit DAC if digital input 10011001 is applied to it. The maximum output of the DAC is 10 VDC.

Solution:

10011001 = 153

VDC

VinputV

n

refout

6255

1015312

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Page 9: Meeting w10   chapter 3 part 3

Example 3

Calculate the 12-bit DAC resolution and find the binary value of the input if the output shows 7 VDC over 12 Vref.

Solution:

011001010101

955

238975.238812

4095712

%02.01004095

1Re

40951212 12

h

VDC

input

VinputV

solution

n

refout

n

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Page 10: Meeting w10   chapter 3 part 3

DAC method

Two methods frequently used for digital-to-analog conversion:

1. using weighted resistors (simple in circuit configuration, poor in accuracy)

2. using the R-2R ladder network (complicated in configuration, good accuracy)

Following slide show the diagram of both method and the operation

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Page 11: Meeting w10   chapter 3 part 3

Weighted resistors

Schematic diagram of a DAC using weighted resistors

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Page 12: Meeting w10   chapter 3 part 3

Operation:

Switch b0 to b3 is the digital input of DAC that connect Vref to the resistor if receives binary 1 and connect Vref to the ground if receives binary 0

Since in practice the signal is applied in parallel, all bits act simultaneously and generates analog output voltage by given digital voltage

The equation connecting the digital input and analog output is given by

refout Vbbb

bR

RV

8

0

4

1

2

230

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Page 13: Meeting w10   chapter 3 part 3

Question?

How the number of bit affecting the DAC accuracy.

Answer:

When number of bit is increased, the range of resistor values become large and this result poor accuracy of the DAC.

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Page 14: Meeting w10   chapter 3 part 3

R-2R ladder circuit

n-Bit DAC using an R-2R Ladder Circuit

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Operation:

The operation is the same as previous method instead only R and 2R resistor value are used

This result a high level of accuracy and relation between the digital input and analog output is given by,

refnnnout VbbbV

0121 2

1.......

2

1

2

1

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Page 16: Meeting w10   chapter 3 part 3

Hold

Sampling operation produces an amplitude-modulated pulse signal

The function of the operation is to reconstruct analog signal that has been transmitted as train of pulses samples

The purpose of the hold operation is to fill in the spaces between sampling periods and thus roughly reconstruct the original analog input signal

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Page 17: Meeting w10   chapter 3 part 3

Cont.

Following diagram illustrates the staircase waveform constructed from original input signal

Output from a zero-order hold

Hold

Sample

Sample

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Page 18: Meeting w10   chapter 3 part 3

Cont.

The hold circuit is designed to extrapolate the output signal between successive points in some prescribed manner

The hold circuit that produces such a staircase waveform is called a zero-order hold and is mostly used due to its simplicity

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Page 19: Meeting w10   chapter 3 part 3

6. Digital controller

Digital controller main function is to control the closed-loop response of a system

Digital controller is essentially a computer (or a microcontroller)

Since computer cannot accept analog signal, ADC is needed to interface between computer and and feedback transducer

Similarly, computer cannot generate analog signal which required DAC to interface the computer to the final control elements as following figure

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Page 20: Meeting w10   chapter 3 part 3

Cont.

A closed-loop control system with a digital controller is shown in the following slide

Structure of a digital controller

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Cont.

The conventional analog controller has been replaced with computer software executing the control algorithm

The purpose of the summation block is to generate the error signal as a difference of SP and MV values

Digital controller in a closed loop

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Cont.

In practice, the summation block is replaced by a line of computer code, which takes the numerical (digitized) set-point data and subtracts measured values from that data

Following figure shows detail of digital control loop configuration

Digital control loop configuration

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Page 23: Meeting w10   chapter 3 part 3

Cont.

Digital controller accepts values form SP and MV from ADC

It processes the information according to the software and generates appropriate output to DAC

Software is coded to execute control algorithm for the closed-loop system under control

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Page 24: Meeting w10   chapter 3 part 3

Ideal sampling

The process of sampling of a band limited analog signal and its spectra is shown as below

Analog signal(band limited)

t

x(t)

X(f)

B-B

A

Sampling function

t

i(t)

ts

(1)(1)......

Ideally sampled signal

t

xI(t)

ts

S 2S-S

...

(S)

... f

(S)

I(f)

Spectra

...

S 2S-S

... ft

XI(f)

-B B

AS

FF F

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Page 25: Meeting w10   chapter 3 part 3

Cont.

Period of the impulse train (sampling function)/sampling period:

S: sampling rate The spectrum of ideally sampled signal is

periodic with period S

Ss

1 t T

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Page 26: Meeting w10   chapter 3 part 3

Shannon sampling theorem

Analog signal band limited to a frequency B can be sampled without loss of information if the sampling rate S exceeds 2B.

This is due to the spectrum of ideally sampled signal X1(f) consist of the spectrum of the original signal X(f) and its shifted replicas.

The original signal can be obtained from the sample signal if the spectrum in the principal period (-0.5S to 0.5S) is extracted

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Page 27: Meeting w10   chapter 3 part 3

Cont.

The critical sampling rate SN = 2B is called the Nyquist rate or Nyquist frequency

The critical sampling interval tN = 1/SN = 1/2B is called the Nyquist interval

Three possibilities may occur to the spectrum of the sampled signal when we do sampling:

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Page 28: Meeting w10   chapter 3 part 3

Cont....

S-S

... f

XI(f)

-B B

oversamplingS > 2B

...

S-S

... f

XI(f)

-B B

critical samplingS = 2B

...

S-S

... f

XI(f)

-B B

undersamplingS < 2B

Possibilities for Spectrum of a Sampled Signal

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Cont.

In undersampling condition, the spectrum overlaps which causes interference which also referred as aliasing

The spectrum in the principal period no longer exact replica of the spectrum of the original signal so that the original signal can not be recovered exactly from the sampled signal

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Example of digital control system

Example of digital control system 30

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System description:

Utilizing a microprocessor-based controller with parallel ports

System has one output port and three input ports (each port has each own address)

Output port is segmented: Six bits are converted in a DAC to provide the analog motor-speed signal, the seventh bit specifies motor direction (1 = clockwise, 0 = counterclockwise), the eighth bit turns on an audio alarm if some emergency situation is detected

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Page 32: Meeting w10   chapter 3 part 3

Cont.

The first input port detects the set-point data, the second input port receives the ADC data from the sensor, the third input port is various 1-bit logical variables

Limit switches are used as a “backup” to detect it if the load has gone out of the designated range

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System operation:

Controller inputs the data from port 03 to determine if the start (or stop) button has been pressed

If the start button has been pressed, then the set point is read in from port 01 and the digitized sensor data is read in from port 02

controller outputs to port 00 a binary word representing the motor speed voltage

This digital data is converted to an analog voltage with the DAC

sequence is repeated over and over until the stop button is pushed

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