ltc1438/lt1439 - dual high efficiency, low noise ......3.3v selected vprog1, vprog2 = 0v 3.220 3.30...

LTC1438/LTC1439

114389fb

, LTC and LT are registered trademarks of Linear Technology Corporation. Adaptive Power is a trademark of Linear Technology Corporation. All other trademarks are the prop-erty of their respective owners. Protected by U.S. Patents including 5481178, 6304066, 5929620, 6580258, 5705919, 5731731.

The LTC ®1438/LTC1439 are dual, synchronous step-down switching regulator controllers which drive externalN-channel power MOSFETs in a phase-lockable fixedfrequency architecture. The Adaptive PowerTM output stageselectively drives two N-channel MOSFETs at frequenciesup to 400kHz while reducing switching losses to maintainhigh efficiencies at low output currents.

An auxiliary 0.5A linear regulator using an external PNPpass device provides a low noise, low dropout voltagesource. A secondary winding feedback control pin (SFB1)guarantees regulation regardless of load on the mainoutput by forcing continuous operation.

An additional comparator is available for use as a lowbattery detector. A power-on reset timer (POR) is includedwhich generates a signal delayed by 65536/fCLK (typ300ms) after the output is within 5% of the regulatedoutput voltage. Internal resistive dividers provide pinselectable output voltages with remote sense capability onone of the two outputs.

The operating current levels are user-programmable viaexternal current sense resistors. Wide input supply rangeallows operation from 3.5V to 30V (36V maximum).

Maintains Constant Frequency at Low OutputCurrents

Dual N-Channel MOSFET Synchronous Drive Programmable Fixed Frequency (PLL Lockable) Wide VIN Range: 3.5V to 36V Operation Ultrahigh Efficiency Very Low Dropout Operation: 99% Duty Cycle Low Dropout, 0.5A Linear Regulator for VPP

Generation or Low Noise Audio Supply Built-In Power-On Reset Timer Programmable Soft Start Low-Battery Detector Remote Output Voltage Sense Foldback Current Limiting (Optional) Pin Selectable Output Voltage Logic-Controlled Micropower Shutdown: IQ < 30µA Output Voltages from 1.19V to 9V Available in 28- and 36-Lead SSOP Packages

APPLICATIO SU

TYPICAL APPLICATIO

U

DESCRIPTIO

U

FEATURES

Notebook and Palmtop Computers, PDAs Portable Instruments Battery-Operated Devices DC Power Distribution Systems

Dual High Efficiency,Low Noise, Synchronous

Step-Down Switching Regulators

Figure 1. High Efficiency Dual 5V/3V Step-Down Converter

BOOST 2BOOST 1

TGL2

TGS2

SW2

BG2

SENSE+ 2

SENSE– 2

VOSENSE2

ITH2

TGL1

M3*

M1

M2

TGS1

D1MBR140T3

VOUT15V

3.5A

VOUT23.3V3.5A

L110µH

SW1

BG1 LTC1439

SENSE+ 1

SENSE– 1

CSS10.1µF

CC11000pFCOUT1

220µF10V

RSENSE10.03Ω

RSENSE20.03Ω

COUT220µF10V

RC110k

ITH1RUN/SS2PGNDSGNDVPROG2COSC

INTVCC

DB2, CMDSH-3DB1, CMDSH-3

VINVPROG1

RUN/SS1

D2MBR140T3

CB1 0.1µF

CB2, 0.1µF

4.7µF16V

M6*

1438 F01

M4

1000pF

1000pF

COSC56pF

CSS20.1µF

CC1A220pF

M1, M2, M4, M5: Si4412ADY M3, M6: IRLML2803 *NOT REQUIRED FOR LTC1438

CC2A470pF

CC21000pF

RC210k

+

L210µH

VIN5.2V TO 28V+

+

CIN22µF35V× 4

+

BOLD LINES INDICATE HIGH CURRENT PATHS

M5

LTC1438/LTC1439

214389fb

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

TOP VIEW

GW PACKAGE36-LEAD PLASTIC SSOP

G PACKAGE36-LEAD PLASTIC SSOP

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

RUN/SS1

SENSE+ 1

SENSE– 1

VPROG1

ITH1

POR2

COSC

SGND

LBI

LBO

SFB1

ITH2

VPROG2

VOSENSE2

SENSE– 2

SENSE+ 2

RUN/SS2

AUXDR

PLL LPF

PLLIN

BOOST 1

TGL1

SW1

TGS1

VIN

BG1

INTVCC

PGND

BG2

EXTVCC

TGS2

SW2

TGL2

BOOST 2

AUXON

AUXFB

1

2

3

4

5

6

7

8

9

10

11

12

13

14

TOP VIEW

G PACKAGE28-LEAD PLASTIC SSOP

28

27

26

25

24

23

22

21

20

19

18

17

16

15

SENSE+ 1

SENSE– 1

VPROG1*

ITH1

POR2**

COSC

SGND

LBI

LBO

SFB1

ITH2

VOSENSE2

SENSE– 2

SENSE+ 2

RUN/SS1

BOOST 1

TGL1

SW1

VIN

BG1

INTVCC

PGND

BG2

EXTVCC

SW2

TGL2

BOOST 2

RUN/SS2

VOSENSE1 ON LTC1438-ADJNC ON THE LTC1438XCG

***

Input Supply Voltage (VIN)......................... 36V to –0.3VTopside Driver Voltage (BOOST 1, 2) ........ 42V to –0.3VSwitch Voltage (SW1, 2) ....................... VIN + 5V to –5VEXTVCC Voltage ......................................... 10V to –0.3VPOR2, LBO Voltages ................................. 12V to –0.3VAUXFB Voltage ......................................... 20V to –0.3VAUXDR Voltage ......................................... 28V to –0.3VSENSE+ 1, SENSE+ 2, SENSE– 1, SENSE– 2,

VOSENSE2 Voltages ................. INTVCC + 0.3V to –0.3VVPROG1, VPROG2 Voltages ..................... INTVCC to –0.3VPLL LPF, ITH1, ITH2 Voltages .................... 2.7V to –0.3V

ABSOLUTE AXI U RATI GS

W WW U

AUXON, PLLIN, SFB1,RUN/SS1, RUN/SS2, LBI Voltages ....... 10V to –0.3V

Peak Output Current < 10µs (TGL1, 2, BG1, 2) .......... 2APeak Output Current < 10µs (TGS1, 2) ............... 250mAINTVCC Output Current ........................................ 50mAOperating Ambient Temperature Range

Commercial ............................................ 0°C to 70°CExtended (Note 7)............................... –40°C to 85°CIndustrial ............................................ –40°C to 85°C

Junction Temperature (Note 2) ............................. 125°CStorage Temperature Range .................. –65°C to 150°CLead Temperature (Soldering, 10 sec).................. 300°C

ORDERPART NUMBER

LTC1439CGLTC1439EGLTC1439IGLTC1439CGWLTC1439IGW

ORDERPART NUMBER

PACKAGE/ORDER INFORMATION

W UU

LTC1438CGLTC1438CG-ADJLTC1438IGLTC1438IG-ADJLTC1438XCG

TJMAX = 125°C, θJA = 95°C/WTJMAX = 125°C, θJA = 95°C/W (G)TJMAX = 125°C, θJA = 85°C/W (GW)

(Note 1)

Consult factory for Military grade parts.

LTC1438/LTC1439

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The denotes the specifications which apply over the full operatingtemperature range. TA = 25°C, VIN = 15V, VRUN/SS1,2 = 5V unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITSMain Control LoopsIIN VOSENSE1,2 Feedback Current VPROG1, VPROG2 Pins Open (Note 3) 10 50 nAVOUT1,2 Regulated Output Voltage (Note 3)

1.19V (Adjustable) Selected VPROG1, VPROG2 Pins Open 1.178 1.19 1.202 V3.3V Selected VPROG1, VPROG2 = 0V 3.220 3.30 3.380 V5V Selected VPROG1, VPROG2 = INT VCC 4.900 5.00 5.100 V

VLINEREG1,2 Reference Voltage Line Regulation VIN = 3.6V to 20V (Note 3), VPROG1,2 Pins Open 0.002 0.01 %/VVLOADREG1,2 Output Voltage Load Regulation ITH1,2 Sinking 5µA (Note 3) 0.5 0.8 %

ITH1,2 Sourcing 5µA –0.5 –0.8 %VSFB1 Secondary Feedback Threshold VSFB1 Ramping Negative 1.16 1.19 1.22 VISFB1 Secondary Feedback Current VSFB1 = 1.5V –1 –2 µAVOVL Output Overvoltage Lockout VPROG1,2, SENSE – 1 and VOSENSE1,2 Pins Open 1.24 1.28 1.32 VIPROG1,2 VPROG1,2 Input Current 0.5V > VPROG1,2 –3 –6 µA

INTVCC – 0.5V < VPROG1,2 < INTVCC 3 6 µAIQ Input DC Supply Current EXTVCC = 5V (Note 4)

Normal Mode 3.6V < VIN < 30V, VAUXON = 0V 320 µAShutdown VRUN/SS1,2 = 0V, 3.6V < VIN < 15V 16 30 µA

VRUN/SS1,2 Run Pin Threshold 0.8 1.3 2 VIRUN/SS1,2 Soft Start Current Source VRUN/SS1,2 = 0V 1.5 3 4.5 µA∆VSENSE(MAX) Maximum Current Sense Threshold VOSENSE1,2 = 0V, 5V VPROG1,2 = Pins Open 130 150 180 mVTGL1, 2 tr, t f TGL1, TGL2 Transition Time

Rise Time CLOAD = 3000pF 50 150 nsFall Time CLOAD = 3000pF 50 150 ns

TGS1, 2 t r, tf TGS1, TGS2 Transition TimeRise Time CLOAD = 500pF 100 200 nsFall Time CLOAD = 500pF 50 150 ns

BG1, 2 tr, tf BG1, BG2 Transition TimeRise Time CLOAD = 3000pF 50 150 nsFall Time CLOAD = 3000pF 50 150 ns

Internal VCC RegulatorVINTVCC Internal VCC Voltage 6V < VIN < 30V, VEXTVCC = 4V 4.8 5.0 5.2 VVLDO INT INTVCC Load Regulation IINTVCC = 20mA, VEXTVCC = 4V –0.2 –1 %VLDO EXT EXTVCC Voltage Drop IINTVCC = 20mA, VEXTVCC = 5V 170 300 mVVEXTVCC EXTVCC Switchover Voltage IINTVCC = 20mA, EXTVCC Ramping Positive 4.5 4.7 VOscillator and Phase-Locked LoopfOSC Oscillator Frequency COSC = 100pF, LTC1439: PLL LPF = 0V (Note 5) 112 125 138 kHz

VCO High LTC1439, VPLLLPF = 2.4V 200 240 kHzRPLLIN PLLIN Input Resistance 50 kΩIPLLLPF Phase Detector Output Current LTC1439

Sinking Capability fPLLIN < fOSC 10 15 20 µASourcing Capability fPLLIN > fOSC 10 15 20 µA

Power-On ResetVSATPOR2 POR2 Saturation Voltage IPOR2 = 1.6mA, VOSENSE2 = 1V, 0.6 1 V

VPROG2 Pin OpenILPOR2 POR2 Leakage VPOR2 = 12V, VOSENSE2 = 1.2V, VPROG2 Pin Open 0.2 1 µAVTHPOR2 POR2 Trip Voltage VPROG2 Pin Open % of VREF

VOSENSE2 Ramping Negative – 11 –7.5 –4 %tDPOR2 POR2 Delay VPROG2 Pin Open 65536 Cycles

ELECTRICAL CHARACTERISTICS

LTC1438/LTC1439

414389fb

The denotes the specifications which apply over the full operatingtemperature range. TA = 25°C, VIN = 15V, VRUN/SS1,2 = 5V unless otherwise noted.ELECTRICAL CHARACTERISTICS

Note 1: Absolute Maximum Ratings are those values beyond which the lifeof the device may be impaired.Note 2: TJ is calculated from the ambient temperature TA and powerdissipation PD according to the following formulas:

LTC1438CG, LTC1439CG: TJ = TA + (PD)(95°C/W)LTC1439CGW: TJ = TA + (PD)(85°C/W)

Note 3: The LTC1438 and LTC1439 are tested in a feedback loop whichservos VOSENSE1,2 to the balance point for the error amplifier(VITH1,2 = 1.19V).Note 4: Dynamic supply current is higher due to the gate charge beingdelivered at the switching frequency. See Applications Information.

Note 5: Oscillator frequency is tested by measuring the COSC charge anddischarge current (IOSC) and applying the formula:

fOSC (kHz) = 8.4(108)[COSC (pF) + 11]–1 (1/ICHG + 1/IDISC) –1

Note 6: The auxiliary regulator is tested in a feedback loop which servosVAUXFB to the balance point for the error amplifier. For applications withVAUXDR > 9.5V, VAUXFB uses an internal resistive divider. See ApplicationsInformation section.Note 7: The LTC1439EG is guaranteed to meet performance specificationsfrom 0°C to 70°C. Specifications over the –40°C to 85°C operatingtemperature range are assured by design, characterization and correlationwith statistical process controls.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITSLow-Battery ComparatorVSATLBO LBO Saturation Voltage ILBO = 1.6mA, VLBI = 1.1V 0.6 1 VILLBO LBO Leakage VLBO = 12V, VLBI = 1.4V 0.01 1 µAVTHLB1 LBI Trip Voltage High to Low Transition on LBO 1.16 1.19 1.22 VIINLB1 LBI Input Current VLBI = 1.19V 1 50 nAVHYSLBO LBO Hysteresis 20 mVAuxiliary Regulator/ComparatorIAUXDR AUXDR Current VEXTVCC = 0V

Max Current Sinking Capability VAUXDR = 4V, VAUXFB = 1.0V, VAUXON = 5V 10 15 mAControl Current VAUXDR = 5V, VAUXFB = 1.5V, VAUXON = 5V 1 5 µALeakage when OFF VAUXDR = 24V, VAUXFB = 1.5V, VAUXON = 0V 0.01 1 µA

IINAUXFB AUXFB Input Current VAUXFB = 1.19V, VAUXON = 5V 0.01 1 µAIINAUXON AUXON Input Current VAUXON = 5V 0.01 1 µAVTHAUXON AUXON Trip Voltage VAUXDR = 4V, VAUXFB = 1V 1.0 1.19 1.4 VVSATAUXDR AUXDR Saturation Voltage IAUXDR = 1.6mA, VAUXFB = 1V, VAUXON = 5V 0.4 0.8 VVAUXFB AUXFB Voltage VAUXON = 5V, 11V < VAUXDR < 24V (Note 6) 11.5 12.0 12.5 V

VAUXON = 5V, 3V < VAUXDR < 7V 1.14 1.19 1.24 VVTHAUXDR AUXFB Divider Disconnect Voltage VAUXON = 5V (Note 6); Ramping Negative 7.5 8.5 9.5 V

LTC1438/LTC1439

514389fb

LOAD CURRENT (A)0.001

50

EFFI

CIEN

CY (%

)

55

65

70

75

100

85

0.01 0.1 1

1435 G03

60

90

95

80

10

Adaptive PowerMODE

CONTINUOUSMODE

VIN = 10VVOUT = 5VRSENSE = 0.033Ω

Burst Mode®

OPERATION

TYPICAL PERFORMANCE CHARACTERISTICS

UW

Efficiency vs Input VoltageVOUT = 3.3V

VIN – VOUT Dropout Voltagevs Load Current

Efficiency vs Load Current

VITH Pin Voltage vs Output CurrentLoad Regulation

Input Supply Currentvs Input Voltage

EXTVCC Switch Dropvs INTVCC Load Current

INPUT VOLTAGE (V)0

70

EFFI

CIEN

CY (%

)

75

80

85

90

100

5 10 15 20

1438 G01

25 30

95ILOAD = 1A

ILOAD = 100mA

VOUT = 3.3V

Efficiency vs Input VoltageVOUT = 5V

INPUT VOLTAGE (V)0

70

EFFI

CIEN

CY (%

)

75

80

85

90

100

5 10 15 20

1438 G02

25 30

95ILOAD = 1A

ILOAD = 100mA

VOUT = 5V

LOAD CURRENT (A)0

0

V IN

– V O

UT (V

)

0.2

0.1

0.3

0.4

0.5

0.5 1.0 1.5 2.0

1438 G04

2.5 3.0

RSENSE = 0.033ΩVOUT DROP OF 5%M1, M2: Si4412

LOAD CURRENT (A)0

∆V O

UT (%

)

0

0.5 1.0 1.5 2.0

1438 G05

2.5 3.0

–0.25

–0.50

–0.75

–1.00

–1.25

–1.50

RSENSE = 0.033Ω

OUTPUT CURRENT (%)

0

V ITH

(V)

1.0

2.0

3.0

0.5

1.5

2.5

20 40 60 80

1438 G06

100100 30 50 70 90

Burst ModeOPERATION CONTINUOUS/Adaptive

Power MODE

INPUT VOLTAGE (V)0

0

SUPP

LY C

URRE

NT (m

A)

SHUTDOWN CURRENT (µA)

0.5

1.0

1.5

2.0

2.5

0

5

10

15

20

25

30

35

5 10 15 20

1438 G07

25 30

SHUTDOWNCURRENT

5V OFF3.3V ON

5V AND3.3V ON

5V ON3.3V OFF

INTVCC LOAD CURRENT (mA)0

EXTV

CC –

INTV

CC (m

V)

200

300

20

1438 G09

100

05 10 15 25 30

–45°C

25°C

70°C

INTVCC Regulationvs INTVCC Load Current

INTVCC LOAD CURRENT (mA)0

INTV

CC %

CHA

NGE,

NOR

MAL

IZED

(V)

0

1

5040

1438 G08

–1

–210 20 30

2

70°C

25°C

EXTVCC = 0V

Burst Mode is a registered trademark of Linear Technology Corporation.

LTC1438/LTC1439

614389fb


UW

Normalized Oscillator Frequencyvs Temperature

Transient ResponseTransient ResponseMaximum Current SenseThreshold Voltage vs Temperature

ILOAD = 50mA to 1A 1438 G14 ILOAD = 1A to 3A 1438 G15

RUN/SS Pin Currentvs Temperature

VOUT50mV/DIV

VOUT50mV/DIV

VOUT20mV/DIV

VITH200mV/DIV

ILOAD = 50mA 1438 G16

Burst Mode OperationAuxiliary Regulator LoadRegulation

SFB1 Pin Current vs Temperature

Soft Start: Load Current vs Time

1438 G17

RUN/SS5V/DIV

INDUCTORCURRENT

1A/DIV

TEMPERATURE (°C)–40

FREQ

UENC

Y (%

)

5

10

35 85

1438 G10

fO

–15 10 60 110 135

–5

–10


0

RUN/

SS C

URRE

NT (µ

A)

1

2

3

4

–15 10 35 60

1438 G11

85 110 135


SFB

CURR

ENT

(µA) –1.50

–0.25

0

35 85

1438 G12

–0.75

–1.00

–15 10 60 110 135

–1.25

–1.50


146

CURR

ENT

SENS

E TH

RESH

OLD

(mV)

148

150

152

154

–15 10 35 60

1438 G13

85 110 135

AUXILIARY LOAD CURRENT (mA)0

AUXI

LIAR

Y OU

TPUT

VOL

TAGE

(V)

12.0

12.1

12.2

160

1438 G18

11.9

11.8

11.740 80 120 200

EXTERNAL PNP: 2N2907A

LTC1438/LTC1439

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UW

Auxiliary RegulatorSink Current Available Auxiliary Regulator PSRR

AUX DR VOLTAGE (V)0

0

AUX

DR C

URRE

NT (m

A)

5

10

15

20

2 4 6 8

1438 G19

10 12 14 16FREQUENCY (kHz)

1010

20

30

40

50

60

70

PSRR

(dB)

100 1000

1438 G20

10mA LOAD

100mA LOAD

PIN FUNCTIONS

UUU

VIN: Main Supply Pin. Must be closely decoupled to theIC’s signal ground pin.

INTVCC: Output of the Internal 5V Regulator and theEXTVCC Switch. The driver and control circuits are pow-ered from this voltage. Must be closely decoupled topower ground with a minimum of 2.2µF tantalum orelectrolytic capacitor. The INTVCC regulator turns off whenboth RUN/SS1 and RUN/SS2 are low. Refer to the LTC1538/LTC1539 for 5V keep-alive applications.

EXTVCC: External Power Input to an Internal Switch. Thisswitch closes and supplies INTVCC, bypassing the internallow dropout regulator whenever EXTVCC is higher than4.7V. Connect this pin to VOUT of the controller with thehigher output voltage. Do not exceed 10V on this pin. SeeEXTVCC connection in Applications Information section.

BOOST 1, BOOST 2: Supplies to the Topside FloatingDrivers. The bootstrap capacitors are returned to thesepins. Voltage swing at these pins is from INTVCC toVIN + INTVCC.

SW1, SW2: Switch Node Connections to Inductors. Volt-age swing at these pins is from a Schottky diode (external)voltage drop below ground to VIN.

SGND: Small-Signal Ground. Common to both control-lers, must be routed separately from high current groundsto the (–) terminals of the COUT capacitors.

PGND: Driver Power Ground. Connects to sources ofbottom N-channel MOSFETs and the (–) terminals of CIN.

SENSE – 1, SENSE – 2: Connects to the (–) input for thecurrent comparators. Except for the LTC1438-ADJ, SENSE–

1 is internally connected to the first controller’s VOUTsensing point. The first controller can only be used as a3.3V or 5.0V regulator controlled by the VPROG1 pin withthe LTC1438, LTC1438X and LTC1439. The LTC1438-ADJController 1 implements a remote sensing adjustableregulator. The second controller can be set to a 3.3V, 5.0Vor an adjustable regulator controlled by the VPROG2 pin(see Table 1).Table 1. Output Voltage Table

LTC1438-ADJ LTC1438/LTC1438X LTC1439

Controller 1 Adjustable Only 5V or 3.3V Only

Secondary Feedback Loop

Controller 2 Adjustable Only Adjustable Only 5V/3.3V/AdjustableRemote Sensing Remote Sensing Remote Sensing

POR2 Output POR2 Output POR2 Output

LTC1438/LTC1439

814389fb

switch node voltage SW. Leaving TGS1 or TGS2 openinvokes Burst Mode operation for that controller.

BG1, BG2: High Current Gate Drive Outputs for BottomN-Channel MOSFETs. Voltage swing at these pins is fromground to INTVCC.

SFB1: Secondary Winding Feedback Input. This input actsonly on the first controller and is normally connected to afeedback resistive divider from the secondary winding.Pulling this pin below 1.19V will force continuous syn-chronous operation for the first controller. This pin shouldbe tied to: ground to force continuous operation; INTVCCin applications that don’t use a secondary winding; and aresistive divider from the output in applications using asecondary winding.

POR2: This output is a drain of an N-channel pull-down.This pin sinks current when the output voltage of thesecond controller drops 7.5% below its regulated voltageand releases 65536 oscillator cycles after the outputvoltage of the second controller rises to within –5% valueof its regulated value. The POR2 output is asserted whenRUN/SS1 and RUN/SS2 are both low, independant of theVOUT2. This pin is not functional on the LTC1438X.

LBO: This output is a drain of an N-channel pull-down.This pin will sink current when the LBI pin goes below1.19V.

LBI: The (+) input of a comparator which can be used asa low-battery voltage detector. The (–) input is connectedto the 1.19V internal reference.

PLLIN: External Synchronizing Input to Phase Detector.This pin is internally terminated to SGND with 50kΩ. Tiethis pin to SGND in applications which do not use thephase-locked loop.

PLL LPF: Output of Phase Detector and Control Input ofOscillator. Normally a series RC lowpass filter network isconnected from this pin to ground. Tie this pin to SGND inapplications which do not use the phase-locked loop. Canbe driven by a 0V to 2.4V logic signal for a frequencyshifting option.

AUXFB: Feedback Input to the Auxiliary Regulator/Com-parator. When used as a linear regulator, this input caneither be connected to an external resistive divider or

PIN FUNCTIONS

UUU

SENSE+ 1, SENSE+ 2: The (+) Input to Each CurrentComparator. Built-in offsets between SENSE– 1 andSENSE+ 1 pins in conjunction with RSENSE1 set the currenttrip threshold (same for second controller).

VOSENSE1,2: Receives the remotely sensed feedback volt-age either from the output directly or from an externalresistive divider across the output. The VPROG2 pin deter-mines which point VOSENSE2 must connect to. The VOSENSE1pin, only available on the LTC1438-ADJ, requires anexternal resistive divider to set the output voltage.

VPROG1, VPROG2: Programs Internal Voltage Attenuatorsfor Output Voltage Sensing. The voltage sensing forthefirst controller is internally connected to SENSE– 1while the VOSENSE2 pin allows for remote sensing for thesecond controller. For VPROG1, VPROG2 < VINTVCC/3, thedivider is set for an output voltage of 3.3V. With VPROG1,VPROG2 > VINTVCC/1.5 the divider is set for an outputvoltage of 5V. Leaving VPROG2 open (DC) allows theoutput voltage of the second controller to be set by anexternal resistive divider connected to VOSENSE2.

COSC: External capacitor COSC from this pin to ground setsthe operating frequency.

ITH1, ITH2: Error Amplifier Compensation Point. Eachassociated current comparator threshold increases withthis control voltage.

RUN/SS1, RUN/SS2: Combination of Soft Start and RunControl Inputs. A capacitor to ground at each of these pinssets the ramp time to full current output. The time isapproximately 0.5s/µF. Forcing either of these pins below1.3V causes the IC to shut down the circuitry required forthat particular controller. Forcing both of these pins below1.3V causes the device to shut down completely. Forapplications which require 5V keep-alive, refer to theLTC1538-AUX/LTC1539.

TGL1, TGL2: High Current Gate Drives for Main TopN-Channel MOSFET. These are the outputs of floatingdrivers with a voltage swing equal to INTVCC superim-posed on the switch node voltage SW1 and SW2.

TGS1, TGS2: Gate Drives for Small Top N-ChannelMOSFET. These are the outputs of floating drivers with avoltage swing equal to INTVCC superimposed on the

LTC1438/LTC1439

914389fb

FUNCTIONAL DIAGRA

UU W

PHASEDETECTOR

OSCILLATOR

50k

PLLIN**

PLL LPF**

POWER-ON RESET

POR2

LBI

RLP

VFB2

1.11V

CLP

COSC

COSC

fIN

BATTERYSENSE

9V

0.6V

SFB

DROPOUTDETECTOR

DUPLICATE FOR SECOND CONTROLLER CHANNEL

SWITCHLOGIC

10k

LBO

AUXDR**

AUXFB**

SFB1* SFB

1µA

AUXON**

VLDO

VIN

4.8V

VIN

EXTVCC

INTVCC

VREF

VFB

VSEC

–

+

–

+

–

+

–

+

–

+

–

+

–

+

–

+

90.8k

+

3µA

6V

1.19VREF

5V LDOREGULATOR

RUNSOFT START

INTERNALSUPPLY

SGND

*IN SOME VERSIONS, NOT AVAILABLE ON BOTH CHANNELS **NOT AVAILABLE ON LTC1438 †FOLDBACK CURRENT LIMITING OPTION 1438 FD

SR

QQ

+

–

–

+

–

+

SHUTDOWN

INTVCC

INTVCCVIN

I1

I2

BOOST

SENSE+

VOSENSE*VOUT

ITH

VPROG*

CC

CSS

RC

RUN/SS

SENSE–

PGND

BG

SW

TGS**

TGL

8k

4k

320k

61k

119k

30k

EA

180k

1.28V

1.19V

SHUTDOWN

0V

CIN

CB

DB

RSENSECOUT

•

•

+

CSEC +

+

INTVCC

+

BOLD LINES INDICATE HIGH CURRENT PATHS

2.4V

DFB†

gm = 1m

Ω

directly to the collector of the external PNP pass device for12V operation. When used as a comparator, this is thenoninverting input of a comparator whose inverting inputis tied to the internal 1.19V reference. See AuxiliaryRegulator Application section.

AUXON: Pulling this pin high turns on the auxiliary regu-lator/comparator. The threshold is 1.19V. This is a conve-nient linear power supply logic-controlled on/off input.

AUXDR: Open Drain Output of the Auxiliary Regulator/Comparator. The base of an external PNP device is con-nected to this pin when used as a linear regulator. Anexternal pull-up resistor is required for use as a compara-tor. A voltage >9.5V on AUXDR causes the internal 12Vresistive divider to be connected in series with the AUXFBpin.

LTC1438/LTC1439

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OPERATIONU

Main Control Loop

The LTC1438/LTC1439 use a constant frequency, currentmode step-down architecture. During normal operation,the top MOSFET is turned on each cycle when the oscillatorsets the RS latch and turned off when the main currentcomparator I1 resets the RS latch. The peak inductorcurrent at which I1 resets the RS latch is controlled by thevoltage on the ITH1 (ITH2) pin, which is the output of eacherror amplifier (EA). The VPROG1 pin, described in the PinFunctions, allows the EA to receive a selectively attenuatedoutput feedback voltage VFB1 from the SENSE – 1 pin whileVPROG2 and VOSENSE2 allow EA to receive an output feed-back voltage VFB2 from either internal or external resistivedividers on the second controller. When the load currentincreases, it causes a slight decrease in VFB relative to the1.19V reference, which in turn causes the ITH1 (ITH2)voltage to increase until the average inductor currentmatches the new load current. After the large top MOSFEThas turned off, the bottom MOSFET is turned on until eitherthe inductor current starts to reverse, as indicated bycurrent comparator I2, or the beginning of the next cycle.

The top MOSFET drivers are biased from floating bootstrap capacitor CB, which normally is recharged duringeach Off cycle. When VIN decreases to a voltage close toVOUT, however, the loop may enter dropout and attempt toturn on the top MOSFET continuously. The dropout detec-tor counts the number of oscillator cycles that the topMOSFET remains on and periodically forces a brief offperiod to allow CB to recharge.

The main control loop is shut down by pulling the RUN/SS1 (RUN/SS2) pin low. Releasing RUN/SS1 (RUN/SS2)allows an internal 3µA current source to charge soft startcapacitor CSS. When CSS reaches 1.3V, the main controlloop is enabled with the ITH1 (ITH2) voltage clamped atapproximately 30% of its maximum value. As CSS contin-ues to charge, ITH1 (ITH2) is gradually released allowingnormal operation to resume. When both RUN/SS1 andRUN/SS2 are low, all LTC1438/LTC1439 functions areshut down. Refer to the LTC1538-AUX/LTC1539 datasheet for 5V keep-alive applications.

Comparator OV guards against transient overshoots >7.5%by turning off the top MOSFET and keeping it off until thefault is removed.

Low Current Operation

Adaptive Power mode allows the LTC1439 to automati-cally change between two output stages sized for differentload currents. The TGL1 (TGL2) and BG1 (BG2) pins drivelarge synchronous N-channel MOSFETs for operation athigh currents, while the TGS1 (TGS2) pin drives a muchsmaller N-channel MOSFET used in conjunction with aSchottky diode for operation at low currents. This allowsthe loop to continue to operate at normal operating fre-quency as the load current decreases without incurring thelarge MOSFET gate charge losses. If the TGS1 (TGS2) pinis left open, the loop defaults to Burst Mode operation inwhich the large MOSFETs operate intermittently based onload demand.

Adaptive Power mode provides constant frequency opera-tion down to approximately 1% of rated load current. Thisresults in an order of magnitude reduction of load currentbefore Burst Mode operation commences. Without thesmall MOSFET (i.e., no Adaptive Power mode) the transi-tion to Burst Mode operation is approximately 10% ofrated load current.

The transition to low current operation begins when com-parator I2 detects current reversal and turns off thebottom MOSFET. If the voltage across RSENSE does notexceed the hysteresis of I2 (approximately 20mV) for onefull cycle, then on following cycles the top drive is routedto the small MOSFET at the TGS1 (TGS2) pin and the BG1(BG2) pin is disabled. This continues until an inductorcurrent peak exceeds 20mV/RSENSE or the ITH1 (ITH2)voltage exceeds 0.6V, either of which causes drive to bereturned to the TGL1 (TGL2) pin on the next cycle.

Two conditions can force continuous synchronous opera-tion, even when the load current would otherwise dictatelow current operation. One is when the common modevoltage of the SENSE+ 1 (SENSE+ 2) and SENSE– 1(SENSE – 2) pins are below 1.4V, and the other is when theSFB1 pin is below 1.19V. The latter condition is used toassist in secondary winding regulation, as described in theApplications Information section.

(Refer to Functional Diagram)

LTC1438/LTC1439

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OPERATIONU

the AUXDR pin is above 9.5V to allow regulated 12VVPP supplies to be easily implemented. When AUXDR isbelow 8.5V an external feedback divider may be used to setother output voltages. Taking the AUXON pin low shutsdown the auxiliary regulator providing a convenient logic-controlled power supply.

The AUX block can be used as a comparator having itsinverting input tied to the internal 1.19V reference. TheAUXDR pin is used as the output and requires an externalpull-up to a supply of less than 8.5V in order to inhibit theinvoking of the internal resistive divider.

INTVCC/EXTVCC Power

Power for the top and bottom MOSFET drivers and mostof the other LTC1438/LTC1439 circuitry is derived fromthe INTVCC pin. The bottom MOSFET driver supply is alsoconnected to INTVCC. When the EXTVCC pin is left open, aninternal 5V low dropout regulator supplies INTVCC power.If EXTVCC is taken above 4.8V, the 5V regulator is turnedoff and an internal switch is turned on to connect EXTVCCto INTVCC. This allows the INTVCC power to be derivedfrom a high efficiency external source such as the outputof the regulator itself or a secondary winding, as describedin the Applications Information section.

(Refer to Functional Diagram)

Frequency Synchronization

A Phase-Locked Loop (PLL) is available on the LTC1439to allow the oscillator to be synchronized to an externalsource connected to the PLLIN pin. The output of thephase detector at the PLL LPF pin is also the control inputof the oscillator, which operates over a 0V to 2.4V rangecorresponding to –30% to 30% in frequency. Whenlocked, the PLL aligns the turn-on of the top MOSFET tothe rising edge of the synchronizing signal. When PLLINis left open, PLL LPF goes low, forcing the oscillator tominimum frequency.

Power-On Reset

The POR2 pin is an open drain output which pulls lowwhen the main regulator output voltage of the secondcontroller is out of regulation. When the output voltagerises to within 7.5% of regulation, a timer is started whichreleases POR2 after 216 (65536) oscillator cycles. Thisfunction is not available on the LTC1438X.

Auxiliary Linear Regulator

The auxiliary linear regulator in the LTC1439 controls anexternal PNP transistor for operation up to 500mA. Aprecise internal AUXFB resistive divider is invoked when

LTC1438/LTC1439

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APPLICATIONS INFORMATION

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A graph for selecting COSC vs frequency is given in Figure2. As the operating frequency is increased the gate chargelosses will be higher, reducing efficiency (see EfficiencyConsiderations). The maximum recommended switchingfrequency is 400kHz. When using Figure 2 forsynchronizable applications, choose COSC correspondingto a frequency approximately 30% below your centerfrequency. (See Phase-Locked Loop and FrequencySychronization).

OPERATING FREQUENCY (kHz)

C OSC

VAL

UE (p

F)

300

250

200

150

100

50

0100 200 300 400

LTC1435 • F02

5000

VPLLLPF = 0V

Figure 2. Timing Capacitor Value

Inductor Value Calculation

The operating frequency and inductor selection are inter-related in that higher operating frequencies allow the useof smaller inductor and capacitor values. So why wouldanyone ever choose to operate at lower frequencies withlarger components? The answer is efficiency. A higherfrequency generally results in lower efficiency because ofMOSFET gate charge losses. In addition to this basic tradeoff, the effect of inductor value on ripple current and lowcurrent operation must also be considered.

The inductor value has a direct effect on ripple current. Theinductor ripple current ∆IL decreases with higher induc-tance or frequency and increases with higher VIN or VOUT:

∆If L

VVVL OUTOUT

IN=

⎛

⎝⎜

⎞

⎠⎟

11

( )( )–

The basic LTC1439 application circuit is shown in Fig-ure 1. External component selection is driven by the loadrequirement and begins with the selection of RSENSE. OnceRSENSE is known, COSC and L can be chosen. Next, thepower MOSFETs and D1 are selected. Finally, CIN and COUTare selected. The circuit shown in Figure 1 can be config-ured for operation up to an input voltage of 28V (limited bythe external MOSFETs).

RSENSE Selection for Output Current

RSENSE is chosen based on the required output current.The LTC1438/LTC1439 current comparator has a maxi-mum threshold of 150mV/RSENSE and an input commonmode range of SGND to INTVCC. The current comparatorthreshold sets the peak of the inductor current, yielding amaximum average output current IMAX equal to the peakvalue less half the peak-to-peak ripple current, ∆IL.

Allowing some margin for variations in the LTC1438/LTC1439 and external component values yield:

RmV

ISENSEMAX

=100

The LTC1438/LTC1439 work well with values of RSENSEfrom 0.005Ω to 0.2Ω.

COSC Selection for Operating Frequency

The LTC1438/LTC1439 use a constant frequency architec-ture with the frequency determined by an external oscilla-tor capacitor on COSC. Each time the topside MOSFETturns on, the voltage on COSC is reset to ground. During theon-time, COSC is charged by a fixed current plus anadditional current which is proportional to the outputvoltage of the phase detector (VPLLLPF)(LTC1439 only).When the voltage on the capacitor reaches 1.19V, COSC isreset to ground. The process then repeats.

The value of COSC is calculated from the desired operatingfrequency. Assuming the phase-locked loop has no exter-nal oscillator input (VPLLLPF = 0V):

C pFOSC( ). ( )

=⎡

⎣

⎢⎢

⎤

⎦

⎥⎥−

1 37 1011

4

Frequency (kHz)

LTC1438/LTC1439

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Accepting larger values of ∆IL allows the use of lowinductances, but results in higher output voltage rippleand greater core losses. A reasonable starting point forsetting ripple current is ∆IL = 0.4(IMAX). Remember, themaximum ∆IL occurs at the maximum input voltage.

The inductor value also has an effect on low currentoperation. The transition to low current operation beginswhen the inductor current reaches zero while the bottomMOSFET is on. Lower inductor values (higher ∆IL) willcause this to occur at higher load currents, which cancause a dip in efficiency in the upper range of low currentoperation. In Burst Mode operation (TGS1, 2 pins open),lower inductance values will cause the burst frequency todecrease.

The Figure 3 graph gives a range of recommended induc-tor values vs operating frequency and VOUT.

Ferrite designs have very low core loss and are preferredat high switching frequencies, so design goals can con-centrate on copper loss and preventing saturation. Ferritecore material saturates “hard,” which means that induc-tance collapses abruptly when the peak design current isexceeded. This results in an abrupt increase in inductorripple current and consequent output voltage ripple. Donot allow the core to saturate!

Molypermalloy (from Magnetics, Inc.) is a very good, lowloss core material for toroids, but it is more expensive thanferrite. A reasonable compromise from the same manu-facturer is Kool Mµ. Toroids are very space efficient,especially when you can use several layers of wire. Be-cause they generally lack a bobbin, mounting is moredifficult. However, designs for surface mount are availablewhich do not increase the height significantly.

Power MOSFET and D1 Selection

Three external power MOSFETs must be selected for eachcontroller with the LTC1439: a pair of N-channel MOSFETsfor the top (main) switch and an N-channel MOSFET forthe bottom (synchronous) switch. Only one top MOSFETis required for each LTC1438 controller.

To take advantage of the Adaptive Power output stage, twotopside MOSFETs must be selected. A large [low RSD(ON)]MOSFET and a small [higher RDS(ON)] MOSFET are re-quired. The large MOSFET is used as the main switch andworks in conjunction with the synchronous switch. Thesmaller MOSFET is only enabled under low load currentconditions. The benefit of this is to boost low to midcurrentefficiencies while continuing to operate at constant fre-quency. Also, by using the small MOSFET the circuit willkeep switching at a constant frequency down to lowercurrents and delay skipping cycles.

The RDS(ON) recommended for the small MOSFET isaround 0.5Ω. Be careful not to use a MOSFET with anRDS(ON) that is too low; remember, we want to conservegate charge. (A higher RDS(ON) MOSFET has a smaller gatecapacitance and thus requires less current to charge itsgate). For all LTC1438 and cost sensitive LTC1439 appli-cations, the small MOSFET is not required. The circuit thenbegins Burst Mode operation as the load current drops.

Inductor Core Selection

Once the value for L is known, the type of inductor must beselected. High efficiency converters generally cannot af-ford the core loss found in low cost powdered iron cores,forcing the use of more expensive ferrite, molypermalloyor Kool Mµ® cores. Actual core loss is independent of coresize for a fixed inductor value, but it is very dependent oninductance selected. As inductance increases, core lossesgo down. Unfortunately, increased inductance requires moreturns of wire and therefore copper losses will increase.

Kool Mµ is a registered trademark of Magnetics, Inc.

OPERATING FREQUENCY (kHz)0

0

INDU

CTOR

VAL

UE (µ

H)

10

20

30

40

60

50 100 150 200

1438 F03

250 300

50

VOUT = 5.0VVOUT = 3.3VVOUT = 2.5V

Figure 3. Recommended Inductor Values

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The peak-to-peak drive levels are set by the INTVCC volt-age. This voltage is typically 5V during start-up (seeEXTVCC Pin Connection). Consequently, logic level thresh-old MOSFETs must be used in most LTC1438/LTC1439applications. The only exception is applications in whichEXTVCC is powered from an external supply greater than8V (must be less than 10V), in which standard thresholdMOSFETs (VGS(TH) < 4V) may be used. Pay close attentionto the BVDSS specification for the MOSFETs as well; manyof the logic level MOSFETs are limited to 30V or less.

Selection criteria for the power MOSFETs include the "ON"resistance RSD(ON), reverse transfer capacitance CRSS,input voltage and maximum output current. When theLTC1438/LTC1439 are operating in continuous mode theduty cycles for the top and bottom MOSFETs are given by:

Main Switch Duty Cycle

Synchronous Switch Duty Cycle

=

=( )

VV

V VV

OUT

IN

IN OUT

IN

–

The MOSFET power dissipations at maximum outputcurrent are given by:

PVV

I R

k V C f

PV V

VI R

MAINOUT

INMAX DS ON

IN RSS

SYNCIN OUT

INMAX DS ON

= ( ) +( ) +

( ) ( )( )( )

= ( ) +( )

2

2

1

1

δ

δ

( )

( )–

I1.85MAX

where δ is the temperature dependency of RDS(ON) and kis a constant inversely related to the gate drive current.

Both MOSFETs have I2R losses while the topsideN-channel equation includes an additional term for transi-tion losses, which are highest at high input voltages. ForVIN < 20V the high current efficiency generally improveswith larger MOSFETs, while for VIN > 20V the transitionlosses rapidly increase to the point that the use of a higherRDS(ON) device with lower CRSS actual provides higher

efficiency. The synchronous MOSFET losses are greatestat high input voltage or during a short circuit when the dutycycle in this switch is nearly 100%. Refer to the FoldbackCurrent Limiting section for further applications information.

The term (1 + δ) is generally given for a MOSFET in the formof a normalized RDS(ON) vs Temperature curve, butδ = 0.005/°C can be used as an approximation for lowvoltage MOSFETs. CRSS is usually specified in the MOSFETcharacteristics. The constant k = 2.5 can be used toestimate the contributions of the two terms in the mainswitch dissipation equation.

The Schottky diode D1 shown in Figure 1 serves twopurposes. During continuous synchronous operation, D1conducts during the dead-time between the conduction ofthe two large power MOSFETs. This prevents the bodydiode of the bottom MOSFET from turning on and storingcharge during the dead-time, which could cost as much as1% in efficiency. During low current operation, D1 oper-ates in conjunction with the small top MOSFET to providean efficient low current output stage. A 1A Schottky isgenerally a good compromise for both regions of opera-tion due to the relatively small average current.

CIN and COUT Selection

In continuous mode, the source current of the topN-channel MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR inputcapacitor sized for the maximum RMS current must beused. The maximum RMS capacitor current is given by:

C Required IIN RMS ≈( )[ ]I

V V V

VMAXOUT IN OUT

IN

–/1 2

This formula has a maximum at VIN = 2VOUT, where IRMS= IOUT/2. This simple worst-case condition is commonlyused for design because even significant deviations do notoffer much relief. Note that capacitor manufacturer’s ripplecurrent ratings are often based on only 2000 hours of life.This makes it advisable to further derate the capacitor or tochoose a capacitor rated at a higher temperature thanrequired. Several capacitors may also be paralleled to meetsize or height requirements in the design. Always consultthe manufacturer if there is any question.

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The selection of COUT is driven by the required effectiveseries resistance (ESR). Typically, once the ESR require-ment is satisified the capacitance is adequate for filtering.The output ripple (∆VOUT) is approximated by:

∆ ∆V I ESRfCOUT L

OUT≈ +

⎛

⎝⎜

⎞

⎠⎟

14

where f = operating frequency, COUT = output capacitanceand ∆IL = ripple current in the inductor. The output rippleis highest at maximum input voltage since ∆IL increaseswith input voltage. With ∆IL = 0.4IOUT(MAX) the outputripple will be less than 100mV at max VIN assuming:

COUT Required ESR < 2RSENSE

Manufacturers such as Nichicon, United Chemicon andSanyo should be considered for high performance through-hole capacitors. The OS-CON semiconductor dielectriccapacitor available from Sanyo has the lowest (ESR size)product of any aluminum electrolytic at a somewhathigher price. Once the ESR requirement for COUT has beenmet, the RMS current rating generally far exceeds theIRIPPLE(P-P) requirement.

In surface mount applications multiple capacitors mayhave to be paralleled to meet the ESR or RMS currenthandling requirements of the application. Aluminum elec-trolytic and dry tantalum capacitors are both available insurface mount configurations. In the case of tantalum, it iscritical that the capacitors are surge tested for use inswitching power supplies. An excellent choice is the AVXTPS series of surface mount tantalums, available in caseheights ranging from 2mm to 4mm. Other capacitor typesinclude Sanyo OS-CON, Nichicon PL series and Sprague593D and 595D series. Consult the manufacturer for otherspecific recommendations.

INTVCC Regulator

An internal P-channel low dropout regulator produces 5Vat the INTVCC pin from the VIN supply pin. INTVCC powersthe drivers and internal circuitry within the LTC1438/LTC1439. The INTVCC pin regulator can supply 40mA andmust be bypassed to ground with a minimum of 2.2µFtantalum or low ESR electrolytic capacitor. Good bypass-ing is necessary to supply the high transient currentsrequired by the MOSFET gate drivers.

High input voltage applications in which large MOSFETsare being driven at high frequencies may cause the maxi-mum junction temperature rating for the LTC1438/LTC1439to be exceeded. The IC supply current is dominated by thegate charge supply current when not using an outputderived EXTVCC source. The gate charge is dependent onoperating frequency as discussed in the Efficiency Consid-erations section. The junction temperature can be esti-mated by using the equations given in Note 2 of theElectrical Characteristics. For example, the LTC1439 islimited to less than 21mA from a 30V supply:

TJ = 70°C + (21mA)(30V)(85°C/W) = 124°C

To prevent maximum junction temperature from beingexceeded, the input supply current must be checked whileoperating in continuous mode at maximum VIN.

EXTVCC Connection

The LTC1438/LTC1439 contain an internal P-channelMOSFET switch connected between the EXTVCC andINTVCC pins. When the voltage applied to EXTVCC risesabove 4.8V, the internal regulator is turned off and aninternal switch closes, connecting the EXTVCC pin to theINTVCC pin thereby supplying internal power to the IC. Theswitch remains closed as long as the voltage applied toEXTVCC remains above 4.5V. This allows the MOSFETdriver and control power to be derived from the outputduring normal operation (4.8V < VOUT < 9V) and from theinternal regulator when the output is out of regulation(start-up, short circuit). Do not apply greater than 10V tothe EXTVCC pin and ensure that EXTVCC ≤ VIN.

Significant efficiency gains can be realized by poweringINTVCC from the output, since the VIN current resultingfrom the driver and control currents will be scaled by afactor of Duty Cycle/Efficiency. For 5V regulators thissupply means connecting the EXTVCC pin directly to VOUT.However, for 3.3V and other lower voltage regulators,additional circuitry is required to derive INTVCC powerfrom the output.

The following list summarizes the four possible connec-tions for EXTVCC:

1. EXTVCC left open (or grounded). This will cause INTVCCto be powered from the internal 5V regulator resulting

LTC1438/LTC1439

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ible with the MOSFET gate drive requirements. Whendriving standard threshold MOSFETs, the external sup-ply must be always present during operation to preventMOSFET failure due to insufficient gate drive.

Topside MOSFET Driver Supply (CB, DB)

External bootstrap capacitors CB connected to the BOOST1 and BOOST 2 pins supply the gate drive voltages for thetopside MOSFETs. Capacitor CB in the Functional Dia-gram is charged through diode DB from INTVCC when theSW1(SW2) pin is low. When one of the topside MOSFETsis to be turned on, the driver places the CB voltage acrossthe gate source of the desired MOSFET. This enhancesthe MOSFET and turns on the topside switch. The switchnode voltage SW1(SW2) rises to VIN and the BOOST1(BOOST 2) pin follows. With the topside MOSFET on,the boost voltage is above the input supply: VBOOST = VIN+ VINTVCC. The value of the boost capacitor CB needs tobe 100 times that of the total input capacitance of thetopside MOSFET(s). The reverse breakdown on DB mustbe greater than VIN(MAX).

Output Voltage Programming

The LTC1438/LTC1439 have pin selectable output voltageprogramming. Controller 1 on the LTC1438-ADJ is adedicated adjustable controller. The output voltage isselected by the VPROG1 (VPROG2) pin as follows on all of theother parts:

VPROG1,2 = 0V VOUT1,2 = 3.3VVPROG1,2 = INTVCC VOUT1,2 = 5VVPROG2 = Open (DC) VOUT2 = Adjustable

Except for the LTC1438-ADJ, the top of an internal resis-tive divider is connected to SENSE– 1 pin in Controller 1.For fixed output voltage applications the SENSE – 1 pin isconnected to the output voltage as shown in Figure 5a.When using an external resistive divider for an adjustableregulator, the VPROG2 pin is left open (VPROG1 is internallyleft open on the LTC1438-ADJ) and the VOSENSE2 pin isconnected to the feedback resistors as shown in Figure 5b.The adjustable controller will force the externally attenu-ated output voltage to 1.19V.

in an efficiency penalty of up to 10% at high inputvoltages.

2. EXTVCC connected directly to VOUT. This is the normalconnection for a 5V regulator and provides the highestefficiency.

3. EXTVCC connected to an output-derived boost network.For 3.3V and other low voltage regulators, efficiencygains can still be realized by connecting EXTVCC to anoutput-derived voltage which has been boosted togreater than 4.8V. This can be done with either theinductive boost winding as shown in Figure 4a or thecapacitive charge pump shown in Figure 4b. The chargepump has the advantage of simple magnetics.

4. EXTVCC connected to an external supply. If an externalsupply is available in the 5V to 10V range (EXTVCC ≤ VIN)it may be used to power EXTVCC providing it is compat-

Figure 4a. Secondary Output Loop and EXTVCC Connection

+

+

+

VIN

VINVSEC

VOUT

COUT

1438 F04a

1µF

RSENSE

•

•

CIN

TGL1

N-CH

OPTIONAL EXTVCCCONNECTION 5V ≤ VSEC ≤ 9V

N-CHR5

N-CH

1N4148 LTC1438 LTC1439*

L11:1

TGS1*

SW1

BG1

PGNDSGND

SFB1

EXTVCC

R6

*TGS1 ONLY AVAILABLE ON THE LTC1439

+

+

VIN

VIN

VOUT

+COUT

1438 F04b

1µF

0.22µF

RSENSE

CIN

TGL1

N-CH

N-CH

N-CHVN2222LL

LTC1438 LTC1439*

L1

BAT85

BAT85

BAT85

TGS1*

SW1

BG1

PGND

EXTVCC

*TGS1 ONLY AVAILABLE ON THE LTC1439

Figure 4b. Capacitive Charge Pump for EXTVCC

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the internal current limit. Power supply sequencing canalso be accomplished using this pin.

An internal 3µA current source charges up an externalcapacitor CSS. When the voltage on RUN/SS1 (RUN/SS2)reaches 1.3V the particular controller is permitted to startoperating. As the voltage on the pin continues to rampfrom 1.3V to 2.4V, the internal current limit is also rampedat a proportional linear rate. The current limit begins atapproximately 50mV/RSENSE (at VRUN/SS = 1.3V) and endsat 150mV/RSENSE (VRUN/SS ≥ 2.7V). The output currentthus ramps up slowly, reducing the starting surge currentrequired from the input power supply. If RUN/SS has beenpulled all the way to ground there is a delay before startingof approximately 500ms/µF, followed by a similar time toreach full current on that controller.

By pulling both RUN/SS controller pins below 1.3V, theLTC1438/LTC1439 are put into low current shutdown(IQ < 25µA). These pins can be driven directly from logic asshown in Figure 6. Diode D1 in Figure 6 reduces the startdelay but allows CSS to ramp up slowly providing the softstart function; this diode and CSS can be deleted if soft startis not needed. Each RUN/SS pin has an internal 6V Zenerclamp (See Functional Diagram).

Figure 5b. LTC1438/LTC1439 Adjustable Applications

LTC1438LTC1439

VPROG1

SENSE– 1

SGND

GND: VOUT = 3.3VINTVCC: VOUT = 5V

+VOUT

1438 F05a

COUT

Figure 5a. LTC1438/LTC1439 Fixed Output Applications

Power-On Reset Function (POR)

The power-on reset function (not available on theLTC1438X) monitors the output voltage of the secondcontroller and turns on an open drain device when it isbelow its properly regulated voltage. An external pull-upresistor is required on the POR2 pin.

When power is first applied or when coming out ofshutdown, the POR2 output is held at ground. When theoutput voltage rises above a level which is 5% below thefinal regulated output value, an internal counter starts.After this counter counts 216 (65536) clock cycles, thePOR2 pull-down device turns off.

The POR2 output will go low whenever the output voltageof the second controller drops below 7.5% of its regulatedvalue for longer than approximately 30µs, signaling anout-of-regulation condition. In shutdown, when RUN/SS1and RUN/SS2 are both below 1.3V, the POR2 output ispulled low even if the regulator’s output is held up by anexternal source. The POR2 output is active during shut-down if VIN is powered.

Run/Soft Start Function

The RUN/SS1 and RUN/SS2 pins each serve two func-tions. Each pin provides the soft start function and ameans to shut down each controller. Soft start reducessurge currents from VIN by providing a gradual ramp-up of

D1

CSS

3.3VOR 5V

RUN/SS1(RUN/SS2)

CSS

1438 F06

RUN/SS1(RUN/SS2)

Figure 6. RUN/SS Pin Interfacing

Foldback Current Limiting

As described in Power MOSFET and D1 Selection, theworst-case dissipation for either MOSFET occurs with ashort-circuited output, when the synchronous MOSFETconducts the current limit value almost continuously. Inmost applications this will not cause excessive heating,even for extended fault intervals. However, when heatsinking is at a premium or higher RDS(ON) MOSFETs arebeing used, foldback current limiting should be added toreduce the current in proportion to the severity of the fault.

Foldback current limiting is implemented by adding diodeDFB between the output and the ITH pin as shown in the

LTC1438LTC1439

VPROG2*

VOSENSE1,2

SGND

OPEN (DC)

1.19V ≤ VOUT ≤ 9V

1438 F05b

100pF

R2

R1

R2R1VOUT = 1.19V 1 +( )*LTC1439 ONLY

LTC1438/LTC1439

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Functional Diagram. In a hard short (VOUT = 0V) the currentwill be reduced to approximately 25% of the maximumoutput current. This technique may be used for all applica-tions with regulated output voltages of 1.8V or greater.

Phase-Locked Loop and Frequency Synchronization

The LTC1439 has an internal voltage-controlled oscillatorand phase detector comprising a phase-locked loop. Thisallows the top MOSFET turn-on to be locked to the risingedge of an external source. The frequency range of thevoltage-controlled oscillator is ±30% around the centerfrequency fO.

The phase detector used is an edge sensitive digital typewhich provides zero degrees phase shift between theexternal and internal oscillators. This type of phase detec-tor will not lock up on input frequencies close to theharmonics of the VCO center frequency. The PLL hold-inrange, ∆fH, is equal to the capture range, ∆fC:

∆fH = ∆fC = ±0.3 fO.

The output of the phase detector is a complementary pairof current sources charging or discharging the externalfilter network on the PLL LPF pin. A simplified blockdiagram is shown in Figure 8.

If the external frequency fPLLIN is greater than the oscilla-tor frequency f0SC, current is sourced continuously, pull-ing up the PLL LPF pin. When the external frequency is lessthan f0SC, current is sunk continuously, pulling down thePLL LPF pin. If the external and internal frequencies are thesame but exhibit a phase difference, the current sourcesturn on for an amount of time corresponding to the phasedifference. Thus the voltage on the PLL LPF pin is adjusteduntil the phase and frequency of the external and internaloscillators are identical. At this stable operating point thephase comparator output is open and the filter capacitor

Figure 7. Operating Frequency vs VPLLLPF

VPLLLPF (V)0

NORM

ALIZ

ED F

REQU

ENCY 1.3fO

0.7fO

1438 F07

1.5 2.01.00.5 2.5

fO

The value of COSC is calculated from the desired operatingfrequency (fO). Assuming the phase-locked loop is locked(VPLLLPF = 1.19V):

C pFOSC ( ) =⎡

⎣

⎢⎢

⎤

⎦

⎥⎥−

2.1(10 )Frequency (kHz)

411

Stating the frequency as a function of VPLLLPF and COSC:

Frequency kHz

C pFA A

VV

OSCPLLLPF

( ) =

( ) +[ ]+

⎛

⎝⎜

⎞

⎠⎟

+

⎡

⎣

⎢⎢⎢⎢⎢

⎤

⎦

⎥⎥⎥⎥⎥

8 4 10

11 1

17 182 4

2000

8. ( )

.µ µ

PLLIN*

SGND50k

1438 F08

PLL LPF*

*LTC1439 ONLY

COSC

PHASEDETECTOR

OSC

RLP

CLP COSC

EXTERNALFREQUENCY

2.4V

DIGITALPHASE/

FREQUENCYDETECTOR

Figure 8. Phase-Locked Loop Block Diagram

LTC1438/LTC1439

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CLP holds the voltage. The LTC1439 PLLIN pin must bedriven from a low impedance such as a logic gate locatedclose to the pin. Any external attenuator used needs to bereferenced to SGND.

The loop filter components CLP, RLP smooth out thecurrent pulses from the phase detector and provide astable input to the voltage-controlled oscillator. The filtercomponents CLP and RLP determine how fast the loopacquires lock. Typically, RLP =10k and CLP is 0.01µF to 0.1µF.The low side of the filter needs to be connected to SGND.

The PLL LPF pin can be driven with external logic to obtaina 1:1.9 frequency shift. The circuit shown in Figure 9 willprovide a frequency shift from fO to 1.9fO as the voltage onVPLLLPF increases from OV to 2.4V. Do not exceed 2.4V onVPLLLPF.

18k

3.3V OR 5V

PLL LPF

2.4VMAX

LTC1435 • F09

Figure 9. Directly Driving PLL LPF Pin

Figure 10. Low-Battery Comparator

–

+

LBI

VIN

SGND

LBOR4

R3

1438 F101.19V REFERENCE

LTC1438/LTC1439

SFB1 Pin Operation

When the SFB1 pin drops below its ground referenced1.19V threshold, continuous mode operation is forced. Incontinuous mode, the large N-channel main and synchro-nous switches are used regardless of the load on the mainoutput.

In addition to providing a logic input to force continuoussynchronous operation, the SFB1 pin provides a means toregulate a flyback winding output. The use of a synchro-nous switch removes the requirement that power must bedrawn from the inductor primary in order to extract powerfrom the auxiliary winding. With the loop in continuousmode, the auxiliary output may be loaded without regardto the primary output load. The SFB1 pin provides a wayto force continuous synchronous operation as needed bythe flyback winding.

The secondary output voltage is set by the turns ratio ofthe transformer in conjunction with a pair of externalresistors returned to the SFB1 pin as shown in Figure 4a.The secondary regulated voltage VSEC in Figure 4a is givenby:

V N V VRRSEC OUT≈ +( ) > +

⎛⎝⎜

⎞⎠⎟1 1 19 1

65

.

where N is the turns ratio of the transformer, and VOUT isthe main output voltage sensed by Sense– 1.

Auxiliary Regulator/Comparator

The auxiliary regulator/comparator can be used as acomparator or low dropout regulator (by adding an exter-nal PNP pass device).

Low-Battery Comparator

The LTC1438/LTC1439 have an on-chip low-battery com-parator which can be used to sense a low-battery condi-tion when implemented as shown in Figure 10. The resistordivider R3/R4 sets the comparator trip point as follows:

V VRRLBITRIP = +

⎛⎝⎜

⎞⎠⎟1 19 1

43

.

The divided down voltage at the negative (–) input to thecomparator is compared to an internal 1.19V reference. A20mV hysteresis is built in to assure rapid switching. Theoutput is an open drain MOSFET and requires a pull-upresistor. This comparator is not active when both theRUN/SS1 and RUN/SS2 pins are low. Refer to the LTC1538/LTC1539 for a comparator which is active during shutdown.The low side of the resistive divider needs to be connected toSGND.

LTC1438/LTC1439

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When used as a voltage comparator as shown in Figure11c, the auxiliary block has a noninverting characteristic.When AUXFB drops below 1.19V, the AUXDR pin will bepulled low. A minimum current of 5µA is required to pullup the AUXDR pin to 5V when used as a comparator outputin order to counteract a 1.5µA internal pull-down currentsource.

When the voltage present at the AUXON pin is greater than1.19V the regulator/comparator is on. The amplifier isstable when operating as a low dropout regulator. Thissame amplifier can be used as a comparator whoseinverting input is tied to the 1.19V reference.

The AUXDR pin is internally connected to an open drainMOSFET which can sink up to 10mA. The voltage onAUXDR determines whether or not an internal 12V resis-tive divider is connected to AUXFB as described below. Apull-up resistor is required on AUXDR and the voltagemust not exceed 28V.

With the addition of an external PNP pass device, a linearregulator capable of supplying up to 0.5A is created. Asshown in Figure 11a, the base of the external PNP con-nects to the AUXDR pin together with a pull-up resistor.The output voltage VOAUX at the collector of the externalPNP is sensed by the AUXFB pin.

The input voltage to the auxiliary regulator can be takenfrom a secondary winding on the primary inductor asshown in Figure 11a. In this application, the SFB1 pinregulates the input voltage to the PNP regulator (see SFB1Pin Operation) and should be set to approximately 1V to2V above the required output voltage of the auxiliaryregulator. A Zener clamp diode may be required to keep thesecondary winding resultant output voltage under the 28VAUXDR pin specification when the primary is heavilyloaded and the secondary is not.

The AUXFB pin is the feedback point of the regulator. Aninternal resistor divider is available to provide a 12V outputby simply connecting AUXFB directly to the collector of theexternal PNP. The internal resistive divider is switched inwhen the voltage at AUXFB goes above 9.5V with 1V built-in hysteresis. For other output voltages, an external resis-tive divider is fed back to AUXFB as shown in Figure 11b.The output voltage VOAUX is set as follows:

V VRROAUX = +

⎛

⎝⎜

⎞

⎠⎟ <

= ≥

1 19 187

. 8V AUXDR < 8.5V

V 12V AUXDR 12VOAUX

–

+

AUXONAUXFB

ON/OFF

INPUT

VPULL-UP < 7.5V

AUXDROUTPUT

1438 F11c1.19V REFERENCE

LTC1439

Figure 11c. Auxiliary Comparator Configuration

LTC1439

AUXDR

AUXFBSFB1

AUXON

+

+

1438 F11a

VSEC

SECONDARYWINDING

1:N

ON/OFF

VOAUX12V

R6

10µFR5

R6R5VSEC = 1.19V > 13V1 +( )

Figure 11a. 12V Output Auxiliary RegulatorUsing Internal Feedback Resistors

Figure 11b. 5V Output Auxiliary Regulator UsingExternal Feedback Resistors

LTC1439

AUXDR

AUXFBSFB1

AUXON

++

1438 F11b

VSEC

SECONDARYWINDING

1:N

ON/OFF

VOAUX

R6

10µFR5

R8

R7

R6R5VSEC = 1.19V > VOAUX1 +( )

LTC1438/LTC1439

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3. I2R losses are predicted from the DC resistances of theMOSFET, inductor and current sense R. In continuousmode the average output current flows through L andRSENSE, but is “chopped” between the topside mainMOSFET and the synchronous MOSFET. If the twoMOSFETs have approximately the same RDS(ON), thenthe resistance of one MOSFET can simply be summedwith the resistances of L and RSENSE to obtain I2Rlosses. For example, if each RDS(ON) = 0.05Ω, RL =0.15Ω and RSENSE = 0.05Ω, then the total resistance is0.25Ω. This results in losses ranging from 3% to 10%as the output current increases from 0.5A to 2A. I2Rlosses cause the efficiency to roll off at high outputcurrents.

4. Transition losses apply only to the topside MOSFET(s)and only when operating at high input voltages (typically20V or greater). Transition losses can be estimated from:

Transition Loss ≈ 2.5(VIN)1.85(IMAX)(CRSS)(f)

Other losses including CIN and COUT ESR dissipativelosses, Schottky conduction losses during dead-time,and inductor core losses, generally account for lessthan 2% total additional loss.

Checking Transient Response

The regulator loop response can be checked by looking atthe load transient response. Switching regulators takeseveral cycles to respond to a step in DC (resistive) loadcurrent. When a load step occurs, VOUT shifts by anamount equal to (∆ILOAD)(ESR) where ESR is the effectiveseries resistance of COUT. ∆ILOAD also begins to charge ordischarge COUT generating the feedback error signal whichforces the regulator loop to adapt to the current changeand return VOUT to its steady-state value. During thisrecovery time VOUT can be monitored for overshoot orringing which would indicate a stability problem. The ITHexternal components shown in Figure 1 will prove ad-equate compensation for most applications.

A second, more severe transient is caused by switching inloads with large (>1µF) supply bypass capacitors. Thedischarged bypass capacitors are effectively put in parallelwith COUT, causing a rapid drop in VOUT. No regulator candeliver enough current to prevent this problem if the load

Efficiency Considerations

The efficiency of a switching regulator is equal to theoutput power divided by the input power times 100%. It isoften useful to analyze individual losses to determine whatis limiting the efficiency and which change would producethe most improvement. Efficiency can be expressed as:

Efficiency = 100% – (L1 + L2 + L3 + ...)

where L1, L2, etc. are the individual losses as a percentageof input power.

Although all dissipative elements in the circuit producelosses, four main sources usually account for most of thelosses in LTC1438/LTC1439 circuits. LTC1438/LTC1439VIN current, INTVCC current, I2R losses and topside MOSFETtransition losses.

1. The VIN current is the DC supply current given in theElectrical Characteristics which excludes MOSFET driverand control currents. VIN current typically results in asmall (<< 1%) loss which increases with VIN.

2. INTVCC current is the sum of the MOSFET driver andcontrol currents. The MOSFET driver current resultsfrom switching the gate capacitance of the powerMOSFETs. Each time a MOSFET gate is switched fromlow to high to low again, a packet of charge dQ movesfrom INTVCC to ground. The resulting dQ/dt is a currentout of INTVCC which is typically much larger than thecontrol circuit current. In continuous mode, IGATECHG =f(QT + QB), where QT and QB are the gate charges of thetopside and bottom side MOSFETs. It is for this reasonthat the large topside and synchronous MOSFETs areturned off during low current operation in favor of thesmall topside MOSFET and external Schottky diode,allowing efficient, constant-frequency operation at lowoutput currents.

By powering EXTVCC from an output-derived source,the additional VIN current resulting from the driver andcontrol currents will be scaled by a factor of Duty Cycle/Efficiency. For example, in a 20V to 5V application,10mA of INTVCC current results in approximately 3mAof VIN current. This reduces the midcurrent loss from10% or more (if the driver was powered directly fromVIN) to only a few percent.

LTC1438/LTC1439

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Design Example

As a design example, assume VIN = 12V(nominal), VIN =22V(max), VOUT = 3.3V, IMAX = 3A and f = 250kHz, RSENSEand COSC can immediately be calculated:

RSENSE = 100mV/3A = 0.033ΩCOSC = [1.37(104)/250] – 11 ≈ 43pF

Refering to Figure 3, a 10µH inductor falls within therecommended range. To check the actual value of theripple current the following equation is used :

∆IVf L

VVL

OUT OUT

IN=

⎛

⎝⎜

⎞

⎠⎟( )( )

–1

The highest value of the ripple current occurs at themaximum input voltage:

∆IV

kHz HVV

AL =µ

⎛

⎝⎜

⎞

⎠⎟ =

3 3250 10

13 322

1 12.

( )–

..

The power dissipation on the topside MOSFET can beeasily estimated. Using a Siliconix Si4412DY for example;RDS(ON) = 0.042Ω, CRSS = 100pF. At maximum inputvoltage with T(estimated) = 50°C:

PVV

C C

V A pF kHz mW

MAIN = ( ) + ( ) ° − °( )[ ]( )

+ ( ) ( )( )( ) =

3 322

3 1 0 005 50 25 0 042

2 5 22 3 100 250 122

2

1 85

.. .

. .

Ω

The most stringent requirement for the synchronousN-channel MOSFET is with VOUT = 0V (i.e. short circuit).During a continuous short circuit, the worst-case dissipa-tion rises to:

PSYNC = [ISC(AVG)]2(1 + δ)RDS(ON)

With the 0.033Ω sense resistor ISC(AVG) = 4A will result,increasing the Si4412DY dissipation to 950mW at a dietemperature of 105°C.

CIN will require an RMS current rating of at least 1.5A attemperature and COUT will require an ESR of 0.03Ω for lowoutput ripple. The output ripple in continuous mode will behighest at the maximum input voltage. The output voltageripple due to ESR is approximately:

VORIPPLE = RESR(∆IL) = 0.03Ω(1.12A) = 34mVP-P

switch resistance is low and it is driven quickly. The onlysolution is to limit the rise time of the switch drive so thatthe load rise time is limited to approximately (25)(CLOAD).Thus a 10µF capacitor would require a 250µs rise time,limiting the charging current to about 200mA.

Automotive Considerations: Plugging into theCigarette Lighter

As battery-powered devices go mobile, there is a naturalinterest in plugging into the cigarette lighter in order toconserve or even recharge battery packs during operation.But before you connect, be advised: you are plugging intothe supply from hell. The main battery line in an automo-bile is the source of a number of nasty potential transients,including load dump, reverse battery and double battery.

Load dump is the result of a loose battery cable. When thecable breaks connection, the field collapse in the alternatorcan cause a positive spike as high as 60V which takesseveral hundred milliseconds to decay. Reverse battery isjust what it says, while double battery is a consequence oftow-truck operators finding that a 24V jump start crankscold engines faster than 12V.

The network shown in Figure 12 is the most straightfor-ward approach to protect a DC/DC converter from theravages of an automotive battery line. The series diodeprevents current from flowing during reverse battery,while the transient suppressor clamps the input voltageduring load dump. Note that the transient suppressorshould not conduct during double battery operation, butmust still clamp the input voltage below breakdown of theconverter. Although the LT1438/LT1439 has a maximuminput voltage of 36V, most applications will be limited to30V by the MOSFET BVDSS.


WU UU1438 F12

50A IPK RATING

LTC1438LTC1439TRANSIENT VOLTAGE

SUPPRESSORGENERAL INSTRUMENT

1.5KA24A

VIN

12V

Figure 12. Automotive Application Protection

LTC1438/LTC1439

2314389fb

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

RUN/SS1

SENSE+ 1

SENSE– 1

VPROG1

ITH1

POR2

COSC

SGND

LBI

LBO

SFB1

ITH2

VPROG2

VOSENSE2

SENSE– 2

SENSE+ 2

RUN/SS2

AUXDR

PLL LPF

PLLIN

BOOST 1

TGL1

SW1

TGS1

VIN

BG1

INTVCC

PGND

BG2

EXTVCC

TGS2

SW2

TGL2

BOOST 2

AUXON

AUXFB

LTC1439

DB1

DB2

M3

M1 CIN1

CIN2

COUT1

+

–

COUT2

RSENSE1

RSENSE2

CB1 0.1µF

CLP 0.01µF

CC1A 1000pF

RLP 10k

EXT CLOCK

CB2 0.1µF

M2 D1

L1

L2

GROUND PLANE

D2M5

1438 F13

M6

M4

4.7µF+

+

+

+

+

RC110k

RC2 10k

+

–

VOUT1

+

–

VIN

VOUT2

1000pF

1000pF

220pF

R2R1

NOT ALL PINS CONNECTED FOR CLARITYBOLD LINES INDICATE HIGH CURRENT PATHS

INTVCC

INTVCC

VIN100k

1000pF

COSC

CC1B 220pF

CSS 0.1µF

CC2B 470pF

CC2A 1000pF

CSS 0.1µF

OUTPUT DIVIDERREQUIRED WITH

VPROG OPEN

100pF

22pF

10Ω

10Ω


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Figure 13. LTC1439 Physical Layout Diagram

PC Board Layout Checklist

When laying out the printed circuit board, the followingchecklist should be used to ensure proper operation of theLTC1438/LTC1439. These items are also illustrated graphi-cally in the layout diagram of Figure 13. Check the follow-ing in your layout:

1. Are the high current power ground current paths usingor running through any part of signal ground? TheLTC1438/LTC1438X/LTC1439 ICs have their sensitivepins on one side of the package. These pins include thesignal ground for the reference, the oscillator input, thevoltage and current sensing for both controllers and thelow-battery/comparator input. The signal ground areaused on this side of the IC must return to the bottom

plates of all of the output capacitors. The high currentpower loops formed by the input capacitors and theground returns to the sources of the bottom N-channelMOSFETs, anodes of the Schottky diodes and (–) platesof CIN, should be as short as possible and tied througha low resistance path to the bottom plates of the outputcapacitors for the ground return.

2. Do the LTC1438/LTC1439 SENSE– 1 and VOSENSE2 pinsconnect to the (+) plates of COUT? In adjustable applica-tions, the resistive divider R1/R2 must be connectedbetween the (+) plate of COUT and signal ground and theHF decoupling capacitor should be as close as possibleto the LTC1438/LTC1439.

LTC1438/LTC1439

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3. Are the SENSE – and SENSE+ leads routed together withminimum PC trace spacing? The filter capacitors be-tween SENSE+ 1 (SENSE + 2) and SENSE– 1 (SENSE– 2)should be as close as possible to the LTC1438/LTC1439.

4. Do the (+) plates of CIN connect to the drains of thetopside MOSFETs as closely as possible? This capacitorprovides the AC current to the MOSFETs.

5. Is the INTVCC decoupling capacitor connected closelybetween INTVCC and the power ground pin? This capaci-tor carries the MOSFET driver peak currents.

6. Keep the switching nodes, SW1 (SW2), away fromsensitive small-signal nodes. Ideally the switch nodesshould be placed at the furthest point from the LTC1438/LTC1439.

7. Use a low impedance source such as a logic gate to drivethe PLLIN pin and keep the lead as short as possible.

PC Board Layout Suggestions

Switching power supply printed circuit layouts are cer-tainly among the most difficult analog circuits to design.The following suggestions will help to get a reasonablyclose solution on the first try.

The output circuits, including the external switchingMOSFETs, inductor, secondary windings, sense resistor,input capacitors and output capacitors all have very largevoltage and/or current levels associated with them. Thesecomponents and the radiated fields (electrostatic and/orelectromagnetic) must be kept away from the very sensi-tive control circuitry and loop compensation componentsrequired for a current mode switching regulator.

The electrostatic or capacitive coupling problems can bereduced by increasing the distance from the radiator,typically a very large or very fast moving voltage signal.The signal points that cause problems generally include:the “switch” node, any secondary flyback winding voltageand any nodes which also move with these nodes. Theswitch, MOSFET gate and boost nodes move between VINand PGND each cycle with less than a 100ns transitiontime. The secondary flyback winding output has an ACsignal component of –VIN times the turns ratio of thetransformer, and also has a similar <100ns transitiontime. The feedback control input signals need to have less

than a few millivolts of noise in order for the regulator toperform properly. A rough calculation shows that 80dB ofisolation at 2MHz is required from the switch node for lownoise switcher operation. The situation is worse by a factorof the turns ratio for the secondary flyback winding. Keepthese switch node related PC traces small and away fromthe “quiet” side of the IC (not just above and below eachother on the opposite side of the board).

The electromagnetic or current loop induced feedbackproblems can be minimized by keeping the high ACcurrent (transmitter) paths and the feedback circuit (re-ceiver) path small and/or short. Maxwell’s equations are atwork here, trying to disrupt our clean flow of current andvoltage information from the output back to the controllerinput. It is crucial to understand and minimize the suscep-tibility of the control input stage as well as the moreobvious reduction of radiation from the high currentoutput stage(s). An inductive transmitter depends uponthe frequency, current amplitude and the size of thecurrent loop to determine the radiation characteristic ofthe generated field. The current levels are set in the outputstage once the input voltage, output voltage and inductorvalue(s) have been selected. The frequency is set by theoutput stage transition times. The only parameter overwhich we have some control is the size of the antenna wecreate on the PC board, i.e., the loop. A loop is formed withthe input capacitance, the top MOSFET, the Schottky diodeand the path from the Schottky diode’s ground connectionand the input capacitor’s ground connection. A secondpath is formed when a secondary winding is used com-prising the secondary output capacitor, the secondarywinding and the rectifier diode or switching MOSFET (inthe case of a synchronous approach). These “loops”should be kept as small and tightly packed as possible inorder to minimize their “far field” radiation effects. Theradiated field produced is picked up by the current com-parator input filter circuit(s), as well as by the voltagefeedback circuit(s). The current comparator’s filter ca-pacitor placed across the sense pins attenuates the radi-ated current signal. It is important to place this capacitorimmediately adjacent to the IC sense pins. The voltagesensing input(s) minimizes the inductive pickup compo-nent by using an input capacitance filter to SGND. Thecapacitors in both case serve to integrate the induced

LTC1438/LTC1439

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The previous instructions will yield a PC layout which hasthree separate ground regions returning separately to thebottom plates of the output capacitors: a signal ground, aMOSFET gate/INTVCC ground and the ground from theinput capacitors, Schottky diode and synchronousMOSFET. In practice, this may produce a long powerground path from the input and output capacitors. A long,low resistance path between the input and output capaci-tor power grounds will not upset the operation of theswitching controllers as long as the signal and powergrounds from the IC pins does not “tap in” along this path.


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current, reducing the susceptibility to both the “loop”radiated magnetic fields and the transformer or inductorleakage fields.

The capacitor on INTVCC acts as a reservoir to supply thehigh transient currents to the bottom gates and to re-charge the boost capacitor. This capacitor should be a4.7µF tantalum capacitor placed as close as possible to theINTVCC and PGND pins of the IC. Peak current driving theMOSFET gates exceeds 1A. The PGND pin of the IC,connected to this capacitor, should connect directly to thelower plates of the output capacitors to minimize the ACripple on the INTVCC IC power supply.

TYPICAL APPLICATIONS

U

LTC1438 5V/3A, 3.3V/3.5A Regulator

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

SENSE+ 1

SENSE– 1

VPROG1

ITH1

POR2

COSC

SGND

LBI

LBO

SFB1

ITH2

VOSENSE2

SENSE– 2

SENSE+ 2

RUN/SS1

BOOST 1

TGL1

SW1

VIN

BG1

INTVCC

PGND

BG2

EXTVCC

SW2

TGL2

BOOST 2

RUN/SS2

LTC1438

0.1µF22µF35V

0.1µF1438 TA01

+

+

1000pF

100Ω100Ω

1000pF

10Ω

VIN 5.2V TO 28V: SWITCHING FREQUENCY = 180kHz5V, 3A/3.3V, 3.5AM1 TO M4: Si4412ADYINPUT CAPACITORS ARE AVX-TPS SERIESOUTPUT CAPACITORS ARE AVX-TPSV LEVEL II SERIES

INTVCC

POR2

LBI

LBO

0.1µF

1000pF

1000pF

220pF

470pF

10k

10Ω

M1

M2

M4

M3

CMDSH-3

CMDSH-310k

221k, 1%

56pF 1k

10Ω

392k, 1%

1000pF

56pF

220pF

0.1µF

0.1µF

VOUT1

4.7µF 16V

0.033Ω

0.033Ω

22µF35V

+

MBRS140T3

MBRS140T3

10µHSUMIDA

CDRH125-100MC

10µHSUMIDA

CDRH125-100MC

+220µF10V

VIN5.2V TO28V

VOUT15V3A

VOUT23.3V3.5A

GND220µF10V

22µF35V

+

22µF35V++

1N4148

1N4148

22pF

LTC1438/LTC1439

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U

LTC1439 High Efficiency Low Noise 5V/3A, 3.3V/3.5A and 12V/200mA Regulator

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

RUN/SS1

SENSE+ 1

SENSE– 1

VPROG1

ITH1

POR2

COSC

SGND

LBI

LBO

SFB1

ITH2

VPROG2

VOSENSE2

SENSE– 2

SENSE+ 2

RUN/SS2

AUXDR

PLL LPF

PLLIN

BOOST 1

TGL1

SW1

TGS1

VIN

BG1

INTVCC

PGND

BG2

EXTVCC

TGS2

SW2

TGL2

BOOST 2

AUXON

AUXFB

LTC1439D2CMDSH-3

D4CMDSH-3

D1MBRS140T3

T1*10µH1:1.8

D3MBRS140T3

M3

M1

0.1µF

CLP 0.01µF

CC1 1000pF

RLP 10k EXT

CLOCK

0.1µF

M2

M5

1438 TA02

M6

M4

VOUT1

4.7µF 16V+

RC1 10k

RC 10k

1000pF

1000pF

INTVCC

100k

LBO

1000pF

COSC56pF

CC1A 220pF

CSS1 0.1µF

CC2 1000pF

CSS2 0.1µF

0.1µF

CC2A470pF

100pF 390k, 1%

110k, 1%

100k

POR2

MBRS1100T3

RSENSE10.03Ω

+3.3µF25V

+COUT2100µF10V × 2

+ COUT1100µF10V× 2

VOUT15V/3A

RSENSE20.03Ω

VOUT23.3V3.5A

L210µH

+

CIN222µF35V× 2

47kR61M1%

R590.9k1%

+4.7µF25V

MMBT2907

VOUT212V200mA

VIN6V TO 28V

* T1 = DALE LPE-6562-A262 GAPPED E-CORE BH ELECTRONICS 501-0657 GAPPED TOROID

M1, M2, M4, M5 = IRF7403M3, M6 = IRLML2803L2 = SUMIDA CDRH125-100MCALL INPUT OUTPUT CAPACITORS ARE AVX-TPS SERIES

AUX ON/OFF

+ CIN122µF35V× 2

LTC1438/LTC1439

2714389fb


U

LTC1

439

High

Effc

ienc

y 3.

3V/2

.5V

Regu

lato

r with

Low

Noi

se 1

2V L

inea

r Reg

ulat

or

1 2 3 5 6 7 8 9 10 11 12 13 14 15 16 17 18

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19

RUN/

SS1

SENS

E+ 1

SENS

E– 1

I TH1

POR2

C OSC

SGND

LBI

LBO

SFB1

I TH2

V PRO

G2

V OSE

NSE2

SENS

E– 2

SENS

E+ 2

RUN/

SS2

AUXD

R

PLL

LPF

PLLI

N

BOOS

T 1

TGL1

SW1

TGS1 V I

N

BG1

INTV

CC

PGND BG

2

EXTV

CC

TGS2

SW2

TGL2

BOOS

T 2

AUXO

N

AUXF

B

LTC1

439

D2 CMDS

H-3

D4 CMDS

H-3

D1 MBR

S140

T3

T1*

9µH

1:3.

74 D3 MBR

S140

T3

M3

M1

0.1µ

F

C LP

0.01

µF

C C1,

100

0pF

R LP

10k

EXT

CLOC

K

0.1µ

F

M2

M5

1438

TA0

3

M6

M4

V OUT

1

4.7µ

F 16

V

+

R C1

10k

R C

10k

1000

pF

1000

pF

220p

F

100k

LBO

1000

pF

C OSC

56pF

C C1A

, 220

pF

C SS1

0.

1µF

C C2

1000

pF

C SS2

0.

1µF

22pF

C C2A

470p

F

100p

F39

0k, 1

%

110k

, 1%

100k

POR2

MBR

S110

0T3

R SEN

SE1

0.02

5Ω

+3.

3µF

35V

+

C OUT

247

0µF

6V

24V

+C O

UT1

330µ

F10

VV OUT

13.

3V/4

A

R SEN

SE2

0.02

Ω

V OUT

22.

5V5A

L2 10µ

H

+

C IN2

22µ

F35

V×

2

47k

R6 1M R5 100k

+4.

7µF

25V

MM

BT29

07AL

TIV O

UT2

12V

200m

A

V IN

4V T

O 28

V

4V P

ROG1

100p

F

110k

1%12

1k1%

OUTP

UT D

IVID

ER

REQU

IRED

WIT

H V P

ROG

OPEN

DC

10Ω

10Ω

100Ω

100Ω

AUX

ON/O

FF

0.1µ

F

10Ω

+C I

N122

µF

35V

× 2

*T1

= D

ALE

LPE-

6562

-A21

4M

1, M

2, M

4, M

5 =

Si94

10DY

M3,

M6

= IR

LML2

803

L2 =

SUM

IDA

CDRH

125-

100M

C

INPU

T CA

PACI

TORS

ARE

AVX

-TPS

SER

IES

OUTP

UT C

APAC

ITOR

S AR

E AV

X-TP

SV L

EVEL

II S

ERIE

S

100p

F

LTC1438/LTC1439

2814389fb


U

LTC1

439/

LTC1

539

4-Ou

tput

Hig

h Ef

ficie

ncy

Low

Noi

se 5

V/3A

, 3.3

V/3A

, 2.9

V/2.

6A, 1

2V/2

00m

A No

tebo

ok C

ompu

ter P

ower

Sup

ply

(See

PCB

LAY

OUT

AND

FILM

for L

ayou

t of S

chem

atic

)

1 2 3 5 6 7 8 9 10 11 12 13 14 15 16 17 18

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19

RUN/

SS1

SENS

E+ 1

SENS

E– 1

I TH1

POR2

C OSC

SGND

LBI

LBO

SFB1

I TH2

V PRO

G2

V OSE

NSE2

SENS

E– 2

SENS

E+ 2

RUN/

SS2

AUXD

R

PLL

LPF

PLLI

N

BOOS

T 1

TGL1

SW1

TGS1 V I

N

BG1

INTV

CC

PGND BG

2

EXTV

CC

TGS2

SW2

TGL2

BOOS

T 2

AUXO

N

AUXF

B

LTC1

439

LTC1

539

D2 CMDS

H-3

D4 CMDS

H-3

D1 MBR

S140

T1*

10µ

H1:

1.42 D3 M

BRS1

40

M1A

C20

0.1µ

F

C15

33pF

C210

00pF

C27

0.1µ

F

M1B

M5

1438

TA0

4

M4

V OUT

1

5V S

TAND

BY(L

TC15

39)

C24,

4.7

µF, 1

6V

+

R13,

10k

R15

10k

C10,

100

0pF

LBO

LB1

C3 56pF

C822

0pF

C14,

0.1

µF

C7,

470p

F

POR2

INTV

CCD6

CMDS

H-3

R10

+C1

6, C

1910

0µF

10V

EA

+C2

8, C

2910

0µF

10V EA

V OUT

15V 3AV O

UT3

12V

120m

A

V IN

(28V

MAX

)

R12

0.02Ω

1W

V OUT

23.

3V3A

L2 10µ

HC2

5, C

2622

µF

35V

EA

R9 47k R2

100Ω

R1 27Ω

+C5 33

0µF

6.3V

+OP

TION

AL33

0µF

6.3V

Q1 2N29

07

V LDO

2.9V

/1A

2.6A

PEA

K

GND

GND

4V P

ROG1

R20

10Ω

R21

10Ω

R19

100Ω

R18

100Ω

C23,

0.1

µF

R22

10Ω

+C1

, C21

,C2

222

µF

35V

EA

V IN

5.2V

TO

28V:

SW

ITCH

ING

FREQ

UENC

Y =

200k

Hz5V

/3A,

3.3

V/3A

, 2.9

V/1A

, 2.6

A PE

AK L

INEA

R, 1

2V/2

00m

AM

1, M

2, M

4 AN

D M

5 =

SILI

CONI

X, S

i441

2ADY

M3,

M6

= IR

LML2

803

M7

= IN

TERN

ATIO

NAL

RECT

IFIE

R, IR

LL01

4

C11

0.1µ

F

C922

0pF

C6,

1000

pF

C13

1000

pF

M7

R5 4.7k

C18,

0.0

1µF

+

C12

6.8n

F

Q2 Z

ETEX

FZT8

49R1

110Ω

R7 221k

1%

R8, 3

16k,

1% C17,

22p

F

+C4 3.

3µF

25V

D5 MM

BD91

4L

R3 100k

1% R4 11.3

k1%

Q1 =

MOT

OROL

A, M

MBT

2907

ALT1

Q2 =

ZET

EX, F

ZT84

9T1

= D

ALE,

LPE

-656

2-A2

36L2

= S

UMID

A, C

DRH1

27-1

00M

C

ALL

INPU

T AN

D OU

TPUT

CAP

ACIT

ORS

ARE

AVX-

TPS

SERI

ES

R12 1k D7

LTC1438/LTC1439

2914389fb

PCB LAYOUT A D FILU W

(Gerber files for this circuit board are available. Call LTC Marketing.)

Silkscreen Top Silkscreen Bottom

Copper Layer 1 Copper Layer 2 Ground Plane

Copper Layer 4Copper Layer 3

LTC1438/LTC1439

3014389fb

PACKAGE DESCRIPTION

U

G Package28-Lead Plastic SSOP (0.209)

(LTC DWG # 05-08-1640)

G Package36-Lead Plastic SSOP (0.209)

(LTC DWG # 05-08-1640)

0.09 – 0.25(.0035 – .010)

0° – 8°

0.55 – 0.95(.022 – .037)

5.00 – 5.60**(.197 – .221)

7.40 – 8.20(.291 – .323)

1 2 3 4 5 6 7 8 9 10 11 12 1413

9.90 – 10.50*(.390 – .413)

2526 22 21 20 19 18 17 16 1523242728

2.0(.079)MAX

0.05(.002)MIN

0.65(.0256)

BSC0.22 – 0.38

(.009 – .015)TYP

MILLIMETERS(INCHES)

NOTE:1. CONTROLLING DIMENSION: MILLIMETERS

2. DIMENSIONS ARE IN

0.42 ±0.03 0.65 BSC

5.3 – 5.77.8 – 8.2

RECOMMENDED SOLDER PAD LAYOUT

1.25 ±0.12

DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDEDIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE

*

**

3. DRAWING NOT TO SCALE

G28 SSOP 0204

0.09 – 0.25(.0035 – .010)

0° – 8°

0.55 – 0.95(.022 – .037)

5.00 – 5.60**(.197 – .221)

7.40 – 8.20(.291 – .323)

1 2 3 4 5 6 7 8 9 10 11 12 14 15 16 17 1813

12.50 – 13.10*(.492 – .516)

2526 22 21 20 19232427282930313233343536

2.0(.079)MAX

0.05(.002)MIN

0.65(.0256)

BSC0.22 – 0.38

(.009 – .015)TYP

MILLIMETERS(INCHES)


2. DIMENSIONS ARE IN DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDEDIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE

*

**

3. DRAWING NOT TO SCALE

0.42 ±0.03 0.65 BSC

5.3 – 5.77.8 – 8.2


1.25 ±0.12

G36 SSOP 0204

LTC1438/LTC1439

3114389fb

PACKAGE DESCRIPTION

U

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

GW Package36-Lead Plastic SSOP (Wide 0.300)

(LTC DWG # 05-08-1642)

GW36 SSOP 0204

0° – 8° TYP

0.355REF

0.231 – 0.3175(.0091 – .0125)

0.40 – 1.27(.015 – .050)

7.417 – 7.595**(.292 – .299)

× 45°0.254 – 0.406(.010 – .016)

2.286 – 2.388(.090 – .094)

0.1 – 0.3(.004 – .0118)

2.44 – 2.64(.096 – .104)

0.800(.0315)

BSC

0.28 – 0.51(.011 – .02)

TYP

15.291 – 15.545*(.602 – .612)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

10.11 – 10.55(.398 – .415)

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19

10.804 MIN


7.75 – 8.258

1936

1810.800 BSC0.520 ±0.0635

1.40 ±0.127

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.152mm (0.006") PER SIDE

*

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE

**MILLIMETERS

(INCHES)


2. DIMENSIONS ARE IN

LTC1438/LTC1439

3214389fb

PART NUMBER DESCRIPTION COMMENTS

LTC1159 High Efficiency Step-Down Switching Regulator Controller Synchronous, VIN ≤ 40V, For Logic Threshold FETs

LT®1375/LT1376 1.5A, 500kHz Step-Down Switching Regulators High Frequency, Small Inductor, High EfficiencySwitchers, 1.5A Switch

LTC1436/LTC1436-PLL/ High Efficiency Low Noise Synchronous Step-Down Full-Featured Single ControllerLTC1437 Switching Regulator Controllers

LT1510 Constant-Voltage/Constant-Current Battery Charger 1.3A, Li-Ion, NiCd, NiMH, Pb-Acid Charger

LTC1538-AUX Dual, Synchronous Controller with AUX Regulator 5V Standby in Shutdown

LTC1539 Dual High Efficiency, Low Noise, Synchronous Step-Down 5V Standby in ShutdownSwitching Regulator Controller

LTC1778 Fast Step-Down Synchronous Controller Fast Transient Response; No RSENSE

LTC3728 2-Phase, Dual Synchronous Step-Down Controller Minimum CIN and COUT, 550kHz/Phase; Current Mode

© LINEAR TECHNOLOGY CORPORATION 1996

3.3V to 2.9V at 3A Low Noise Linear Regulator

TYPICAL APPLICATION

U

LTC1439

AUXDR

AUXFB

AUXON

1438 TA05

6.8nF

22pF

47k 27Ω

100Ω

316k1%

221k1%

Q1MMBT2907ALTI

10Ω

+ 330µF× 2

ZETEXFZT849(SURFACE MOUNT)

3.3V

5V

2.9V3A

2.9VON/OFF

RELATED PARTS

LT/LT 0305 REV B • PRINTED IN USALinear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 FAX: (408) 434-0507 www.linear.com

ltc1438/lt1439 - dual high efficiency, low noise ......3.3v selected vprog1, vprog2 = 0v 3.220 3.30...

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