lin protocol implementation using picmicro...

2000 Microchip Technology Inc. Preliminary DS00729A-page 1

INTRODUCTION

LIN Protocol was designed by a consortium of Euro-pean auto manufacturers as a low cost, short distance,low speed network. Designed to communicate changesin switch settings and respond to switch changes, it isintended to communicate events that happen in"human" time (hundreds of milliseconds).

This Application Note is not intended to replace orrecreate the LIN Protocol Specification. Rather, it isintended to provide a broad overview of the bus andprovide a high level look at how it works, how to imple-ment a Slave node on a PICmicro® device and what it’sdesigned to do. The complete LIN Protocol Specifica-tion is expected to be available via the worldwide webat www.lin-subbus.com. However, until then, copies ofthe LIN Protocol Specification may only be distributedby Audi AG, BMW AG, DaimlerChrysler AG, Motorola,Inc., Volcano Communication Technologies AB, Volk-swagen AG, and Volvo Car Corporation.

BUS FEATURES

LIN Protocol supports bi-directional communication ona single wire, while using inexpensive microcontrollersdriven by RC oscillators, to avoid the cost of crystals orceramic resonators. Instead of paying the price foraccurate hardware, it pays the price in time and soft-ware. The protocol includes an autobaud step on everymessage. Transfer rates of up to 20Kbaud are sup-ported, along with a low power SLEEP mode, wherethe bus is shut down to prevent draining the battery, butthe bus can be powered up by any node on the bus.

The bus itself is a cross between I2CTM and RS232.The bus is pulled high via a resistor and each nodepulls it low, via an open collector driver like I2C. How-

ever, instead of having a clock line, each byte is markedvia start and stop bits and the individual bits are asyn-chronously timed like RS232.

ELECTRICAL CONNECTIONS

Figure 1 shows a typical LIN Protocol configuration.

The bus uses a single wire pulled high through a resis-tor with open collector drivers. A Dominant state is sig-naled by a ground level on the bus and occurs whenany node pulls the bus low. A Recessive state is whenthe bus is at VBAT (9 - 18V) and requires that all nodeslet the bus float. In the idle state, the bus floats high,pulled up through the resistor.

The bus operates between 9V and 18V, but parts mustsurvive 40V on the bus. Typically, the microcontroller isisolated from the bus levels by a line driver/receiver.This allows the microcontrollers to operate at 5V levels,while the bus operates at higher levels.

The bus is terminated to VBAT at each node. The Mas-ter is terminated through a 1KΩ resistor, while theSlaves are terminated through a 20-47KΩ resistor.Maximum bus length is designed to be 40 meters.

At press time (early 2000), K-Line drivers are used untiltrue LIN drivers are available.

Authors: Dan Butler

Microchip Technology Inc.

Thomas SchmidtThorsten Waclawczyk

AN729LIN Protocol Implementation Using PICmicro® MCUs

AN729

DS00729A-page 2 Preliminary 2000 Microchip Technology Inc.

FIGURE 1: BUS CONFIGURATION

BYTE PROTOCOL

Each byte is framed by start and stop bits as shown inFigure 2. Within each byte, data is transmitted LSb first.The start bit is the opposite of the idle state or zero, andthe stop bit equals the idle state (1).

FIGURE 2: BYTE PROTOCOL

LINTransceiver

MasterµC

1KΩVBAT

Slave 1µC

30KΩ nomVBAT

Slave 2µC

30KΩ nomVBAT

Slave n <16µC

30KΩ nomVBAT

40mMaxi-

LIN Protocol

LINTransceiver

LINTransceiver

LINTransceiver

Bus IdleStartbit

LSb MSb Stopbit

Each byte is framed by a start bit and stop bit, and data is transmitted Least Significant bit first.

bit 0 1 2 3 4 5 6 7


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MESSAGE PROTOCOL

The Master controls the bus by polling Slaves to sharetheir data with the rest of the bus. Slave nodes onlytransmit when commanded by the Master, which allowsbi-directional communication without further arbitration.Message transfers start with the Master issuing asynch break, followed by a synch field and a messagefield. It also sets the clock for the entire bus by transmit-ting a synch field at the beginning of each message,which is used for clock synchronization. Each Slavemust use this synch byte to adjust their baud rate.

The synch break is bus dominant, held for 13 bit times,followed by a stop bit (recessive). This lets the Slavesknow that a message is coming. The Master and Slave

clocks may have drifted as much as 15%. Therefore,the synch break may be received by a Slave as only 11bit times, or as long as 15 bit times.

The second byte of each message is an ident byte,which tells the bus what data will follow and indicateswhich node should answer and how long the answershall be. Only one Slave may respond to a givencommand.

Slaves only transmit data on the bus when directed bythe Master. Once the data is on the bus, any node mayreceive that data. Therefore, communication from oneSlave to another does not have to be directed throughthe Master.

FIGURE 3: MESSAGE PROTOCOL

SynchBreak

SynchField

IdentField

DataByte 1

DataByte 2

DataByte 3

ChecksumBus Idle

ResponseHeader

Interframe Response Space

Message

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CLOCK SYNCHRONIZATION

LIN Protocol is designed to use low cost RC oscillatorson the controllers. To keep communication working aseach node’s clock drifts, Slaves must detect the Mas-ter’s baud rate on every transfer and adjust to the cur-rent baud rate. For this reason, each transaction startswith a synch field. The synch field is a one byte 0x55(alternating 0’s and 1’s). This allows every Slave nodeto detect 8 bit times. By counting these transitions,dividing by 8 and rounding, each Slave adjusts theirtiming to the Master.

IDENTIFIER FIELD

Following the synch field, is an identifier field, whichtells the bus what’s coming next. The ident field is bro-ken up into 3 fields: 4 bits (0-3) address devices on thebus, 2 bits (4-5) indicate the length of the message tofollow and the last 2 bits (6-7) are used for parity.

The 4 address bits can address up to 16 Slaves, andeach Slave can send a 2, 4 or 8 byte response, for atotal of 64 different messages.

The LIN Protocol Specification does not define the con-tent of each message, except for the SLEEP commanddetailed in the Lower Power Sleep section. Instead, thatis left up to the application.

Messages from one node to another may be sentdirectly, as directed by the Master. The data does nothave to be received by the Master and retransmitted tothe receiving node. Instead, any message may bereceived and acted upon by any node.

FIGURE 4: SYNCH FIELD

Bus Idle Startbit

1 Stopbit

Count time for 4 successive falling edges, then divide by 8 and round, to get a single bit time. The divideand round is easily implemented as 3 right shifts and add the carry back in.

0 1 0 1 0 1 0

StartClock

1 2 3 4

LSb MSb


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FIGURE 5: IDENT FIELD

P1 P0 ID5 ID4 ID3 ID2 ID1 ID0

P0: Parity bit ID0 ⊕ ID1 ⊕ ID2 ⊕ ID4

P1: Parity bit ID1 ⊕ ID3 ⊕ ID4 ⊕ ID5

ID0 - 3: Device Address

ID4 - 5: Message Length

ID5 ID4 Date Bytes

0 0 20 1 21 0 41 1 8

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ERROR DETECTION

The following errors must be detected and countedwithin each node:

• Bit Errors: The transmitting node should compare what it thinks should be on the bus against what actually is on the bus. The controllers must wait long enough for the bus to respond before testing for the bit. Given the minimum edge slew rates are 1V/uS, and the maximum bus voltage (18V), the transmitter should wait 18µS before testing, to see if the bit on the bus is correct.

• Checksum Errors: The data content of each mes-sage is protected by a checksum byte, which is the inverted module-256 checksum of the data bytes.

• Parity Errors: The command byte uses 2 parity bits to protect the other 6. These need to be recalculated and compared.

If there is an error, the command should be ignored andthe error logged.

ERROR REPORTING

There is no direct error reporting mechanism. However,each Slave node is expected to track it’s own errors.The Master may then request error status as part of anormal message protocol.

CANBUS INTERFACE

LIN Protocol is not directly compatible to CANBUS,however, it is anticipated that the two will operate inconjunction with one another. CANBUS might be usedfor communication throughout the car, while LIN Proto-col would only be used within a small section of the car,say within the door.

A CAN-LIN Protocol interface node would be neces-sary to connect the two busses. The interface nodewould collect information from the LIN Protocol nodesand pass that information along on CANBUS.

LOWER POWER SLEEP

The Master may direct all nodes to enter a SLEEPmode by sending a ident code of 0x80. This is the onlymessage ID defined in the LIN Protocol Specification.The content of the data bytes following the SLEEPcommand is not defined. Slaves receiving the SLEEPcommand should set-up for a wake-up on change fromthe bus and power-down to minimum current drain. Thebus will float high and not consume current.

Any node may wake-up the bus by sending a wake-upsignal, which is a character 0x80 (low for 7 bit times fol-lowed by 1 bit time high). When this signal is received,all nodes should wake-up and wait for the Master tostart polling the bus in the normal fashion.

If the Master fails to wake up after 128 bit times(6400uS @ 20Kbaud), the node that is attempting towake the Master should try again. This may beattempted a total of 3 times before waiting 15000 bittimes (750mS @ 20Kbaud).

FIGURE 6: SLEEP MESSAGE

SyncBreak

SyncField

SLEEP0x80

Wake-up0x80

SynchBreak

SLEEP Mode Frame

Data1

Data2

Check-sum

Any Slave Master


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DEMONSTRATION SOFTWARE

The code in Appendix A demonstrates communicationon the LIN Protocol. The hardware consists of 2 buttonsand 3 LEDs, as shown in Figure 7. LED #1 changesstate for every 10 button pushes of button #1. Likewise,LED #2 changes state for every 10 presses of button#2. In response to ID 1, the button counts are transmit-ted on the bus. In response to ID 4, the button countsare updated from the bus.

FIGURE 7: DEMONSTRATION HARDWARE

SOFTWARE OPERATION

The LIN Protocol code works on the interrupt as trig-gered from RB0. This is necessary to implement theSLEEP/Wake- up requirement. Once the interrupt istriggered, it counts the length of the low bit time. Thenthe synch byte is read and the local bit time is deter-mined. This is then compared against the original bittime to determine if the original low time was more than10 bit times and thus, signaled a synch break, or lessthan 10, signaling a wake up from SLEEP.

If it’s a wake up from SLEEP, the code exits and contin-ues waiting for a synch break.

If it’s a synch break, it then reads in the command byte,checks the parity bits and checks the action table todetermine it’s actions from there. The action tabledefines the source or destination for the data on thebus.

SOFTWARE FUNCTION

In order to initialize the LIN Protocol Slave handler, theuser has to call the routine InitLinSlave. This rou-tine initializes the RB0 interrupt pin and the TMR0.TMR0 will be used to measure the bit length and togenerate the baudrate. After initialization, the user canexecute his code. The code will be interrupted once afalling edge is detected on RB0. If a falling edge isdetected, the code will branch into the interrupt serviceroutine. All interrupts, except for TMR0 and RB0, mustbe disabled to accurately time the synch field. After thebaudrate is calculated, the interrupt service routine isexited. Upon the next interrupt on RB0, the LIN Proto-col Slavehandler goes automatically into receive modein order to receive the identifier field or data bytes.Once the start bit of the identifier field or data byte isdetected, where the program branches into the inter-rupt service routine, the identifier field is received anddecoded. Depending on the received identifier, code isexecuted, for example, storing data, turn on LED, etc.This code has to be included by the user into the sub-routine DecodeIdTable after the routine is executed.

After the bus frame is completed, the flag FCOMPLETEis set. This flag indicates that all data is received cor-rectly and ready for further processing. This flag has tobe cleared by the user’s firmware.

Note: TMR0 is used for bit time measurement andbaudrate generation. Therefore, TMR0 isnot available to application software.

30K nomVBAT

LIN ProtocolDriver

PICmicro® MCU B0

B4

B1 B2 B5 B6 B7

LIN Protocol

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ERROR DETECTION

The Slave node process detects the following errors:

• Checksum error• Bit errors• Missing Stop bit

• Parity error• Time-out errors

When the Slave code detects an error, it’s recorded inthe ERRORFLAGS register as shown in figure 8, and themessage is ignored. These error flags are clearedonce a valid ident field is received.

FIGURE 8: ERROR FLAGS

SOFTWARE PERFORMANCE

The LIN Protocol Slavehandler can operate up to aspeed of 20Kbaud.

The LIN Protocol Slavehandler requires 420 words ofprogram memory (not including program memory formacros for the In Out IDs) and 23 bytes of data mem-ory.

This application is ideal for Microchip’s internal RCoscillator operating at 4MHz.

INTEGRATION INTO CUSTOM CODE

The user has to edit the subroutine DecodeIDTable.In this section, the user defines what action has to betaken upon a certain identifier. Furthermore, the usercan define what action has to be taken upon certainerrors, (i.e., timing error or others).

These flags are set when detected.

7 6 . . . 4 3 2 1 0

Time Not Bit CRC ID Parity NoOut Used Error Error Error Response

2000 M

icrochip Technology Inc.

Prelim

inary

DS

00729A-page 9

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APPENDIX A: SOURCE CODE

MPASM 02.30.09 Intermediate LINSLAVE.ASM 1-27-2000 9:57:59 PAGE 1

LOC OBJECT CODE LINE SOURCE TEXT VALUE

00001 ; Software License Agreement 00002 ; 00003 ; The software supplied herewith by Microchip Technology Incorporated (the "Company") 00004 ; for its PICmicro® Microcontroller is intended and supplied to you, the Company’s 00005 ; customer, for use solely and exclusively on Microchip PICmicro Microcontroller 00006 ; products. 00007 ; 00008 ; The software is owned by the Company and/or its supplier, and is protected under 00009 ; applicable copyright laws. All rights are reserved. Any use in violation of the 00010 ; foregoing restrictions may subject the user to criminal sanctions under applicable 00011 ; laws, as well as to civil liability for the breach of the terms and conditions of 00012 ; this license. 00013 ; 00014 ; THIS SOFTWARE IS PROVIDED IN AN "AS IS" CONDITION. NO WARRANTIES, WHETHER EXPRESS, 00015 ; IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF 00016 ; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE 00017 ; COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL OR 00018 ; CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. 00019 ; 00020 ; ############################################################################### 00021 ; filename: LINSLAVE.ASM

Software License Agreement

The software supplied herewith by Microchip Technology Incorporated (the “Company”) for its PICmicro® Microcontroller isintended and supplied to you, the Company’s customer, for use solely and exclusively on Microchip PICmicro Microcontroller prod-ucts.

The software is owned by the Company and/or its supplier, and is protected under applicable copyright laws. All rights are reserved.Any use in violation of the foregoing restrictions may subject the user to criminal sanctions under applicable laws, as well as to civilliability for the breach of the terms and conditions of this license.

THIS SOFTWARE IS PROVIDED IN AN “AS IS” CONDITION. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATU-TORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICU-LAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FORSPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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00022 ; LIN ( Local Interconnect Network ) SpecRev 1.0

00023 ;

00024 ; ###############################################################################

00025 ;

00026 ; Author: Thorsten Waclawczyk

00027 ; Company: Arizona Microchip Technology GmbH

00028 ;

00029 ; Revision: 1.7

00030 ; Date: 18-JAN-2000

00031 ; Assembled using MPASM 2.30.07

00032 ;

00033 ;################################################################################

00034 ;

00035 ; include files:

00036 ; p16C622.inc Rev 1.01

00037 ;

00038 ;################################################################################

00039 ;

00040 ; Implements the LIN slave handler conforming the LIN spec revision 1.0 with

00041 ; using the external interupt INTE and TMR0 as an interrupt based system.

00042 ;

00043 ; LIN HANDLER DESCRIPTION

00044 ;

00045 ; The linslave handler must be initialized before starting the main task

00046 ; by calling the routine "InitLinSlave".

00047 ;

00048 ; After initialization the interrupt based LIN handler waits on first falling

00049 ; and a second rising edge to measure the length of synchbreak lowtime.

00050 ; Then the LIN handler waits for the next falling edge to count the processor

00051 ; cycles between the next four falling edge detections.

00052 ;

00053 ; This result is divided by 8 to get the bitlength. To make sure that

00054 ; this is the header sequence, the bitlength is multiplied by 10 and

00055 ; compared to the initial synchbreak count. If the synchbreak count is

00056 ; longer, we know it was a synchbreak.

00057 ;

00058 ; After that the LIN handler is set in receive mode to read the identifier

00059 ; by using the bitlength value set into the timer0.

00060 ; When the byte has received it will be checked and decoded in the subroutine

00061 ; "CheckIdentifierByte" so that the LIN handler can handle the incoming or

00062 ; outgoing resonse frame.

00063 ;

00064 ; The timing and error checking will be handled by the LIN handler so that

00065 ; the only thing the user has to do is define the DecodeIdTable.

00066 ; This gives an action to each of the 16 possible IDs that may come across

00067 ; from the master. Three actions are possible: MacroLstMode, listen but

00068 ; take no action on the data. MacroRsMode, which provides a buffer for


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00069 ; recieving data. MacroTxMode while sets up a buffer to transmit from.

00070 ;

00071 ; When a complete message frame has been done a flag "COMFLAGS,FCOMPLETE"

00072 ; is set. So after that the user can process the data in the buffer

00073 ; if there are no errors. After data is processed the complete flag must

00074 ; be cleared by the user to signal that the data has been processed.

00075 ;

00076 ; DEMO PROGRAM DESCRIPTION

00077 ;

00078 ; The slave node has two buttons and three LEDs. The buttons are read in

00079 ; and counted. The button counts are transmitted in response to ID1.

00080 ;

00081 ; LEDs 1 and 2 change state when the value of the register corresponding

00082 ; counter (COMPLED1 or COMPLED2) matches the delimiter value, currently

00083 ; set to 10.

00084 ;

00085 ; ID4 updates the counters via the LIN bus.

00086 ;

00087 ; LED3 toggles each time it detects a complete message frame.

00088 ;

00089 ; ###############################################################################

00090 ;

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00113 #define RSLINEPIN 0 ; PB0 connected to the receive line

00114 #define TXLINEPIN 4 ; PB4 connected to the send line

00115

00116 #define LINSLAVERAM 0x20 ; startadress

00117

00118 ; ---- RAM location used by LINSLAVE modul --------------------------------------

00119

00120 CBLOCK LINSLAVERAM

00000020 00121 COPYWREG ; holds a copy of WREG

00000021 00122 COPYSTATUS ; holds a copy of STATUS

00123

00000022 00124 HICOUNT:0,TIMEOUTLO,TIMEOUTHI ; temporary highbyte for TMR0

00125 ; and timeout counter

00000024 00126 COUNTEDGES ;

00000025 00127 COUNTVALUE:0,COUNTVALUELO,COUNTVALUEHI ; software counter for baudrate

00128

00000027 00129 SYNCLENGTH:0,SYNCLENGTHLO,SYNCLENGTHHI

00000029 00130 BITREG:0,BITNBR,BITLENGTH ; bitposition and bitlength

0000002B 00131 DATABLOCKLENGTH ; numbers of send/receive block

0000002C 00132 PREIDNUMBER ; carries the id field bits5..0

0000002D 00133 IDNUMBER ; carries the ID_number

0000002E 00134 ERRORFLAGS ; protocols communication errors

0000002F 00135 COMFLAGS ; linbus communication bits

00000030 00136 BUFFERPTR

00000031 00137 COMBUFFER

00000032 00138 DATACRC ; checksum over xmit / rcsv block

00000033 00139 TXDATAFIELD:8 ; data transmission buffer

0000003B 00140 RSDATAFIELD:8 ; data receive block buffer

00000043 00141 DUMMY:2

00142 ENDC

00143

000000A0 00144 MIRRCOPYWREG EQU (COPYWREG + 80h) ; reserve RAM location on page1

00145

00146 #define LINSLAVEBLOCKLENGTH (DUMMY+1 - LINSLAVERAM)

00147 #define LINBLOCKEND (DUMMY+1)

00148 ;#############################################################

00149 ; ; calculate the needed RAM

00150 ; space by LINslave

00151

00152 ; #### bit defines #

00153 ; defines for the errorflag variable

00154

00155 #define FTIMEOUT 7 ; no communication on receive / transmit

00156 #define FBITERROR 3 ; an outgoing bit value is

00157 ; different than the line value

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AN729

00160 #define FNORESPONSE 0 ; no echo on bus

00161

00162 ; defines for the comflag variable

00163

00164 #define FSYNCHBREAK 0 ; synch_break detected

00165 #define FID 1 ; ID byte receives as next byte

00166 #define FRSDATA 2 ; data block read

00167 #define FTXDATA 3 ; data block to be sent

00168 #define FCOMDATA 4 ; communication is running

00169 #define FLISTENONLY 5 ; ID byte is a command only for

00170 #define FCOMPLETE 6 ; communication completed

00171 #define FSLEEPMODE 7 ; sleep-mode frame

00172

00173

00174 ; ###############################################################################

00175 ; #### main task declaration ####################################################

00176 ;

00177 ; at this point used variables for the demo program will be defined

00178 ;

00179

00180 #define LED1 5 ; Toggles after 10 presses of button 1

00181 #define LED2 6 ; toggles after 10 presses of button 2

00182 #define LED3 7 ; indicates complete message frame

00183

00184 #define BUTTON1 1 ; input

00185 #define BUTTON2 2

00186

00187 CBLOCK TXDATAFIELD

00000033 00188 BUTTONPRESSED1 ; register used by ID1

00000034 00189 BUTTONPRESSED2 ;

00190 ENDC

00191

00192 CBLOCK RSDATAFIELD

0000003B 00193 COMPLED1 ; register used by ID4

0000003C 00194 COMPLED2 ;

00195 ENDC

00196

00197 ; define global variables used by the main task

00198

00199 CBLOCK LINBLOCKEND+1

00000045 00200 COMPERATOR ; contains the delimiter to

00201 ; switch on/off the LEDs

00000046 00202 B1FILTER ; debouncefilter button1

00000047 00203 B2FILTER ; debouncefilter button2

00000048 00204 DEBOUNCECOUNTER

00000049 00205 COPYPORTB

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0000004A 00206 EDGEDETECT

00207 ENDC

00208

00209 ; ###############################################################################

00210 ;################################################################################

00211

00212 ; #### declare MODE macros ######################################################

00213

00214 MacroRsMode MACRO StartAddrOfPtr

00215 bsf COMFLAGS,FRSDATA ; indicates the receive mode

00216 movlw StartAddrOfPtr ; get the wanted ram location

00217 ; where the data will stored

00218 movwf BUFFERPTR ; and initialize the pointer

00219 retlw 0

00220 ENDM

00221

00222 MacroTxMode MACRO StartAddrOfPtr

00223 bsf COMFLAGS,FTXDATA ; indicates the transmission mode

00224 movlw StartAddrOfPtr ; get the wanted ram location

00225 ; where the data will read from

00226 movwf BUFFERPTR ; and initialize the pointer

00227 retlw 0

00228 ENDM

00229

00230 MacroLstMode MACRO

00231 bsf COMFLAGS,FLISTENONLY ; indicates the receive mode

00232 ; without saving the received data

00233 nop ; this is necessary to have

00234 nop ; a correct jump table length

00235 retlw 0

00236 ENDM

00237

00238 ; #### RESETvector ##############################################################

00239

0000 00240 RESET org 0x0000 ; reset-vector

00241

0000 29A9 00242 goto Main

00243

00244 ; #### INTvector ################################################################

00245

0004 00246 INTvector org 0x0004

0004 00A0 00247 movwf COPYWREG ; save the used registers WREG

0005 0803 00248 movf STATUS,W ;

0006 1283 00249 bcf STATUS,RP0 ; switch to bank0

0007 00A1 00250 movwf COPYSTATUS ; save STATUS in page0

0008 00251 TMR0int

0008 1D0B 00252 btfss INTCON,T0IF


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0009 2815 00253 goto ExtInt ; if timer int enabled

00254

000A 0AA2 00255 incf HICOUNT,F ; increment highbyte is also

000B 1D03 00256 btfss STATUS,Z ; the lowbyte of timeout counter

000C 2810 00257 goto TMR0Int1

00258

000D 0AA3 00259 incf TIMEOUTHI,F ; timeout sequence after

000E 19A3 00260 btfsc TIMEOUTHI,3 ; 3000 * 256 cycles

000F 17AE 00261 bsf ERRORFLAGS,FTIMEOUT ; signal the timeout

00262

0010 00263 TMR0Int1

0010 110B 00264 bcf INTCON,T0IF ; clear overflow flag

0011 192F 00265 btfsc COMFLAGS,FRSDATA ; check if receiver mode

0012 2881 00266 goto GetData

00267

0013 19AF 00268 btfsc COMFLAGS,FTXDATA ; check if transmit mode

0014 28BE 00269 goto PutData

00270

0015 00271 ExtInt

0015 1E0B 00272 btfss INTCON,INTE ; check if external interupt

0016 28F8 00273 goto IntrEnd ; is eanabled and

0017 1C8B 00274 btfss INTCON,INTF ; possibly occured

0018 28F8 00275 goto IntrEnd

00276

0019 3026 00277 movlw 0x26 ; +12 cycles

001A 052F 00278 andwf COMFLAGS,W ; if next byte is ID or falling

001B 1D03 00279 btfss STATUS,Z ; edge of startbit initialize

001C 286D 00280 goto GetDataInit ; reading a byte from bus

00281

001D 182F 00282 btfsc COMFLAGS,FSYNCHBREAK ; was it a synch_break?

001E 2832 00283 goto CountSynchByte ; yes : then the sequence to measure

00284 ; the synch_byte will be expected

001F 1683 00285 bsf STATUS,RP0

Message[302]: Register in operand not in bank 0. Ensure that bank bits are correct.

0020 1B01 00286 btfsc OPTION_REG,INTEDG ; is rising edge selected

0021 2827 00287 goto CopySyncBreakLength ; then save the count of synchbreak


0022 1701 00288 bsf OPTION_REG,INTEDG ; else set rising edge sensitivity

0023 1283 00289 bcf STATUS,RP0

00290

0024 0181 00291 clrf TMR0 ; initialize the used counter

0025 01A2 00292 clrf HICOUNT ; to measure the synch break

0026 28F8 00293 goto IntrEnd ; and now wait for rising edge int

00294

0027 00295 CopySyncBreakLength


0027 1301 00296 bcf OPTION_REG,INTEDG ; set the falling edge sensitivity

AN729


0028 1283 00297 bcf STATUS,RP0 ; to detect the startbit of

0029 0801 00298 movf TMR0,W ; the identifier byte

002A 00A7 00299 movwf SYNCLENGTH ; save the counter value

002B 0822 00300 movf HICOUNT,W

002C 00A8 00301 movwf SYNCLENGTH+1 ; if the hibyte is cleared the

002D 1903 00302 btfsc STATUS,Z ; received value was no synch break

002E 2868 00303 goto LowerSynchLength ; sequence so start another

00304 ; loop to detect a synch break

002F 01A4 00305 clrf COUNTEDGES ; otherwise initialize the synch

0030 142F 00306 bsf COMFLAGS,FSYNCHBREAK ; byte detection and measurement

0031 28F8 00307 goto IntrEnd

00308

00309 ; ---- CountSynchByte -----------------------------------------------------------

00310 ;

00311 ; Counts the cycles between five falling edges to calculate single bitlength

00312 ; for communicating with the master. The first falling edge clears the count

00313 ; registers. After the fifth edge, the bitlength is calculated by dividing

00314 ; the count by 8 and rounding.

00315 ;

0032 00316 CountSynchByte ; uses 17 cycles to arrive

0032 0824 00317 movf COUNTEDGES,W

0033 1D03 00318 btfss STATUS,Z ; if first falling edge then

0034 2837 00319 goto CountSynchEdges

0035 0181 00320 clrf TMR0 ;initialize bytelength couter

0036 01A2 00321 clrf HICOUNT

00322

0037 00323 CountSynchEdges

0037 1924 00324 btfsc COUNTEDGES,2 ; else check count of passed edges

0038 283B 00325 goto GetSynchLength

0039 0AA4 00326 incf COUNTEDGES,F ; wait for next falling edge

003A 28F8 00327 goto IntrEnd

003B 00328 GetSynchLength

003B 190B 00329 btfsc INTCON,T0IF ; if all edges counted in

003C 0AA2 00330 incf HICOUNT,F ; calculate actual bitlength in

003D 0801 00331 movf TMR0,W ; cycle counts by

003E 00AA 00332 movwf BITLENGTH

003F 1003 00333 bcf STATUS,C ; dividing the 16Bit result by 8

0040 0CA2 00334 rrf HICOUNT,F

0041 0CAA 00335 rrf BITLENGTH,F

0042 1003 00336 bcf STATUS,C


0044 0CAA 00338 rrf BITLENGTH,F

0045 1003 00339 bcf STATUS,C


0047 0CAA 00341 rrf BITLENGTH,F ; result is in bitlength

0048 082A 00342 movf BITLENGTH,W ;

0049 3C31 00343 sublw .49 ; BITLENGTH lower than fastest


AN729

004A 1803 00344 btfsc STATUS,C ; bitrate

004B 2868 00345 goto LowerSynchLength

00346

00347 ; ---- CheckSynchBreakLength ----------------------------------------------------

00348 ;

00349 ; Multiplies the counted bitlength by 10 to see if the synch break

00350 ; is longer than a normal data byte. A normal data byte contains a dominant

00351 ; startbit, 8 databits and a recessive stopbit, so if the measured lowtime

0

03

52

;

of

the

syn

chb

rea

k is

lon

ge

r th

an

10

bitl

en

gth

tim

es

it’s

a s

ynch

bre

ak.

0

03

53

;

0

03

54

0

04

C

0

03

55

Ch

eck

Syn

chB

rea

kLe

ng

th0

04

C

01

C4

00

35

6

c

lrf

D

UM

MY

+1

;

no

->

do

syn

ch b

rea

k le

ng

th0

04

D

08

2A

00

35

7

m

ovf

BIT

LE

NG

TH

,W

;

sto

re b

itle

ng

th0

04

E

00

C3

00

35

8

m

ovw

f

DU

MM

Y0

04

F

10

03

00

35

9

b

cf

S

TA

TU

S,C

00

50

0

DC

3

00

36

0

r

lf

D

UM

MY

,F

;

mu

ltip

ly b

itle

ng

h w

ith 8

00

51

0

DC

4

00

36

1

r

lf

D

UM

MY

+1

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;

0

05

2

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00

36

2

r

lf

D

UM

MY

,F0

05

3

0D

C4

00

36

3

r

lf

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UM

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4

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00

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4

r

lf

D

UM

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05

5

0D

C4

00

36

5

r

lf

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UM

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05

6

07

C3

00

36

6

a

dd

wf

D

UM

MY

,F

;

an

d a

dd

bitl

en

gth

va

lue

0

05

7

18

03

00

36

7

b

tfsc

S

TA

TU

S,C

;

twic

e t

o m

ulti

ply

by

10

00

58

0

AC

4

00

36

8

in

cf

D

UM

MY

+1

,F0

05

9

07

C3

00

36

9

a

dd

wf

D

UM

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,F0

05

A

18

03

00

37

0

b

tfsc

S

TA

TU

S,C

00

5B

0

AC

4

00

37

1

in

cf

D

UM

MY

+1

,F0

05

C

08

44

00

37

2

m

ovf

DU

MM

Y+

1,W

00

5D

0

22

8

00

37

3

s

ub

wf

S

YN

CL

EN

GT

H+

1,W

;

first

ch

eck

th

e h

igh

byt

es

00

5E

1

C0

3

00

37

4

b

tfss

S

TA

TU

S,C

;

bitl

en

gth

*1

0 <

syn

ch le

ng

th0

05

F

28

68

00

37

5

g

oto

Lo

we

rSyn

chL

en

gth

;

yes

-> n

o h

ea

de

r d

ete

cte

d0

06

0

1D

03

00

37

6

b

tfss

S

TA

TU

S,Z

;

bitl

en

gth

*1

0 =

syn

ch le

ng

th0

06

1

28

6B

00

37

7

g

oto

Hig

he

rSyn

cLe

ng

th

;

no

->

he

ad

er

de

tect

ed

00

62

0

84

3

00

37

8

m

ovf

DU

MM

Y,W

;

hig

hb

yte

s a

re e

qu

al

00

63

0

22

7

00

37

9

s

ub

wf

S

YN

CL

EN

GT

H,W

;

che

ck t

he

low

byt

es

00

64

1

C0

3

00

38

0

b

tfss

S

TA

TU

S,C

00

65

2

86

8

00

38

1

g

oto

Lo

we

rSyn

chL

en

gth

00

66

1

D0

3

00

38

2

b

tfss

S

TA

TU

S,Z

00

67

2

86

B

00

38

3

g

oto

Hig

he

rSyn

cLe

ng

th

0

03

84

0

06

8

0

03

85

Lo

we

rSyn

chL

en

gth

00

68

0

1A

F

00

38

6

c

lrf

C

OM

FL

AG

S

;

rese

t th

e li

nsl

ave

00

69

1

60

B

00

38

7

b

sf

I

NT

CO

N,I

NT

E

;

allo

w e

xte

rna

l in

terr

up

t 0

06

A

28

F8

00

38

8

g

oto

Intr

En

d

;

to

de

dic

ate

fir

st f

alin

g e

dg

e

0

03

89

0

06

B

0

03

90

Hig

he

rSyn

cLe

ng

th

AN729


006B 14AF 00391 bsf COMFLAGS,FID ; next databyte comming in is the

006C 28F8 00392 goto IntrEnd ; identifier byte

00393

00394 ; ---- GetDataInit --------------------------------------------------------------

00395 ;

00396 ; This function initializes the bitlength timer (TMR0) when the falling

00397 ; edge of an start bit is detected so reading the bit takes place in the

00398 ; center of the bit time.

00399 ;

00400 ; For typical communication speeds 9600 to 19.2kbaud, we can set timer 0

00401 ; to 1.5 bit times so we skip the remainder of the start bit and wake up

00402 ; midway through the 1st data bit. However for slow baud rates, slower

00403 ; than about 6 kbaud, 1.5 bit times may overflow the 8 bit timer. In

0

04

04

;

th

is c

ase

we

se

t tim

er

0 t

o a

ha

lf b

it tim

e s

o w

e’ll

wa

ke u

p m

id w

ay

0

04

05

;

th

rou

gh

th

e s

tart

bit

an

d a

dju

st t

he

bit

cou

nte

r to

acc

ou

nt

for

the

0

04

06

;

ext

ra b

it.

0

04

07

;

0

04

08

0

06

D

0

04

09

Ge

tDa

taIn

it0

06

D

01

B1

00

41

0

c

lrf

C

OM

BU

FF

ER

;

cle

ar

inp

ut

bu

ffe

r0

06

E

01

A9

00

41

1

c

lrf

B

ITN

BR

;

an

d t

he

bit

cou

nte

r0

06

F

13

2F

00

41

2

b

cf

C

OM

FL

AG

S,F

CO

MP

LE

TE

;

cle

ar

com

mu

nic

atio

n c

om

ple

te

0

04

13

;

ind

ica

tor

00

70

0

82

A

00

41

4

m

ovf

BIT

LE

NG

TH

,W

;

ch

eck

if b

au

dra

te is

less

th

an

00

71

3

CA

6

00

41

5

s

ub

lw

.1

66

;

ca.

6 k

Bd

00

72

1

C0

3

00

41

6

b

tfss

S

TA

TU

S,C

;

if h

igh

er

the

n0

07

3

28

79

00

41

7

g

oto

Se

tHa

lfSta

rtb

itLe

ngth

;

se

t ce

nte

r p

osi

tion

into

sta

rtb

it

0

04

18

0

07

4

10

03

00

41

9

b

cf

S

TA

TU

S,C

;

els

e c

en

ter

po

sitio

n in

to0

07

5

0A

A9

00

42

0

in

cf

B

ITN

BR

,F

;

first

da

tab

it b

y ca

lcu

latin

g0

07

6

0C

2A

00

42

1

r

rf

B

ITL

EN

GT

H,W

;

on

e a

nd

a h

alf

bitl

en

gth

00

77

0

72

A

00

42

2

a

dd

wf

B

ITL

EN

GT

H,W

00

78

2

87

A

00

42

3

g

oto

Ge

tDa

taIn

itEn

d

0

04

24

0

07

9

0

04

25

Se

tHa

lfSta

rtb

itLe

ng

th0

07

9

0C

2A

00

42

6

r

rf

B

ITL

EN

GT

H,W

;

ce

nte

r st

op

bit

0

04

27

0

07

A

0

04

28

Ge

tDa

taIn

itEn

d0

07

A

3A

FF

00

42

9

x

orl

w

0xf

f

;

bu

ild c

om

ple

me

nt

for

time

r0

07

B

3E

3E

00

43

0

a

dd

lw

(.6

2)

;

corr

ect

tim

er

to c

en

ter

sto

pb

it0

07

C

00

81

00

43

1

m

ovw

f

TM

R0

00

7D

3

02

0

00

43

2

m

ovl

w

0x2

0

;

INT

E o

ff,T

0IE

on

, cl

ea

r fla

gs

00

7E

0

08

B

00

43

3

m

ovw

f

INT

CO

N

;

set

inte

rru

pts

00

7F

1

52

F

00

43

4

b

sf

C

OM

FL

AG

S,F

RS

DA

TA

;

ind

ica

tes

rece

ive

mo

de

00

80

2

8F

8

00

43

5

g

oto

Intr

En

d

0

04

36

0

04

37

; -

---

Ge

tDa

ta -

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

----

-


AN729

00438 ;

00439 ; Timer 0 has been set up to return here in time to test the incoming bit

00440 ; midway through the bit time. This function samples the bit and rotates

00441 ; the bit value into the data buffer.

00442 ;

00443 ; If it was an identifier byte, we call DecodeIDTable to figure out what

00444 ; to do next (Recieve message, transmit message or ignore message).

00445 ; If it was a data byte, it is stored in the buffer previously set up by

00446 ; the call to DecodeIDTable. When the all data has been received, the

00447 ; checksum is calculated and compared against the transmitted value. If

00448 ; there are no errors, the FCOMPLETE flag is set to signal that the

00449 ; buffer should be processed.

00450 ;

00451 ; We sample after TMR0 overflows, the routine copies the pin value into the

00452 ; communication buffer and at checks the stopbit level to see if the data

00453 ; is correct. After receiving all bits of a byte there are two possibilities.

00454 ;

00455 ; 1. The received byte is the identifier byte. At this point the

00456 ; routine analyzes the byte to either set up the receive buffer,

00457 ; transmit buffer or neither as designated by the function

00458 ; "DecodeIDTable".

00459 ;

00460 ; 2. The received byte is a data byte of the response frame.

00461 ; The data is stored in the receive buffer and the value is added

00462 ; with the previous carry to build a modulo 256 checksum. The

00463 ; last byte is the message checksum, which is compared with the

00464 ; calculated checksum to check for message integrity.

00465 ;

00466

0081 00467 GetData ; delay of 13 cycles

0081 01A2 00468 clrf TIMEOUTLO ; reset the timeout counter

0082 01A3 00469 clrf TIMEOUTHI

0083 00470 CheckBitPosition

0083 3009 00471 movlw .9 ; how many bits left

0084 0629 00472 xorwf BITNBR,W ; stopbit received ?

0085 1903 00473 btfsc STATUS,Z ; no : copy receive pin value

0086 2891 00474 goto GetStopbit

00475

0087 1C06 00476 btfss PORTB,RSLINEPIN ; copy portvalue in data buffer

0088 1003 00477 bcf STATUS,C ; using the Carryflag

0089 1806 00478 btfsc PORTB,RSLINEPIN

008A 1403 00479 bsf STATUS,C

008B 0CB1 00480 rrf COMBUFFER,F ; shift carry into the buffer

00481

008C 00482 GetDataSetTMR

008C 0AA9 00483 incf BITNBR,F ; count received bit

008D 092A 00484 comf BITLENGTH,W ; and center TMR0 to next bit

AN729


008E 3E1F 00485 addlw (.31) ; with the correct value

008F 0081 00486 movwf TMR0

0090 28BD 00487 goto GetDataEnd

00488

0091 00489 GetStopbit

0091 1C06 00490 btfss PORTB,RSLINEPIN ; check polarity of stopbit

0092 15AE 00491 bsf ERRORFLAGS,FBITERROR ; if low level set error flag

00492

0093 18AF 00493 btfsc COMFLAGS,FID ; if identifier byte is received

0094 28AF 00494 goto GetAction ; check this byte to initialize

00495 ; the commanded slave mode

0095 032B 00496 decf DATABLOCKLENGTH,W ; else if all bytes came in

0096 1903 00497 btfsc STATUS,Z

0097 28A7 00498 goto GetCheckCRC ; the last byte is the Checksum

0098 03AB 00499 decf DATABLOCKLENGTH,F ; else wait for the next byte

00500

0099 082E 00501 movf ERRORFLAGS,W ; check if there are no errors

009A 1D03 00502 btfss STATUS,Z ; if an error has detected

00

9B

2

8A

5

00

50

3

g

oto

Se

tNe

xtL

oc

;

do

n’t

sto

re t

he

va

lue

0

05

04

0

09

C

1A

AF

00

50

5

b

tfsc

C

OM

FL

AG

S,F

LIS

TE

NO

NLY

; o

r if

sla

ve m

on

itors

lin

e0

09

D

28

A5

00

50

6

g

oto

Se

tNe

xtL

oc

;

ign

ore

th

e n

ext

ste

ps

0

05

07

0

09

E

08

30

00

50

8

m

ovf

BU

FF

ER

PT

R,W

;

ge

t p

oin

ter

00

9F

0

08

4

00

50

9

m

ovw

f

FS

R

;

an

d p

oin

t to

loca

tion

00

A0

0

83

1

00

51

0

m

ovf

CO

MB

UF

FE

R,W

;

ca

tch

th

e a

ctu

al d

ata

00

A1

0

08

0

00

51

1

m

ovw

f

IND

F

;

an

d s

hip

it in

to t

he

blo

ck

0

05

12

0

05

13

;

0

05

14

;

ca

lucl

ate

th

e c

he

cksu

m o

ver

rece

ive

d d

ata

byt

es

with

MO

D2

56

0

05

15

;

DA

TA

CR

C =

DA

TA

CR

C +

CO

MB

UF

FE

R +

Ca

rry

0

05

16

;

0

0A

2

07

B2

00

51

7

a

dd

wf

D

AT

AC

RC

,F

;

ad

d n

ew

da

ta in

to C

RC

0

0A

3

18

03

00

51

8

b

tfsc

S

TA

TU

S,C

;

ad

d c

arr

y if

mo

d 2

56

0

0A

4

0A

B2

00

51

9

in

cf

D

AT

AC

RC

,F

;

pro

du

ces

an

ove

rflo

w

0

05

20

0

0A

5

0

05

21

Se

tNe

xtL

oc

0

0A

5

0A

B0

00

52

2

in

cf

B

UF

FE

RP

TR

,F

;

po

int

to n

ext

loca

tion

00

A6

2

8B

0

00

52

3

g

oto

InitG

etD

ata

0

05

24

0

0A

7

0

05

25

Ge

tCh

eck

CR

C0

0A

7

1A

AF

00

52

6

b

tfsc

C

OM

FL

AG

S,F

LIS

TE

NO

NLY

; ig

no

re c

he

cksu

m c

alc

ula

tion

00

A8

2

8B

7

00

52

7

g

oto

Ge

tDa

taF

inis

h

;

if s

lave

re

ad

s o

nly

me

ssa

ge

s

0

05

28

0

05

29

;

0

05

30

; g

en

era

te s

um

of

inve

rte

d m

od

25

6 o

ver

da

ta b

lock

plu

s C

RC

is 0

xFF

0

05

31

; c

alc

ula

te 0

xFF

- S

UM

[RS

DA

TA

FIE

LD

] =

re

ceiv

ed

CR

C


AN729

00532

00A9 30FF 00533 movlw 0xFF ; do the complement of CRC

00AA 0632 00534 xorwf DATACRC,W

00535

00AB 0631 00536 xorwf COMBUFFER,W ; check received CRC with

00AC 1D03 00537 btfss STATUS,Z ; calculated CRC

00AD 152E 00538 bsf ERRORFLAGS,FCRCERROR ; set flag if not identical

00AE 28B7 00539 goto GetDataFinish

00540

00AF 00541 GetAction

00AF 212C 00542 call CheckIdentifierByte ; decode and check the ID byte

00543

00B0 00544 InitGetData

00B0 01A9 00545 clrf BITNBR ; clear register for next action

00B1 1DAF 00546 btfss COMFLAGS,FTXDATA ; if next action transmission

00B2 28BA 00547 goto GetDataFinish+3 ; initialize only the interrupts

00548

00B3 120B 00549 bcf INTCON,INTE ; disable external interrupt

00B4 092A 00550 comf BITLENGTH,W ; do a delay before sending data

00B5 0081 00551 movwf TMR0

00B6 28BD 00552 goto GetDataEnd

00553

00B7 00554 GetDataFinish

00B7 30C0 00555 movlw 0xC0

00B8 05AF 00556 andwf COMFLAGS,F ; clear all flags used bits

00B9 172F 00557 bsf COMFLAGS,FCOMPLETE ; indicates receive mode complete

00BA 3010 00558 movlw 0x10 ; no T0IE, set INTE, clear flags

00BB 008B 00559 movwf INTCON ; wait for next falling synch break

00BC 0181 00560 clrf TMR0

00561

00BD 00562 GetDataEnd

00563 ; bcf INTCON,T0IF

00BD 28F8 00564 goto IntrEnd

00565

00566 ; ---- PutData ------------------------------------------------------------------

00567 ;

00568 ; This routine shifts out all wanted databits including a start and stopbit

00569 ; By setting the stopbit the routine will calulate the mod256 checksum

00570 ; and after all outgoing databit the checksum byte will be sent out.

00571 ;

00572

00BE 00573 PutData

00BE 01A2 00574 clrf TIMEOUTLO

00BF 01A3 00575 clrf TIMEOUTHI

00576

00C0 0829 00577 movf BITNBR,W ; if first call set startbit

00C1 1003 00578 bcf STATUS,C

AN729


00C2 1903 00579 btfsc STATUS,Z

00C3 28D7 00580 goto SetStartbit

00581

00C4 0829 00582 movf BITNBR,W ; if all bits are out

00C5 3A09 00583 xorlw .9 ; do the stopbit

00C6 1903 00584 btfsc STATUS,Z

00C7 28E3 00585 goto SetStopbit

00586

00C8 00587 ShiftDatabitOut

00C8 0CB1 00588 rrf COMBUFFER,F ; else copy bits into C

00C9 0806 00589 movf PORTB,W ; get Portvalue

00CA 39EF 00590 andlw ((1<<TXLINEPIN)^0xFF) ; clear used bit

00CB 1803 00591 btfsc STATUS,C ; and then set txline value

00CC 3810 00592 iorlw (1<<TXLINEPIN) ; if nessasary

00CD 0086 00593 movwf PORTB

00594

00CE 00595 CheckBitPending

00CE 0DC3 00596 rlf DUMMY,F ; shift carry into variable

00CF 0606 00597 xorwf PORTB,W ; test polarity of incomming bit

00D0 3901 00598 andlw (1<<RSLINEPIN) ; maskout of the indicated bit

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AN729

00626

00E3 00627 SetStopbit

00E3 30FF 00628 movlw -1

00E4 00A9 00629 movwf BITNBR ; prepare for clearing reg

00E5 1606 00630 bsf PORTB,TXLINEPIN ; set line for stopbit

00E6 0181 00631 clrf TMR0 ; wait 1*Tbit + x us

00E7 0AB0 00632 incf BUFFERPTR,F ; array ptr to next cell

00E8 03AB 00633 decf DATABLOCKLENGTH,F ; all data bytes xmit ?

00E9 082B 00634 movf DATABLOCKLENGTH,W

00EA 1903 00635 btfsc STATUS,Z ; all data bytes out include

00EB 28F4 00636 goto PutDataFinish ; the CRC byte ?

00EC 3A01 00637 xorlw .1 ; no : is there only the CRC byte ?

00ED 1D03 00638 btfss STATUS,Z

00EE 28F7 00639 goto PutDataEnd ; no : okay wait for the next bit

00640

00641 ;

00642 ; generate inverted MOD256 Checksum

00643 ; COMBUFFER = DATACRC XOR 0xFF, so SUM(TxData_field)+DATACRC = 0xFF

00644 ;

00645

00EF 00646 SetPtr2CRC

00EF 30FF 00647 movlw 0xFF

00F0 06B2 00648 xorwf DATACRC,F ; generate correct checksum

00649

00F1 3032 00650 movlw DATACRC ; get adress of checksum reg

00F2 00B0 00651 movwf BUFFERPTR ; and save value

00F3 28F7 00652 goto PutDataEnd

00653

00F4 00654 PutDataFinish

00F4 01AF 00655 clrf COMFLAGS ; reset communication flags

00F5 172F 00656 bsf COMFLAGS,FCOMPLETE ; indicate the complete flag

00F6 160B 00657 bsf INTCON,INTE ; and new start with

00658 ; synchbreak detection

00F7 00659 PutDataEnd

00F7 0AA9 00660 incf BITNBR,F ; set bitcounter to zero

00661

00662 ; ---- IntrEnd ------------------------------------------------------------------

00663 ;

00664 ; Restore the saved registers and clear the interrupt flags, return from

00665 ; interrupt.

00666

00F8 00667 IntrEnd

00F8 30F0 00668 movlw 0xF0 ; clear all pending int flags

00F9 058B 00669 andwf INTCON,F

00FA 168B 00670 bsf INTCON,T0IE ; and set timer0 overflow int

00671

00FB 0821 00672 movf COPYSTATUS,W ; restore status

AN729


00FC 0083 00673 movwf STATUS

00FD 0EA0 00674 swapf COPYWREG,F ; and fetch old W from further

00FE 0E20 00675 swapf COPYWREG,W ; ram bank

00FF 0009 00676 retfie

00677

00678

00679 ; #### subroutines ##############################################################

00680 ;

00681 ;

00682 ; #### init_LinSlave ############################################################

00683 ;

00684 ; clears all ram locations which are used from the linslave and initializes

00685 ; the portpins and interruptflags

00686 ;

00687

0100 00688 InitLinSlave

0100 3020 00689 movlw LINSLAVERAM

0101 0084 00690 movwf FSR

0102 3024 00691 movlw LINSLAVEBLOCKLENGTH

0103 00692 ClearLINusedRAM

0103 0180 00693 clrf INDF ; clear register

0104 0A84 00694 incf FSR,F ; point to next cell

0105 0804 00695 movf FSR,W

0106 3C44 00696 sublw (LINSLAVEBLOCKLENGTH+LINSLAVERAM)

0107 1D03 00697 btfss STATUS,Z ; all done well?

0108 2903 00698 goto ClearLINusedRAM ; no : next loop

00699

0109 1606 00700 bsf PORTB,TXLINEPIN ; Portpin is high on programstart

010A 1683 00701 bsf STATUS,RP0

010B 1406 00702 bsf PORTB,RSLINEPIN ; receive line as input

010C 1206 00703 bcf PORTB,TXLINEPIN ; and transmit line as output

010D 3008 00704 movlw 0x08 ; set TMR0 as counter driven


010E 0081 00705 movwf OPTION_REG ; with internal clock


010F 1301 00706 bcf OPTION_REG,INTEDG

0110 1283 00707 bcf STATUS,RP0

0111 108B 00708 bcf INTCON,INTF

0112 160B 00709 bsf INTCON,INTE

0113 178B 00710 bsf INTCON,GIE

0114 0008 00711 return

00712

00713 ; #### InitWakeupLIN ############################################################

00714 ;

00715 ; This wakes up the bus by pulling the bus low for 7 bit times followed by

00716 ; a high stop bit. This would be used after the bus had been put to sleep,

00717 ; and the node needs to wake up the bus. One the bus has reawakened, the


AN729

00718 ; master starts polling the slaves to find out why.

00719 ;

00720

0115 00721 InitWakeupLIN

0115 082A 00722 movf BITLENGTH,W

0116 1903 00723 btfsc STATUS,Z ; if there was no further communication

0117 2926 00724 goto InitWakeupEnd ; do not do this function

0118 3001 00725 movlw .1

0119 00AB 00726 movwf DATABLOCKLENGTH ; realize a one byte data block using

011A 3080 00727 movlw 0x80 ; the CRC reg as data container

011B 00B2 00728 movwf DATACRC

011C 3032 00729 movlw DATACRC ; initialize data pointer onto CRC

011D 00B0 00730 movwf BUFFERPTR

011E 01A9 00731 clrf BITNBR ; and start transmission

011F 15AF 00732 bsf COMFLAGS,FTXDATA

00733

0120 0181 00734 clrf TMR0 ; do a delay before sending out the

00735 ; wakeup sequence

0121 30A0 00736 movlw 0xA0 ; set TMR0 int

0122 008B 00737 movwf INTCON

0123 19AF 00738 btfsc COMFLAGS,FTXDATA

0124 2923 00739 goto $-1

0125 13AF 00740 bcf COMFLAGS,FSLEEPMODE ; wait to end wakeup sequence

0126 00741 InitWakeupEnd

0126 0008 00742 return

00743

00744 ; #### CheckIdentifierByte ######################################################

00745 ;

00746 ; this function is called by interrupt after the synch break and synch byte

00747 ; is detected and the bitlength is calculated.

00748 ; The identifier byte is read from bus and at this point the byte will be

00749 ; checked if odd/even parity bis are correct, then extract the blocklength

00750 ; and ID number and in dependence of the ID the handler mode will be set.

00751 ;

00752 ;

0127 00753 DataBlockLengthTable ; decoder table for receive

0127 0782 00754 addwf PCL,F ; byte length

0128 3403 3403 3405 00755 DT 3,3,5,9 ; there is one byte more for the checksum

3409

00756 ; byte is at the end of the data array

00757

012C 00758 CheckIdentifierByte

012C 01AF 00759 clrf COMFLAGS ; clear all flags

012D 0831 00760 movf COMBUFFER,W ; get identifier field

012E 3A80 00761 xorlw 0x80 ; and test if there is a SLEEP command

012F 1903 00762 btfsc STATUS,Z

0130 29A0 00763 goto ActionBusSleep ; yes : break the function

AN729


00764

0131 00765 CheckEvenParityBit6 ; count ones for even parity

0131 01A9 00766 clrf BITNBR

0132 1831 00767 btfsc COMBUFFER,0

0133 0AA9 00768 incf BITNBR,F

0134 18B1 00769 btfsc COMBUFFER,1


0136 1931 00771 btfsc COMBUFFER,2


0138 1A31 00773 btfsc COMBUFFER,4


00775

013A 1B31 00776 btfsc COMBUFFER,6 ; check bit6 contains the even

013B 0AA9 00777 incf BITNBR,F ; value

013C 1829 00778 btfsc BITNBR,0 ; if even then check odd parity bit

013D 294A 00779 goto SetParityError

013E 00780 CheckOddParityBit7 ; count ones for odd parity

013E 01A9 00781 clrf BITNBR ; and invert

013F 18B1 00782 btfsc COMBUFFER,1


0141 19B1 00784 btfsc COMBUFFER,3


0143 1A31 00786 btfsc COMBUFFER,4


0145 1AB1 00788 btfsc COMBUFFER,5


00790

0147 1FB1 00791 btfss COMBUFFER,7

0148 0AA9 00792 incf BITNBR,F ; if odd then split off

0149 1829 00793 btfsc BITNBR,0 ; the blocklength

014A 00794 SetParityError

014A 14AE 00795 bsf ERRORFLAGS,FIDPARITYERROR ; set parity error bit

00796 ; if there is an error

014B 00797 GetPreID

014B 0831 00798 movf COMBUFFER,W ; get the id number plus

014C 393F 00799 andlw 0x3F ; the blocklength subsets

014D 00AC 00800 movwf PREIDNUMBER ; and save the value

00801

014E 00802 DecodeBlockLength

014E 3001 00803 movlw high DataBlockLengthTable ; get address of decoder table

014F 008A 00804 movwf PCLATH

00805

0150 0E31 00806 swapf COMBUFFER,W ; switches bit3,4 into bit0,1

0151 3903 00807 andlw .3 ; kill the rest

0152 2127 00808 call DataBlockLengthTable ; and decode the result

0153 00AB 00809 movwf DATABLOCKLENGTH ; store the used blocklength

00810 ; including the checksum byte


AN729

0154 01B2 00811 clrf DATACRC ; initialize the checksum

0155 01AE 00812 clrf ERRORFLAGS ; and error flag register

00813

0156 00814 DecodeIdNumber

0156 162F 00815 bsf COMFLAGS,FCOMDATA ; set communication flag

00816

0157 3001 00817 movlw HIGH DecodeIDTable ; initial the high program

0158 008A 00818 movwf PCLATH ; counter with table adress

00819

0159 0831 00820 movf COMBUFFER,W ; get the buffer value

015A 390F 00821 andlw .15

015B 00AD 00822 movwf IDNUMBER ; save ID number

015C 00B1 00823 movwf COMBUFFER ; generate the jump width

015D 0DB1 00824 rlf COMBUFFER,F ; by multiplying id with

015E 0D31 00825 rlf COMBUFFER,W ; four and do the jump

015F 0782 00826 addwf PCL,F ; by manipulating the PCL

00827

00828 ; ---- DecodeIDTable ------------------------------------------------------------

00829 ;

00830 ; Decode table using the ID numbers

00831 ;

00832 ; This is the point where the user can decide how the slave will react on

00833 ; the decoded identifier number. Also he can decide where the received data

00834 ; will be stored or where the send data come from.

00835 ;

00836 ; Three modes are possible:

00837 ; MacroRsMode (ptr) -> read data from bus and save

00838 ; it in the provided buffer (ptr)

00839 ; MacroTxMode (ptr) -> send data out on bus from the

00840 ; provided buffer.

00841 ; MacroLstMode -> only monitor the bus

00842 ;

00843 ; In the monitoring mode the user has the possibility to use the value of

00844 ; the PREIDNUMBER to handle 64 commands without any data messages.

00845

0160 00846 DecodeIDTable

00847 MacroLstMode

0160 16AF M bsf COMFLAGS,FLISTENONLY ; indicates the receive mode

M ; without saving the received data

0161 0000 M nop ; this is necessary to have

0162 0000 M nop ; a correct jump table length

0163 3400 M retlw 0

00848 MacroTxMode ( BUTTONPRESSED1 ) ; ID1: Transmit the button press counts

0164 15AF M bsf COMFLAGS,FTXDATA ; indicates the transmission mode

0165 3033 M movlw ( BUTTONPRESSED1 ) ; get the wanted ram location

M ; where the data will read from

0166 00B0 M movwf BUFFERPTR ; and initialize the pointer

AN729


0167 3400 M retlw 0

00849 MacroLstMode




016A 0000 M nop ; a correct jump table length

016B 3400 M retlw 0

00850 MacroLstMode

016C 16AF M bsf COMFLAGS,FLISTENONLY ; indicates the receive mode


016D 0000 M nop ; this is necessary to have

016E 0000 M nop ; a correct jump table length

016F 3400 M retlw 0

00851 MacroRsMode ( COMPLED1 ) ; ID4: Receive LED counters

0170 152F M bsf COMFLAGS,FRSDATA ; indicates the receive mode

0171 303B M movlw ( COMPLED1 ) ; get the wanted ram location

M ; where the data will stored

0172 00B0 M movwf BUFFERPTR ; and initialize the pointer

0173 3400 M retlw 0

00852 MacroLstMode





0177 3400 M retlw 0

00853 MacroLstMode





017B 3400 M retlw 0

00854 MacroLstMode





017F 3400 M retlw 0

00855 MacroLstMode





0183 3400 M retlw 0

00856 MacroLstMode





AN729


0187 3400 M retlw 0

00857 MacroLstMode





018B 3400 M retlw 0

00858 MacroLstMode





018F 3400 M retlw 0

00859 MacroLstMode





0193 3400 M retlw 0

00860 MacroLstMode





0197 3400 M retlw 0

00861 MacroLstMode





019B 3400 M retlw 0

00862 MacroLstMode





019F 3400 M retlw 0

00863

00864

00865 ; ---- ActionBusSleep -----------------------------------------------------------

00866 ;

00867 ; Arriving on this sequence the master will not longer talk to the

00868 ; slaves so he gives the command to hangup the line.

00869 ; After finishing the bus read the main task is able to activate

00870 ; the wakeup sequence to give the master the directive to reactivate

00871 ; the communication.

AN729


00872

01A0 00873 ActionBusSleep

01A0 17AF 00874 bsf COMFLAGS,FSLEEPMODE

01A1 3003 00875 movlw .3

01A2 00AB 00876 movwf DATABLOCKLENGTH ; decomp length control bits

01A3 3080 00877 movlw 0x80

01A4 00AD 00878 movwf IDNUMBER ; set identifier on sleep id

00879 MacroRsMode ( RSDATAFIELD ) ; save the two received bytes

01A5 152F M bsf COMFLAGS,FRSDATA ; indicates the receive mode

01A6 303B M movlw ( RSDATAFIELD ) ; get the wanted ram location

M ; where the data will stored

01A7 00B0 M movwf BUFFERPTR ; and initialize the pointer

01A8 3400 M retlw 0

00880

00881 ; #### MAIN #####################################################################

00882

01A9 00883 Main

00884

01A9 300A 00885 movlw .10

01AA 00C5 00886 movwf COMPERATOR ; after x counts set LED1&2 on

01AB 00C8 00887 movwf DEBOUNCECOUNTER

00888

01AC 01CA 00889 clrf EDGEDETECT

00890

01AD 1683 00891 bsf STATUS,RP0

01AE 301F 00892 movlw 0x1F ; set PORTB7..5 as output

01AF 0086 00893 movwf PORTB ; to manage LEDs

01B0 1283 00894 bcf STATUS,RP0

00895

01B1 2100 00896 call InitLinSlave ; initialize linbus functions

00897

01B2 00898 MainLoop

01B2 1F2F 00899 btfss COMFLAGS,FCOMPLETE ; message frame complete ?

01B3 29B7 00900 goto CheckLevel ; no -> do rest of main task

00901

01B4 132F 00902 bcf COMFLAGS,FCOMPLETE ; clear flag

01B5 3080 00903 movlw (1<<LED3) ; and toggle LED

01B6 0686 00904 xorwf PORTB,F

00905

01B7 00906 CheckLevel

01B7 0845 00907 movf COMPERATOR,W ; compare delimiter

01B8 023B 00908 subwf COMPLED1,W ; with first value

01B9 1C03 00909 btfss STATUS,C ; if not equal

01BA 29BE 00910 goto CheckNextLevel ; check next value

00911

01BB 01BB 00912 clrf COMPLED1 ; else manipulate value

01BC 3020 00913 movlw (1<<LED1) ; and toggle LED1


AN729

01BD 0686 00914 xorwf PORTB,F

00915

01BE 00916 CheckNextLevel

01BE 0845 00917 movf COMPERATOR,W ; compare second value

01BF 023C 00918 subwf COMPLED2,W

01C0 1C03 00919 btfss STATUS,C

01C1 29C5 00920 goto TestButtons

00921

01C2 01BC 00922 clrf COMPLED2 ; and if equal

01C3 3040 00923 movlw (1<<LED2) ; toggle LED2

01C4 0686 00924 xorwf PORTB,F

00925

01C5 00926 TestButtons

01C5 0BC8 00927 decfsz DEBOUNCECOUNTER,F

01C6 29B2 00928 goto MainLoop ; do the loop

00929

00930

01C7 3006 00931 movlw (1<<BUTTON1) | (1<<BUTTON2) ; maskout of the used

01C8 0506 00932 andwf PORTB,W ; portpins and save

01C9 00C9 00933 movwf COPYPORTB ; the result

00934

01CA 00935 CheckEdgeChange

01CA 064A 00936 xorwf EDGEDETECT,W ; check actual and last

01CB 0549 00937 andwf COPYPORTB,W ; value to detect any

01CC 1903 00938 btfsc STATUS,Z ; rising edge on input

01CD 29D7 00939 goto ButtomTestEnd ; nothing -> do the loop

00940

01CE 00C8 00941 movwf DEBOUNCECOUNTER ; save the pin who changed

00942

01CF 00943 RisingEdgeButtom1

01CF 3002 00944 movlw (1<<BUTTON1) ; mask of button1

01D0 0548 00945 andwf DEBOUNCECOUNTER,W ; buttom1 pressed ?

01D1 1D03 00946 btfss STATUS,Z

01D2 0AB3 00947 incf BUTTONPRESSED1,F ; yes : count the rising edge

00948

01D3 00949 RisingEdgeButtom2

01D3 3004 00950 movlw (1<<BUTTON2) ; mask of button2

01D4 0548 00951 andwf DEBOUNCECOUNTER,W ; button 2 pressed ?

01D5 1D03 00952 btfss STATUS,Z

01D6 0AB4 00953 incf BUTTONPRESSED2,F ; yes : count the rising edge

00954

01D7 00955 ButtomTestEnd

01D7 0849 00956 movf COPYPORTB,W ; save actual values to detect

01D8 00CA 00957 movwf EDGEDETECT ; the next rising edge

00958

01D9 300A 00959 movlw .10 ; reload the debounce

01DA 00C8 00960 movwf DEBOUNCECOUNTER

AN729


01DB 29B2 00961 goto MainLoop ; and do the loop again

00962

00963 end

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AN729

NOTES:

2002 Microchip Technology Inc.

Information contained in this publication regarding deviceapplications and the like is intended through suggestion onlyand may be superseded by updates. It is your responsibility toensure that your application meets with your specifications.No representation or warranty is given and no liability isassumed by Microchip Technology Incorporated with respectto the accuracy or use of such information, or infringement ofpatents or other intellectual property rights arising from suchuse or otherwise. Use of Microchip’s products as critical com-ponents in life support systems is not authorized except withexpress written approval by Microchip. No licenses are con-veyed, implicitly or otherwise, under any intellectual propertyrights.

Trademarks

The Microchip name and logo, the Microchip logo, FilterLab,KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,PICSTART, PRO MATE, SEEVAL and The Embedded ControlSolutions Company are registered trademarks of Microchip Tech-nology Incorporated in the U.S.A. and other countries.

dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,In-Circuit Serial Programming, ICSP, ICEPIC, microPort,Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Modeand Total Endurance are trademarks of Microchip TechnologyIncorporated in the U.S.A.

Serialized Quick Turn Programming (SQTP) is a service markof Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of theirrespective companies.

© 2002, Microchip Technology Incorporated, Printed in theU.S.A., All Rights Reserved.

Printed on recycled paper.

Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs and microperipheral products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified.

Note the following details of the code protection feature on PICmicro® MCUs.

• The PICmicro family meets the specifications contained in the Microchip Data Sheet.• Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today,

when used in the intended manner and under normal conditions.• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowl-

edge, require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet. The person doing so may be engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable”.• Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of

our product.

If you have any further questions about this matter, please contact the local sales office nearest to you.

2002 Microchip Technology Inc.

MAMERICASCorporate Office2355 West Chandler Blvd.Chandler, AZ 85224-6199Tel: 480-792-7200 Fax: 480-792-7277Technical Support: 480-792-7627Web Address: http://www.microchip.comRocky Mountain2355 West Chandler Blvd.Chandler, AZ 85224-6199Tel: 480-792-7966 Fax: 480-792-7456

Atlanta500 Sugar Mill Road, Suite 200BAtlanta, GA 30350Tel: 770-640-0034 Fax: 770-640-0307Boston2 Lan Drive, Suite 120Westford, MA 01886Tel: 978-692-3848 Fax: 978-692-3821Chicago333 Pierce Road, Suite 180Itasca, IL 60143Tel: 630-285-0071 Fax: 630-285-0075Dallas4570 Westgrove Drive, Suite 160Addison, TX 75001Tel: 972-818-7423 Fax: 972-818-2924DetroitTri-Atria Office Building 32255 Northwestern Highway, Suite 190Farmington Hills, MI 48334Tel: 248-538-2250 Fax: 248-538-2260Kokomo2767 S. Albright Road Kokomo, Indiana 46902Tel: 765-864-8360 Fax: 765-864-8387Los Angeles18201 Von Karman, Suite 1090Irvine, CA 92612Tel: 949-263-1888 Fax: 949-263-1338New York150 Motor Parkway, Suite 202Hauppauge, NY 11788Tel: 631-273-5305 Fax: 631-273-5335San JoseMicrochip Technology Inc.2107 North First Street, Suite 590San Jose, CA 95131Tel: 408-436-7950 Fax: 408-436-7955Toronto6285 Northam Drive, Suite 108Mississauga, Ontario L4V 1X5, CanadaTel: 905-673-0699 Fax: 905-673-6509

ASIA/PACIFICAustraliaMicrochip Technology Australia Pty LtdSuite 22, 41 Rawson StreetEpping 2121, NSWAustraliaTel: 61-2-9868-6733 Fax: 61-2-9868-6755China - BeijingMicrochip Technology Consulting (Shanghai)Co., Ltd., Beijing Liaison OfficeUnit 915Bei Hai Wan Tai Bldg.No. 6 Chaoyangmen Beidajie Beijing, 100027, No. ChinaTel: 86-10-85282100 Fax: 86-10-85282104China - ChengduMicrochip Technology Consulting (Shanghai)Co., Ltd., Chengdu Liaison OfficeRm. 2401, 24th Floor, Ming Xing Financial TowerNo. 88 TIDU StreetChengdu 610016, ChinaTel: 86-28-6766200 Fax: 86-28-6766599China - FuzhouMicrochip Technology Consulting (Shanghai)Co., Ltd., Fuzhou Liaison OfficeUnit 28F, World Trade PlazaNo. 71 Wusi RoadFuzhou 350001, ChinaTel: 86-591-7503506 Fax: 86-591-7503521China - ShanghaiMicrochip Technology Consulting (Shanghai)Co., Ltd.Room 701, Bldg. BFar East International PlazaNo. 317 Xian Xia RoadShanghai, 200051Tel: 86-21-6275-5700 Fax: 86-21-6275-5060China - ShenzhenMicrochip Technology Consulting (Shanghai)Co., Ltd., Shenzhen Liaison OfficeRm. 1315, 13/F, Shenzhen Kerry Centre,Renminnan LuShenzhen 518001, ChinaTel: 86-755-2350361 Fax: 86-755-2366086Hong KongMicrochip Technology Hongkong Ltd.Unit 901-6, Tower 2, Metroplaza223 Hing Fong RoadKwai Fong, N.T., Hong KongTel: 852-2401-1200 Fax: 852-2401-3431IndiaMicrochip Technology Inc.India Liaison OfficeDivyasree Chambers1 Floor, Wing A (A3/A4)No. 11, O’Shaugnessey RoadBangalore, 560 025, IndiaTel: 91-80-2290061 Fax: 91-80-2290062

JapanMicrochip Technology Japan K.K.Benex S-1 6F3-18-20, ShinyokohamaKohoku-Ku, Yokohama-shiKanagawa, 222-0033, JapanTel: 81-45-471- 6166 Fax: 81-45-471-6122KoreaMicrochip Technology Korea168-1, Youngbo Bldg. 3 FloorSamsung-Dong, Kangnam-KuSeoul, Korea 135-882Tel: 82-2-554-7200 Fax: 82-2-558-5934SingaporeMicrochip Technology Singapore Pte Ltd.200 Middle Road#07-02 Prime CentreSingapore, 188980Tel: 65-334-8870 Fax: 65-334-8850TaiwanMicrochip Technology Taiwan11F-3, No. 207Tung Hua North RoadTaipei, 105, TaiwanTel: 886-2-2717-7175 Fax: 886-2-2545-0139

EUROPEDenmarkMicrochip Technology Nordic ApSRegus Business CentreLautrup hoj 1-3Ballerup DK-2750 DenmarkTel: 45 4420 9895 Fax: 45 4420 9910FranceMicrochip Technology SARLParc d’Activite du Moulin de Massy43 Rue du Saule TrapuBatiment A - ler Etage91300 Massy, FranceTel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79GermanyMicrochip Technology GmbHGustav-Heinemann Ring 125D-81739 Munich, GermanyTel: 49-89-627-144 0 Fax: 49-89-627-144-44ItalyMicrochip Technology SRLCentro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 120041 Agrate BrianzaMilan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883United KingdomArizona Microchip Technology Ltd.505 Eskdale RoadWinnersh TriangleWokingham Berkshire, England RG41 5TUTel: 44 118 921 5869 Fax: 44-118 921-5820

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