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    No Idealitats dels AOs

    Limitacions dels Amplificadors

    operacionals reals

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    Some Opams of Analog Devices

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    OA Schematic

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    Non-ideal effects

    Finite

    open-loop

    gain

    Constant GxBW

    V i

    V o R2

    +

    -

    R1

    +

    -

    -

    +

    V id V o

    +

    -

    +

    -

    -

    +

    G

    BW

    G BW

    )()(

    1

    11

    s A s A oV

    )(

    )( BW s

    BW G s AV

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    Non-ideal effects

    Finite

    input impedance.

    Non-zero output impedance.

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    OA Schematic

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    Non-ideal effects

    Input current

    Due to biasing requirements or leakage.

    Typically

    ~10 nanoamperes

    for bipolar op-amps,

    tens of picoamperes

    for JFET input stages, and

    only a few pA for MOSFET input stages.

    Input offset voltage

    Voltage required across the op-amp's inputterminals to drive

    the

    output voltage

    to 0

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    How to take into account V OS

    , IB

    and I OS

    ?

    V id V o

    +

    -

    +

    -

    -

    + real

    V id

    V o

    +

    -

    +

    -

    -

    + ideal

    + V OS

    V idV o

    +

    -

    +

    - -

    + ideal

    N

    P

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    Non-ideal effects: CMRR

    Differential-mode gain

    A perfect operational amplifieramplifies only the voltage

    difference between its twoinputs, completely rejecting allvoltages that are common toboth.

    Common-mode gain

    However, the differential input stage ofan operational amplifier is never

    perfect, leading to the amplification ofthe common input voltage. Thestandard measure of this defect iscalled the common-mode rejection ratio

    (denoted CMRR).

    V idV o

    +

    -

    +

    --

    +

    V pV o

    +

    -

    +

    -

    -

    +

    V n+

    -

    nn p po V AV AV

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    CMRR

    V pV o

    +

    -

    +

    -

    -

    +

    V n+

    -

    n pd V V V

    2

    n pCM

    V V V

    nn p po V AV AV

    22

    d

    CM n

    d

    CM po

    V V A

    V V AV

    CM n pd n po V A AV A A

    V 2

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    CMRR

    V pV o

    +

    -

    +

    -

    -

    +

    V n+

    -

    n pd V V V 2n p

    CM V V V

    0V V V

    ACM

    d

    od

    0V V V

    Ad

    CM

    oCM

    CM CM d d o V AV AV

    CM

    d

    A ACMRR log20

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    CMRR

    V pV o

    +

    -

    +

    -

    -

    +

    V n+

    -

    CM

    d

    A ACMRR log20

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    CMRR

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    How to take into account CMRR effect?

    V id V o

    +

    -

    +

    --

    + ideal +

    V CMCMRR

    V id

    V o

    +

    -

    +

    -

    -

    + real

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    Non-ideal effects

    Limited

    output current

    Most op-amps

    are

    designed

    to limit

    the

    output current

    so as not

    toexceed

    a specified

    level

    around

    25

    mA

    for a type

    741 IC op-amp

    thus

    protecting

    the

    op-amp

    and associated

    circuitry

    from

    damage.

    Noise

    Amplifiers

    generate

    random

    voltage

    at the

    output even

    when

    there

    isno signal

    applied.

    Drift

    Real op-amp

    parameters

    are

    subject

    to slow

    change

    over time andwith

    changes

    in temperature, input conditions, etc.

    Temperature

    effects

    All parameters change with temperature.

    Temperature

    drift of the

    input offset voltage

    is especially

    important.

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    Non-ideal effects

    Power-supply

    rejection

    ratio

    Reflects how well the op-amp can reject changes in its supply

    voltage.

    Use

    of bypass capacitors

    can

    improve

    the

    PSRR.

    CC

    OS

    V

    V PSRR log20

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    Non-linear limitations

    Saturation

    Maximum

    output voltage

    value.

    It

    is close

    to the

    power

    supply.

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    Rise Time

    Rise

    Time

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    Slew Rate

    Slew

    Rate

    Represents the maximum rate of change of asignal.

    It

    is usually

    specified

    in volts per microsecond.

    Max.

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    OA Schematic

    Current

    source

    with

    IOMAX

    Capacitor

    Integrator

    dt I C

    k V sourceo1

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    Slew Rate

    dt I C

    k V sourceo1

    C I

    k dt

    dV sourceo

    SRC

    I k

    C I

    k dt

    dV sourceo maxmaxmax

    t AV o sin t Adt

    dV o cos At Adt

    dV omax

    max

    cos

    SRdt

    dV omax SR f A

    SR A

    2 f SR A

    2 ASR f

    2

    dt d

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    Some Opams of Analog Devices