lfsr tutorial

Linear feedback shift-registers (LFSR) and

Pseudo-random binary sequences (PRBS)

D. W. Hawkins ([email protected])California Institute of Technology,Owens Valley Radio Observatory.

May 17, 2011

Contents

1 Introduction 3

2 Terminology 42.1 Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.2 Polynomial notation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.3 LFSR and PRBS properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.4 Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.5 LFSR transition matrices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.6 Parallel generation of PRBS sequences . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3 Correlation 193.1 1-bit PRBS cyclic correlation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.2 1-bit PRBS non-cyclic correlation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.3 Multi-bit PRBS cyclic correlation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283.4 Multi-bit PRBS non-cyclic correlation . . . . . . . . . . . . . . . . . . . . . . . . . . 31

4 FPGA components 354.1 LFSR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 364.2 Parallel output PRBS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 374.3 Digital noise source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5 Transceiver synchronization hardware tests 405.1 Stratix IV GX Development Kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405.2 Word alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405.3 Multiple channel alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

6 Digital noise source hardware tests 416.1 Stratix II DSP Development Kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 416.2 1-bit PRBS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 426.3 Digital noise source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

mailto:[email protected]

LFSRs and PRBSs May 17, 2011

1 Introduction

Linear feedback shift-registers (LFSRs) are the logic circuits used to create pseudo-random binarysequences (PRBSs). An LFSR circuit consists of a set of M registers and feedback taps that deter-mine the sequence of states that the LFSR transitions through. The feedback taps are described bya modulo-2 polynomial. A primitive polynomial generates a maximal length sequence (m-sequence),where the LFSR transitions through 2M − 1 states before repeating (there is a single unused LFSRstate). The PRBS is the binary output of the LFSR. The binary sequence is described as pseudo-random, as the sequence is deterministic, yet it has the correlation properties of a random sequence.

LFSRs and PRBSs are widely used in digital systems; in SONET the PRBS7 sequence is usedfor data spreading (each data bit is modulated by a PRBS bit), while in code division multipleaccess (CDMA) radio communications (and cellular phone systems), PRBS sequences are used togenerate spread-spectrum data (each data bit is modulated by a sequence of PRBS bits) and forsynchronization (base stations transmit known PRBS codes) [3, 10], PRBS sequences are used forbit-error-rate (BER) testing of high-speed serial links [5,9], and PRBS sequences are used as sourcesof random noise, eg., as digital noise sources, and for unbiased binary rounding (p26 [11]).

This document shows how LFSRs can be used to implement both serial and parallel output(multiple bits) PRBS sequences in Field Programmable Gate Arrays (FPGAs). The pseudo-randomnoise properties of binary and parallel output PRBS sequences are investigated (and constraints un-der which they can be applied determined). Example applications of PRBS sequences are provided;high-speed transceiver testing and digital noise source generation (for use in digital signal processingcomponent testing).

Additional resources on LFSRs and PRBSs can be found on Wikipedia [12] under the topics linearfeedback shift register, pseudo-random binary sequence, and pseudo-random number generator. Theclassic engineering text The Art of Electronics, by Horowitz and Hill discusses LFSRs/PRBSs inChapter 9 (p655 [4]). Xilinx discusses LFSRs and PRBSs in the documentation for their LFSR coreDS257 [13], and in application notes XAPP052 [1], XAPP210 [2], and XAPP211 [6]. The paperPseudo noise sequences for engineers, by Mutagi [7], and the communications engineering books byHaykin [3] and Rouphael [10], also discuss applications.

3

http://en.wikipedia.org/wiki/Linear_feedback_shift_register

http://en.wikipedia.org/wiki/Linear_feedback_shift_register

http://en.wikipedia.org/wiki/Pseudorandom_binary_sequence

http://en.wikipedia.org/wiki/Pseudorandom_number_generator


2 Terminology

2.1 Topology

Figure 1 shows the two common LFSR topologies; Fibonacci and Galois. The two topologies arerelated by a transpose operation. Figure 1 shows the transpose sequence; the Fibonacci form inFigure 1(a), is converted to the Galois form by reversing the direction of signal flow, convertingsumming nodes to junctions, and junctions to summing nodes, yielding the circuit in Figure 1(b),which is then redrawn in Figure 1(c) to have the same shift direction as Figure 1(a). Section 2.5shows how the state transitions of the Fibonacci and Galois forms can be described in terms oftransition matrices, and that the transition matrices are related by a matrix transpose operation.

The summing junctions shown in Figure 1 are modulo-2 adders, typically implemented usingXOR gates. The summing nodes can alternatively be implemented using XNOR gates (resultingin an inversion of the sum). The invalid state for an XOR gate-based LFSR is the all-zeros state;due to the fact that if the shift-register is loaded with zeros, the modulo-2 sums are also zero, sothe LFSR never changes state. An XNOR gate-based LFSR produces the complimentary (inverted)sequence to that of an XOR gate-based design, with an invalid state of all-ones.

Figure 1 shows an interesting difference between the Fibonacci and Galois topologies; the Fi-bonacci form has a potentially long combinatorial path through the summing junctions (potentiallyrequiring a wide input XOR gate), whereas the Galois form has registers on the output of everysumming junction. This implies that the Galois topology would be preferred in an FPGA imple-mentation. However, the primitive polynomials for LFSRs generally only have two, four, or sixfeedback taps, which can be implemented by one (or a few) FPGA logic elements, so there is reallyno implementation advantage to either topology. For a parallel output PRBS, the circuit becomes amore complex system of multiple-input sums with registered outputs for either form, so again, thereis no advantage to either topology.

4


tN-1X N-1 X NtN-2X N-2t3X 3t2X 2t1X 1X 0

tN-1X N-1 X NtN-2X N-2t3X 3t2X 2t1X 1X 0

tN-1X N-1X N tN-2X N-2 t3X 3 t2X 2 t1X 1 X 0

Shift direction

Incrementing tap numbers

Shift direction


Shift direction


Shift direction


PRBSoutput

PRBSoutput

(a)

(b)

(c)

Figure 1: Linear feedback shift register (LFSR) topologies; (a) Fibonacci, (b) Fibonacci transposedto give Galois, and (c) Galois redrawn to have the shift direction the same as in (a).

5


2.2 Polynomial notation

LFSR feedback taps are described by a modulo-2 polynomial. Maximal length sequences are gen-erated by primitive polynomials. There are several polynomial notations; tap form, function form,and binary form (which can also be represented in decimal or hexadecimal). Figure 1 shows the twoLFSR topologies, with polynomial feedback taps indicated by the Xn terms. Figure 2 shows LFSRcircuits for the SONET 7-bit LFSR (PRBS7) sequence with the polynomial; tap form [7, 6], func-tional form X7 +X6 +1, and binary form 1100_0001b = C1h = 193. Table 1 shows the contents ofthe LFSR registers for a Fibonacci sequence with a generic initial seed for the first 24 clocks, whileTable 2 shows the entire PRBS7 sequence for an initial all-ones seed. Primitive polynomials occur inmirror pairs, eg., the PRBS7 polynomial in Figure 2 has the mirror polynomial [7, 1], X7 + X1 + 1,1000_0011b = 83h = 131, where the reason for the mirror terminology is most easily seen in thebinary form; the mirror polynomials are related by a bit-reversal. The mirror polynomial generatesthe PRBS sequence in the reverse order.

There is a lot of ambiguity in LFSR and PRBS references with regard to the use of polynomialsand their corresponding hardware implementation. There are multiple sources of ambiguity, eg., inFigure 1 there is the definition of the tap indexes relative to the shift direction, in Figure 2, there isthe definition of the shift-register indexes relative to the tap indexes. If either of these definitions ischanged (reversed), a different LFSR is realized. In addition, the fact that the LFSR polynomialsexist in mirrored pairs (reversing the sequence), compounds the potential for ambiguity. The tapand register indexing convention used in this document (and associated code), as shown in Figure 1and Figure 2 allows the same polynomial to be used to define both Fibonacci and Galois forms, witheither form producing the same PRBS sequence.

The MATLAB Communications Toolbox primpoly function can be used to generate primitivepolynomials for LFSR widths of 2 to 16. There are generally multiple primitive polynomials for agiven bit width, eg., for a PRBS5 sequence

>> dec2bin(primpoly(5,’all’,’nodisplay’))100101101001101111110111111011111101

These polynomials can be sorted into their mirror pairs, i.e.,

100101 = X^5 + X^2 + 1101001 = X^5 + X^3 + 1

101111 = X^5 + X^3 + X^2 + X^1 + 1111101 = X^5 + X^4 + X^3 + X^2 + 1

110111 = X^5 + X^4 + X^2 + X^1 + 1111011 = X^5 + X^4 + X^3 + X^1 + 1

Note how the primitive polynomials can be described with an even number of taps (an even numberof terms in Xn, n 6= 0). Lists of primitive polynomials for LFSRs generally contain polynomialswith the minimum number of terms, eg., the taps for PRBS5 would be listed as [5, 2] or [5, 3]. XilinxApplication Note XAPP052 [1], and the Xilinx LFSR core DS257 [13] list polynomial taps for LFSRwidths of 2 to 168. Horowitz and Hill (p657 [4]) list the polynomials with LFSR widths between 3and 39 that require only a pair of feedback taps (the tap values match the Xilinx references).

6


X 6 X 7X 0

X 6X 7 X 0

PRBSoutput

PRBSoutput

f6 f5 f4 f3 f2 f1 f0

g6 g5 g4 g2 g1 g0g3

X 6 X 7X 0

f0f1f2f4f5f6 f3

(a)

(b)

(c)

Figure 2: PRBS7 LFSR topologies for generator polynomial X7+X6+1; (a) Fibonacci, (b) Fibonaccitransposed to give Galois, and (c) Galois redrawn to have the shift direction the same as in (a).Code associated with this tutorial uses the register numbering convention shown in (a) and (c).

7

LFSRs and PRBSs May 17, 2011Tab

le1:

PR

BS7

shift

-reg

iste

rco

nten

ts(t

aps

[7,6

],X

7+

X6

+1,

11000001b,Fib

onac

cifo

rm,X

OR

feed

back

).

Sam

ple

LFSR

regi

ster

cont

ents

(PR

BS)

Inde

xf 6

f 5f 4

f 3f 2

f 1f 0

06

54

32

10

10⊕

16

54

32

12

1⊕

20⊕

16

54

32

32⊕

31⊕

20⊕

16

54

34

3⊕

42⊕

31⊕

20⊕

16

54

54⊕

53⊕

42⊕

31⊕

20⊕

16

56

5⊕

64⊕

53⊕

42⊕

31⊕

20⊕

16

70⊕

1⊕

65⊕

64⊕

53⊕

42⊕

31⊕

20⊕

1

80⊕

20⊕

1⊕

65⊕

64⊕

53⊕

42⊕

31⊕

29

1⊕

30⊕

20⊕

1⊕

65⊕

64⊕

53⊕

42⊕

310

2⊕

41⊕

30⊕

20⊕

1⊕

65⊕

64⊕

53⊕

411

3⊕

52⊕

41⊕

30⊕

20⊕

1⊕

65⊕

64⊕

512

4⊕

63⊕

52⊕

41⊕

30⊕

20⊕

1⊕

65⊕

613

0⊕

1⊕

54⊕

63⊕

52⊕

41⊕

30⊕

20⊕

1⊕

614

1⊕

2⊕

60⊕

1⊕

54⊕

63⊕

52⊕

41⊕

30⊕

215

0⊕

1⊕

2⊕

31⊕

2⊕

60⊕

1⊕

54⊕

63⊕

52⊕

41⊕

3

161⊕

2⊕

3⊕

40⊕

1⊕

2⊕

31⊕

2⊕

60⊕

1⊕

54⊕

63⊕

52⊕

417

2⊕

3⊕

4⊕

51⊕

2⊕

3⊕

40⊕

1⊕

2⊕

31⊕

2⊕

60⊕

1⊕

54⊕

63⊕

518

3⊕

4⊕

5⊕

62⊕

3⊕

4⊕

51⊕

2⊕

3⊕

40⊕

1⊕

2⊕

31⊕

2⊕

60⊕

1⊕

54⊕

619

0⊕

1⊕

4⊕

5⊕

63⊕

4⊕

5⊕

62⊕

3⊕

4⊕

51⊕

2⊕

3⊕

40⊕

1⊕

2⊕

31⊕

2⊕

60⊕

1⊕

520

0⊕

2⊕

5⊕

60⊕

1⊕

4⊕

5⊕

63⊕

4⊕

5⊕

62⊕

3⊕

4⊕

51⊕

2⊕

3⊕

40⊕

1⊕

2⊕

31⊕

2⊕

621

0⊕

3⊕

60⊕

2⊕

5⊕

60⊕

1⊕

4⊕

5⊕

63⊕

4⊕

5⊕

62⊕

3⊕

4⊕

51⊕

2⊕

3⊕

40⊕

1⊕

2⊕

322

0⊕

40⊕

3⊕

60⊕

2⊕

5⊕

60⊕

1⊕

4⊕

5⊕

63⊕

4⊕

5⊕

62⊕

3⊕

4⊕

51⊕

2⊕

3⊕

423

1⊕

50⊕

40⊕

3⊕

60⊕

2⊕

5⊕

60⊕

1⊕

4⊕

5⊕

63⊕

4⊕

5⊕

62⊕

3⊕

4⊕

5

8


le2:

PR

BS7

sequ

ence

for

taps

[7,6

],X

7+

X6

+1,

11000001b.

Sam

ple

LFSR

state

PR

BS

Sam

ple

LFSR

state

PR

BS

Sam

ple

LFSR

state

PR

BS

Sam

ple

LFSR

state

PR

BS

Index

bin

ary

hex

outp

ut

Index

bin

ary

hex

outp

ut

Index

bin

ary

hex

outp

ut

Index

bin

ary

hex

outp

ut

01111111

7F

132

0100111

27

164

0111000

38

096

0110001

31

11

0111111

3F

133

0010011

13

165

0011100

1C

097

1011000

58

02

0011111

1F

134

0001001

09

166

0001110

0E

098

0101100

2C

03

0001111

0F

135

1000100

44

067

1000111

47

199

0010110

16

04

0000111

07

136

0100010

22

068

0100011

23

1100

1001011

4B

15

0000011

03

137

1010001

51

169

0010001

11

1101

0100101

25

16

0000001

01

138

1101000

68

070

1001000

48

0102

1010010

52

07

1000000

40

039

0110100

34

071

0100100

24

0103

1101001

69

1

80100000

20

040

0011010

1A

072

0010010

12

0104

1110100

74

09

0010000

10

041

1001101

4D

173

1001001

49

1105

0111010

3A

010

0001000

08

042

1100110

66

074

1100100

64

0106

1011101

5D

111

0000100

04

043

1110011

73

175

0110010

32

0107

1101110

6E

012

0000010

02

044

0111001

39

176

1011001

59

1108

1110111

77

113

1000001

41

145

1011100

5C

077

1101100

6C

0109

0111011

3B

114

1100000

60

046

0101110

2E

078

0110110

36

0110

0011101

1D

115

0110000

30

047

1010111

57

179

1011011

5B

1111

1001110

4E

0

16

0011000

18

048

0101011

2B

180

0101101

2D

1112

1100111

67

117

0001100

0C

049

0010101

15

181

1010110

56

0113

0110011

33

118

0000110

06

050

1001010

4A

082

1101011

6B

1114

0011001

19

119

1000011

43

151

1100101

65

183

0110101

35

1115

1001100

4C

020

0100001

21

152

1110010

72

084

1011010

5A

0116

0100110

26

021

1010000

50

053

1111001

79

185

1101101

6D

1117

1010011

53

122

0101000

28

054

1111100

7C

086

1110110

76

0118

0101001

29

123

0010100

14

055

0111110

3E

087

1111011

7B

1119

1010100

54

0

24

0001010

0A

056

1011111

5F

188

0111101

3D

1120

0101010

2A

025

1000101

45

157

0101111

2F

189

1011110

5E

0121

1010101

55

126

1100010

62

058

0010111

17

190

1101111

6F

1122

1101010

6A

027

1110001

71

159

0001011

0B

191

0110111

37

1123

1110101

75

128

1111000

78

060

0000101

05

192

0011011

1B

1124

1111010

7A

029

0111100

3C

061

1000010

42

093

0001101

0D

1125

1111101

7D

130

0011110

1E

062

1100001

61

194

1000110

46

0126

1111110

7E

031

1001111

4F

163

1110000

70

095

1100011

63

1

9


2.3 LFSR and PRBS properties

The following summarizes some of the interesting properties of LFSRs and PRBSs;

• Fibonacci and Galois topologies are transposes of each other; they both produce the samePRBS sequence (with a relative time shift). For example, see the PRBS5 sequence generatorsin Figures 3 and 4 and Tables 3 and 4.

• Mirror polynomials produce time-reversed PRBS sequences. For example, see the PRBS5sequence generators in Figures 3 and 4 and Tables 3 and 4.

• Maximum length sequences always have an even number of feedback taps, i.e., the binarypolynomial has an odd number of bits. Many large LFSRs can be implemented with 2 or 4feedback taps; so there is really no issue regarding the synthesis of wide-input XOR gates inhardware for the Fibonacci topology.

• The implementation of an LFSR depends on the definition of tap locations relative to the shift-register direction. If a generator and receiver are implemented using different conventions, thenthe PRBS sequences will be time-reversed relative to each other (due to the mirror polynomialrelationship).

• The modulo-2 sum of two time-shifted versions of the same PRBS sequence is another time-shifted version of the same PRBS sequence.

• The modulo-2 summing nodes in an LFSR are typically implemented using XOR gates. Thenodes can alternatively be implemented using XNOR gates. An XNOR gate based LFSRwill generate the inverted sequence relative to its XOR equivalent (when started with a seedequivalent to the compliment of the XOR seed). For example, if the LFSRs in Figures 3 and 4,with the sequences given in Tables 3 and 4, were implemented using XNOR gates, and wereinitialized with 00000b at reset, then the LFSR states and PRBS output sequence would becomplimented.

• In a PRBS sequence of length 2M − 1, the number of 1’s is one greater than the number of0’s (due to the invalid all-zeros state). This distribution represents an ‘even chance’ for eitherstate, eg., simulation of a coin toss with an even chance for either heads or tails.

• Horowitz and Hill (p657 [4]), Mutagi [7], Haykin (Ch. 9 [3]), and Rouphael (p71 [10]) containdetails on these properties and others.

2.4 Conventions

The following summarizes the conventions used in this document;

• LFSR shift-registers use right-shifting, with the shift-register bits numbered from the MSB(left) down to the LSB (right), with the PRBS output coming from the LSB. The registers inLFSR shift-register of width M , are indexed in C and VHDL code from M−1 down to 0, whilein MATLAB code, the indices are M down to 1 (due to MATLAB’s indexing convention).

• The Fibonacci form has tap numbers that increment with the shift direction (see Figure 1(a)),i.e., in opposition to the register numbering convention.

• The Galois form has tap numbers that decrement with the shift direction (see Figure 1(c)),i.e., in the same direction as the register numbering convention.

• The same generator polynomial is used to describe an LFSR implementation regardless of itstopology (due to the definition of the tap ordering in Figure 1).

10


X 2 X 5X 0

X 2X 5 X 0

PRBSoutput

PRBSoutput

f4 f3 f2 f1 f0

g4 g2 g1 g0g3

(a)

(b)

Figure 3: PRBS5 LFSR topologies for generator polynomial X5 + X2 + 1; (a) Fibonacci and(b) Galois. The LFSR states and PRBS sequence are shown in Table 3. The PRBS sequencesproduced by the Fibonacci and Galois form are equivalent, however, the sequences are time shifted,eg., in Table 3, the Galois sequence starts at sample index 3 of the Fibonacci sequence. The mirrorpolynomial in Figure 4 and Table 4 produces the time-reversed PRBS sequence.

X 3 X 5X 0

X 3X 5 X 0

PRBSoutput

PRBSoutput

f4 f3 f2 f1 f0

g4 g2 g1 g0g3

(a)

(b)

Figure 4: PRBS5 LFSR topologies for generator polynomial X5 + X3 + 1; (a) Fibonacci and(b) Galois. The LFSR states and PRBS sequence are shown in Table 4. The PRBS sequencesproduced by the Fibonacci and Galois form are equivalent, however, the sequences are time shifted,eg., in Table 4, the Galois sequence starts at sample index 2 of the Fibonacci sequence. The mirrorpolynomial in Figure 3 and Table 3 produces the time-reversed PRBS sequence.

11


Table 3: PRBS5 sequence for taps [5,2], X5 + X2 + 1, 100101b.

Sample Fibonacci Galois

Index LFSR state PRBS LFSR state PRBSbinary hex output binary hex output

0 11111 1F 1 11111 1F 11 01111 0F 1 11101 1D 12 00111 07 1 11100 1C 03 10011 13 1 01110 0E 04 11001 19 1 00111 07 15 01100 0C 0 10001 11 16 10110 16 0 11010 1A 07 01011 0B 1 01101 0D 1

8 00101 05 1 10100 14 09 10010 12 0 01010 0A 010 01001 09 1 00101 05 111 00100 04 0 10000 10 012 00010 02 0 01000 08 013 00001 01 1 00100 04 014 10000 10 0 00010 02 015 01000 08 0 00001 01 1

16 10100 14 0 10010 12 017 01010 0A 0 01001 09 118 10101 15 1 10110 16 019 11010 1A 0 01011 0B 120 11101 1D 1 10111 17 121 01110 0E 0 11001 19 122 10111 17 1 11110 1E 023 11011 1B 1 01111 0F 1

24 01101 0D 1 10101 15 125 00110 06 0 11000 18 026 00011 03 1 01100 0C 027 10001 11 1 00110 06 028 11000 18 0 00011 03 129 11100 1C 0 10011 13 130 11110 1E 0 11011 1B 1

12


Table 4: PRBS5 sequence for taps [5,3], X5 + X3 + 1, 101001b.

Sample Fibonacci Galois

Index LFSR state PRBS LFSR state PRBSbinary hex output binary hex output

0 11111 1F 1 11111 1F 11 01111 0F 1 11011 1B 12 00111 07 1 11001 19 13 00011 03 1 11000 18 04 10001 11 1 01100 0C 05 11000 18 0 00110 06 06 01100 0C 0 00011 03 17 10110 16 0 10101 15 1

8 11011 1B 1 11110 1E 09 11101 1D 1 01111 0F 110 01110 0E 0 10011 13 111 10111 17 1 11101 1D 112 01011 0B 1 11010 1A 013 10101 15 1 01101 0D 114 01010 0A 0 10010 12 015 00101 05 1 01001 09 1

16 00010 02 0 10000 10 017 00001 01 1 01000 08 018 10000 10 0 00100 04 019 01000 08 0 00010 02 020 00100 04 0 00001 01 121 10010 12 0 10100 14 022 01001 09 1 01010 0A 023 10100 14 0 00101 05 1

24 11010 1A 0 10110 16 025 01101 0D 1 01011 0B 126 00110 06 0 10001 11 127 10011 13 1 11100 1C 028 11001 19 1 01110 0E 029 11100 1C 0 00111 07 130 11110 1E 0 10111 17 1

13


2.5 LFSR transition matrices

Figure 2 shows the LFSR topologies for a PRBS7 sequence generator with taps [7,6], generatorpolynomial X7 + X6 + 1, and binary polynomial 1100_0001b. The operation of the LFSR can bedescribed in terms of a state machine where the register contents are the current state, and thefeedback connections determine the next state. The transition matrix for the Fibonacci form shownin Figure 2(a) is

f0(n + 1)f1(n + 1)f2(n + 1)f3(n + 1)f4(n + 1)f5(n + 1)f6(n + 1)

=

0 1 0 0 0 0 00 0 1 0 0 0 00 0 0 1 0 0 00 0 0 0 1 0 00 0 0 0 0 1 00 0 0 0 0 0 11 1 0 0 0 0 0

f0(n)f1(n)f2(n)f3(n)f4(n)f5(n)f6(n)

(1)

where the matrix can be seen to contain an identity matrix (in blue) for the simple register-to-registerconnections, and the sum feedback connection (in red). The transpose form shown in Figure 2(b)is constructed by reversing the direction of signal flow, converting summing nodes into junctions,and junctions into summing nodes. The transition matrix for the transposed Fibonacci form inFigure 2(b) is

f0(n + 1)f1(n + 1)f2(n + 1)f3(n + 1)f4(n + 1)f5(n + 1)f6(n + 1)

=

0 0 0 0 0 0 11 0 0 0 0 0 10 1 0 0 0 0 00 0 1 0 0 0 00 0 0 1 0 0 00 0 0 0 1 0 00 0 0 0 0 1 0


(2)

where it can be seen that the transition matrix is the transpose of the matrix in (1). The Galois formof the PRBS7 generator shown in Figure 2(c), is the transpose form of the Fibonacci, redrawn sothat the shift-register is right-shifting, and the registers are renumbered so that they are in the sameorder as the Fibonacci form in Figure 2(a). The transition matrix for the Galois form in Figure 2(c)is

g0(n + 1)g1(n + 1)g2(n + 1)g3(n + 1)g4(n + 1)g5(n + 1)g6(n + 1)

=

0 1 0 0 0 0 00 0 1 0 0 0 00 0 0 1 0 0 00 0 0 0 1 0 00 0 0 0 0 1 01 0 0 0 0 0 11 0 0 0 0 0 0

g0(n)g1(n)g2(n)g3(n)g4(n)g5(n)g6(n)

(3)

where the renumbering of the registers obscures the transpose relationship between the two forms.The renumbering of the registers between Figure 2(a) and (c) was performed so that the code

associated with this tutorial could implement both Fibonacci and Galois topologies using right-shifting registers, with the PRBS output from the LFSR being the LSB (bit 0). This conventioncorresponds to the use of the right-shift operator on integer data types in C code, and allowsthe display of the state register for either topology using a hexadecimal value that correspondsdirectly to the registers shown in the figure, rather than having to perform a mental bit-reversal forFibonacci versus Galois LFSR state values. The hexadecimal values generated using C code andMATLAB code can be compared directly to hexadecimal state values in Modelsim simulations ofVHDL implementations of LFSRs. The LFSR register numbering convention also corresponds tothe sequence that the PRBS bits are output, i.e., at serial time index 0, the PRBS output bit is theLFSR register 0 content, at time index 1, the PRBS output bit is the content of LFSR register 1,

14


and so on. The correspondence between the PRBS output bit indexing, and the LFSR indexing canbe seen in Table 1, where the first 7 PRBS output bits correspond to the initial 7-bit LFSR registercontents. This feature is exploited in serial-link bit-error-rate testing, by using the received PRBSbits to initialize the receiver comparison PRBS generator; if there are no bit errors, any sequence of7-bits received from the transmitter can be used to initialize the receiver LFSR, and from that pointon, both transmit and receive PRBS sequences should be identical. The LFSR and PRBS outputbit numbering convention also helps in understanding the parallel generation of PRBS sequencesdiscussed next.

15


2.6 Parallel generation of PRBS sequences

The LFSR circuits shown in Figure 1 generate a 1-bit PRBS output per clock period, eg., thePRBS7 sequence shown in Table 2. In applications such as high-speed serial link testing and digitalnoise generation, multiple PRBS bits are required per clock period. The papers by Mutagi [7] andO’Reilly [8] discuss the series-parallel generation of m-sequences, however, those references onlydiscuss the case where the parallel output width is smaller than the LFSR width. This sectionpresents a generalized approach, where the number of output PRBS bits is independent of theLFSR width.

Table 5 shows an example of what is desired from an 8-bit parallel output PRBS generator forthe 1-bit PRBS7 sequence shown in Table 2. The 127-bit PRBS7 sequence can be packed into 8-bitvalues to create 15× 8-bits plus 7-bits, or equivalently 16× 8-bits minus 1-bit. Since the last 8-bitvalue is short 1-bit, the 127-bit sequence can be repeated, and a different set of 8-bit values will beproduced (shifted by 1-bit relative to the first sequence). The 127-bit sequence can be reused 8 timesto produce 127 × 8-bit values. Table 5 shows the 127-bit PRBS7 sequence repeated 8 times, andpacked into 8-bit values from LSB-to-MSB. The initial 8-bits of each repeated sequence are markedin red; you can see how the 8-bit value shifts 1-bit at the boundary of each 127-bit repetition untilafter the 127th 8-bit value, the sequence repeats again.

To determine the logic necessary to implement a parallel output PRBS, it is necessary to lookat the state transitions and output from an LFSR with a 1-bit PRBS output. Table 1 shows theshift-register contents based on an arbitrary initial LFSR seed value. The sequence of PRBS outputsamples from the LFSR LSB, i.e., p(n) = f0(n), where f0 is the last column in the table, can bewritten in matrix form as;

p0(n)p1(n)p2(n)p3(n)p4(n)p5(n)p6(n)p7(n)

p0(n + 1)p1(n + 1)p2(n + 1)p3(n + 1)p4(n + 1)p5(n + 1)p6(n + 1)p7(n + 1)

p0(n + 2)p1(n + 2)p2(n + 2)p3(n + 2)p4(n + 2)p5(n + 2)p6(n + 2)p7(n + 2)

=

p(n)p(n + 1)p(n + 2)p(n + 3)p(n + 4)p(n + 5)p(n + 6)p(n + 7)

p(n + 8)p(n + 9)p(n + 10)p(n + 11)p(n + 12)p(n + 13)p(n + 14)p(n + 15)

p(n + 16)p(n + 17)p(n + 18)p(n + 19)p(n + 20)p(n + 21)p(n + 22)p(n + 23)

=

1 0 0 0 0 0 00 1 0 0 0 0 00 0 1 0 0 0 00 0 0 1 0 0 00 0 0 0 1 0 00 0 0 0 0 1 00 0 0 0 0 0 11 1 0 0 0 0 0

0 1 1 0 0 0 00 0 1 1 0 0 00 0 0 1 1 0 00 0 0 0 1 1 00 0 0 0 0 1 11 1 0 0 0 0 11 0 1 0 0 0 00 1 0 1 0 0 0

0 0 1 0 1 0 00 0 0 1 0 1 00 0 0 0 1 0 11 1 0 0 0 1 00 1 1 0 0 0 11 1 1 1 0 0 00 1 1 1 1 0 00 0 1 1 1 1 0


(4)

where the serial output p(n) has been grouped into blocks of 8-bits, pm(n), for m = 0, . . . , 7. Thepm(n) samples are the parallel output samples for an 8-bit parallel output PRBS7 generator. The

16


PRBS output transition matrix consists of the identity matrix in the first 7× 7 locations, indicatingthat the first 7 PRBS output samples are given by the initial contents of the LFSR registers1. Therow following the identity matrix is the first sample generated by LFSR XOR feedback. That XORsum was registered into LFSR register f0 six clocks earlier (see sample index 1 in Table 1), and bysample index 7, the XOR sum has propagated to the LFSR output register. Subsequent samples aregenerated in the same manner. The transition matrix can be extended for the length of the PRBSsequence, and then the matrix repeats.

Hardware generation of parallel output PRBS sequences requires an algorithm based on theLFSR width and polynomial. This algorithm must automate the construction of the transitionmatrix. The transition matrix can be calculated via (at least) two methods; matrix multiplicationand matrix row sums. In the matrix multiplication method, the transition matrix T is constructedfrom rows 1 to 8 of the transition matrix, i.e.,

T =

0 1 0 0 0 0 00 0 1 0 0 0 00 0 0 1 0 0 00 0 0 0 1 0 00 0 0 0 0 1 00 0 0 0 0 0 11 1 0 0 0 0 0

(5)

This transition matrix defines the output samples p(n+1) to p(n+8). The transition matrix raisedto the power of m, i.e., Tm, (using modulo-2 arithmetic) defines the connections for p(n + m) top(n + m + 7), eg.,

T8 =

0 1 1 0 0 0 00 0 1 1 0 0 00 0 0 1 1 0 00 0 0 0 1 1 00 0 0 0 0 1 11 1 0 0 0 0 11 0 1 0 0 0 0

(6)

which matches the 7 × 7 entries starting at p(n + 8) in the output transition matrix in (4). Thecomplete transition matrix can be constructed in blocks of 7 rows using the matrix multiplicationtechnique. However, there is a simpler technique; matrix row sums.

The transition matrix rows following the identity matrix rows in (4) can be formed as the modulo-2 sum of previous rows. The rows that need to be summed are given by the bits set in the binarygenerator polynomial. For example, the PRBS7 binary generator polynomial is 11000001b, wherebits 0, 6, and 7 are set. The calculation for the output transition row for p(n + m) for m > 6 is

p(n + m) = p(n + m− 7)⊕ p(n + m− 6) (7)

where the new row is calculated as the modulo-2 sum of the rows 6 and 7 samples earlier. Bit 0 doesnot enter into the sum; think of it as the current row or as the initialization of the new row withzeros. This summing of two previous rows can be seen in the PRBS output column (f0) in Table 1.The generation of the transition matrix by summing previous rows can be encoded in a hardwaredescription language much simpler than matrix multiplication. Section 4 discusses how the matrixrow summing technique is used to create a parallel output PRBS generator component that can beconfigured for arbitrary LFSR width and PRBS output width.

1The LFSR register numbering scheme was selected so that the output sample and register indexes would match.

17


le5:

PR

BS7

8-bi

tpa

ralle

lou

tput

sequ

ence

for

taps

[7,6

],X

7+

X6

+1,

11000001b

(pac

ked

LSB

first

).

Sam

ple

PR

BS

outp

ut

Sam

ple

PR

BS

outp

ut

Sam

ple

PR

BS

outp

ut

Sam

ple

PR

BS

outp

ut

Index

bin

ary

hex

Index

bin

ary

hex

Index

bin

ary

hex

Index

bin

ary

hex

001111111

7F

32

00011111

1F

64

00000111

07

96

10000001

81

100100000

20

33

00001000

08

65

10000010

82

97

01100000

60

200011000

18

34

10000110

86

66

10100001

A1

98

00101000

28

310001010

8A

35

11100010

E2

67

01111000

78

99

10011110

9E

400100111

27

36

10001001

89

68

10100010

A2

100

01101000

68

510011010

9A

37

11100110

E6

69

10111001

B9

101

10101110

AE

600101011

2B

38

11001010

CA

70

11110010

F2

102

01111100

7C

701011111

5F

39

00010111

17

71

10000101

85

103

11100001

E1

800111000

38

40

10001110

8E

72

00100011

23

104

01001000

48

910010010

92

41

01100100

64

73

11011001

D9

105

10110110

B6

10

10101101

AD

42

01101011

6B

74

11011010

DA

106

11110110

F6

11

10111101

BD

43

01101111

6F

75

00011011

1B

107

11000110

C6

12

10110001

B1

44

00101100

2C

76

01001011

4B

108

11010010

D2

13

01110100

74

45

11011101

DD

77

01110111

77

109

10011101

9D

14

01100111

67

46

10011001

99

78

10100110

A6

110

10101001

A9

15

10101010

AA

47

11101010

EA

79

11111010

FA

111

11111110

FE

16

00111111

3F

48

00001111

0F

80

00000011

03

112

01000000

40

17

00010000

10

49

00000100

04

81

11000001

C1

113

00110000

30

18

00001100

0C

50

01000011

43

82

01010000

50

114

00010100

14

19

11000101

C5

51

11110001

F1

83

00111100

3C

115

01001111

4F

20

00010011

13

52

01000100

44

84

11010001

D1

116

00110100

34

21

11001101

CD

53

01110011

73

85

01011100

5C

117

01010111

57

22

10010101

95

54

11100101

E5

86

11111001

F9

118

10111110

BE

23

00101111

2F

55

00001011

0B

87

11000010

C2

119

01110000

70

24

00011100

1C

56

01000111

47

88

10010001

91

120

00100100

24

25

11001001

C9

57

10110010

B2

89

01101100

6C

121

01011011

5B

26

11010110

D6

58

10110101

B5

90

11101101

ED

122

01111011

7B

27

11011110

DE

59

00110111

37

91

10001101

8D

123

01100011

63

28

01011000

58

60

10010110

96

92

10100101

A5

124

11101001

E9

29

10111010

BA

61

11101110

EE

93

00111011

3B

125

11001110

CE

30

00110011

33

62

01001100

4C

94

01010011

53

126

01010100

54

31

11010101

D5

63

11110101

F5

95

11111101

FD

18


3 Correlation

This section investigates the correlation properties of 1-bit PRBS sequences, and parallel outputPRBS sequences. The analsys shows how PRBS sequences can be used to generate white noise (arandom noise signal with uniform power spectral density).

The auto-correlation of an N -sample sequence x[n] is

rxx[k] =N−1∑n=0

x[n]x[n− k] (8)

where in hardware, the delays x[n−k] can be implemented using registers, i.e., a delay line containingearlier samples, hence the minus sign in front of k. The auto-correlation response is symmetric aboutthe zeroth lag, so in a hardware implementation only the zeroth and positive samples of the auto-correlation need to be calculated. If the auto-correlation response is calculated using the discreteFourier transform, then as discussed next, the sequence length N depends on whether cyclic ornon-cyclic correlation is desired, and once the calculation is complete, the range of lags k can bereduced to the samples of interest.

There are two main correlation properties of interest when analyzing PRBS sequences; cyclic(periodic) correlation and non-cyclic (non-periodic) correlation. The cyclic correlation of the PRBSsequence from an LFSR of width M is performed on N -samples, where N is a multiple of thesequence length, i.e., N = R(2M − 1), where R is the number of repetitions of the sequence. Thecyclic auto-correlation of a PRBS sequence can be implemented using the discrete Fourier transformvia the following steps; given the PRBS samples x[n], for n = 0, 1, . . . , N − 1, calculate the discreteFourier transform (via the FFT) of the sequence, i.e.,

X[m] =N−1∑n=0

x[n] exp(−j2πmn

N

)for m = 0, 1, . . . , N − 1 (9)

then calculate the power-spectrum via

Rxx[m] = |X[m]|2 (10)

The auto-correlation is the inverse discrete Fourier transform of the power-spectrum, i.e.,

rxx[k] =1N

N−1∑k=0

Rxx[m] exp(

j2πkm

N

)(11)

where three explicit variables have been used; n for the sample index, m for the frequency channelindex, and k for the lag index.

The calculation of the power-spectrum via multiplication in the frequency domain results ina cyclic convolution of the N samples in the time-domain. The samples in the auto-correlationresponse can be displayed versus the lag indices k = 0, 1, . . . , N − 1, or the response can be ‘FFTshifted’ into positive and negative lags, where for N odd k = −(N−1)/2, . . . ,−1, 0, 1, . . . , (N−1)/2,and for N even k = −N/2, . . . ,−1, 0, 1, . . . , N/2− 1 (the correlation response is cyclic, so these twochoices for k simply represent different starting points in the cyclic response).

The non-cyclic correlation of a PRBS sequence is typically performed on N samples taken from amuch larger sequence length, i.e., N (2M − 1). The discrete correlation of an N -sample sequencewith another N -sample sequence has a correlation response with (2N − 1)-samples. The calculationof this discrete correlation using the FFT requires that each N -sample sequence be padded withzeros to a total length of at least (2N − 1) (the next power-of-2 length is typically used). The non-cyclic auto-correlation of the PRBS sequence is calculated via calculation of the power-spectrum as

19


Table 6: 1-bit PRBS cyclic auto-correlation.

Lag Sample sequence weights Correlationk x[n− k], n = 0, . . . , 7

∑x[n]x[n− k]

0 1 1 1 -1 -1 1 -1 71 1 1 -1 -1 1 -1 1 -12 1 -1 -1 1 -1 1 1 -13 -1 -1 1 -1 1 1 1 -14 -1 1 -1 1 1 1 -1 -15 1 -1 1 1 1 -1 -1 -16 1 -1 1 1 1 -1 -1 -1

used for the cyclic correlation, however, the addition of the zero padding avoids cyclic aliasing ofthe lag response. The zero padding does however result in a triangular weighting in the numberof samples that contribute to each correlation sum, eg., the lag k = 0 response is the sum of theproduct of the two N -sample sequences, with N samples contributing to the sum, whereas, the lagk = ±1 response in the sum of the product of the two N -sample sequences shifted left or right by 1sample, causing only (N − 1)-samples in the two sequences to overlap, resulting in (N − 1)-samplescontributing to the total sum (with the edge samples multiplied by zeros in the zero padding). Thenumber of overlapping samples in the N -sample sequences reduces linearly with the lag offset. Thereduction in samples in the non-cyclic correlation response results in lag dependent statistics.

3.1 1-bit PRBS cyclic correlation

The output from an LFSR is referred to as a pseudo-random binary sequence, where the termpseudo-random refers to the fact that although the sequence has the characteristics of a randomsequence, it is in fact of finite length and fully deterministic.

A white noise signal is a signal with a uniform power-spectrum response, and a delta-functionauto-correlation response. A 1-bit PRBS has these features, however, the features are subject to howthe responses are calculated; the number of samples in the sequence being analyzed, and whethercyclic or non-cyclic correlation is used.

The cyclic auto-correlation response of a 1-bit PRBS sequence x[n], of length (2M −1), is a cyclicdelta-function, i.e.,

rxx[k] =

2M − 1 for k = 0 and k modulo (2M − 1) = 0−1 for k otherwise

(12)

where the correlation is not of the binary PRBS codes, but of the PRBS binary weights, where thebinary codes 0 and 1 are mapped to weights of -1 and +1 respectively. The mapping from binarycode to weight can also use the polar convention, where a PRBS output binary code b, maps to theweight exp(−jπb) = (−1)b, i.e., 0 maps to +1, and 1 maps to -1.

Table 6 shows an example of a 3-bit Fibonacci LFSR with polynomial X3 + X2 + 1 (binarypolynomial 1101b = 13) and an initial seed of 111b. The LFSR produces the 7-bit repeating PRBSoutput binary sequence 1, 1, 1, 0, 0, 1, 0, which maps to the binary weights shown in the table.Table 6 shows the terms used to calculate the auto-correlation sums for lags k = 0 through 6, withthe auto-correlation response repeating for k modulo 7.

20


The auto-correlation response in (12) has a delta-function response like a white noise source,however, there is no statistical variation in the lag response. The cyclic auto-correlation of a PRBSsequence has a main correlation peak of (2M − 1), and the lags away from the peak are all -1. Thelags away from the peak are all -1 due to the fact that a (2M − 1) length PRBS sequence has a totalof 2(M−1) × 1’s and 2(M−1) − 1 × 0’s, i.e., there is one less zero. For all but the zeroth lag, thecyclic correlation results in (2M −2) products with an even number of +1 and -1 terms which cancelin the correlation sum, however, there is always one remaining product equal to -1, resulting in afinal correlation sum of -1.

The power-spectrum of the PRBS sequence is the discrete Fourier transform of the auto-correlationresponse, i.e.,

Rxx[m] =

1 for m = 0 and m modulo (2M − 1) = 02M for m otherwise

(13)

where the Fourier transform was calculated using the fact that the lag response is even-symmetric,so the power-spectrum will be real-valued, i.e.,

Rxx[m] = rxx[0] +N−1∑k=0

rxx[k] cos(

2πkm

N

)

= (2M − 1)−N−1∑k=0

cos(

2πkm

N

) (14)

and the cosine sums

N−1∑k=0

cos(

2πkm

N

)=

N − 1 for m = 0−1 for m = 1, . . . , N − 1

(15)

and the cyclic Fourier transform length N = (2M − 1).Figure 5 shows the cyclic correlation response for the 5-bit Fibonacci LFSR with polynomial

X5 + X3 + 1 (binary polynomial 101001b), i.e., the PRBS sequence shown in Table 4 for the LFSRin Figure 4. Figure 5 also shows the cyclic correlation response for the PRBS sequence repeatedthree times; time-domain repetition of the sequence causes frequency-domain sampling.

Repetition of the PRBS sequence in the time-domain is equivalent to a convolution of the 31-sample PRBS sequence with a series of unity-height impulses (delta-functions) spaced by 31 samples.Convolution in the time-domain is equivalent to multiplication in the frequency domain. The Fouriertransform of the series of time-domain impulses is a series of frequency-domain impulses, with afrequency channel spacing equivalent to the number of repetitions. The discrete Fourier transformpair for the sampling function (the general name of the sequence of impulses) is

h[n] =R−1∑r=0

δ(n− rP ) H[k] = R

M−1∑m=0

δ(k −mR) (16)

where P = (2M − 1) is the PRBS sequence length, R is the number of repetitions, the discreteFourier transform length is N = RP , and n, k = 0, . . . , N − 1.

The three repetitions of the 31-sample PRBS sequence shown in Figure 5(d), results in thethree peaked auto-correlation response in Figure 5(e), and the sampled power-spectrum responsein Figure 5(f). The three repetitions of the PRBS sequence in the time-domain results in a power-spectrum that is sampled every three frequency samples. The power-spectrum in Figure 5(f) wasnormalized by R2 to scale the peak magnitude back to 2M , while the lag response in Figure 5(e)was normalized by R to scale the correlation peaks back to (2M − 1). The scaling is required due tothe increase in the Fourier transform length by the factor R.

21


Figure 6 shows the effect of oversampling the PRBS response. In Figure 6(a), each sample inthe 31-sample PRBS sequence is duplicated four times (as consecutive samples). The repetitionof samples is analogous to the convolution of the original samples with a rect-function at fourtimes the original sampling rate. The time-domain oversampling and convolution cause frequencydomain expansion and multiplication of the frequency response with a sinc-function, resulting inthe response in Figure 6(c). Figure 6(d), (e), and (f) show the results of duplication of the samples,and repetition of the duplicated sequence, i.e., the sinc-function frequency-domain response dueto duplication in Figure 6(c), becomes a sampled sinc-function response in Figure 6(f). The lagresponses in Figures 6(b) and (e) were normalized by D and RD respectively, while the power-spectra in Figures 6(c) and (f) were normalized by D2 and (RD)2 respectively.

These repetition and duplication effects are not simply mathematical curiosities, but are observedin practice, when sampling PRBS sequences generated by digital-to-analog converters (DACs) usinganalog-to-digital converters (ADCs) and spectrum analyzers, as shown in Section 6.

3.2 1-bit PRBS non-cyclic correlation

Figure 7 shows the non-cyclic auto-correlation lag responses for the PRBS sequences obtained fromLFSRs of widths M = 5-bits to 10-bits. The PRBS sequences were correlated using the FFT. TheFFT length was the next power-of-two above the correlated sequence length; for a PRBS sequencelength of P = 2M − 1, the correlated sequence length is (2P − 1) = 2(M+1) − 3, so the FFT lengthis the next power-of-2 above this, i.e., N = 2(M+1). Figure 7 shows all 2(M+1) samples of thecorrelation response. In Figure 7, the variation in the lag response for lags near the peak (the zerothlag) is small, then the lag variation increases (the lag response bulges), and then decreases again atthe extreme lags. This response is due to the number of samples that contribute to the correlationsums. The lags near the zeroth lag are calculated from sums that include almost all of the samplesin the PRBS sequence and hence the response of those lags is close to that of the cyclic correlationresponse. The lags further from the main peak have less samples contributing to their sums, so theiramplitudes are decreased due to the triangular weighting discussed at the beginning of this section.

A PRBS sequence can be used as a uniform noise source if the number of samples correlated ismuch smaller than the sequence length. The correlation of fewer samples eliminates the reduction invariance of the lags near the zeroth lags seen in Figure 7, as those samples then become calculatedfrom a partial PRBS sequence.

The expected correlation statistics for a 1-bit uniform noise source are now determined. A PRBSsequence with binary codes n = 0, 1, code weights w[n] = −1,+1, and the probability of eachcode occurring P [n] = 0.5, 0.5, a sample x drawn from this distribution has an expected value of

µx = 〈x〉 =∑

n

w[n]P [n] = 0 (17)

and variance ofσ2

x = 〈x2〉 − 〈x〉2 =∑

n

w2[n]P [n] = 1 (18)

i.e., the variable x is zero mean, with a variance of 1. The zeroth lag correlation statistics, are thestatistics of the power in the sequence x, defining the variable r = x2, the power has an expectedvalue of

µr = 〈r〉 = 〈x2〉 =∑

n

w2[n]P [n] = 1 (19)

and variance ofσ2

r = 〈r2〉 − 〈r〉2 = 〈x4〉 − 〈x2〉2 =∑

n

w4[n]P [n]− 1 = 0 (20)

22


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(a)

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Figure 5: PRBS5 cyclic correlation response for; a single instance of the 31-sample sequence (a)samples, (b) auto-correlation, and (c) power-spectrum, three repeats of the sequence (d) samples, (e)auto-correlation, and (f) power-spectrum. Time-domain repetition of the sequence causes frequency-domain sampling.

23


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Mag

nitu

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(a)

(b)

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(d)

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Figure 6: PRBS5 cyclic correlation response for; four duplicate samples of the 31-sample sequence (a)samples, (b) auto-correlation, and (c) power-spectrum, three repeats of the four duplicate samplessequence (d) samples, (e) auto-correlation, and (f) power-spectrum. Time-domain duplication ofeach sample causes frequency-domain multiplication with a sinc-response.

24


i.e., the power x2 has an expected value of 1, with no variance. This makes sense, given that thesequence of samples x has weights of -1 and +1, so the sequence of power samples x2 is only theweight 1.

The lag correlation statistics for other than the zeroth lag, are the statistics of the cross-powerbetween two samples x and y drawn from the PRBS sequence. Ideally these two samples areuncorrelated so the probability of getting any particular combination of the weights -1 or 1 is 0.25,i.e., given the binary code n for sample x and m for sample y, P [m,n] = 0.25, for m = 0, 1 andn = 0, 1. The cross-power variable, r = xy, has an expected value of

µr = 〈r〉 = 〈xy〉 =∑m

∑n

w[m]w[n]P [m,n] = 0 (21)

and variance of

σ2r = 〈r2〉 − 〈r〉2 = 〈(xy)2〉 − 〈xy〉2 =

∑m

∑n

(w[m]w[n])2P [m,n] = 1 (22)

i.e., the cross-power xy has an expected value of 0, with a variance of 1. This makes sense, giventhat you expect the uncorrelated signals to be randomly giving a product of -1 or +1.

The statistics of a PRBS sequence being used as uniform noise source can be tested by takingblocks of Nt samples from the sequence, performing correlation via the FFT, and then inversetransforming to obtain a correlation estimate. Averaging Na estimates together causes the powerdistribution statistics to approach that of a normally distributed variable. The correlation statisticsfor the averages are

rxx[k] =

N(

Nt,Nt

Na

)for k = 0

N(

0,Nt

Na

(1− |k|

Nt

))for k = 1, . . . , Nt/2

(23)

where the notation N (µ, σ2), indicates a normally distributed random variable with mean µ andvariance σ2, and the term (1−|k|/Nt) is due to the triangular weighting of the (non-cyclic) correlationsums. Normalizing the correlation averages by the number of samples in each estimate gives thecorrelation coefficient form

ρxx[k] =

N(

1,1

NtNa

)for k = 0

N(

0,1

NtNa

(1− |k|

Nt

))for k = 1, . . . , Nt/2

(24)

Figure 8 shows correlation coefficient response for a 31-bit LFSR based PRBS noise source for lags 0to Nt/2. The lag response matches expectations; with no variance of the zeroth lag, and a downwardramp in the variance for the lags away from the zeroth lag. The lag variance was normalized by1/(NtNa) to scale the values to near unity.

The LFSR width for a PRBS-based noise source is determined by the number of uncorrelatedsamples required. For example, the correlations shown in Figure 8 required Nt × Na × Ne =128 × 100 × 2000 = 25600000 samples, so an LFSR width of at least ceil(log 2(25600000)) = 25-bits is required. The plots were generated using the PRBS output from a 31-bit LFSR, as thePRBS sequence can be generated and written to a binary file once, and that file reused for multiplesimulations.

25


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(b)

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Figure 7: PRBS5 non-cyclic correlation lags responses for LFSR widths of; (a) 5-bits, (b) 6-bits, (c)7-bits, (d) 8-bits, (e) 9-bits, and (f) 10-bits.

26


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Figure 8: PRBS31 1-bit uniform distribution auto-correlation statistics for a Nt = 128 samplesper correlation, Na = 100 averages per estimate, and Ne = 2000 estimates; (a) auto-correlationlag response for the first 100 estimates and (b) normalized lag variance estimated from the 2000auto-correlation estimates.

27


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Figure 9: PRBS 5-bit uniform distribution histogram for; (a) 1023 × 5-bit samples from the 5-bitLFSR [10,3] and (b) 4096× 5-bit samples from the 15-bit LFSR [15,1].

3.3 Multi-bit PRBS cyclic correlation

The sequence of bits in a PRBS sequence can be packed into parallel words (or generated directlyas parallel words), and interpreted as signed integer values. Figure 9 shows the histogram for 5-bitsigned integer samples (-16 to 15) constructed from the PRBS bits from the 10-bit LFSR with taps[10,3] and from the 15-bit LFSR with taps [15,1]. For the histogram in Figure 9(a), the 1023 samplePRBS sequence was repeated 5 times and used to generate 1023 × 5-bits samples. A 5-bit signedinteger has 32 possible codes, so each column in the histogram is expected to have 32 occurrences(with one column having one less sample, since there were only 1023 samples). For the histogram inFigure 9(b), the 4096× 5-bit samples were generated from 20480 samples from the PRBS sequenceof length 32767, i.e., not all PRBS bits were used and the sequence was not repeated. The expectedlevel of the histogram columns is 128.

If the samples in a PRBS sequence are repeated when constructing parallel data, then althoughthe parallel data values are unique, the values are correlated, due to the parallel values being relatedby a parallel data bit-shift. For example, Table 5 shows the construction of 8-bit words from arepeated PRBS7 sequence. The values of the first and second 16 bytes in the table are unique,however, the bits within the bytes are not (since the PRBS sequence bits are repeated); the 7least-significant-bits in each byte of the second 16 byte sequence are equivalent to the 7 most-significant-bits of the first 16 byte sequence. This pattern continues with a 1-bit shift for everyrepetition of the PRBS sequence. This pattern results in correlation between the parallel values (oranti-correlation depending on the value of the sign bits).

Figures 10 and 11 show the cyclic correlation of 8-bit values constructed from the repetition of the5-bit LFSR PRBS sequences used in the 1-bit cyclic correlation responses in Figures 5 and 6. Thesample sequences in Figures 10(a) and (c), and Figures 11(a) and (c) were normalized to fractionalinteger format, i.e., −1.0 to 1.0. The negative spikes in the correlation responses in Figures 10(b) and(e), and Figures 11(b) and (e) are due to the sample-to-sample correlation caused by repeating thePRBS sequence. The correlation spikes cause ripple in the power-spectra, as seen in Figures 10(c)and (f), Figures 10(c) and (f).

Although the correlation responses in Figures 10 and 11 are not useful for use as a white noisesource, they do have one redeeming feature; if you are trying to synchronize to a PRBS source, andare receiving a parallel PRBS data words, the correlation of the parallel samples, rather than a 1-bitcorrelation, does have a lag response with a main peak. The main peak is at least twice as high asany other peaks, so a detection threshold could be used to detect only the main peak.

28


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Figure 10: PRBS5 8-bit cyclic correlation response for; a single instance of the 8-bit 31-samplesequence (a) samples, (b) auto-correlation, and (c) power-spectrum, three repeats of the sequence(d) samples, (e) auto-correlation, and (f) power-spectrum. Time-domain repetition of the sequencecauses frequency-domain sampling.

29


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Figure 11: PRBS5 8-bit cyclic correlation response for; four duplicate samples of the 8-bit 31-sample sequence (a) samples, (b) auto-correlation, and (c) power-spectrum, three repeats of the fourduplicate samples sequence (d) samples, (e) auto-correlation, and (f) power-spectrum. Time-domainduplication of each sample causes frequency-domain multiplication with a sinc-response.

30


3.4 Multi-bit PRBS non-cyclic correlation

The expected statistics for a B-bit uniform noise source can be determined using the uniform prob-ability distribution function,

f(x) =

1b

for |x| ≤ b

2

0 for x otherwise

(25)

A sample x drawn from this distribution has an expected value of

µx = 〈x〉 =∫ b

2

− b2

xf(x)dx =1b

[x2

2

] b2

− b2

= 0 (26)

and variance of

σ2x = 〈x2〉 − 〈x〉2 =

∫ b2

− b2

x2f(x)dx =1b

[x3

3

] b2

− b2

=b2

12(27)

A PRBS parallel output B-bit value normalized to fractional integer format has a uniform distribu-tion over the range -1.0 to 1.0 (b = 2.0). A variable x drawn from this distribution has a zero mean,and a variance of σ2

x = 1/3.The zeroth lag correlation statistics, are the statistics of the power in the sequence x, defining

the variable r = x2, the power has an expected value of

µr = 〈r〉 = 〈x2〉 = σ2x (28)

and variance of

σ2r = 〈r2〉 − 〈r〉2 = 〈x4〉 − 〈x2〉2 =

1b

[x5

5

] b2

− b2

−

(1b

[x3

3

] b2

− b2

)2

=45σ4

x (29)

The lag correlation statistics for other than the zeroth lag, are the statistics of the cross-powerbetween two samples x and y drawn from the uniform distribution. Ideally these two samples areuncorrelated so the probability of getting any particular combination of the binary values has a zeromean, and variance of σ4

x.The statistics of a PRBS sequence being used as uniform noise source can be tested by construct-

ing blocks of Nt × B-bit samples from the sequence, performing correlation via the FFT, and theninverse transforming to obtain a correlation estimate. Averaging Na estimates together causes thepower distribution statistics to approach that of a normally distributed variable. The correlationstatistics for the averages are

rxx[k] =

N(

Ntσ2x,

45

Nt

Naσ4

x

)for k = 0

N(

0,Nt

Na

(1− |k|

Nt

)σ4

x

)for k = 1, . . . , Nt/2

(30)

Normalizing the correlation averages by the number of samples in each estimate, and by the expectedvariance σ2

x, gives the correlation coefficient form

ρxx[k] =

N(

1,45

1NtNa

)for k = 0

N(

0,1

NtNa

(1− |k|

Nt

))for k = 1, . . . , Nt/2

(31)

31


Figure 12 shows correlation coefficient response for a 31-bit LFSR based PRBS uniform noise sourcefor lags 0 to Nt/2. The lag response matches expectations; with a zeroth lag variance of 0.8, anda downward ramp in the variance for the lags away from the zeroth lag. The lag variance wasnormalized by 1/(NtNa) to scale the values to near unity.

The probability distribution of the sum of a set of random variables is the convolution of theindividual probability distributions. Hence, the sum of two uniform distribution variables has atriangular distribution, and the sum of four or more variables has a distribution with a bell-shapedcurve similar to that of a Gaussian distribution. The shape of the distributions can be determinedusing the Fourier transform, i.e., the Fourier transform of the uniform distribution is a sinc-function,the Fourier transform of the sum of two uniform distribution samples is a sinc2 function, and theFourier transform of the sum of four uniform distribution samples is a sinc4 function. A Gaussiandistributed noise source can be modeled using the sum of four or more uniform distribution samples.The variance of the sum sample, is the sum of the variances of the individual samples, i.e., thevariance of Ns sample sum is Nsσ

2x = Ns/3. The sum of Ns samples results in bit-growth of

log2(Ns), eg., 1-bit for a sum of two samples, 2-bits for a sum of four samples. Normalizing the sumsby Ns and requantizing the sum to B-bits2 results summed samples having a variance of 1/(3Ns).The optimal input power-level for a Gaussian signal in fractional integer power format is a varianceof around 0.25, or a loading-factor of 10 log10(0.25) = −12dB. If four uniform samples are averaged,the input loading factor of the signal is 10 log10(1/12) = −10.8dB, i.e., slightly higher than optimal,and for eight samples averaged the input loading factor is -13.8dB. Figure 13 shows correlationcoefficient response for a 31-bit LFSR based PRBS Gaussian noise source for lags 0 to Nt/2. Thenormalized zeroth lag variance for a true Gaussian signal is 2 (Chi-square power distribution), theapproximate Gaussian distribution has a zeroth lag variance of approximately 1.8 (a ‘not quite’Chi-square power distribution). This minor difference has no effect on the power spectra generatedusing the Gaussian approximated noise source as the input test signal.

The LFSR width for a PRBS-based noise source is determined by the number of uncorrelatedsamples required. For example, the 8-bit uniform distribution correlations shown in Figure 12required B × Nt × Na × Ne = 8 × 128 × 100 × 2000 = 204800000 samples, so an LFSR width ofat least 28-bits is required. The 8-bit Gaussian distribution shown in Figure 13 summed four 8-bitPRBS parallel samples to produce each sample with approximate Gaussian statistics, so requiredan LFSR width of at least 30-bits. The plots were generated using the PRBS output from a 31-bitLFSR. An FPGA can implement parallel output PRBS sequences with very long repeat periods,with few resources. For example, a 64-bit LFSR clocked at 250MHz generating 32-bit parallel PRBSoutput data (so that four samples can be summed to model an 8-bit Gaussian noise source) has arepeat period of 73 years.

2The B-bit sum sample could also be generated as the Ns sample sum of (B − log2(Ns))-bit samples. However,the histograms of sums of B-bit samples looked better (more Gaussian).

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Figure 12: PRBS31 8-bit uniform distribution auto-correlation statistics for a Nt = 128 samplesper correlation, Na = 100 averages per estimate, and Ne = 2000 estimates; (a) auto-correlationlag response for the first 100 estimates and (b) normalized lag variance estimated from the 2000auto-correlation estimates.

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Figure 13: PRBS31 8-bit Gaussian distribution approximation auto-correlation statistics for a Nt =128 samples per correlation, Na = 100 averages per estimate, and Ne = 2000 estimates; (a) auto-correlation lag response for the first 100 estimates and (b) normalized lag variance estimated fromthe 2000 auto-correlation estimates. The Gaussian distribution is approximated by summing fourPRBS 8-bit uniform distribution samples, and requantizing the sum to 8-bits.

34


Table 7: LFSR package, lfsr pkg.vhd, functions.

Function and Description

lfsr polynomial(w)Returns the default primitive polynomial for an LFSR of width w. The polynomial is en-coded using the VHDL data type std_logic_vector(w downto 0), i.e., the polynomialis of width w+1.

lfsr binary string to polynomial(s)Converts a string containing binary characters, 0 and 1, or underscore, _, to polynomialformat with a width equal to the number of binary characters in the string, eg., a PRBS7polynomial can be generated using the string "1100_0001".

lfsr hex string to polynomial(s,w)Converts a string containing hexadecimal characters, 0 through F, or underscore, _, topolynomial format of width w (which is one larger than the LFSR width), eg., a PRBS7polynomial can be generated using the string "C1" with a width of 8 bits.

lfsr tap string to polynomial(s,w)Converts a string containing a comma separated list of decimal valued taps to polynomialformat of width w (one larger than the LFSR width), eg., a PRBS7 polynomial can begenerated using the tap notation "[7,6]", or "7,6" (the order of the taps in the listdoes not matter) and a width of 8 bits.

4 FPGA components

The VHDL code associated with this tutorial contains three major components; an LFSR component,a parallel output PRBS component, and a digital noise component. These components are usedin the hardware tests in Sections 5 and 6 to construct more complex designs. The LFSR package,lfsr_pkg.vhd, provides convenience functions for defining LFSR polynomials. The package containsthe procedures shown in Table 7. The LFSR polynomials are encoded using the VHDL data typestd_logic_vector, so that arbitrary width LFSRs can be generated.

35


Table 8: LFSR component, lfsr.vhd, generics and ports.

Generic Description

WIDTH LFSR width. The number of LFSR states is 2**WIDTH-1.

POLYNOMIAL The LFSR generator polynomial. Default polynomials are provided bylfsr_polynomial() in lfsr_pkg.vhd.

TOPOLOGY LFSR topology; FIBONACCI or GALOIS.

INVERT Generate an inverted LFSR state and PRBS output.

Port Description

rstN Reset (active low).

clk Clock.

load Load the LFSR seed value.

seed LFSR seed value.

enable Enable the LFSR.

data The LFSR state and PRBS output. The PRBS output is typically taken fromthe LSB, i.e., data(0).

4.1 LFSR

The LFSR component, lfsr.vhd, implements the circuits shown in Figure 1. Table 8 shows thecomponent generics and ports. The LFSR testbench, lfsr_tb.vhd, compares the LFSR PRBSoutput to a PRBS sequence stored in a binary file generated by MATLAB or C-code.

36


Table 9: Parallel output PRBS component, prbs.vhd, generics and ports.

Generic Description

LFSR WIDTH LFSR width. The number of LFSR states is 2**LFSR_WIDTH-1.


PRBS WIDTH Parallel PRBS output width, i.e., the number of PRBS bits to generate perclock period.

Port Description


clk Clock.




lfsr q The LFSR state.

prbs q The parallel PRBS output.

4.2 Parallel output PRBS

The parallel output PRBS component, prbs.vhd, implements multiple PRBS bits per clock pe-riod. Table 9 shows the component generics and ports. The PRBS testbench, prbs_tb.vhd, usesthe serial output LFSR component and a serial-to-parallel shift register to confirm that the par-allel output PRBS sequence matches the LFSR binary sequence. The PRBS spreader testbench,prbs_spreader_tb.vhd, shows how transmit and receive PRBS generators can be synchronized,and then used to modulate and demodulate a data stream.

The parallel output PRBS VHDL component is implemented based on the transition matrixdiscussed in Section 2.6. The VHDL uses functions to initialize a constant transition matrix basedon the LFSR polynomial and the parallel output width. The transition matrix column length istwice the length of the PRBS output width, so that the transition matrix can be used to initializethe parallel output registers (the LFSR reset seed and derived PRBS bits) on reset and when aseed is loaded, and to calculate the next state when the component is enabled. The componentcan implement PRBS widths from as small as 1-bit, i.e., an LFSR, to widths larger than the LFSRwidth or the entire PRBS sequence length, eg., a PRBS7 polynomial can be used along with a128-bit output width, resulting in the parallel output containing the entire 127-bit PRBS sequenceplus 1-bit every clock period.

37


Table 10: Digital noise component, noise.vhd, generics and ports.

Generic Description

LFSR WIDTH LFSR width. The number of LFSR states is 2**LFSR_WIDTH-1.


NOISE TYPE Noise type; UNIFORM or GAUSSIAN.

NOISE SUM Number of uniform noise samples to sum for GAUSSIAN noise.

NOISE WIDTH Output noise width.

Port Description


clk Clock.




q Output noise.

4.3 Digital noise source

The digital noise component, noise.vhd, uses the parallel output PRBS component to generateuniform or Gaussian (like) noise samples. Table 10 shows the component generics and ports.For uniform noise, the component uses a NOISE_WIDTH-bits parallel output PRBS to generate asigned uniform noise sample of width NOISE_WIDTH-bits. For Gaussian noise, the component usesa NOISE_SUM × NOISE_WIDTH-bits parallel output PRBS, sums NOISE_SUM signed samples of widthNOISE_WIDTH-bits together using a pipelined adder tree, and then convergent rounds the sum togenerate a signed Gaussian (like) noise sample of width NOISE_WIDTH-bits. The digital noise sourcetestbench, noise_tb.vhd, can be used to write uniform and Gaussian noise samples to a text filefor analysis. Figure 14 shows the histogram and power spectra for a PRBS31-based digital noisesource (processed using the MATLAB script noise_tb.m). Section 3.4 has details on the correlationproperties of the digital noise source.

38


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Figure 14: Digital noise source with 16-bit output (PRBS [31,28]). Uniform noise (a) samplehistogram and (b) power spectra, with a loading factor of 10 log10(1/3) = −4.8dB. Gaussian noise(c) sample histogram and (d) power spectra, with a loading factor of 10 log10(1/12) = −10.8dB(where the Gaussian was approximated as the sum of four uniform samples). The histograms werecalculated from 100× 1024 samples and sorted into 50 bins. The PSD were calculated by averaging100 1024-sample PSD estimates.

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5 Transceiver synchronization hardware tests

PRBS sequences are used for bit-error-rate (BER) testing of high-speed serializer/deserializer(SERDES) links. High-speed serial links are characterized by logic operating in two clock domains;the low-speed parallel clock domain and the high-speed serial clock domain. PRBS bits need to begenerated in parallel in the low-speed clock domain. The parallel PRBS data is then sent to thetransmit serializer, where data is parallel-to-serial converted for high-speed transmission; the high-speed serial data is the 1-bit PRBS. The high-speed serial data is captured by the receive deserializer,where data is serial-to-parallel converted. The received parallel PRBS data is then tested for biterrors, against the expected PRBS pattern. The receiver synchronizes the receive PRBS to thetransmit PRBS, by using the first received parallel PRBS pattern as the receiver PRBS seed. Onsubsequent low-speed clocks, if there are no bit errors over the serial link, the transmit and receivePRBS patterns should match, i.e., the bit-wise XOR of the two patterns should be all zeros. TheBER of a serial link is implemented at the receiver by counting the number of bits set in the outputof the bit-wise XOR; if there are no errors, then no bits get set, and the BER count remains zero.

. To test FPGA SERDES links at different SERDES widths, it is necessary to generate multiplePRBS bits per clock in the parallel clock domain. For example, a SERDES channel operating witha 16-bit FPGA fabric interface (parallel clock domain) at 156.25MHz would send 16-bit data to thetransmit channel for transmission at 16×156.25MHz = 2500Mbps, data would then be received anddeserialized to 16-bit data at 156.25MHz.

5.1 Stratix IV GX Development Kit

5.2 Word alignment

5.3 Multiple channel alignment

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6 Digital noise source hardware tests

This section contains hardware test results from the digital noise source component discussed inSection 4. The test results were obtained using the Altera Stratix II DSP development kit.

6.1 Stratix II DSP Development Kit

The Stratix II DSP Development kit features;

• Stratix II EP2S60 device3.

• Two Analog Devices AD9433 12-bit 125MHz ADCs.

• Two Texas Instruments (Burr-Brown) DAC904 14-bit 165MHz DACs.

• 100MHz oscillator.

• The board has jumper options for clocking the ADCs and DACs from the 100MHz oscillator,or from FPGA PLL outputs. These tests used the oscillator option, i.e., the ADC clock select6-pin headers J3 and J4 had jumpers installed across pins 3 and 4, and the DAC clock select8-pin headers J18 and J19 had jumpers installed across pins 5 and 6.

• The ADC9433 inputs are driven by a balun that has its inputs reversed (to aid in PCB routing).This causes the ADC signal to be inverted relative to the DAC output. The analysis scriptsused in these tests invert the ADC data prior to writing data capture files.

• The DAC904 data bus pin names (and schematic net names) D1 through D14 correspond tobinary bits 13 down to 0, i.e., the reverse of the pin names. The design VHDL code numbers thebits in the DAC buses d(13 downto 0), and the pin assignments script assigns the appropriate(reverse-order) pins.

• The DAC output voltage range is not well-matched to the ADC input voltage range; the testresults show that the full-scale output from the DAC corresponds to about half the input rangeof the ADC.

3The board used for these tests contained an EP2S60F1020C4ES engineering sample.

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6.2 1-bit PRBS

The analysis in Section 3 showed that a repeating PRBS sequence results in sampling of the fre-quency domain, and that an oversampled PRBS sequence has a sinc-like frequency response, i.e., thespectrum of a PRBS is an impulsive sinc-function. The spacing between the frequency domain sam-pling impulses in the power spectrum calculated using an FFT is equal to the number of repetitions,i.e., given a sequence length P , repeated R times, the FFT length is N = RP , and the impulsesare spaced every R frequency channels. In normalized frequency units, this spacing is equivalent toR/(RP ) = 1/P , and in Hz the spacing is fs/P (where fs is the DAC sampling frequency), i.e., theimpulses are located at the repetition frequency of the PRBS sequence. For dense sampling of thefrequency domain, the sequence length P should be long. However, to view the impulsive samplingeffect over a wide bandwidth, the sequence length P should be short.

The 1-bit PRBS output for a 5-bit LFSR with taps [5,3] was was used to generate a 14-bitDAC word that toggled between the DAC full-scale values of 0000h and 3FFFh. The DAC wasclocked at 100MHz. Figure 15 shows an oscilloscope trace and AD9433 ADC samples for 500ns ofthe repeating 31 sample (310ns) sequence. The oscilloscope trace in Figure 15(a) was obtained usinga LeCroy LC584AXL oscilloscope. The DAC output (oscilloscope input) was terminated to 50Ω,and the 200MHz scope bandwidth limit was enabled. The oscilloscope waveform amplitude was600mVpp. The ADC trace in Figure 15(b) toggles between ADC codes of around ±800. The 12-bitADC input voltage range is -1.0V to 1.0V, so codes of ±800 correspond to voltages of ±390mV, or780mVpp. The difference in voltages observed between the two measurements is most likely due toa termination impedance mismatch; the ADC input termination appears to be 100Ω, rather than50Ω (the schematic uses a pair of 50Ω terminations, whereas the data sheet recommends 25Ω).

Figure 16 shows the DAC output power spectrum for DC to 200MHz (over-sampled), and forNyquist-rate sampling of DC to 50MHz (by the ADC). The frequency-domain sampling impulsesare spaced every 100MHz/31 = 3.2258MHz. The spectrum in Figure 16(b) was obtained using anAnritsu Spectrum Master MS2721A portable spectrum analyzer, while the spectrum in Figure 16(d)was calculated from AD9433 ADC samples; FPGA RAM was used to capture 8192 samples, of which8184 samples were used (264 repetitions of the 31-sample PRBS sequence).

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6.3 Digital noise source

The digital noise source was configured for 14-bit uniform noise (using a 31-bit LFSR with taps[31,28]). The digital noise output was driven to the DSP kit 14-bit DAC as a straight-binary code(the format expected by the DAC)4. The DAC output was then either connected directly to the 12-bit ADC on the DSP kit, or low-pass filtered and connected to the ADC. Figure 17 shows the uniformnoise source results. The DAC output voltage can only exercise half the ADC input voltage range.The ADC histograms show that there are no missing codes (within the voltage range exercised).The spectrum analyzer spectrum in Figure 17(c) shows how the DAC generates signal frequenciesfar beyond its 100MHz clock frequency, and far beyond the ADC Nyquist bandwidth of 50MHz.The spectrum analyzer spectrum in Figure 17(f) shows that the 50MHz low-pass filter supplied withthe DSP kit does not suppress the signal adequately above 50MHz; significant aliasing occurs. Thehistogram in Figure 17(a) shows the uniform nature of the PRBS source, while Figure 17(d) showshow filtering the signal changes its response to Gaussian.

The digital noise source was then configured for 14-bit Gaussian noise (using the sum of foursamples of uniform noise). Figure 18 shows the noise source response for the direct DAC-to-ADCconnection and for the 50MHz low-pass filtered connection. The power in the Gaussian noise sourceis 6dB lower than that of the uniform noise source, as expected, since the averaging of four samplesreduces the variance by a factor of 4.

The power units on the ADC spectra and Anritsu spectra differ; the ADC spectra are in units offractional integer power (power relative to an RMS of one at ADC full-scale), whereas the Anritsuplots are in dBm. The main point of the Anritsu plots is to show that the ADC spectra containaliased power.

4The signed output of the digital noise source was converted to unsigned by inverting the most-significant bit.

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References

[1] P. Alfke. XAPP052: Efficient shift regisiters, LFSR counters, and long pseudo-random sequencegenerators (v1.1). Xilinx Application Note, 1996. (http://www.xilinx.com, xapp052.pdf).

[2] M. George and P. Alfke. XAPP210: Linear feedback shift registers in Virtex devices (v1.3).Xilinx Application Note, 2007. (http://www.xilinx.com, xapp210.pdf).

[3] S. Haykin. Communication Systems. Wiley, 3rd edition, 1994.

[4] P. Horowitz and W. Hill. The Art of Electronics. Cambridge University Press, 2nd edition,1989.

[5] D. Huangi and M. Matera. XAPP661: RocketIO Transceiver Bit-Error Rate Tester (v2.0.2).Xilinx Application Note, 2004. (http://www.xilinx.com, xapp661.pdf).

[6] A. Miller and M. Gulotta. XAPP211: PN generators using the SRL macro (v1.2). XilinxApplication Note, 2004. (http://www.xilinx.com, xapp211.pdf).

[7] R. N. Mutagi. Pseudo noise sequences for engineers. Electronics & Communications EngineeringJournal, 8(2):79–87, April 1996.

[8] J. J. O’Reilly. Series-parallel generation of m-sequences. The Radio and Electronic Engineer,45(4):171–176, April 1975.

[9] D. Riccardi and P. Novellini. XAPP884: An Attribute-Programmable PRBS Generator andChecker (v1.0). Xilinx Application Note, 2011. (http://www.xilinx.com, xapp884.pdf).

[10] T. J. Rouphael. RF and Digital Signal Processing for Software-Defined Radio: A Multi-StandardMulti-Mode Approach. Newnes, 2009.

[11] H. Tarn, K. Neilson, R. Uribe, and D. Hawke. XAPP1018: Designing Efficient Wireless DigitalUp and Down Converters Leveraging CORE Generator and System Generator (v1.0). XilinxApplication Note, 2007. (http://www.xilinx.com, xapp1018.pdf).

[12] Wikipedia. Wikipedia, the free encyclopedia, 2011.

[13] Xilinx. DS257: Linear Feedback Shift Register (v3.0). Data Sheet, 2003.(http://www.xilinx.com/, lfsr.pdf).

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http://www.xilinx.com/support/documentation/application_notes/xapp052.pdf




http://www.xilinx.com/support/documentation/application_notes/xapp884_PRBS_GeneratorChecker.pdf


http://en.wikipedia.org/wiki/

http://www.xilinx.com/

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