let’s make a computer
DESCRIPTION
Let’s make a Computer. Let’s make a CPU. Pentium. Input A. Input B. 3. 3. 2. 2. add. sub. 5. 1. Output. Arithmetic Logic Unit. ALU. Integer Execution Unit. Input A. Input B. ALU. Output. Multimedia MMX. ALU. 0. 1. 2. 3. 3. 2. 3. 2. 4. add. 5. 5. - PowerPoint PPT PresentationTRANSCRIPT
Comp 1017 Digital Technologies 1CBP 2013-14
Let’s make a Computer
Comp 1017 Digital Technologies 2CBP 2013-14
Let’s make a CPU
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Pentium
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Arithmetic Logic Unit
Input A Input B
Output
ALU Integer Execution Unit
5
3 2add 1
3 2sub
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Input A Input B
Output
ALU
ALU
Multimedia MMX
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5
3 2add
0
1
2
3
4
3
2
5
Processing Idea Nr. 1
Move data from memory
Move data into memory3.
2.
1.
Data Memory
Move data in and out of data memory
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5
3 2add
0
1
2
3
4
3
2
5
Processing Idea Nr.2
IP
(Code Memory)
mov 3 in from memorymov 2 in from memoryadd the two numbersmov the result to memory
Instruction Memory
Program
Move instructions into CPU from code memory
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Registers-1
0
1
4
6 8
6
8
AX BX
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Registers-2
0
1
4
6 8
6
8
4
AX BX
MAR
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ip
Data Memory
Instruction
Memory
0
1
4mar
Our CPU so far …
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SAM-2
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Hierarchy of Programming
2. Written in HLL (C)
3. CPU executes machine code
mov ax,[x]mov bx,[y]add ax, bxmov [w],axw = x + y ;
1. Application
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Moving data into Registers
Instruction Memory
0
1
2
mar 3
4
mov ax , [1]
85
8
76
1
BXAXmov ax , [1] mov bx , [2]mov bx , [2] 7
For example …
Comp 1017 Digital Technologies 14CBP 2004-5
Moving data into Memory
Instruction Memory
0
1
2
mar 3
4
mov [3] , ax
85
8
76
1
BXAXmov [3] , axmov [0], bx
mov [0] , bx 7
For example …
8
7
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Adding Numbers
Instruction Memory
0
1
2
mar 3
4
add ax , bx
85
76
1
BXAXAdd ax,bx
7
For example …
8
8 715
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I’ve never wrestled with
such a complex
problem beforeIt must take a lot of organization and control !
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Pentium
Organization and control
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Fetch-Execute Cycle
1. Fetch instruction from memory
2. Decode the instruction and read any registers
3. Do any ALU operations (execute units)
5. Write back results to registers
add ax , bx
4. Do any Memory Access
ALU <- ax ALU <- bx
ax + bx
(Data cache)
ax <- ALU
None needed
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add ax , bx
add ax,bx
add ax
0
1
4
3
2
bx
Fetch-Exec : State 1Instruction Fetch
8
3
7
1
9
3 1
AX BX
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0
1
4
3
2
Fetch-Exec : State 2Decode, Register Operations
8
3
7
1
9
add ax , bx
add ax,bx
add ax bx
3 1
3 1
AX BX
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0
1
4
3
2
Fetch-Exec : State 3ALU Operation
8
3
7
1
9
add ax , bx
add ax,bx
add ax bxAX BX
3 14
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0
1
4
3
2
Fetch-Exec : State 4Memory Access
8
3
7
1
9
add ax , bx
add ax,bx
add ax bxAX BX
3 14
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0
1
4
3
2
Fetch-Exec : State 5Register Write
8
3
7
1
9
add ax , bx
add ax,bx
add ax bxBX
3 14
4
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Fetch-Execute Cycle
1. Fetch instruction from memory
2. Decode the instruction and read any registers
3. Do any ALU operations (execute units)
5. Write back results to registers
(Organization and Control)
mov ax , [1]
4. Do any Memory Access
Read the ‘1’
Put ‘1’ into MAR
Data into ax
Read memory at addr ‘1’
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mov ax , [1]
mov ax , [1]mov ax
0
1
4
3
2
1
Fetch-Exec : State 1Instruction Fetch
8
3
7
1
9
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mov ax , [1]
mov ax , [1]mov ax
0
1
4
3
2
1
Fetch-Exec : State 2Decode, Register Operations
8
3
7
1
9
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mov ax , [1]
mov ax , [1]mov ax
0
1
4
3
2
1
Fetch-Exec : State 3ALU Operation
1
8
3
7
1
9
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mov ax , [1]
mov ax , [1]mov ax
0
1
4
3
2
1
Fetch-Exec : State 4Memory Access
1
8
3
7
1
9
8
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mov ax , [1]
mov ax , [1]mov ax
0
1
4
3
2
1
Fetch-Exec : State 5Register Write
1
8
3
7
1
9
88
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Pentium
5
12
3
4
1. Fetch2. Decode3. ALU4. Mem Ops5. Reg Write