January 17, 2017 1

Fault Tolerant ComputingCS 530

Lecture Notes 2

Digital Systems: overview

Yashwant K. Malaiya

Colorado State University

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Digital Systems: overview

• Building blocks

• Combinational design & analysis

• Untestable faults

– some faults are untestable due to redundancy

• Storage elements

• Finite state machines: sequential circuits

• Testing a block

– How can a combinational of sequancial block be

exercised to test for potential faults?

This is largely a review, but there are some new concepts in it.

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Digital Systems: Overview

•Building block hierarchy

–Subsystems (processors etc)

–Combinational blocks, registers

–Gates, storage elements

–Switches (transistors)

•Blocks can be

–Combinational (no memory)

–Sequential (with states)

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Combinational Blocks

• Boolean functions without storage capability

Truth table

Karnaugh maps

(minimization)

Algebraic description

Circuit diagram

(implementation)

designanalysis

If you have not seek Karnaugh maps before, you

can find it in a textbook or on the web.

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Combinational Example

x1 x2 x3 f

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 1

1 0 1 0

1 1 0 1

1 1 1 0

00 01 11 10

0 0 0 1 11 1 0 0 1

x2x3

x1

x3

x2

Implementation A

F=x1’x2 + x1x3’

Implementation B

F=x1’x2 + x1x3’ + x2x3’

X1’

x2

x1

X3’

X1’

X3’

x2

X3’

x2

x1

f

f

xStuck-at-0

untestable

redundantNote that the x2x3’ term is redundant.

Here a prime indicates complement. A stuck-at-0 fault makes the line always stay at 0

regardless of what it is supposed to be.

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Special Considerations

• In a redundant design, a fault may be

undetectable.

• Undetectable faults are a major problem in

testing.

Fan-out

Reconvergent

fan-out

in software

also

Reconvergent fan-out can lead to

problen in testing, as we will see

later.

Fan-out: one output feeding multiple inputs.

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Storage Elements

• Synchronized by clock or write signals

• Construction: static (flip-flop), dynamic

(capacitative, need refreshing)

• Functional: single input (D-type), double input

• Timing: rising or falling edge triggered

Pulse type etc

• Significant instants:

– when input is sampled

– when outputs are influenced

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Ex: Rising Edge D flipflop

Q’

Q

C

D

Qt D Qt+1

0 0 0

0 1 1

1 0 0

1 1 1

clock

D

Q

Stores 1

Samples on rising edge

Output influenced soon after

During sampling

input must remain

stable

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Sequential Circuits

are Finite State Machines(FSMs)

• Next state = N(state,input)

• Output = Z(state,input)

::

::

outputinput

state

Comb

ckt

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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FSM Description

0 1

1 2,1 3,0

2 2,1 4,0

3 1,0 4,0

4 3,1 3,0

Input x

state 4

31

2

1/0

0/1

1/0

0/1

0/0

0/1,1/0

1/0

input 0 1 0

state 1 2 4

output 1 0 1

given

Entries: N,Z

Format:

x/z

Based on FSM state table

(or state diagram)

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Digital System with functional blocks

• Ex: a microprocessor

Blocks are

• Paths– Signals, buses, nets

• Combinationals– Random logic, PLA, ROM

• Sequential– Flipflps, registers, memory arrays

– Finite state machines (control part)

• System design objectives– functionality, reliability, peformence

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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Exercising a block

• Combinational blocks: a test-vector (or pattern)

applied at a time for testing.

– Exception: when testing for delay faults

• Sequential: a test-sequence (a sequence iof input

vectors) at a time with proper initialization.

January 17, 2017 Fault Tolerant Computing©Y.K. Malaiya

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References

• See any Logic Design text-book for combinational and sequential circuits and Karnaugh Maps. For

example: Computer System Architecture by Morris Mano.

• Karnaugh Maps: http://www.cs.usm.maine.edu/~welty/karnaugh.htm

• Design for Testability in Digital Integrated circuits, Bob Strunz, Colin Flanagan, Tim Hall, Article,

locally available at http://www.cs.colostate.edu/~cs530/digital_testing.pdf