Lecture 1

Assembly Language Programming

Presented ByDr. Rajesh Palit

Asst. Professor, EECS, NSUOriginally Prepared By

Dr. Shazzad Hosain, EECS, NSU

What is Microcomputer?

Basic Blocks of a microcomputer

BUS Interface Unit

Execution UnitControl Unit

Interface Circuitry

Central Processing Unit

Von-Neumann Concept/Model

Von-Neumann cycle• The Von-Neumann concept is the basic concept for

universal microprocessors. The ix86 architecture is based on that concept.

• It means a stored-program computer in which an instruction fetch and a data operation cannot occur at the same time because they share a common bus.

• It comprises a Control unit, an Execution unit, Memory, I/O unit

• Instructions are treated in 5 cycles – (1) Fetch, (2) Decode, (3) Fetch Operands, (4) Execute, and (5) Update instruction Counter

Simplified Block Diagram of CPU

Registers• General Purpose Registers– AX, BX, CX, DX– Base Pointer (BP), Stack Pointer (SP)– Source Index (SI), Destination Index (DI)

• Segment Registers– Code Segment (CS), Data Segment (DS), Stack

Segment (SS), Extra Segment (ES)• Status Flag Register (FLAGs)• Instruction Pointer (IP)

Registers

16 bit Segment registers

Decimal, Binary and Hexadecimal Numbers

• 23910= 11 1101 01112 = 3D716 • 239d = 1111010111b = 3D7h (d,b,h upper or

lower case)• If no suffix is given, decimal is assumed• If a hexadecimal starts with a letter, an extra

zero must be put in the beginning• Signed Numbers – 2’s complements form

Example Data

• If AX = 20A2H then AH = 20H, AL = A2H• In other words, if AH = 1CH and AL = A2H then AX = 1CA2H

0010 0000 1010 0010

AH AL

AX

The FLAGS register• FLAGS indicate the condition of the MP• Also control the operations• FLAGS are upward compatible from 8086/8088

to Pentium/Pentium Pro

Figure 2.2: The EFLAG and FLAG registers

The FLAGs

• Carry Flag – C – C = 1 if there is a carry out from the msb on addition– Or, there is a borrow into the msb on subtraction– Otherwise C = 0– C flag is also affected by shift and rotate instructions

1010101011101010

111010100 C = 1, in this case

The FLAGs

• Parity Flag – P – P = 1 for even parity, if number contains even

number of ones– P = 0 for odd parity, if odd number of ones

10101010 10101011

P = 1 P = 0Even number of ones Odd number of ones

Definition changes from microprocessor to microprocessor

The FLAGs

• Zero Flag – Z– Z = 1 for zero result– Z = 0 for non-zero result

• Sign Flag – S– S = 1 if MSB of a result is 1, means negative number– S = 0 if MSB of a result is 0, means positive number

The FLAGs

• Trap Flag – T– Enables trapping through an on-chip debugging feature– T = 1 MP interrupts the flow of a program, i.e. debug mode is

enabled– T = 0 debug mode is disabled

• Direction Flag – D– Selects increment/decrement mode of SI and/or DI registers

during string instructions– D = 1, decrement mode, STD (set direction) instruction used– D = 0, increment mode, CLD (clear direction) instruction used

The FLAGs

• Overflow Flag – O– O = 1 if signed overflow occurred– O = 0 otherwise– Overflow is associated with the fact of range of

numbers represented in a computer• 8 bit unsigned number range (0 to 255)• 8 bit signed number range (-128 to 127)• 16 bit unsigned number range (0 to 65535)• 16 bit signed number range (-32768 to 32767)

Signed vs. Unsigned Overflow

• Let, AX = FFFFh, BX = 0001h and execute • ADD AX, BX

1111 1111 1111 1111+ 0000 0000 0000 00011 0000 0000 0000 0000

AXBX

• Unsigned interpretation– Correct answer is 10000h = 65536– But this is out of range.– 1 is carried out of MSB, AX = 0000h, which is wrong– Unsigned overflow occurred

• Signed interpretation– FFFFh = -1, 0001h = 1, summation is -1+1 = 0– Signed overflow did not occur

How instructions affect the flags?

• Every time the processor executes a instruction, the flags are altered to reflect the result

• Let us take the following flags and instructions

• Sign Flag – S• Parity Flag – P• Zero Flag – Z• Carry Flag – C

• MOV/XCHG• ADD/SUB• INC/DEC• NEG

NoneAllAll except CAll (C = 1 unless result is 0, O = 1,

80H, or 8000H)

Example 1

• Let AX = FFFFh, BX = FFFFh and execute ADD AX, BX FFFFh+ FFFFh1 FFFEh

The result stored in AX is FFFEh = 1111 1111 1111 1110

SPZC

= 1 because the MSB is 1= 0 because the are 15 of 1 bits, odd parity= 0 because the result is non-zero= 1 because there is a carry out of the MSB on addition

Example 2

• Let AX = 8000h, BX = 0001h and execute SUB AX, BX 8000h- 0001h 7FFFh

The result stored in AX is 7FFFh = 0111 1111 1111 1111

SPZC

= 0 because the MSB is 0= 0 because the are 15 of 1 bits, odd parity= 0 because the result is non-zero= 0 because there is no carry

Title Example

.model small

.data

list db 10,17,11,25,13 large db 0 count db 5

.code main proc mov ax, @data mov ds, ax mov al, 5 call fact

An Assembly Program mov ax,4C00h int 21h main endp

fact proc push bx mov bl, al mov ax, 1 again: mul bl dec bl jnz again pop bx ret fact endp

end main

An Assembly Program#include <stdio.h>int main (void){ int i, j ; ********* // comment *********}

Example 3-5 of Barry B. Brey’s book

An Assembly Program Cont.

• What is the content of BX?

00h 10hAX

AH AL

10h 00h 00h 00h AAh AAhDATA1 DATA2 DATA3 DATA4

AAh AAhBX

BH BL

Assembly Language Structure

An Assembly Program

• SMALL model allows one data segment and one code segment

• TINY model directs the assembler to assemble the program into a single segment

• DB for Define Byte (one single byte)• DW for Define Word (two consecutive bytes)

10h 00h 00h 00h AAh AAhDATA1 DATA2 DATA3 DATA4

Another Example

References

• Ch 6, Digital Logic and Microcomputer Design – by M. Rafiquzzaman

• Ch 2, Intel Microprocessors – by Brey• Ch 5, Assembly Language Programming – by

Charles Marut