lect5_blg231e_2013_03_21
DESCRIPTION
LectueTRANSCRIPT
Digital Circuits
BLG231E
Instructor: Dr. Fuat Kucuk
1 BLG231E DIGITAL CIRCUITS by Fuat Kucuk
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These lecture notes have been prepared on the basis of the course reference book.
Five variable map
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A five-variable map requires 32 squares. The more variable the more complex map that we handle.
5 variable map can be assumed to be formed by two four-variable map so that we can apply the same procedure.
Let us assume A,B,C,D,E are the variables. For the minterms from 0 to 15 (first table), A is 0 and for minterms from 16 to 31, A is 1 (second table).
00 01 11 10
00 0 1 3 2
01 4 5 7 6
11 12 13 15 14
10 8 9 11 10
BC
DE
00 01 11 10
00 16 17 19 18
01 20 21 23 22
11 28 29 31 30
10 24 25 27 26
BC
DE
A=0 A=1
00 01 11 10
00
01 1 1
11 1 1
10 1
00 01 11 10
00 1 1
01 1 1
11 1
10 1
Example: Five variable K-map
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Simplify the Boolean function F(A, B, C, D, E) = (0, 2, 4, 6, 9, 13, 21, 23, 25, 29, 31)
BC
DE
BC
DE
A=0 A=1
A'B'E' ACE
A'BD'E ABD'E
F=A'B'E'+BD'E+ACE
Don’t Care Conditions
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In practice, there are applications where the function is not specified for certain combinations of the input variables. For example, in a 4-bit BCD code, the outputs are unspecified for the input combinations between 1010-1111.
Functions that have unspecified outputs for some input combinations are incompletely specified functions.
The unspecified minterms of a function are called the don’t-care conditions, or simply the don’t-cares, and often denoted as Xs.
These don’t-care conditions can be used on a map to provide further simplification of the Boolean expression.
Each X can be assigned an arbitrary value, 0 or 1, to help the simplification procedure.
Example: Don’t cares
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Simplify the Boolean function f ( w , x, y , z )= (1 , 3, 7, 11 , 15) that has the don’t-care conditions d (w ,x, y , z )= (0 , 2, 5) .
Example: Don’t cares
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Either one of the above expressions satisfies the conditions stated.
Note that the above 2 expressions represent 2 functions that are algebraically unequal: each covers different don’t-care terms.
We may or may not include any of the Xs, while all the 1s must be included.
It is also possible to obtain a simplified POS expression using the don’t-cares. Taking the required Xs with 0’s, we can write the complement
Taking the complent of F again by De Morgan rule
Because we include don’t care minterms 0 ad 2 with the 0’s and 5 with 1’s
F(w, x, y, z) = z(w' + y) = (1,3,5,7,11, 15)
F'=z'+wy'
F=z(w '+y)
Tabulation (Quine-McCluskey) Method
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The map method is not convenient when the number of variables exceeds 5. That is because the visualization of the adjacency becomes more and more complicated.
The tabulation method is a systematic process that promises to result a simplified standard-form of a function.
It can be applied to functions with any number of variables and is suitable for machine computation because of having algorithmic process.
The tabulation method was first formulated by Quine (1952) and later improved by McCluskey (1956), thus it is also known as the Quine-McCluskey method.
Tabulation (Quine-McCluskey) Method
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The simplification steps in this method is as follows:
1. List the minterms with their BCD values.
2. Group minterms according to the number of 1s they contain.
3. Combine any 2 minterms that differ from each other by exactly one variable.
4. Remove the unmatched variable. Try this for all possible pairs of minterms.
5. Place a mark to the right of minterms if they have been used in a match.
6. Repeat the process until no further groups are formed.
7. The sum of unmarked terms results the simplified form of the function. If any terms may appear twice, cancel one of them.
Example: K-map and Table methods
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Simplify the Boolean function F(w,x, y, z) = (0, 1, 2, 8, 10, 11, 14, 15) with a) map (K-map) b) table (Quine-McCluskey) methods.
00 01 11 10
00 1 1 1
01
11 1 1
10 1 1 1
wx
yz
wy
w'x'y'
F= x'z'+wy+w'x'y'
x'z'
a) map (K-map) metod
Example: K-map and Table methods
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b) table (Quine-McCluskey)
F= x'z'+wy+w'x'y'
w'x'y'
x'z'
wy
Example: Table methods for five variables
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Simplify the Boolean function F(A, B, C, D, E) = (0, 2, 4, 6, 9, 13, 21, 23, 25, 29, 31) with table method. (it was previously simplified by K-map method.)
Decimal indices
Grouped BCDs
Matched indices
Matched indices
0 00000 0,2 0000 0,2,4,6 000 0,4 0000 0,4,2,6 000
2 00010 4 00100 2,6 0010 9,13,25,29 101
4,6 0010 9,25,13,29 101 6 00110 9 01001 9,13 0101 21,23,29,31 111
9,25 1001 21,29,23,31 111 13 01101 21 10101 13,29 1101 25 11001 21,23 1011
21,29 1101 23 10111 25,29 1101 29 11101
23,31 1111 31 11111 29,31 1111
A'B'E'
BD'E
ACE
F=A'B'E'+BD'E+ACE
NAND and NOR implementation
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Digital circuits are often built with NAND or NOR gates instead of using AND and OR gates.
NAND and NOR gates are easier to fabricate with electronic components and are the basic gates used in all digital logic families.
Therefore, rules and procedures have been developed for the implementation of Boolean functions given in terms of AND, OR, and NOT with equivalent NAND and NOR logic diagrams.
NAND implementation
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Inverter x x'
xy x
y
x
y
(x'y')'=x+y
AND
OR
Two graphic symbol for NAND gate
Two-level NAND Implementation
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The implementation of Boolean functions with NAND gates requires that the function be in sum of products form.
The function is implemented with AND and OR gates.
the AND gates are replaced by NAND gates and the OR gate is replaced by an NAND gate with an OR-invert graph symbol.
the output NAND gate is redrawn with the AND-invert graph symbol F = ((AB)'(CD)')'
Three Ways to Implement of F = AB + CD
Procedure for two level NAND implementation
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1. Simplify the function and express it in sum of products.
2. Draw a NAND gate for each product term of the expression that has at least two literals. The inputs to each NAND gate are the literals of the term. This constitutes a group of first- level gates.
3. Draw a single gate using the AND-invert or the invert-OR graphic symbol in the second level, with inputs coming from outputs of first level gates.
4. A term with a single literal requires an inverter in the first level. However, if the single literal is complemented, it can be connected directly to an input of the second level NAND gate.
Example: NAND implementation
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Implement the following Boolean function with NAND gates: F(x,y,z) = (1,2,3,4,5,7) Solution:
F = xy' + x'y + z =[ (xy')'(x'y)'z']'
1.
Example: NAND implementation
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2. x
y'
x'
y
z
3-4. x
y'
x'
y
z'
General Procedure of Multi level NAND implementation
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1. Convert all AND gates to NAND gates with AND-invert graphic symbols.
2. Convert all OR gates to NAND gates with invert-OR graphic symbols.
3. Check all the bubbles in the diagram. For every bubble that is not compensated by another small circle along the same line, insert an inverter (one-input NAND gate) or complement the input literal.
Example: Multi level implementation with NANDs
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Example: Multi level implementation with NANDs
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NOR gate implementation
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Logic Operations with NOR Gates
Inverter x x'
x+y
(x'+y')'=xy
OR
AND
Two grahic symbols for NOR Gate
NOR gate implementation
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The NOR operation is the dual of the NAND operation.
A two-level implementation with NOR gates requires that the function be simplified in product of sums. Remember that the simplified product of sums expression is obtained from the map by combining the 0's and complementing.
The procedure for converting a multilevel AND-OR diagram to an all NOR diagram is similar to the one presented for NAND gates.
For the NOR case, we must convert each OR gate to an OR- invert symbol and each AND gate to an invert-AND symbol. Any bubble that is not compensated by another bubble along the same line needs an inverter or the complementation of the input literal.
NOR gate implementation
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Implementing F =(AB' + A'B)(C + D') with NOR Gates
Implementing F =(A + B)(C + D)E with NOR Gates
Example:Possible two level implementations
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Example:Possible two level implementations
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