lec-multipliers [compatibility mode]

7/31/2019 Lec-multipliers [Compatibility Mode]

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Adv Digital

Design

By Dr. Shoab Ahmed Khan.

Fall 2002

En ineerin Education Trust

Center for Advanced Studies in Engineering

algorithm to architecture mapping


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SequentialandArrayMultipliers

2


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UsedinmanyDSPapplications

Vector

product,

matrix

multiplication Convolution

Filterin ta dela linefilter ada tivefilter FIR IIR ..

At

least

one

good

reason

for

studying

multiplication

and

operationsandhencethereisaninfinitenumberofPhDs (orexpensivepaidvisitstoconferencesinUSA)tobewonfrom

AlanClements

ThePrinciplesofComputerHardware,1986

Adv. Digital Design By Dr. Shoab A.Khan

3


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4


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Multiplier Basicideaisprettysimple,multiplyingA,andBtwoNbits

numbers

Done

by

generating

N

number

of

partial

products,

and

adding

them

together:

Rowofdotsisapartialproduct:

ResultofmultiplyingAbyone

bitofB(Aisthemultiplicand)

Resultis

a2N

bit

product

ForintegeroperationswantLSBNbits,

ForFractional(Qn.m)wantMSBNbits,

Qn1.m1xQn2.m2

5

Adv. Digital Design By Dr. Shoab A. Khan


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Unsigned MultiplyUnsigned Multiply

=

a3b0 a2b0 a1b0 a0b0

a3b3

a2 a1 a0b2 b1 b0

a3b1 a2b1 a1b1 a0b1

a3b2 a2b2 a1b2 a0b2

a3b3 a2b3 a1b3 a0b3

p0p1p2p3p4p5p6p7

0 1 0 1 6

0 0 0 0

0 1 0 1

0 1 0 1

0 0 0 0


6

0 0 0 1 1 1 1 0 30


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7


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Amulti liercanbeim lementedusin a

repeated

shift

and

add

algorithm Thenumbertoberepeatedlyshiftedandadded

Thenumberoftimesitisshiftedandadded

TakesNcycles,andgeneratesandaddsonepartialproducteachcycles:

Theresultistheproduct


8


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Unsignedshiftaddmultiplier(design1)

64bitMultiplicandreg, 64bitALU,

64bitProductreg, 32bitmultiplierreg

9


Multiplier = datapath + control


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Unsignedshiftaddmultiplier(version

1)


10


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1/2bits

in

multiplicand

always

0

a er swas e

0sinserted

in

left

of

multiplicand

as

shifted

leastsignificantbitsofproductneverchangedonceformed

Insteadof

shifting

multiplicand

to

left,

shift roducttori ht?


11


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MULTIPLYHARDWARE(Design2)32bitMultiplicandreg,32 bitALU,

64bitProductreg,32bitMultiplierreg

12



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Partial Product is accumulated and


13

s e r g a eac s ep


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matchessize

of

multiplier

om ne u p erreg s eran

Productregister


14


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Design332bitMultiplicandreg,32 bitALU,64bitProductreg,(0bitMultiplierreg)

15



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Prodshift_reg

muxn-bit

Adder

0 0

Shift_regA

1


16


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17


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Applydefinitionof2scomplement

Needtosignextendpartialproducts

BoothsAlgorithmiselegantwayto

multiplysigned

numbers


18


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Signed MultiplierSigned Multiplier

Signbit

extension

-

0 0 1 0 1 1 0 0 +44

0 0 0 0 0 0 0 00 0 0 0 0 0 0 0

0 0 0 0 0 00 0 0 0 0 0 0 0 0

1 1 1 11 1 1 1 0 1 0 0 1 1

1 1 1 1 11 1 0 1 0 0 1 1

0 0 0 00 0 0 0 0 0 0 0

-

0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0


19


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Example: Signed by SignedExample: Signed by Signed

In case the multiplier is a negative number, while calculating the lastpartial product i.e. multiplying the multiplicand with the MSB bit,which has negative weight, the 2s complement of the multiplicand,s use as e par a pro uc

20



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21


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ParallelMultipliers


22


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X Y ZX = 0 0 1 0 1 1

n n nY = 0 1 0 1 0 1

Z = 1 1 1 1 0 1+

n+1 n+1

C = 0 1 1 1 0 1

C S


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Digitalmultiplicationflow N

bit

inputs

operands

(N

=4)

PartialProductArrayGeneration =Ns e narynum ers

=reductionto2binarynumbers Final

addition

=2nbitfinalproduct


24


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MultiplicationMultiplier

Formation of PartialProducts

Addition of PartialProducts

(Reduction)

Final Addition Stage

ro uct


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Partialproductgenerationfor6bitby6bitmultiplication

multiplier multiplicand

ppij

columns to be added


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PartialProductGeneration Use

an

array

of

AND

gates

to

produce

partial

products

in

parallel


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define WIDTH = 6

module multiplier (a, b, prod);input [WIDTH-1:0] a,b;ou pu - : pro ;

- -always@(a or b)

for(i=0; i


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Level n

Level ( n+1) sum

carry

sum

carry

(Full Adder) (Half Adder) No action

Partial product

reduction


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Three dots are shown Each symbolizes a partial product s ng re uces ese o wo s

One has the weight of 20(sum)

This type of reduction is known as 3 to 2

reduction or carr saves reduction The two dots are reduced to 2 using a HA


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DualCarry

Save

Reduction

Scheme

Wa aceTreeRe uctionSc eme

DaddaTree

Reduction

Scheme


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12x12Carry

Save

Reduction

Scheme


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HA FA FA FA FA FA HA P0Level 1




PC PS PC PS PC PS PC PS PC PS PC PS PC PS10 9 9 8 8 7 7 6 6 5 5 4 4 3 Free product bits

Carry Save Array


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,

partialproducts

are

divided

into

2equal

size

Thecarrysavereductionschemeisappliedon

Thisresultsintotwopartialproductlayersin

eac

group


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architecture

logtimearraymultiplier

T enum ero a er eve sincreaseslogarithmicallyasthepartialproductrows

ncrease


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Groupingthepartialproductsintogroupsofthreecarriesoutthereduction

Unlikelinear

time

arrays,

these

partial

product

groups

are

technique

Each partial product row spits out two rows

ese rows en, w o er rows rom o er par a pro ucgroups, form a reduced matrix

This process continues until only two rows are left

At this stage, no further reduction is done The final rows are added together for the final product


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AdderLevelsinWallaceTreeReductionScheme


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6x6 Wallacetree


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SignedMultiplication:

Rememberfor2scomplementnumbersMSBhasnegative

weight:1

2

ni

N

1

0

=

n

i

i

ex: 6=110102 =020 +121 +022 +123 124


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Applydefinitionof2scomplement

Needtosignextendppandsubtract


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SXXXXXXXXXX

SXXXXXXXXXX

000000XXXXXXXXXX

00000XXXXXXXXXX

SXXXXXXXXXX

SXXXXXXXXXX

SXXXXXXXXXX

0000XXXXXXXXXX

000XXXXXXXXXX

00XXXXXXXXXXIF S=0

SXXXXXXXXXX 0XXXXXXXXXX

11111XXXXXXXXXX

1111XXXXXXXXXXIF S=1

11XXXXXXXXXX

1XXXXXXXXXX

= gn

S = 0 : Positive

S = 1 : Negative


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1111111

111111SXXXXXXXXXX

111111

11111

11111SXXXXXXXXXX

1111SXXXXXXXXXX111SXXXXXXXXXX

1111

11111

1SXXXXXXXXXX

SXXXXXXXXXX

1000001Sign extensioncorrection vector

S X X X X X X X X X X



S X X X X X X X X X XS X X X X X X X X X X



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Example: Singed x signed


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Example: Singed x signed

_


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7=111=81=1001

31=11111=321

Or 100001=321=31

In string of 1s, replace the least significant 1 with1 and represent it with a bar on 1

ep ace res o e s n e s r ng w s

Replace 0 of the end of string with a 1

Keep repeating this operation with all the strings

of 1s in binary representation of the number


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0 0 1 1 1 1 0 1 1 0 1 1 1 1 0 1 1 1 0 1

0 0 1 1 1 1 0 1 1 0 1 1 1 1 1 0 0 1 0 1String

0 0 1 1 1 1 0 1 1 1 0 0 0 0 1 0 0 1 0 1String

String

0 0 1 1 1 1 1 0 0 1 0 0 0 0 1 0 0 1 0 1

0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 1 0 1String

Hence the number of 1(s) has reduced from 14 to 6. Both have thesame va ue.


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Boothrecodingmakesuseofthe

stringproperty.


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generationof

partial

products

TwoWaysofSpeedUp

acceleratetheaccumulation

Partialproductreductiontechnique

re uce

t e

num er

o

part a

pro ucts modifiedBoothrecoding


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Radix2 partialproduct=(multiplicant)x{0,1}

Radix4 =

x

x

++


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We have a 3 which is difficult to be handled

Simpleshifting

cant

be

performed

to

handle

it

Numbersarerequiredto beinthisform

,

,

,

,

Becauseifweget3,itmeans2+1hence


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The modified Booth recodin al orithm ex loits the strinproperty

This technique reduces number ofpps into half

Partitioning the multipliers in groups of two and generatingone row of pp for each group to achieve this reduction

along with the higher order bit of the previous pair

For the first pair a zero is appended at left

As the string property is applied on three bits, there areeight possibilities:


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21 20

0 0 0: nostring.Thegroupiscodedwitha0.

0 1 0: startandendofastringatbit0,codedas21 20 =+1.0 1 1: anendofstringatbitlocation0,codedas21=+21 0 0: astartofastringatbitlocation1;codedas 21= 2

at

high

bit

location

of

the

previous

pair,

21 + 20=

1

BoothRecodingTable


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ns ea o mu p y ngw as ng e

Wemultiply

with

two

bits

hence

makingthepartialproductshalfinNo.


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A= 1 0 1 0 1 1 0 1

B= 1 0 1 0 1 1 0 1

For these two bits Booths algorithm restricts thevalue to be (-2, -1, 0, +1,+2)

+2 means Shift left A by one

+1 means Copy A in the answer

-1 means 2s complement and then copy

-2 means 2s complement and then shift left


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10 1

011 0

1 0

Use

the

MSB

of

the

previous

group

to

check

forthestringpropertyonthepair,use0for

thefirstpair


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,are following eight possibilities:

21=2 20=1

0 0 1 1

0 1 1 2

-

1 0 1 -1

-

1 1 1 0


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1 0 1 0 1 1 0 1

1 0 0 0 1 1 0 10

100 001 110 010

- 2 +1 -1 1

reduced from 8 to 4 in number


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1 0 1 1 0 1

-2 +1 -1 1

1 1 1 1 1 1 1 1 0 1 1 0 1

1 1 1 1 0 1 1 0 1

0 1 0 0 1 10 0 1 1 1 1 0 0 0 1 0 0 1

BoothRecoder


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BR00b0b1

5:1

a0

2a-

-a

PartialProductBR1

b2b

2a

5:1

a

0

2-a

Reduction

Tree

a-2a

5:1

a0

-24b5

2a-2a

a

a0

BR3b6b75:1

2a-2a

-

a

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