lab exercises - diacri tech
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Digital Modulation Techniques II 2.79
Lab Exercises
Exercise 1 Objective
! Study the generation of differential binary signal. ! Study the differential PSK modulation. ! Study the differential PSK demodulation.
Theory Carrier and Bit Clock Generator IC8038 is a basic waveform generator that generates sine, square, and triangular waveforms. The sine wave generated by the IC8038 is used as carrier signal to the system. The square wave generated by IC8038 is at the 612V level. So this is converted into a +5V signal with the help of a transistor and diode. Figure 2.67 shows a carrier and bit clock generator.
Figure 2.67: Carrier and Bit Clock Generator
Lab Exercises
2.80 Digital Modulation Techniques II
Data Generator The square wave is used as a clock input to a decade counter (IC7490), which generates the modulating data outputs. Figure 2.68 shows a data generator.
1
12
11
9
8
14
2
3
6
7
5 1KΩ 1KΩ 1KΩ 1KΩ
Dat
a ou
tput
7490
+5 VB
it cl
ock
inpu
t
Figure 2.68: Data Generator
Modulation The differential signal to the modulating signal is generated using an EX-OR gate and a 1-bit delay circuit. CD4051 is an analog multiplier to which the carrier is applied, with and without the 1808 phase shift (created by using an op-amp connected in inverting amplifier mode) to the two inputs of the ICTL084. A differential signal generated by EX-OR gate (IC7486) is given to the multiplexers control signal input. Depending on the level of the control signal, a carrier signal applied with or without PSK is steered to the output. 1-bit delay generation of differential signal to the input is created by using a d-flip flop (IC7474).
Digital Modulation Techniques II 2.81
Figure 2.69 shows a DPSK modulator.
3
52
3
D-Flip Flop Diffdata
2
1
65
4 11
13
+5 V +5 V
16 73
14CD
4051
DPSKoutput
47K Ω
47K Ω
Bitclock
Carrierinput
Figure 2.69: DPSK Modulator
Demodulation During demodulation, the DPSK signal is converted into a +5V square wave signal using a transistor and is applied to one input of an EX-OR gate .To the second input of the gate, carrier signal is applied after conversion into a +5V signal. So the EX-OR gate output is equivalent to the differential signal of the modulating data. This differential data is applied to one input of an EX-OR gate and so for the second input, after a 1-bit delay, the same signal is given. The output of this EX-OR gate is a modulating signal.
Lab Exercises
2.82 Digital Modulation Techniques II
Figure 2.70 shows a DPSK demodulator.
+5 V
DSPKinput
1K Ω
100K Ω
OA79
1K Ω
+5 V
BC
107
10
9 8
10K Ω 10K Ω
472 pf BC
107
+5 V
1K Ω+5 V
1K Ω
BC
107
Dem
odul
ated
outp
ut
10K
Ω
1K Ω
BC
107
12
13 11
1K Ω 10K Ω9
12
11
+5 V
BC
107100K Ω
OA79Carrierinput
Figure 2.70: DPSK Demodulator
Problem Statement Study differential PSK modulation and demodulation.
Lab Setup ! Oscilloscope ! Probes and connecting wires
DPSK Parts-S. No. Part Description
1 IC7490
2 IC8038
3 CD4051
4 IC7486
5 BC107/ 2N3242 pnp transistors
6 OA79 diodes*
Digital Modulation Techniques II 2.67
The QAM demodulator diagram is shown in Figure 2.59. Even though there are 8 reference signals, there are only 2 basis functions. As a result, only 2 correlators are required for demodulation.
Figure 2.59: QAM Demodulator
If the cosine correlator output is represented as 1r and the sine correlator output is
represented as 2 ,r then, il is defined as: 2 21 1 2 2( ) ( )i i il r a r a= − + −
Where, i = 1, 2, , M
The different il are calculated, and the set of 1ia and 2ia for which the minimum of
il occurs is taken as the waveform that is transmitted over that symbol period.
Digital Modulation Techniques II 2.47
waveform associated with this correlator is the one present in the symbol period, and the bit pattern associated with that waveform is detected. Figure 2.41 shows a coherent demodulator for 4-FSK.
Receivedsignal
si (t)
Comparator
Chose the reference
with maximum magnitude
Integrator
Carrier 1T
Cor 4
Integrator
Carrier 2T
Cor 3
Integrator
Carrier 3T
Cor 2
Integrator
Carrier 4T
Cor 1
X
X
X
X
Figure 2.41: 4-FSK Demodulator
The product signal and the correlator output for the first correlator are shown in figures 2.42(a) and 2.42(b), respectively. It can be observed from the product signal that the signal is matched in the fourth symbol period for which the product signal is positive. This indicates high correlation and is observed in the correlator output where the highest magnitude is observed in the fourth symbol period. Similarly, for the second carrier-product signal, shown in figures 2.42(c) and (d), positive correlation is observed during the second symbol duration. This is also observed in the corresponding correlator output, which shows a peak in the second symbol duration. The subsequent figures 2.42(e) through 2.42(h) show high correlation in the third and fourth symbol durations.
Digital Modulation Techniques II 2.57
Using this set of basis functions, the QPSK modulator can be realized, as shown in Figure 2.47.
Figure 2.47: QPSK Modulator Using 2 Basis Functions
The QPSK output for a sample sequence of 10011100 is shown in figures 2.48(a) and (b). The phase changes at the symbol transitions are observed.
(a)
Digital Modulation Techniques II 2.23
Matched Filter Receiver Demodulation The coherent demodulator using a matched filter, which is equivalent to the single correlator receiver, is shown in Figure 2.18. Because this is coherent demodulation, the initial phases of the two carriers in modulation are same. Consequently, a single matched filter whose impulse response is matched to the difference between the two carrier waveforms is sufficient.
Figure 2.18: Coherent Matched Filter FSK Demodulator
However, for non-coherent demodulation, two matched filters are required, as shown in Figure 2.19. This is equivalent to the non-coherent correlator receiver with four correlators and squarers shown in Figure 3.13 of Electronic Communication Systems II.
Figure 2.19: Non-Coherent Matched Filter FSK Demodulator
The FSK modulated output shown in Figure 2.11(b) is given as input to the non-coherent matched filter FSK demodulator. The space matched filter output is shown in Figure 2.20(a), where the matched filter output at the decision sampling instants is high for space bits and zero for mark bits.
Satellite Communication System Design 10.3
10.1 Introduction It is essential for you to know more about the aperture efficiency, power-flux density, topocentric angle, and frequency reuse in a satellite communication system before learning details of different parameters of the satellite communication system. These parameters will help you to understand the basics of the satellite communication system.
10.1.1 Aperture Efficiency
Examine the utilization of the physical and the effective area of an antenna.
The most commonly used antenna for satellite communication is the paraboloidal reflector antenna, which consists of a primary antenna situated at the focal point of a paraboloidal reflector. Figure 10.1 shows a parabolic reflector, a parabola, and radiation from the paraboloidal reflector and primary radiator.
(a) (b)
10.4 Satellite Communication System Design
Ray of primary radiator back lobe
Par
alle
l bea
m
Spillover (c)
Figure 10.1: a) Parabolic Reflector b) Parabola c) Radiation from the Paraboloidal Reflector and Primary Radiator
The physical aperture or mouth of the reflector is circular. The reflector contour, when directed to any plane containing the focal point F and the vertex V, forms a parabola. The path length for the curve in Figure 10.1(b) is 1 1 2 2.FA B FA B= The reflector can focus parallel rays onto the focal point, and it can produce a parallel beam from radiation emanating from this focal point. An isotropic point source is situated at the focal point. The rays are not captured by the reflector constitute spillover.
The isotropic point source, also known as the omni-directional source, is the source that radiates in all directions.
On the receiver side, spillover increases noise pickup, which can be particularly troublesome in satellite ground stations.
Satellite Communication System Design 10.11
A polarization mismatch factor P is used to describe the coupling between polarizations. P = 1 when the two polarizations are the same. P = 0 when the two polarizations are orthogonal. A polarization ellipse is shown in Figure 10.5.
ξ
ξx
ξy
Ex
Ey
x
y
γ
Figure 10.5: Polarization Ellipse
Let 1r and 2r be the axial ratios. For two general polarization ellipses, P is given by:
2 2 21 2 1 2 1 2
2 21 2
4 (1 )(1 )cos ( )1( )2 2(1 )(1 )
r r r rPr r
γ γ± + − − −± = +
+ +
2 2 2 21 2 2 2 1 2
2 22 2
( ) (1 )(1 )cos ( )(1 )(1 )
r r r rr r
γ γ± + − − −=
+ + (10.7)
The +ve sign denotes the same sense of rotation, and the ve sign denotes the opposite sense of rotation, if 1 2 1r r= = and 1 2.γ γ= Therefore, ( )P − and ( )P + are given by:
1 4(1)(1) (1 1)(1 1)(1)( ) 02 2(1 1)(1 1)
P − + − −− = + =
+ + (10.8)
( ) 1P + = (10.9)
Satellite Communication System Design 10.17
enaG = LNA gain (dB); and
pre mT + = pre-amplifier and mixer noise temperature (°K).
Amplifier Noise Temperature Consider an amplifier of effective bandwidth B and power gain A that is matched to a source with source resistance R at room temperature, where oT = 290 K,° as shown in Figure 10.6.
Power Gain, A
Noise Figure, F
Pso, Pn
Psi
Vs
R, T0
Figure 10.6: Amplifier
The amplifier noise figure F is defined as:
F = - - - -
Signal to noise power ratio at inputSignal to noise power ratio at output
= ( )
si o
si o na
P kT BAP AkT B P+
(10.18)
Where, Psi = input signal power; Pna = additional noise contributed by the amplifier at the; output
oAkT B = amplified input thermal noise at the output; and
k = Boltzmanns constant = 233.8 10 .−×
Or
1 na
o
PFAkT B
= + (10.19)
10.36 Satellite Communication System Design
Figure 10.10 shows the separation of two geostationary satellites as seen by an earth station.
θ
β
r
A
B
Satellite A
Satellite B Orbit
Earth Station
Figure 10.10: Separation of Two Geostationary Satellites
Here, β = angular separation between two satellites in geostationary orbit
= A Bθ θ−
Aθ and Bθ are the longitudes of satellites A and B
10.38 Satellite Communication System Design
To analyze the interference to or from an adjacent satellite system, let S1 be the existing satellite system and S2 be the proposed satellite system, as shown in Figure 10.11.
S12 S11 S21 S22
System S1 System S2
θ θ
S1 S2β
Figure 10.11: Adjacent Satellite Interference
The satellite link between the transmitter earth station S12 and the receiver earth station S11 is affected by two interference sources: the uplink interference signals from earth stations in the proposed system S2 and the downlink interference signals coming from satellite S2.
The total CI ratio due to these two interference sources represents the interference
generated by the proposed satellite system S2 into the adjacent satellite system S1.
Basic Circuit Laws 1.3
Predicting the Voltage and Current Across the Shunt Branches
In circuit analysis, the branch currents and voltages are calculated. The circuit components are connected using series and parallel connections that constitute the branches. The branch currents and voltages depend on the distribution of currents and voltages at the different points of the circuit. The voltage divider and current divider rules are extensively used to predict the branch voltages and currents.
Voltage Divider Rule The voltage divider rule provides a means to predict the voltages across each element in a series-connected circuit. Consider a simple resistance circuit as illustrated in Figure 1.1 to explain the voltage divider rule.
R1 R2 R3
V1 VL
a
b
RL
Figure 1.1: Circuit to Explain Voltage Divider Rule
The voltage LV across the load resistor LR can be predicted using the voltage divider rule. The voltage LV across LR according to the voltage divider rule is:
11 2 3
LL
L
RV VR R R R
= ×+ + +
Equation 1.1
1.4 Basic Circuit Laws
It should be noted that the voltage LV is the voltage measured across LR between terminals a and b. If there was another resistor connected in parallel with RL, then the voltage between terminals a and b will be due to the combined effect of the two resistors connected in parallel between terminals a and b, that is:
,, 1
1 2 3 ,
a ba b
a b
RV V
R R R R= ×
+ + + Equation 1.2
where Ra,b is the equivalent resistance of the parallel resistors between terminals a and b.
Current Divider Rule The currents flowing through various branches of a circuit can be predicted using the current divider rule. To understand the current divider rule, consider the circuit shown in Figure 1.2. It consists of four resistors connected in parallel and a current source.
R1 R2 R3I R4
I
I1 I2 I3 I4
Figure 1.2: Circuit to Explain Current Divider Rule
The current source supplies a total current I to the four resistors. The total current I is divided into four branch currents according to the resistance in each branch. The branch currents can be calculated using the current divider rule. For example, the current I1 can be calculated from the following equation:
11
1 2 3 4
1
1 1 1 1RI I
R R R R
= ×+ + +
Equation 1.3
Basic Circuit Laws 1.5
This equation is easy to remember if conductances are used instead of resistances. Conductance of a resistor is just the reciprocal of the resistance. The symbol g is used for representing conductance. The conductance of a resistor R is then:
1gR
= Equation 1.4
The current divider rule to find the current I1 in the circuit depicted in Figure 1.2 can then be written as:
11
1 2 3 4
gI Ig g g g
= ×+ + +
Equation 1.5
To find the current in another branch, place the conductance of that branch in the numerator. For example, the current I4 can be found from:
44
1 2 3 4
gI Ig g g g
= ×+ + +
It should be noted that the sum of all branch currents I1, I2, I3, and I4 is equal to the total current I, that is:
1 2 3 4I I I I I= + + + Equation 1.6
Problem Statement For the circuit displayed in Figure 1.3, predict the voltage across the shunt branches and current in each shunt branch using voltage divider and current divider rules. Verify the predicted results with the Multisim simulation of the circuit by carrying out the DC operating point analysis.
R1 R2 R3
V1 R4 R5 R624V1K 2.2K 3.6K
330Ω 680Ω 750Ω
Figure 1.3: Circuit Diagram
1.6 Basic Circuit Laws
Procedure 1. Draw the given circuit and mark the currents and output voltage as depicted in
Figure 1.4.
R1 R2 R3
V1 R4 R5 R624V1K 2.2K 3.6K
330Ω 680Ω 750Ω
Vo
I I
I4 I5 I6
Figure 1.4: Circuit Diagram
2. Calculate the total current I, supplied by the battery, 1 .V Record this value in the Observation Table.
3. Calculate the voltage across the shunt branches 0V using the voltage divider rule. Record this value in the Observation Table.
4. Calculate the shunt branch currents, I4, I5, and 6I using the current divider rule and record these values in the Observation Table.
5. Assemble the circuit in Multisim as shown in Figure 1.5.
R1 R2 R3
V1
R4 R5 R6
24V1K 2.2K 3.6K
330Ω 680Ω 750Ω
1 2
0
V2 V3 V40V 0V 0V
Figure 1.5: Circuit Diagram for Multisim
6. Click the Analysis button and select DC Operating Point. 7. In DC operating point analysis window, click Output Variables.