Lab 3 Questions:

What is the purpose of the tmp_reg from the Verilog code provided in lab, and what happens if this register is removed from the code?

The tmp_reg holds the product of slv_reg0 and slv_reg1, which is then put into slv_reg2 in the proceeding line. As the code uses non-blocking syntax, this happens in one instance. The reason why this is necessary is because slv_reg2 is because slv_reg2 changes values as an output and may not hold its value in the next clock cycle. tmp_reg, on the other hand, can be the temporary product and be assigned to slv_reg2 during the clock cycle.

What values of slv_reg0 and slv_reg1 would produce incorrect results from the multiplication block? What is the name commonly assigned to this type of computation error, and how would you correct this? Provide a Verilog example and explain what you would change during the creation of the corrected peripheral.

If slv_reg0 and/or slv_reg1is a fractional number or has a decimal value (ie.. 1.5 or 2.3 or etc), then the value produced will be a whole number rather than a fractional/decimal number because the program we made takes in int values and therefore it drops the numbers after the decimal. This is usually a precision error.

So to correct this, the variable can be declared as a double (and can have long or short if that is needed according to the precision needed in the calculation) and during the peripheral creation, you might change the version of the multiply.h file used (if that exists) and in the case of the verilog file, there might be changes in the size of the register required.