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TRANSCRIPT
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Institut de RadioAstronomie Millimtrique
IRAM-NNNNN Revision: 0 2001-05-21 Contact Author
MultiBeam Control
Owner Alain Perrigouard ([email protected])
Approved by: Date: Signature: A.Perrigouard May 2001
Keywords: derotator i2c vme
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 2 of 74
Change Record REVISION DATE AUTHOR SECTION/PAGE
AFFECTEDREMARKS
Content
1 HARDWARE DESCRIPTION............................................................................4 1.1 VME Crate layout...................................................................................... 4 1.2 VME "LOCAL" BOARD AND HANDSET .................................................. 5
1.2.1 Manual Control using the Handset ........................................... 6 1.2.2 interrrupts .................................................................................. 6 1.2.3 Motor Step Clock ...................................................................... 7 1.2.4 Precision Voltage Reference .................................................... 7 1.2.5 VME Interface ........................................................................... 7 1.2.6 Hardware................................................................................... 9
1.3 VME BOARD "MOTORS" ....................................................................... 22 1.3.1 Board Addressing ................................................................... 23 1.3.2 Driving Motors ......................................................................... 23 1.3.3 Position Readout..................................................................... 24 1.3.4 Securities ................................................................................ 24 1.3.5 Front-Panel and Connections ................................................. 25 1.3.6 Hardware................................................................................. 26
1.4 VME BOARD "ADC" ............................................................................... 34 1.4.1 Board Addressing ................................................................... 35 1.4.2 Inputs Readout........................................................................ 35 1.4.3 Securities ................................................................................ 35 1.4.4 Front-Panel and Connections ................................................. 36 1.4.5 Hardware................................................................................. 37
1.5 VME BOARDS "DAC"............................................................................. 37 1.6 VME BOARD "DIGITAL INPUT/OUTPUT" ............................................. 38
1.6.1 Description .............................................................................. 38 1.6.2 Using the Board ...................................................................... 39
1.7 VME BOARD "I2C" ................................................................................. 46 1.7.1 Front-Panel: ............................................................................ 47 1.7.2 Hardware................................................................................. 47 1.7.3 Software .................................................................................. 47
2 SOFTWARE DESCRIPTION...........................................................................51 2.1 INSTALLATION ...................................................................................... 51 2.2 DRIVERS ................................................................................................ 53
2.2.1 Universe .................................................................................. 53 2.2.2 Int_rec ..................................................................................... 54 2.2.3 I2c ........................................................................................... 55
2.3 DEROTATOR ......................................................................................... 57 2.3.1 Definition ................................................................................. 57 2.3.2 Mathcad computation.............................................................. 58 2.3.3 Control..................................................................................... 62 2.3.4 Index ....................................................................................... 63
2.4 COMMANDS........................................................................................... 63 2.4.1 flo ............................................................................................ 63
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 3 of 74
2.4.2 lo ............................................................................................. 63 2.4.3 Mixer ....................................................................................... 64 2.4.4 derotator.................................................................................. 65 2.4.5 load ......................................................................................... 65 2.4.6 loop ......................................................................................... 66 2.4.7 rejection................................................................................... 66 2.4.8 iflevel ....................................................................................... 66 2.4.9 temperature............................................................................. 66
2.5 GUI.......................................................................................................... 67 2.5.1 Window MultiBeam ................................................................. 67 2.5.2 Window MultiBeam LO ........................................................... 68 2.5.3 Window MultiBeam Mixers...................................................... 69 2.5.4 Window MultiBeam Junction Polarization............................... 70 2.5.5 Window MultiBeam Cryostat................................................... 71
2.6 Annex: Junction i2c modules .................................................................. 72 2.7 Annex: motor, ADC names and numbers ............................................... 73
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 4 of 74
1 HARDWARE DESCRIPTION
1.1 VME Crate layout
From left to right the VME modules found in the multibeam crate are: 1 VME Motorola processor MVME2401 1 IRAM Local board 2 IRAM Motor boards 2 IRAM ADC boards 1 IRAM I2C board 1 DAC board 1 Input/Output board VME Bus IP Carrier Board VIPC616 with 2 industry packs:
IP-servo, dual precision motion controller industry pack IP-16 ADC, 16 channel 16 bit ADC industry pack
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 5 of 74
1.2 VME "LOCAL" BOARD AND HANDSET
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
INT8
R/W
PWR
RESET
HANDSET
IRAMReceivers
Local Control
B +
-
7 +
-
1 +
-
F +
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The LOCAL board was designed for receiver remote control. Its main function is the generation of real-time interrupts for synchronizing control tasks. The LOCAL board allows the user to read and modify the position of any motor interactively. For that purpose, a handset is connected to the LOCAL board front-panel.
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 6 of 74
1.2.1 Manual Control using the Handset
This board was first designed to allow EASY manual control of any motor inside the receiver. This control is entirely supervised by the Microprocessor. The user interface is a handset, connected to the LOCAL board, through a serial synchronous link. Any action on the Handset causes the LOCAL board to generate an interrupt on the VME Bus, thus requesting an action from the microprocessor. This handset is composed of 2 identical control blocks. Each block includes:
A 2-digit Hexadecimal encoding wheel. A 3-position toggle switch. A rotary encoder (ROTAPOT). 2 LEDs.
To select a motor:
Select the Board Number on left digit of encoding wheel. (The Board Number of a Motor Board = Receiver Number: 1 to 4) (The Board Number of a ADC Board = Receiver Number + 9: A to D)
Select the Motor Number on right digit (0 to F). For instance: to access motor 13 of Receiver 2: wheel code = 2D The position of the selected motor is displayed on 4 digits (0...9999). It is also possible to read any channel of an ADC board, using the same method. The selected motor can be moved in 2 ways:
Continuous move, using the switch. Step by step, using the ROTAPOT.
Handset LEDs :
The green LED flashes any time a command is sent by the user. This LED reflects the state of the VME interrupt.
The red LED is a Bus Spy. It flashes when the motor or ADC selected on the handset is accessed through the VME Bus. This LED reflects the state of the command sent by the microprocessor, EVEN IF NOT REQUESTED BY THE USER through the handset.
1.2.2 interrrupts
The LOCAL board generates 9 VME interrupts, all of which are displayed on the board front-panel. All interrupts are on the same level (IRQ4). IRQ can be modified using U46: Strap 1-14 : IRQ 1 Strap 2-13 : IRQ 2 Strap 3-12 : IRQ 3 Strap 4-11 : IRQ 4 (default) Strap 5-10 : IRQ 5 Strap 6- 9 : IRQ 6 Strap 7- 8 : IRQ 7 !MODIFYING INTERRUPT LEVEL STRAP IMPLIES MODIFYING GALs U34,U40,U47! (see GAL source file : RVIT.INP) 8 VME interrupts are reserved for the handset, as follows: Rotapot Up IT 0
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 7 of 74
Rotapot Down IT 1 Switch change IT 2 Encoding Wheels change IT 3 (delayed : 0.5 second) Rotapot UP IT 4 Rotapot Down IT 5 Switch change IT 6 Encoding Wheels change IT 7 (delayed : 0.5 second) an other VME interrupt is used for WATCHDOG security : IT WATCHDOG IT 8 The IT WATCHDOG is generated by the LOCAL board. The LOCAL board also generates a WATCHDOG signal on a dedicated line of Bus P2. This signal is re-triggered any time IT WATCHDOG is cleared by the Microprocessor. WATCHDOG line is used by the Motor Boards. If WATCHDOG returns to logical FALSE, all motors will stop immediately, the 12 Volt Motor Power Supply being shutdown on each Motor board. IT WATCHDOG rate can be selected using U 18 on the board. U 10: Strap 1-14 2 milliseconds (default) Strap 2-13 4 milliseconds Strap 3-12 8 milliseconds Strap 4-11 16 milliseconds Strap 5-10 32 milliseconds Unlike other interrupts which are cleared by the interrupt acknowledge cycle, as soon as their vector has been fetched by the Microprocessor, interrupt 8 is completely cleared ONLY WHEN the Microprocessor reads a specific register (ACK8) of the LOCAL board. The contents of ACK8 are irrelevant, as it is a dummy register. INTERRUPT PRIORITY: Decreasing from 8 to 0. IT 8 has the highest priority, IT 0 the lowest. VECTORS: each interrupt has its own vector (byte). VECTOR (IT i) = [VECTOR BASE + i] with i = 0..8. VECTOR BASE (4 bits) is selectable (from 0 to F) using RC1 encoding wheel on the board.
1.2.3 Motor Step Clock
Generated by the LOCAL board: 1 kHz TTL signal, sent on Bus P2, used as time-base by the Motor boards for step-by-step mode. This signal is a synchronous multiple of IT 8.
1.2.4 Precision Voltage Reference
Generated by the LOCAL board: 10.00 Volt reference (temperature compensated) sent to all Motor boards and ADC boards through Bus P2. This common reference will guarantee the coherence of all A-to-D conversions inside the VME rack.
1.2.5 VME Interface
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 8 of 74
1.2.5.1 VME Address:
There is one LOCAL board in the VME crate. LOCAL board is accessible in SHORT mode (address on 16 bits, AM = 29, 2D). BASE ADDRESS: switch-selectable: 6 switches: S1-3 to S1-8 S1-1: unused S1-2: unused S1-3: A 15 S1-4: A 14 S1-5: A 13 S1-6: A 12 S1-7: A 11 S1-8: A 10 For all above switches, TRUE == OFF, FALSE == ON. BOARD NUMBER: encoding-wheel (RC 2) selectable (0 to F): bits A9..A5 BOARD ADDRESS = [BASE ADDRESS + (BOARD NUMBER x 64)] DEFAULT is BOARD NUMBER = 0 for the LOCAL board. Using an ELTEC E16 Microprocessor which maps SHORT addresses at (FFFF0000...FFFFFFFF), the complete address of the LOCAL board is: LOCAL board "0": board address = FFFF0400
1.2.5.2 IT WATCHDOG is cleared upon readout of a dummy register:
(This readout is done by the micro during the software interrupt routine). ACK8 ADDRESS: BOARD ADDRESS + 8 (reset IT 8 : dummy register).
1.2.5.3 Both control blocks are accessible through 4 registers:
2 STATUS registers (read-only): STATUS: bits 15--12 encoding wheel A bits 11---8 encoding wheel B bits 7---4 unused bit 3 Rotapot UP (for test only) bit 2 Rotapot DOWN (for test only) bit 1 Switch UP bit 0 Switch DOWN READ FUNCTIONS: BLOCK 1 STATUS ADDRESS: BOARD ADDRESS + 0 BLOCK 2 STATUS ADDRESS: BOARD ADDRESS + 4
2 DISPLAY registers (write-only): DISPLAY: bits 15--0: BCD-encoded to-be-displayed value. WRITE FUNCTIONS: BLOCK 1 DISPLAY ADDRESS: BOARD ADDRESS + 0 BLOCK 2 DISPLAY ADDRESS: BOARD ADDRESS + 4
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 9 of 74
1.2.6 Hardware
GALs (NS GAL 6001): U45: VME command decoder (Source file : RVLOC.INP) U12,U13: handset encoding wheels interface (Source file : R2COD.INP) U15,U23: Interrupt generators (Source file : R4IT.INP ) U34,U40,U47: VME Interrupt controllers (Source file: RVIT.INP) U10,U17,U25,U30: Handset serial link (Source file: RSHIFT.INP) U36: Clock for GALs RSHIFT.INP (Source file: SHIFTCLK.INP) ADJUSTMENTS: 10.00 Volt reference fine tuning is possible with P1, connecting a DVM between CAV1 and TP1. This is normally factory-made which does not need any correction unless strong reasons. RESET: BP1 (push-button on front-panel) allows manual reset of the board (useful for tests only). It has the same action as VME SYSRST. CONNECTIONS: A front-panel SUB-D 9 female connector allows connecting the handset. The handset is equipped with a SUB-D 9 male connector. The cable between LOCAL board and handset is equipped with a SUB-D 9 male at one end and a SUB-D 9 female at the other end. Connections are pin-to-pin (pins 1,2,3,4,5,6), the cable is shielded, the shield is connected at both ends to connector case.If the cable is short (less than 3 meters), an unshielded flat cable may be used. The handset consumes around 0.7 Ampere on + 5 Volt.
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 10 of 74
Date:
May 26, 1993Sheet
1
of
10
SizeDocument Number
REV
BF. Morel
1
Title LOCAL CONTROL BOARD : VME INTERFACE
IRAM RECEIVERS VME REMOTE CONTROL
BUS P2,CLOCKS,RESET
/RST
WDCLK
8MCLK
V /SYSRESET
/DISAMOT
SHIFTCLK
SHIFT-/LD
1KCLK
FRONT-PANEL
ACCESS
IT[0..8]
/RST
SHEET10
HANDSET
SHIFT REGISTER
DSPB[0..15]
DSPA[0..15]
CMDB[0..15]
CMDA[0..15]
ITLEDB
ITLEDA
SHIFTCLK
SHIFT-/LD
SPYB
SPYA
SHEET7
INTERRUPT GENERATOR
CMDA[0..15]
CMDB[0..15]
STSB[0..15]
STSA[0..15]
/RDB
/RDA
/RST
ITLEDB
ITLEDA
WDCLK
/DISAMOT
IT[0..8]
ACK[0..7]
/ACK8
1KCLK
INTERRUPT CONTROLLER
/RST
8MCLK
V /DTACK
V /IACKIN
V /AS
V /IACKOUT
VEC[0..7]
V /DS0
INTLVL0
INTLVL1
INTLVL2
IT[0..8]
ACK[0..7]
V /IRQ
VME P1 CONNECTOR
V /IACKIN
V /AS
V /IACK
V /WRITE
V /DS0
V /DS1
V AM5
V AM4
V AM3
V AM1
V AM0
V A[2..15]
V /DTACK
V /LWORD
V /SYSRESET
V /IACKOUT
VEC[0..7]
INTLVL0
INTLVL1
INTLVL2
V D[0..15]
V /IRQ
SHEET4
STATUS AND DISPLAY
ID[0..15]
DSPB[0..15]
DSPA[0..15]
STSB[0..15]
STSA[0..15]
/RDB
/RDA
SPYB[0..7]
SPYA[0..7]
WRA
WRB
/RST
SHEET2
COMMAND DECODER
ID[0..15]
/RDB
/RDA
SPYB[0..7]
SPYA[0..7]
WRA
WRB
/RST
V A[2..15]
V /DTACK
V /IACK
V /WRITE
V /DS0
V /DS1
V AM5
V AM4
V AM3
V AM1
V AM0
V /LWORD
SPYB
SPYA
ACCESS
8MCLK
V D[0..15]
/ACK8
SHEET9
SHEET6
SHEET5
SHEET3
SHEET8
CMDB[0..15]
V /DTACK
V /IACKOUT
V /IACKIN
V /IRQ
VEC[0..7]
V /AS
INTLVL2
INTLVL1
INTLVL0
CMDA[0..15]
STSB[0..15]
STSA[0..15]
V /IACK
V /WRITE
V /DS0
V /DS1
V /LWORD
V AM5
V AM4
V AM3
V AM1
V AM0
ID[0..15]
SPYB[0..7]
SPYA[0..7]
DSPB[0..15]
DSPA[0..15]
V A[2..15]
V D[0..15]
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 11 of 74
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U47
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U40
R18
R14
1
2
3
U14A
1
2
13
12
U28A
R19
3
4
5
6
U28B
R13
4
5
6
U14B
R12
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U34
1
2
U22A
2
5
3
4
6
1
RC1
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
1
19
U19
R9
R10
R11
3
4
U22B
5
6
U22C
9
10
11
8
U28C
R15
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RVIT
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RVIT
1K
100K
74S38
74HC10
1K
74HC10
100K
74S38
4K7
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RVIT
74HC14
A1
Y1
A2
Y2
A3
Y3
A4
Y4
A5
Y5
A6
Y6
A7
Y7
A8
Y8
G1G2
74HC541
4K7
4K7
4K7
74HC14
74HC14
74HC10
1K
Date:
July 1, 1993Sheet
2
of
10
SizeDocument Number
REV
BF. MOREL
Title
LOCAL CONTROL BOARD : INTERRUPT CONTROLLER
IRAM RECEIVERS VME REMOTE CONTROL
VECTORS:
IT 0 : BASE + 0 : ROTAPOT A UP ( LOWEST PRIORITY ).
THROUGH A " READ " COMMAND , WHICH GENERATES SIGNAL /ACK8.
ACK8 IS NOT USED , AS IT 8 IS CLEARED
VECTOR OF IT (i) = VECTOR BASE + i
ITS 9 , 10 , 11 ARE NOT USED.
/RST
V /IACKIN
V /AS
V /DS0
INTLVL2
INTLVL1
INTLVL0
8MCLK
ITS 8,9,10,11
IT 1 : BASE + 1 : ROTAPOT A DOWN .
IT 2 : BASE + 2 : SWITCH A CHANGE .
IT 3 : BASE + 3 : ENCODING WHEELS A CHANGE .
IT 5 : BASE + 5 : ROTAPOT B DOWN .
IT 6 : BASE + 6 : SWITCH B CHANGE .
IT 7 : BASE + 7 : ENCODING WHEELS B CHANGE .
IT 4 : BASE + 4 : ROTAPOT B UP .
IT 9 : BASE + 9 : FREE .
IT 10 : BASE + 10 : FREE .
IT 11 : BASE + 11 : FREE
IT 8 : BASE + 8 : WATCHDOG INTERRUPT ( HIGHEST PRIORITY )
V /IRQ
IT[0..8]
ITS 4,5,6,7
ACK[0..7]
V /DTACK
VECTORS BASE
VEC[0..7]
V /IACKOUT
ITS 0,1,2,3
VEC1C
/VECTORC
ACK8
ACK9
ACK10
ACK11
/DTACKC
/IRQC
/IACKOUTC
IT8
IT11
IT10
IT9
VEC0C
VCC
INT REQUEST
ACK6
ACK5
VEC1B
VEC0B
/VECTORB
ACK4
ACK7
/DTACKB
/IRQB
/IACKOUTB
IT7
IT6
IT5
IT4
IT[0..8]
VCC
INT ACKNOWLEDGED
VCC
ACK[0..7]
IT3
IT2
IT1
IT0
ACK3
ACK2
ACK1
ACK0
/DTACKA
/IRQA
VECBASE2
VECBASE3
VECBASE1
VECBASE0
VEC[0..7]
VEC7
VEC6
VEC5
VEC4
VCC
VEC3
VEC2
VEC1
VEC0
/VENA
VEC 0
VEC 1
ITS B =>B+4
ITS C =>B+8
VEC1A
VEC0A
/VECTORA
/IACKOUTA
VCC
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IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 12 of 74
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
19
1
U44
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U45
1
2
3
U33A
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
19
1
U38
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
1
19
U39
1
2
U20A
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S1
2
5
3
4
6
1
RC2
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
1
19
U27
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
1
19
U32
3
4
U20B
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
1
19
U31
1
2
3
U21A
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
G DIR
74ALS645
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RVLOC
74S38
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
G DIR
74ALS645
P0
P1
P2
P3
P4
P5
P6
P7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
G
P=Q
74ALS520
74HC14
P0
P1
P2
P3
P4
P5
P6
P7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
G
P=Q
74ALS520
P0P1P2P3P4P5P6P7
Q0Q1Q2Q3Q4Q5Q6Q7
G
P=Q
74ALS520
74HC14
P0P1P2P3P4P5P6P7
Q0Q1Q2Q3Q4Q5Q6Q7
G
P=Q
74ALS520
74HC32
Date:
June 30, 1993Sheet
3
of
10
SizeDocument Number
REV
BF. MOREL
Title LOCAL CONTROL BOARD : COMMAND DECODER
IRAM RECEIVERS VME REMOTE CONTROL
ACCESS
V D[0..15]
V /DTACK
/RST
BUSDIR = 0 V => ID -> VME
BUSDIR = 5 V => VME -> ID
ID[0..15]
V /IACK
V /WRITE
V /DS0
V /DS1
8MCLK
A D D R E S S D E C O D E R
/RDA
/RDB
WRA
WRB
/ACK8
SPYA[0..7]
SPYB[0..7]
SPYB
SWA11
SWA12
SWA13
SWA14
SWA15
BASE ADDRESS
(A15-A10)
V AM1
V AM0
V AM5
V AM4
V AM3
V /LWORD
SWA9
SWA10
A D D R E S S D E C O D E R
A D D R E S S D E C O D E R
A D D R E S S D E C O D E R
SPY ( A OR B )
SPYA
SELECTED ON ENCODING WHEELS
OF HANDSET.
MONITOR ACCESS TO BOARDS
SWA6
SWA7
SWA8
(A09-A06)
AM = 29 OR 2D (Hexa)
BOARD NUMBER ( 0 TO F Hexa )
V A[2..15]
I D [ 0 . . 1 5 ]
ID15
ID14
ID13
ID12
V D15
V D14
V D13
V D12
V D[0..15]
V D11
V D10
V D9
V D8
ID11
ID10
ID9
ID8
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
V D7
V D6
V D5
V D4
V D3
V D2
V D1
V D0
WRA
WRB
/RDA
/RDB
/ACK8
BUSDIR
/BUSENA
DTACK
/SPY
ACCESS
8MCLK
/RST
V A2
V A3
V A4
V A5
V /IACK
V /WRITE
V /DS0
V /DS1
/ADOK
V A2
V A3
V A4
V A5
V A15
V A14
V A13
V A12
V A11
V A10
SPYB[0..7]
SPYA[0..7]
V A [ 2 . . 1 5 ]
V A9
V A8
V A7
V A6
V A9
SPYB7
SPYB6
SPYB5
SPYB4
SPYB3
SPYB2
SPYB1
SPYB0
V A9
SPYA7
SPYA6
SPYA5
SPYA4
SPYA3
SPYA2
SPYA1
SPYA0
V A8
V A7
V A6
V A5
V A4
V A3
V A2
V A8
V A7
V A6
V A5
V A4
V A3
V A2
/SPY
V A[2..15]
/HIADOK
/(HIADOK*SPY)
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 13 of 74
1
2
3
4
5
6
7
8
9
10
11
2322212019181716151413
U23
R5
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U13
C1
9
10
8
U14C
9
8
U22D
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U12
R6
1
2
3
4
5
6
7
8
9
10
11
2322212019181716151413
U15
11
10
U22E
C2
12
13
11
U14D
12
9
11
8
1 0 1 3
U8B
2
5
3
6
4 1
U8A
2
5
3
6
4 1
U7A
12
9
11
8
1 0 1 3
U7B
ICLK
I1I2I3I4I5I6I7I8I9I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL R4IT
680K
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL R2COD
1uF
74S38
74HC14
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL R2COD
680K
ICLK
I1I2I3I4I5I6I7I8I9I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL R4IT
74HC14
1uF
74S38
DQ
CLK
Q
P R C L
74HC74
DQ
CLK
Q
P R C L
74HC74
DQ
CLK
Q
P R C L
74HC74
DQ
CLK
Q
P R C L
74HC74
Date:
July 1, 1993Sheet
4
of
10
SizeDocument Number
REV
BF. MOREL
Title
LOCAL CONTROL BOARD : INTERRUPT GENERATOR
IRAM RECEIVERS VME REMOTE CONTROL
STSB[0..15]
RUB
RDB
SWUB
SWDB
/SWUB
/SWDB
RSINB
RCOSB
/RST
LOCAL CONTROL B
( ITs 4 , 5 , 6 , 7 )
ENCODING WHEELS BITS
DELAY GENERATOR
( 0.5 SECOND )
SWITCH AND ROTAPOT
ITLEDB
IT[0..8]
STSA[0..15]
CMDB[0..15]
/RDB
ACK[0..7]
/SWUA
/SWDA
RSINA
RCOSA
RUA
RDA
SWUA
SWDA
ITLEDA
SWITCH AND ROTAPOT
DELAY GENERATOR
( 0.5 SECOND )
ENCODING WHEELS BITS
LOCAL CONTROL A
( ITs 0 , 1 , 2 , 3 )
CMDA[0..15]
/RDA
1KCLK
WATCHDOG INTERRUPT
DELAY DISCRIMINATOR
DIVIDE BY 2
WATCHDOG
( IT 8 )
WDCLK
/ACK8
IT 8 IS SET ON RISING EDGE OF WDCLK
AND RESET THROUGH A " READ " ACCESS ,
THUS REQUIRING MICROPROCESSOR ACTION .
STOPS ALL MOTORS WHEN LOW
(INTERRUPT 8 NOT ACKNOWLEDGED)
/DISAMOT
STSB3
STSB2
STSB1
STSB0
STSB[0..15]
CMDB3
CMDB2
CMDB1
CMDB0
/RST
VCC
STSB15
STSB14
STSB13
STSB12
CMDB15
CMDB14
CMDB13
CMDB12
/RST
LD7
CMDB11
CMDB10
CMDB9
CMDB8
WAITB
STSB11
STSB10
STSB9
STSB8
NEWADB
CHANGEB
NEWADB
/RDB
ACK6
ACK5
ACK4
ACK7
IT6
IT5
IT4
LD7
I T [ 0 . . 8 ]
ITLEDB
IT7
STSA[0..15]
CMDB[0..15]
ACK[0..7]
CMDA15
CMDA14
CMDA13
CMDA12
CMDA11
CMDA10
CMDA9
/RST
STSA15
STSA14
STSA13
STSA12
STSA11
STSA10
STSA9
CMDA3
CMDA2
CMDA1
CMDA0
/RST
/RDA
NEWADA
VCC
ACK3
STSA3
STSA2
STSA1
STSA0
LD3
ITLEDA
IT3
IT2
IT1
IT0
ACK2
ACK1
ACK0
STSA8
NEWADA
CHANGEA
LD3
CMDA8
WAITA
CMDA[0..15]
IT8
VCC
/RST
VCC
SET INTERRUPT 8
/RESET INTERRUPT 8
VCC
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 14 of 74
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
11
1
U48
3
2
4
5
7
6
8
9
13
12
14
15
17
16
18
19
11
1
U24
3
2
4
5
7
6
8
9
13
12
14
15
17
16
18
19
11
1
U16
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
11
1
U41
3
2
4
5
7
6
8
9
13
12
14
15
17
16
18
19
11
1
U9
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
11
1
U35
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
11
1
U29
3
2
4
5
7
6
8
9
13
12
14
15
17
16
18
19
11
1
U4
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
D8
Q8
C OC
74HC573
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
D8
Q8
CLK
CLR
74HC273
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
D8
Q8
CLK
CLR
74HC273
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
D8
Q8
C OC
74HC573
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
D8
Q8
CLK
CLR
74HC273
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
D8
Q8
C OC
74HC573
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
D8
Q8
C OC
74HC573
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
D6
Q6
D7
Q7
D8
Q8
CLK
CLR
74HC273
Date:
July 1, 1993Sheet
5
of
10
SizeDocument Number
REV
BF. MOREL
Title
LOCAL CONTROL BOARD : STATUS AND DISPLAY
IRAM RECEIVERS VME REMOTE CONTROL
SPYB[0..7]
ID[0..15]
NOTE : STS(A or B) 0-3 == Switch (0,1) and Rotapot (2,3) action
STS(A or B) 8-15 == address selected on encoding wheels
DSP(A or B) 0-15 == digits displayed on Handset
STS(A or B) 4-7 == unused
STATUS REGISTERS
DISPLAY REGISTERS
DSPB[0..15]
STSB[0..15]
/RDB
WRB
SPYA[0..7]
DSPA[0..15]
STSA[0..15]
/RDA
WRA
/RST
SPYB[0..7]
ID[0..15]
STSB15
STSB14
STSB13
STSB12
STSB11
STSB10
SPYB7
SPYB6
SPYB5
SPYB4
SPYB3
SPYB2
STSB15
STSB14
STSB13
STSB12
STSB11
STSB9
STSB8
SPYB1
SPYB0
ID15
ID14
ID13
ID12
ID11
ID15
ID14
ID13
ID12
ID11
DSPB15
DSPB14
DSPB13
DSPB12
DSPB11
DSPB[0..15]
DSPB10
DSPB9
DSPB8
DSPB7
DSPB6
ID10
ID9
ID8
ID7
ID6
ID10
ID9
ID8
ID7
ID6
STSB10
STSB9
STSB8
STSB[0..15]
STSB3
STSB2
STSB1
STSB0
ID5
ID4
ID3
ID2
ID1
ID0
ID5
ID4
ID3
ID2
ID1
ID0
DSPB5
DSPB4
DSPB3
DSPB2
DSPB1
DSPB0
DSPA15
DSPA14
DSPA13
DSPA12
DSPA11
DSPA10
DSPA9
DSPA8
ID15
ID14
ID13
ID12
ID11
ID10
ID9
ID8
ID15
ID14
ID13
ID12
ID11
ID10
ID9
ID8
STSA15
STSA14
STSA13
STSA12
STSA11
STSA10
STSA9
STSA8
STSA3
STSA2
ID7
ID6
ID5
ID4
ID3
ID2
ID7
ID6
ID5
ID4
ID3
ID2
DSPA7
DSPA6
DSPA5
DSPA4
DSPA3
DSPA2
SPYA[0..7]
DSPA[0..15]
DSPA1
DSPA0
ID1
ID0
ID1
ID0
STSA1
STSA0
STSA[0..15]
STSA15
STSA14
STSA13
STSA12
STSA11
STSA10
STSA9
STSA8
SPYA7
SPYA6
SPYA5
SPYA4
SPYA3
SPYA2
SPYA1
SPYA0
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 15 of 74
J3
1
2
U5A
3
4
U5B
R17
3 1 2
Q6
1 2D5
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U25
9
8
U5D
5
6
U5C
2
18
4
16
6
14
8
12
11
9
13
7
15
5
17
3
1
19
U1
R4
F1
R3
13
12
U5F
11
10
U5E
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U30
R16
3 1 2
Q5
1 2D4
1
2
U2A
3
4
U2B
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U10
R8
3 1 2
Q4
1 2D3
5
6
U2C
9
8
U2D
11
10
U2E
13
12
U2F
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U17
R7
3 1 2
Q3
1 2D2
1 2 3 4 5 6 7 8 9 10
3M 3591
74LS14
74LS14
4K7
VN10
1N4148
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RSHIFT
74LS14
74LS14
1A1
1Y1
1A2
1Y2
1A3
1Y3
1A4
1Y4
2A1
2Y1
2A2
2Y2
2A3
2Y3
2A4
2Y4
1G2G
74HC244
270
FUSE 2A
270
74LS14
74LS14
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RSHIFT
4K7
VN10
1N4148
74LS14
74LS14
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RSHIFT
4K7
VN10
1N4148
74LS14
74LS14
74LS14
74LS14
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RSHIFT
4K7
VN10
1N4148
Date:
July 1, 1993Sheet
6
of
10
SizeDocument Number
REV
BF. MOREL
Title LOCAL CONTROL BAORD : SHIFT REGISTER
IRAM RECEIVERS VME REMOTE CONTROL
SERIAL TRANSMISSION PROTOCOL :
36 " SHIFT " CLOCK PULSES ( VSHIFT-/LD = HIGH )
+ 1 " LOAD " CLOCK PULSE ( VSHIFT-/LD = LOW ).
SERIAL IN/OUT , PARALLEL IN/OUT SHIFT REGISTERS
SHIFTCLK
SHIFT-/LD
ITLEDB
20 ns DELAY LINES
SERIAL INPUT FROM HANDSET
SPYB
PARALLEL INPUTS
FROM HANDSET
CMDB[0..15]
CMDA[0..15]
S E R I A L O U T P U T T O H A N D S E T
PARALLEL OUTPUTS
TO HANDSET
DSPB[0..15]
DSPA[0..15]
ITLEDA
1 2 3 4 5 6 7 8 910
VSHIFTCLK
GND
VSHIFT-/LD
GND
VSERIAL OUTPUT
GND
VSERIAL INPUT
VCC
VCC
J3 SUB-D9
1 2 3 4 56 7 8 9 XX
J3 LINKED THROUGH FLAT CABLE
TO FRONT-PANEL SUB-D 9 FEMALE CONNECTOR .
SUB-D 9 TO HANDSET : 5 COND SHIELDED CABLE ,
WHOSE EACH LINE IS TERMINATED WITH 130 OHMS.
INTERFACE BETWEEN VME BOARD AND HANDSET
UNUSED
SPYA
MUST
BE 74HC COMPATIBLE ( VTh = 2.5 VOLTS ).
SHIFTCLK
SHIFT-/LD
VCC
DSPB15
DSPB14
DSPB13
DSPB12
DSPB11
DSPB10
DSPB9
DSPB8
DSPB7
SERIN0
SHIFT-/LD2
CMDB15
CMDB14
CMDB13
CMDB12
CMDB11
CMDB10
CMDB9
CMDB8
CMDB7
SEROUT0
VSHIFT-/LD
VSERIAL OUTPUT
VSERIAL INPUT
VSHIFTCLK
VCC
SHIFTCLK2
SHIFT-/LD2
D S P B [ 0 . . 1 5 ]
VCC
DSPB6
DSPB5
DSPB4
DSPB3
DSPB2
DSPB1
DSPB0
SERIN1
/SPYB
/ITLEDB
CMDB6
CMDB5
CMDB4
CMDB3
CMDB2
CMDB1
CMDB0
SEROUT1
SHIFTCLK2
CMDB[0..15]
CMDA[0..15]
CMDA15
SEROUT2
DSPA15
SERIN2
SHIFT-/LD2
VCC
DSPA14
DSPA13
DSPA12
DSPA11
DSPA10
DSPA9
DSPA8
DSPA7
D S P A [ 0 . . 1 5 ]
CMDA14
CMDA13
CMDA12
CMDA11
CMDA10
CMDA9
CMDA8
CMDA7
SHIFTCLK2
CMDA6
CMDA5
CMDA4
SEROUT3
DSPA6
DSPA5
DSPA4
SERIN3
SHIFT-/LD2
VCC
DSPA3
DSPA2
DSPA1
DSPA0
/SPYA
/ITLEDA
CMDA3
CMDA2
CMDA1
CMDA0
SHIFTCLK2
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 16 of 74
15
12
14
131110 9
U6B
1
4
2
3
5
6
7
U6A
15
12
14
13
11
10
9
U11B
1
4
2
3
5
6
7
U11A
1
3
4 5 6
2
U26A
8
1
X1
1
2
U37A
1
2
3
4
5
6
7
14
13
12
11
10
9
8
U18
13
11
10 9 8
12
U26B
32
1
BP1
3
4
U37B
R20
C7
1 2
D6
5
6
U37C
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U36
6
48
5
2
U49
R22
3
2
6
1
8
7 4
U43
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
J2
1
2
3
U42A
L3
12C6
1 2
C5
L2
12
3
P1
C4
CKA
CKB
CLR
QAQBQCQD
74HC390
CKA
CKB
CLR
QA
QB
QC
QD
74HC390
CKA
CKB
CLR
QA
QB
QC
QD
74HC390
CKA
CKB
CLR
QA
QB
QC
QD
74HC390
AQA
QBQCQD
CLR
74HC393
CLK
NC
X-CLOCK
74HC14
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
SOCKET14
AQA
QBQCQD
CLR
74HC393
C&K E112SD1AV2QE
74HC14
1M
1uF
1N4148
74HC14
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL SHIFTCLK
VOUT
G N D
N O I S E
TRIM
V I NAD587
1M
OP07
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
DIN41612 64/96
74HC00
VK200
100 uF T
100uF T
VK200
22K
1uF
Date:
July 19, 1993Sheet
7
of
10
SizeDocument Number
REV
BF. MOREL
Title
BUS P2, CLOCKS , RESET
IRAM RECEIVERS VME REMOTE CONTROL
8MCLK
1KCLK
8.000
MHz
WATCHDOG PERIOD ( AFTER /2 )
WDCLK
WATCHDOG CLOCK USED TO
GENERATE INTERRUPT 8 (HIGHEST PRIORITY)
RATE SELECT ( NORMAL POSITION : 1-14 ).
CLOCK GENE FOR SHIFT REGISTERS
/RST
SHIFTCLK
SHIFT-/LD
START-UP RESET
V /SYSRESET
10.00 VOLTS REFERENCE FOR MOTOR BOARDS
STEP CLOCK FOR MOTOR BOARDS
BUS P2
10.00 VOLTS
/DISAMOT
WATCHDOG LINE TO MOTOR BOARDS
DISABLES ALL MOTORS WHEN LOW.
1KCLK
8MCLK
1M
500KCLK
2 ms
4 ms
8 ms
16 ms
32 ms
VCC
/START
8MCLK
V /SYSRESET
500KCLK
VDD
MOTOR STEP CLOCK
MOTOR STEP CLOCK
0VANA
VSS
0VANA
VSSBUS
VDD
WATCHDOG LINE
VDDBUS
10VREF
WATCHDOG LINE
VSS
VDDBUS
VSSBUS
0VANA
VDDBUS
VSSBUS
0VANA
10VREF
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 17 of 74
32
31
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1
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95
96
J1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
U46
1 2
C3
L1
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
DIN41612 96/96
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
SOCKET14
100 uF T
VK200
Date:
July 1, 1993Sheet
8
of
10
SizeDocument Number
REV
BF. MOREL
Title
VME CONNECTOR P1
IRAM RECEIVERS VME REMOTE CONTROL
V D[0..15]
DATA BUS
VEC[0..7]
VECTOR ( 8 BITS )
V AM5
V /LWORD
V /SYSRESET
V /DS1
V /DS0
V /WRITE
V /DTACK
V /AS
V /IACK
V /IACKIN
V /IACKOUT
V AM4
V A[2..15]
ADDRESS BUS
INTLVL2
INTLVL0
INTLVL1
INTERRUPT ACKNOWLEDGE LEVEL
( SENT BY MICROP ).
V AM0
V AM1
V AM3
V /IRQ
INTERRUPT REQUEST LEVEL SELECT
(NORMALLY LEVEL 4 : STRAP 4-11)
CAUTION : MODIFYING INTERRRUPT REQUEST LEVEL STRAP IMPLIES MODIFYING ALSO THE CONTENTS OF THE 3 GALs RVIT.
SEE FILE : RVIT.INP
V D0
V D[0..15]
VEC0
VEC[0..7]
VEC7
VEC6
VEC5
VEC4
VEC3
VEC2
VEC1
V D11
V D10
V D9
V D8
V D7
V D6
V D5
V D4
V D3
V D2
V D1
V D15
V D14
V D13
V D12
V A2
V A3
V A4
V A5
V A6
V A7
V A9
V A10
V A11
V A12
V A13
V A14
V A15
V A[2..15]
V A8
+5V
V A1
+5V
+5V
VCC
V /IRQ7
V /IRQ6
V /IRQ5
V /IRQ4
V /IRQ3
V /IRQ2
V /IRQ1
+5V
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 18 of 74
Date:
June 11, 1993Sheet
9
of
10
SizeDocument Number
REV
AF. MOREL
Title
THIS SHEET IS FOR HELP ONLY
IRAM RECEIVERS VME REMOTE CONTROL
SEE SHEET RHSDT.SHE
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 19 of 74
1
16
RA1A
2 1LEDIT7
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
19
1
U3
2
15
RA1B
3
14
RA1C
2 1LEDIT6 2
1LEDIT5
4
13
RA1D
5
12
RA1E
2 1LEDIT4 2
1LEDIT3
6
11
RA1F
7
10
RA1G
8
9RA1H
2 1LEDIT2 2
1LEDIT1 2
1LEDIT0 2
1LEDIT8
R1
3 1 2
Q1
3 1 2
Q2
2 1LEDACCESS
R2
2 1LEDPOWER
R21
3 1 2
Q7
1 2D1
330
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
GDIR
74LS642
330
330
330
330
330
330
330
330
VN10
VN10
330
330
VN10
1N4148
Date:
July 1, 1993Sheet
10
of
10
SizeDocument Number
REV
AF. MOREL
Title
FRONT-PANEL
IRAM RECEIVERS VME REMOTE CONTROL
ENCODING WHEELS B CHANGE
FRONT-PANEL DISPLAY OF ALL INTERRUPTS.
ITs 0 TO 7 ARE ALSO DISPLAYED ON HANDSET ( LEDITA AND LEDITB ).
IT[0..8]
SWITCH B CHANGE
ROTAPOT B DOWN
ENCODING WHEELS A CHANGE
ROTAPOT B UP
SWITCH A CHANGE
ROTAPOT A DOWN
ROTAPOT A UP
WATCHDOG
BOARD ACCESS ( READ OR WRITE )
BOARD STATUS OK
ACCESS
/RST
VCC
IT[0.8]
IT6
IT5
IT4
IT3
IT2
IT1
IT0
IT7
IT8
ACCESS
/RST
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 20 of 74
31 4
41 3
51 2
61 1
71 0
89
11 6
21 5
2
18
4
16
6
14
8
12
11
9
13
7
15
5
17
3
119
U6
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U1
123456789
RSIL1
JP1
L1
JP3
1 2
CD1
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U2
1
2
U5A
3
4
U5B
R1
R2
R4
R3
R5
R6
C1
C2
1
2
3
4
5
7
8
10
12
13
14
U7
1
2
3
4
5
7
8
10
121314
U8
1
2
3
4
5
7
8
10
121314
U9
1
2
3
4
5
7
8
10
121314
U10
R13
2 1LEDITB
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U3
123456789
RSIL2
JP2
5
6
U5C
R14
R15
R16
2 1LEDSPYB
2 1LEDITA 2
1LEDSPYA
1
2
3
4
5
7
8
10
121314
U15
1
2
3
4
5
7
8
10
121314
U14
1
2
3
4
5
7
8
10
121314
U13
1
2
3
4
5
7
8
10
12
13
14
U12
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U4
9
8
U5D
R7
R8
R9
R10
R11
R12
C3
C4
1A1
1Y1
1A2
1Y2
1A3
1Y3
1A4
1Y4
2A1
2Y1
2A2
2Y2
2A3
2Y3
2A4
2Y4
1G2G
HC244
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RSHIFT
8X4K7
12345678910111213141516
HEADER 16
INDUCTOR
1 2 3 4 5 6 HEADER 6
220uF/25V
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RSHIFT
74HC14
74HC14
100K
100K
1K
1K
10k
10k
1uF
1uF
TIL311
TIL311
TIL311
TIL311
330
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RSHIFT
8X4K7
12345678910111213141516
HEADER 16
74HC14
330
330
330
TIL311
TIL311
TIL311
TIL311
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RSHIFT
74HC14
100K
100K
1K
1K
10k
10k
1uF
1uF
Date:
December 10, 1993Sheet
1
of
1
SizeDocument Number
REV
BF. MOREL
IRAM RECEIVERS VME REMOTE CONTROL : HANDSET
RA1
8x270
ALL CHIPS ( EXCEPT TILs 311 ) ARE ON DECOUPLED SOCKETS
SHIFTCLK FROM VME
SERIAL OUTPUT TO VME
SERIAL INPUT FROM VME
SHIFT-/LD FROM VME
MC
DU
SWITCHES,ROTAPOTS,ENCODING WHEELS
FOR HELP ONLY
VCC
VCC
HSHIFT-/LD
HSERIN0
/RCB7
/RCB6
/RCB5
/RCB4
/RCB3
/RCB2
/RCB1
/RCB0
DISPB15
DISPB14
DISPB13
DISPB12
DISPB11
DISPB10
DISPB9
DISPB8
DISPB7
HSEROUT0
HSHIFTCLK
VSHIFT-/LD
VSHIFT CLK
VSERIAL OUTPUT
VSERIAL INPUT
VCC
HSEROUT1
DISPB6
HSHIFT-/LD
HSERIN1
VCC
/SWUB
/SWDB
RSINB
RCOSB
DISPB5
DISPB4
DISPB3
DISPB2
DISPB1
DISPB0
/HITLEDB
/HSPYB
HSHIFTCLK
D I S P B 1 3
D I S P B 1 2
D I S P B 1 5
D I S P B 1 4
D I S P B 9
D I S P B 8
D I S P B 1 1
D I S P B 1 0
D I S P B 5
D I S P B 4
D I S P B 7
D I S P B 6
D I S P B 1
D I S P B 3
D I S P B 2
D I S P B 0
VCC
DISPB[0..15]
DISPA15
DISPA14
DISPA13
HSEROUT2
HSHIFT-/LD
HSERIN2
/RCA7
/RCA6
/RCA5
VCC
/RCA4
/RCA3
/RCA2
/RCA1
/RCA0
HSHIFTCLK
DISPA12
DISPA11
DISPA10
DISPA9
DISPA8
DISPA7
D I S P A 3
D I S P A 2
D I S P A 0
D I S P A 7
D I S P A 6
D I S P A 1
D I S P A 1 1
D I S P A 1 0
D I S P A 5
D I S P A 4
D I S P A 1 5
D I S P A 1 4
D I S P A 9
D I S P A 8
D I S P A 1 3
D I S P A 1 2
DISPA6
DISPA5
DISPA4
DISPA3
DISPA2
HSEROUT3
HSHIFT-/LD
HSERIN3
RSINA
RCOSA
/SWUA
/SWDA
VCC
HSHIFTCLK
DISPA1
DISPA0
/HITLEDA
/HSPYA
DISPA[0..15]
-
IRAM
MultiBeam
Control
Create D
ate:May 2001
Author: A.Perrigouard control.doc
Page 21 of 74
5
4321
Roue Codeuse Diz B
5
4321
Roue Codeuse Uni B
1 2 3
ROTAPOT B
1
3
2
5 9 4 8 3 7 2 6 1
5
4321
Roue Codeuse Diz A
5
4321
Roue Codeuse Uni A
1 2 3
ROTAPOT A
1
3
2
U?
SWITCH B
CONNECTOR DB9 MALE
SW SPTT
Date: January 12, 1994 Sheet of
Size Document Number REV
B
ATTENTION : CES COMPOSANTSCOMMON
"1""2""4""8"
COMMON
"1""2""4""8"
NE SONT PAS SUR LA CARTE
TO JP1
FLEXSTRIPL = 6 CM
SOUPLE 5 PTSIMPRIMES2 CIRCUITS
27
VITRES
53 LONGUEUR 12 CM
YELLOW
YELLOW
REDGREEN
RED
GREEN
PIN6
PIN5
PIN4
PIN3PIN1PIN2
TO CONNECTOR JP3
greenblackblue
rose
yellow
redCOMMON
"1""2""4""8"
COMMON
"1""2""4""8" TO JP2
LONGUEUR 21 CM
2 CIRCUITS
GREEN
FLEXSTRIPL = 6 CM
SOUPLE 5 PTSIMPRIMES
LONGUEUR 12 CM
YELLOW
YELLOW
RED
REDGREEN
PIN16PIN15PIN14PIN13PIN12
PIN11PIN10PIN9PIN8PIN7
PIN6 PIN5 PIN4
PIN3 PIN2 PIN1
VSHIFTCLK
VSHIFT-/LD
VSERIAL OUTPUT
VSERIAL INPUT
VCC
GND
PIN16PIN15PIN14PIN13PIN12
PIN11PIN10PIN9PIN8PIN7
PIN6 PIN5 PIN4
PIN3 PIN2 PIN1
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 22 of 74
1.3 VME BOARD "MOTORS"
DOG
PWR
R/W
MOTORS
0-34-7
8-1112-15
IRAMReceivers Motors
This board is able to drive 16 motor-potentiometers for receiver control, in two different modes: On/Off or Step. The position of all 16 motors can be read on 12 bits.
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 23 of 74
The convention is: Position min &=&0 &Volt == 0000 Hexa. Position max &=&10 &Volt == 0FFF Hexa. The analog inputs are fully differential and immune to common-mode. The A-D conversion of the selected channel is initiated upon read request and is fulfilled within 40 microseconds.
1.3.1 Board Addressing
Address and Data are on 16 bits (Short Mode, AM = 29, 2D). The board address is defined with 2 parameters: Its base address and its board number. BOARD ADDRESS = (BASE ADDRESS) + (BOARD NUMBER * 64) BASE ADDRESS (A15..A10) is switch selectable (S1) S1-1: unused S1-2: unused S1-3: A 15 S1-4: A 14 S1-5: A 13 S1-6: A 12 S1-7: A 11 S1-8: A 10 For all switches, ON == FALSE and OFF == TRUE. BOARD NUMBER (0..F) is selectable using an Hexa encoding wheel (RD1). Normally, there are 4 MOTOR boards in the VME crate, one per receiver. For that reason, MOTOR boards Board Number = Receiver Number (1 to 4). When using an ELTEC E16 Microprocessor, which maps SHORT addresses at (FFFF0000...FFFFFFFF) MOTOR Boards addresses are: MOTOR board "1": address: FFFF0440 MOTOR board "2": address: FFFF0480 MOTOR board "3": address: FFFF04C0 MOTOR board "4": address: FFFF0500
1.3.2 Driving Motors
Each motor has its own read-write address, based on its number (NUMMOT= 0..F for motors 0..15). MOTOR ADDRESS = (BOARD ADDRESS) + (NUMMOT * 4) To drive the 16 motors there are 16 motor control registers of which the 3 LSB, (D0..D2 on the VME Data Bus) are used. The address of each register (write only) is MOTOR ADDRESS.
Bit 0: U/D: Direction of rotation. The convention is: U/D = 1 ==> Motor runs UP, position readout increases. This bit is write-only.
Bit 1: STEP: When set to 1, causes the motor to move one step, in the direction defined by bit U/D. Step duration is 1 millisecond, which corresponds to an increment of position of around 1/10 of a LSB (LSB value = 10/4096 Volt). Bit STEP is not latched and has to be written to ONE each step is wanted. This bit is write-only.\\ To drive a motor in Step mode, the board uses a dedicated clock (Step Clock), supplied by the LOCAL board on a line of Bus P2.
Bit 2: CONT: Causes the motor to run in the direction defined by bit U/D until Time-Out trigs (see below: Time-Out). This bit overrides bit STEP. This bit is write-only.
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 24 of 74
1.3.3 Position Readout
The position of each motor can be read at any time, using a read access at MOTOR ADDRESS. The VME Bus is busy during conversion (40 microseconds), each time a readout is required. This time is the sum of (OP-AMP settling time to 0,01%: 15us) + (ADC conversion time: 25us) This time might be reduced if necessary, choosing a faster ADC; the timing is defined by a chronometer made with a GAL 6001 (chip U6) (see file: RADC.INP). To avoid a Bus Time-Out, the VIC of the Microprocessor board must be initialized for a cycle time of 64 microseconds. The 10.00 Volt reference needed by the ADC can be selected with jumper JPR1: STRAP 1-4 &: ADC INTERNAL REFERENCE. STRAP 2-3 &: BUS P2 COMMON REFERENCE (default). The 10.00 Volt reference from Bus P2 is supplied by the LOCAL board and should be used preferrently. This 10.00 V reference is buffered (U23 and Q6) on MOTOR board, and sent to potentiometers, in order to have all motors and the ADC sharing the same reference. That way, position readouts are purely ratiometric and do not depend on the absolute accuracy of the reference. !! DO NOT PUT ANY CAPACITOR ON POTENTIOMETERS, AS THIS WOULD CAUSE INSTABILITY IN 10.00 V REFERENCE!!
1.3.4 Securities
1.3.4.1 Time-out
Each motor has its own chronometer, which stops the motor if it has not been accessed in write mode for more than 165 msec. The chronometer of motor(i) restarts from zero after each write access to motor(i), i from 0 to F.
1.3.4.2 Watchdog
Second level of security, a line of Bus P2 is dedicated to a WATCHDOG, common to ALL MOTOR boards. If this WATCHDOG line returns to FALSE (0 Volt), a relay (RL2) on each MOTOR board will open, thus suppressing the +12 Volt used to power the motors. The WATCHDOG line is driven by the LOCAL board. If the Watchdog line is not true, a front-panel red LED turns ON. More details in section LOCAL BOARD.
1.3.4.3 Power Monitor
All voltages are monitored: +5V (logic), +12V (motors) and +/- 15V (analog). If a voltage is out of tolerance, the board is reset and the front-panel LED PWR turns OFF. A second relay (RL1) will open, if the power monitor detects a failure of the analog power supply (+/- 15 V), thus preventing damage to the analog chain (MUXs, AMP and ADC).
1.3.4.4 Power isolation
The 12 Volt used to power the motors is completely isolated from other voltages. ! NO CONNECTION IS ALLOWED BETWEEN 12VM or 0vM and ANY OTHER VOLTAGE OF THE MOTOR BOARD!
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 25 of 74
1.3.5 Front-Panel and Connections
1.3.5.1 LEDs
3 LEDs allow the user to detect main problems: LED DOG (red): Lit when WATCHDOG is false. Generally related to a problem with interrupts
on LOCAL board. LED PWR (green): Lit if all power supplies are OK. LED R/W (yellow): Flashes (200 msec) each time the board is addressed.
1.3.5.2 Connectors
4 connectors (HE10, 40 pins) allow the connections between the board and 16 motors. They are identical, each connector is dedicated to 4 motors, as follows: JM1: motors 0 to 3 (NUMMOT 0..3) JM2: motors 4 to 7 (NUMMOT 4..7) JM3: motors 8 to 11 (NUMMOT 8..B) JM4: motors 12 to 15 (NUMMOT D..F) PINOUT (identical for the 4 connectors) with i = 0 for JM1 4 for JM2 8 for JM3 12 for JM4 PIN NUMBER SIGNAL VOLTAGE DIRECTION 1 POT(i) GND 0 V INPUT 2 POT(i) CURSOR 0..10V INPUT 3 ANALOG GND 0 V OUTPUT 4 10V REF 10.00 V OUTPUT 5 LOGIC 5V 5 V OUTPUT 6 LOGIC GND 0 V OUTPUT 7 MOTOR(i) UP 0 = 2V 1 = 0V OUTPUT 8 MOTOR(i) DOWN 0 = 2V 1 = 0V OUTPUT 9 12V MOTOR 12 V OUTPUT 10 0 V MOTOR 0 V OUTPUT 11 POT(i+1) GND 0 V INPUT 12 POT(i+1) CURSOR 0..10V INPUT 13 ANALOG GND 0 V OUTPUT 14 10V REF 10.00 V OUTPUT 15 LOGIC 5V 5 V OUTPUT 16 LOGIC GND 0 V OUTPUT 17 MOTOR(i+1) UP 0 = 2V 1 = 0V OUTPUT 18 MOTOR(i+1) DOWN 0 = 2V 1 = 0V OUTPUT 19 12V MOTOR 12 V OUTPUT 20 0 V MOTOR 0 V OUTPUT 21 POT(i+2) GND 0 V INPUT 22 POT(i+2) CURSOR 0..10V INPUT 23 ANALOG GND 0 V OUTPUT 24 10V REF 10.00 V OUTPUT 25 LOGIC 5V 5 V OUTPUT 26 LOGIC GND 0 V OUTPUT 27 MOTOR(i+2) UP 0 = 2V 1 = 0V OUTPUT 28 MOTOR(i+2) DOWN 0 = 2V 1 = 0V OUTPUT 29 12V MOTOR 12 V OUTPUT 30 0 V MOTOR 0 V OUTPUT
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 26 of 74
31 POT(i+3) GND 0 V INPUT 32 POT(i+3) CURSOR 0..10V INPUT 33 ANALOG GND 0 V OUTPUT 34 10V REF 10.00 V OUTPUT 35 LOGIC 5V 5 V OUTPUT 36 LOGIC GND 0 V OUTPUT 37 MOTOR(i+3) UP 0 = 2V 1 = 0V OUTPUT 38 MOTOR(i+3) DOWN 0 = 2V 1 = 0V OUTPUT 39 12V MOTOR 12 V OUTPUT 40 0 V MOTOR 0 V OUTPUT The 40-wire cable may be splitted in four 10-wire cable, one cable for each motor. ! CAUTION : ALL CONNECTORS ON MOTOR BOARDS AND SMA BOARDS MUST HAVE A POLARITY KEY .WRONG CONNECTIONS RESULT IN IRREVERSIBLE DAMAGE TO GALs "R2M" AND TO THE OPTOCOUPLER OF BOARD "SMA"!
1.3.6 Hardware
1.3.6.1 GALs:
An extensive use of GALs was made in order to have 16 motors available on one single board. GAL RVMOT: U30: VME Bus interface. Source file: RVMOT.INP GALs R2M: U2, U3, U8, U9, U14, U15, U20, U21: all identical (can be swapped). Each GAL
R2M controls 2 motors. Source file: R2M.INP GAL RADC: U6: timing of A-D conversions. Source file: RADC.INP
1.3.6.2 Options
U12 was found unnecessary: pin 2 is strapped to pin 3. JA1 is not used on MOTORS board.
1.3.6.3 Adjustments
ADC Offset is adjustable with P1. ADC Gain is adjustable with P2. Adjustments were factory-made and should not be modified unless there are strong reasons to do so.
1.3.6.4 Filter
All differential analog inputs (from potentiometers) are low-pass filtered with a R-C network. The time-constant is: 2 * (1000 Ohms * 0.1 uF) = 200 useconds. The resistors of these filters are removable (DILs: RR1..RR4), allowing a modification of the filter constant.
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 27 of 74
12
13
11
U26D
4
5
6
U26B
9
10
8
U26C
1 2
CD14
L1
R14
1
2
3
U26A
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U30
23
22
21
20
18
19
1 2 3 4 5 6 7 8 910111314151617
U22
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
1
19 U27
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
19
1
U25
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S1
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
1
19 U31
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
19
1
U29
2
5
3
4
6
1
RD1
74LS38
74LS38
74LS38
100 uF T
VK 200
100K
74LS38
ICLK
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I/O10
I/O9
I/O8
I/07
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
OCLK
GAL RV16M
ABCDG1G2
0123456789101112131415
74HC154
P0
P1
P2
P3
P4
P5
P6
P7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
G
P=Q
74ALS520
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
G DIR
74ALS645
SW DIP-8
P0
P1
P2
P3
P4
P5
P6
P7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
G
P=Q
74ALS520
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
G DIR
74ALS645
RC
Date:
July 28, 1993Sheet
1
of
7
SizeDocument Number
REV
BF. Morel
1
Title
MOTOR BOARD : VME BUS CONTROLLER
IRAM RECEIVERS VME REMOTE CONTROL
SHEET 6
FRONT-PANEL
M[0..31]
P[0..31]
DTACK
VREF
/RST
INHIBIT
UNUSED
POWER SUPPLY
VME CONNECTOR P1
V /DTACK
V A2
V A3
V A4
V A5
V /IACK
V /WRITE
V /DS0
V /SYSRESET
V AM4
V AM3
V /LWORD
V AM5
V AM0
V AM1
V A15
V A14
V A8
V A9
V A11
V A13
V A7
V A6
V A12
V A10
V D[0..15]V /DS1
BUS CONTROL
END OF CONVERSION
SHEET 5
ANALOG TO DIGITAL
TIMOUT
MA[0..3]P[0..31]
EOC
CLK2
VREF
ID[0..11]
/RDADC
MOTORS DRIVE
ID1
ID2
ID0
M[0..31]
CLK4
CLK3
/RST
/WRT15
/WRT14
/WRT13
/WRT12
/WRT11
/WRT10
/WRT9
/WRT8
/WRT7
/WRT6
/WRT5
/WRT4
/WRT3
/WRT2
/WRT1
/WRT0
8 M H z C L O C K
ADDRESS MODIFIERS
FORMAT SPECIFIER
(AM=29 OR 2D)
A D D R E S S D E C O D E R
SHEET 4
CLOCKS AND RESET
CLK1
CLK2
CLK3
CLK4
/RST
POWER OK
TIMOUT
BCLK3
V /SYSRESET
SWA10
SWA11
SWA12
SWA13
SWA14
SWA15
BASE ADDRESS
(A15-A10)
BOARD NUMBER ( 0 TO F )
A D D R E S S D E C O D E R
SHEET 3
BUS P2
POWER OK
BCLK3
INHIBIT
SHEET 2
SWA6
SWA7
SWA8
SWA9
(A09-A06)
SHEET 7
ALL CHIPS ON DECOUPLED SOCKETS
BDIR = 0 VOLT => TRANSFER FROM IDBUS TO VMEBUS
BDIR = 5 VOLTS => TRANSFER FROM VMEBUS TO IDBUS
M[0..31]
P[0..31]
DTACK
VCC
VCC
+5V
V /DTACK
V A2
MA[0..3]
EOC
/RDADC
ID[0..11]
ID0
ID1
ID2
/WRT15
/WRT14
/WRT13
/WRT12
/WRT11
/WRT10
/WRT9
/WRT8
/WRT7
/WRT6
/WRT5
/WRT4
/WRT3
MA0
MA1
MA2
MA3
/RST
CLK1
BDIR
/BENAL
/BENAH
/WRITE
/RDADC
V A3
V A4
V A5
V /IACK
V /WRITE
V /DS0
V /DS1
V /SYSRESET
V AM4
V AM3
V /LWORD
V AM5
V AM0
V AM1
/ADOK
/WRT2
/WRT1
/WRT0
ID13
ID14
ID15
V D15
V D14
V D13
V A15
V A14
V A8
V A9
V A11
V A13
V A7
V A6
V A12
V A10
/BUSENAH
BDIR
V D12
V D11
V D10
V D9
V D8
V D7
ID7
ID8
ID9
ID10
ID11
ID12
ID[0..11]
ID6
ID5
ID4
ID3
ID2
ID1
ID0
/BUSENAL
BDIR
V D6
V D5
V D4
V D3
V D2
V D1
V D0
V D[0..15]
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 28 of 74
1
3
6
8
911
14
16
RL1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
J2
3 1 2
Q7
12D3
R16
11
10
U11E
21DZ1
R17
R10
2
1 3
Q4
2
1DZ2
R13
1 2D2
1
2
3
4
5
6
78910
11
12
RL2
1
2
3
4
5
6
7 8
U24
3 1 2
Q5
R9
R11
R12
1
2
3
6 5 4
U28
DR5V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
DIN41612 64/96
VN10
1N4148
1M
74HC14
8V2
100
680
2N3906
22V
1K
1N4148
S45V
/MR
NC
NC
GND
RST
/RST
NC
VCC
MAX 701
VN10
680
6k8
4k7
CNY17
Date:
July 20, 1993Sheet
2
of
7
SizeDocument Number
REV
AF. Morel
Title
MOTOR BOARD : POWER SUPPLY MONITOR
IRAM RECEIVERS VME REMOTE CONTROL
BUS P2
WATCHDOG SIGNAL,WHEN LOW,DISABLES MOTOR POWER SUPPLY
INHIBIT
BCLK3
MOTOR STEP CLOCK
POWER OK
POWER SUPPLIES MONITOR
12VM
VCC
0VM
12VBUS
0VM
12VBUS
STEP CLOCK
EARTH
EARTH
12VBUS
VCC
WATCHDOG
WATCHDOG
10VREF
0VANA
VDDBUS
VSSBUS
10VREF
0VANA
VDDBUS
VSSBUS
12VBUS
VDDBUS
VCC
VDDBUS
VSSBUS
VDD
VSS
0VM
0VANA
VSSBUS
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 29 of 74
1
2
U11A
8
1
X1
1
3
4 5 6
2
U17A
3
4
U11B
9
8
U11D
1
2
13
12
U1A
9
10
8
U4C
2
5
3
6
4 1
U5A
5
6
U11C
1
3
4 5 6
2
U16A
13
11
10 9 8
12
U17B
13
11
10 9 8
12
U16B
12
13
11
U4D
12
9
11
8
1 0 1 3
U5B
4
5
6
U4B
1
3
4 5 6
2
U10A
1
2
3
U4A
3
4
5
6
U1B
9
10
11
8
U1C
13
12
U11F
13
11
10
9
8
12
U10B
74HC14
CLK
NC
X-CLOCK
AQA
QBQCQD
CLR
74HC393
74HC14
74HC14
74HC11
74HC00
DQ
CLK
Q
P R C L
74HC74
74HC14
AQA
QBQCQD
CLR
74HC393
AQA
QBQCQD
CLR
74HC393
AQA
QBQCQD
CLR
74HC393
74HC00
DQ
CLK
Q
P R C L
74HC74
74HC00
AQA
QBQCQD
CLR
74HC393
74HC00
74HC11
74HC11
74HC14
AQA
QB
QC
QD
CLR
74HC393
Date:
May 24, 1993Sheet
3
of
7
SizeDocument Number
REV
BF. Morel
Title
MOTOR BOARD : CLOCK AND RESET GENERATOR
IRAM RECEIVERS VME REMOTE CONTROL
RESET
POWER OK
CLOCKS
8.000
MHz
5 0 0 K
CLOCK 8 MHz
125 ns CONTROLLER CLOCK
CLK1
TIMOUT
V /SYSRESET
/RST
READY=POWER OK & NO SYSRESET & NO TIME-OUT
CLK2
CLOCK 1 MHz
ADC CLOCK
3 1 . 2 5 K 1 . 9 5 K
MOTOR TIME-OUT = 262 ms
CLK4
CLOCK 30.5 Hz
MOTOR TIME-OUT CLOCK
1 2 2
MOTOR STEP CLOCK FROM LOCAL CONTROL BOARD
BCLK3
CLK3
UNUSED
READY
VCC
VCC
-
IRAM
MultiBeam
Control
Create D
ate:May 2001
Author: A.Perrigouard control.doc
Page 30 of 74
1 2 3 4 5 6 7 8 9 10 11
2322212019181716151413
U2 1 2 3 4 5 6 7 8 9 10 11
2322212019181716151413
U8 1 2 3 4 5 6 7 8 9 10 11
2322212019181716151413
U14 1 2 3 4 5 6 7 8 9 10 11
2322212019181716151413
U20
1 2 3 4 5 6 7 8 9 10 11
2322212019181716151413
U3 1 2 3 4 5 6 7 8 9 10 11
2322212019181716151413
U9 1 2 3 4 5 6 7 8 9 10 11
2322212019181716151413
U15 1 2 3 4 5 6 7 8 9 10 11
2322212019181716151413
U21
ICLKI1I2I3I4I5I6I7I8I9I10
I/O10I/O9I/O8I/07I/O6I/O5I/O4I/O3I/O2I/O1OCLK
6001
ICLKI1I2I3I4I5I6I7I8I9I10
I/O10I/O9I/O8I/07I/O6I/O5I/O4I/O3I/O2I/O1OCLK
6001
ICLKI1I2I3I4I5I6I7I8I9I10
I/O10I/O9I/O8I/07I/O6I/O5I/O4I/O3I/O2I/O1OCLK
6001
ICLKI1I2I3I4I5I6I7I8I9I10
I/O10I/O9I/O8I/07I/O6I/O5I/O4I/O3I/O2I/O1OCLK
6001
ICLKI1I2I3I4I5I6I7I8I9I10
I/O10I/O9I/O8I/07I/O6I/O5I/O4I/O3I/O2I/O1OCLK
6001
ICLKI1I2I3I4I5I6I7I8I9I10
I/O10I/O9I/O8I/07I/O6I/O5I/O4I/O3I/O2I/O1OCLK
6001
ICLKI1I2I3I4I5I6I7I8I9I10
I/O10I/O9I/O8I/07I/O6I/O5I/O4I/O3I/O2I/O1OCLK
6001
ICLKI1I2I3I4I5I6I7I8I9I10
I/O10I/O9I/O8I/07I/O6I/O5I/O4I/O3I/O2I/O1OCLK
GAL R2M
Date: June 2, 1993 Sheet 4 of 7
Size Document Number REV
B F. Morel
Title
MOTOR BOARD : MOTOR DRIVES
IRAM RECEIVERS VME REMOTE CONTROL
/RST/RST/RST
MOTORS ARE NUMBERED FROM 0 TO 15
/RSTID0ID1ID2
CLK4
/WRT0/WRT1
/M0D/M0U/M1D/M1U
CLK3
ID0ID1ID2
CLK4
/WRT2/WRT3
/M2D/M2U/M3D/M3U
CLK3
ID0ID1ID2
CLK4
/WRT4/WRT5
/M4D/M4U/M5D/M5U
CLK3
ID0ID1ID2
CLK4
/WRT6/WRT7
/M6D/M6U/M7D/M7U
CLK3
MOTORS 6 AND 7MOTORS 4 AND 5MOTORS 2 AND 3MOTORS 0 AND 1
M[0..31]
/M14D/M14U/M15D/M15U
MOTORS 14 AND 15
ID0ID1ID2
/RST
/WRT14/WRT15
/M12D/M12U/M13D/M13U
MOTORS 12 AND 13
ID0ID1ID2
/RST
/WRT12/WRT13
/M10D/M10U/M11D/M11U
MOTORS 10 AND 11
ID0ID1ID2
/RST
/WRT10/WRT11
/M8D/M8U/M9D/M9U
MOTORS 8 AND 9
ID0ID1ID2
/RST
/WRT8/WRT9
CLK4CLK3
CLK4CLK3
CLK4CLK3
CLK4CLK3
/M0U means : Low-level active command [ MOVE MOTOR 0 UP ]/M15D means : Low-level active command [ MOVE MOTOR 15 DOWN ]
M0M1M2M3
M4M5M6M7
M8M9M10M11
M12M13M14M15
M[0..31]
M28M29M30M31
M24M25M26M27
M20M21M22M23
M16M17M18M19
-
IRAM MultiBeam Control
Create Date:May 2001 Author: A.Perrigouard control.doc Page 31 of 74
R5
1
16
RR1A
2
15
3
14
4
13
5
12
6
11
7
10
8
9
1
16
RR2A
2
15
3
14
4
13
5
12
6
11
7
10
8
9C1
C8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
U7
R4
1
2
3
4
5
6
7
8
9
10111213141516
U13
3
2
6 1
8
7 4
U11
2
15
1
16
RR3A
3
14
4
13
5
12
6
11
7
10
8
9
1
16
RR4A
2
15
3
14
4
13
5
12
6
11
C9
C16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
U19
1
2
3
4
5
6
7
8
9
10
11
12
13
14
2827262524232221201918171615
U18
CD8
L3
7
10
8
9
RR4H
CD3
CD4
CD5
CD6
CD10
CD11
L4
CD1
CD2
CD7
CD9
1 2
CD12
1 2
CD13
12
3
P2
R7
R8
12
3
P1
R6
3
2
6 1
8
7 4
U23
CDX
2
13Q6
JPR1
R15
1
2
3
4
5
6
7
8
9
10
11
23
22
21
20
19
18
17
16
15
14
13
U6
L2
CD15
1 2
CD16
C17
10M
8X1K
8X1K
VDD
OUTB
NC
IN8B
IN7B
IN6B
IN5B
IN4B
IN3B
IN2B
IN1B
GRND
NC
NC
A2
A1
A0
ENA
IN1A
IN2A
IN3A
IN4A
IN5A
IN6A
IN7A
IN8A
VSS
OUTA
ADG507
10M
I-I+RG2
INUL
INUL
REF
VSS
VDD
OUT
SENS
G500
G200
G100
ONUL
ONUL
RG1
AD624
OP27
8X1K
8X1K
VDD
OUTB
NC
IN8B
IN7B
IN6B
IN5B
IN4B
IN3B
IN2B
IN1B
GRND
NC
NC
A2
A1
A0
ENA
IN1A
IN2A
IN3A
IN4A
IN5A
IN6A
IN7A
IN8A
VSS
OUTA
ADG507
VCC
12-/8
/CS
A0R-/C
CEVDD
REF OUT
AGND
REF IN
VSS
OFFST
10V AIN
20V AIN
STS
D11
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
DGND
AD774
1uF
VK200
1uF
1uF
1uF
1uF
1uF
1uF
VK200
1uF
1uF