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    Introduction

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    Processor

    NextMother board

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    The processor (CP U, for Central Processing Unit) is the computer's brain. Iallows the processing of numeric data, meaning information entered in binarform, and the execution of instructions stored in memory.

    The first microprocessor (Intel 4004) was invented in 1971. It was a 4-bicalculation device with a speed of 108 kHz. Since then, microprocessor power hagrown exponentially. So what exactly are these little pieces of silicone that ruour computers?

    Operation

    The processor (called CP U, for Central Processing Unit) is an electronic circuithat operates at the speed of an internal clock thanks to a quartz crystal thatwhen subjected to an electrical currant, send pulses, called "peaks". The clocspeed (also called cycle), corresponds to the number of pulses per secondwritten in Hertz (Hz). Thus, a 200 MHz computer has a clock that send200,000,000 pulses per second. Clock frequency is generally a multiple of thsystem frequency (FSB, Front-Side Bus), meaning a multiple of the motherboarfrequency.

    With each clock peak, the processor performs an action that corresponds to aninstruction or a part thereof. A measure called CP I (Cycles Per Instruction) givea representation of the average number of clock cycles required for amicroprocessor to execute an instruction. A microprocessors power can thube characterized by the number of instructions per second that it is capable oprocessing. MIPS (mill ions of instructions per second) is the unit used ancorresponds to the processor frequency divided by the CPI.

    Instructions

    An instruction is an elementary operation that the processor can accomplishInstructions are stored in the main memory, waiting to be processed by thprocessor. An instruction has two fields:

    the operation code, which represents the action that the processor mus

    execute;

    the operand code, which defines the parameters of the action. The operan

    code depends on the operation. It can be data or a memory address.

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    Operation Code Operand Field

    The number of bits in an instruction varies according to the type of data(between 1 and 4 8-bit bytes).

    Instructions can be grouped by category, of which the main ones are:

    Memory Access: accessing the memory or transferring data between registers

    Arithmetic Operations: operations such as addition, subtraction, division o

    multiplication.

    Logic Operations: operations such as AND, OR, NOT, EXCLUSIVE NOT, etc.

    Control: sequence controls, conditional connections, etc.

    Registers

    When the processor executes instructions, data is temporarily stored in smalllocal memory locations of 8, 16, 32 or 64 bits called registers. Depending on thtype of processor, the overall number of registers can vary from about ten tomany hundreds.

    The main registers are:

    the accumulator register (ACC), which stores the results of arithmetic anlogical operations;

    the status register (PSW, Processor Status Word), which holds system statuindicators (carry digits, overflow, etc.);the instruction register (RI), which contains the current instruction beinprocessed;

    the ordinal counter (OC or PC for Program Counter), which contains thaddress of the next instruction to process;

    the buffer register, which temporarily stores data from the memory.

    Cache Memory

    Cache memory (also called buffer memory) is local memory that reduces waitintimes for information stored in the RAM (Random Access Memory). In effect, thecomputer's main memory is slower than that of the processor. There arehowever, types of memory that are much faster, but which have a greatlincreased cost. The solution is therefore to include this type of local memorclose to the processor and to temporarily store the primary data to be processedin it. Recent model computers have many different levels of cache memory:

    Level one cache memory (called L1 Cache, for Level 1 Cache) is direct

    integrated into the processor. It is subdivided into two parts:

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    the first part is the instruction cache, which contains instructions from th

    RAM that have been decoded as they came across the pipelines.

    the second part is the data cache, which contains data from the RAM an

    data recently used during processor operations.

    Level 1 caches can be accessed very rapidly. Access waiting time approaches tha

    of internal processor registers.Level two cache memory (called L2 Cache, for Level 2 Cache) is located i

    the case along with the processor (in the chip). The level two cache is a

    intermediary between the processor, with its internal cache, and the RAM. I

    can be accessed more rapidly than the RAM, but less rapidly than the level on

    cache.

    Level three cache memory (called L3 Cache, for Level 3 Cache) is located o

    the motherboard.

    All these levels of cache reduce the latency time of various memory types wheprocessing or transferring information. While the processor works, the level oncache controller can interface with the level two controller to transfer informatiowithout impeding the processor. As well, the level two cache interfaces with thRAM (level three cache) to allow transfers without impeding normal processooperation.

    Control Signals

    Control signals are electronic signals that orchestrate the various processounits participating in the execution of an instruction. Control signals are senusing an element called a sequencer. For example, the Read / Write signal allowthe memory to be told that the processor wants to read or write information.

    Functional Units

    The processor is made up of a group of interrelated units (or control units)Microprocessor architecture varies considerably from one design to another, buthe main elements of a microprocessor are as follows:

    A control unit that links the incoming data, decodes it, and sends it to th

    execution unit:The control unit is made up of the following elements:

    sequencer (or monitor and logic unit) that synchronizes instructioexecution with the clock speed. It also sends control signals;

    ordinal counter that contains the address of the instruction currently bein

    executed;

    instruction register that contains the following instruction.

    An execution unit (or processing unit) that accomplishes tasks assigned to by the instruction unit. The execution unit is made of the following elements:

    The arithmetical and logic unit (written ALU). The ALU performs bas

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    arithmetical calculations and logic functions (AND, OR, EXCLUSIVE OR, etc.)

    The floating point unit (written FP U) that performs partial comple

    calculations which cannot be done by the arithmetical and logic unit.

    The status register;

    The accumulator register.

    A bus management unit (or input-output unit) that manages the flow o

    incoming and outgoing information and that interfaces with system RAM;

    The diagram below gives a simplified representation of the elements that makup the processor (the physical layout of the elements is different than theiactual layout):

    Transistor

    To process information, the microprocessor has a group of instructions, called the"instruction set", made possible by electronic circuits. More precisely, thinstruction set is made with the help of semiconductors, little "circuit switchesthat use the transistor effect, discovered in 1947 by John Barden, Walter HBrattain and William Shockley who received a Nobel Prize in 1956 for it.

    A transistor (the contraction oftransfer resistor) is an electronic semi-conductocomponent that has three electrodes and is capable of modifying current passinthrough it using one of its electrodes (called control electrode). These arreferred to as "active com onents" in contrast to " assive com onents" such a

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    resistance or capacitors which only have two electrodes (referred to as bein"bipolar").

    A MOS (metal, oxide, silicone) transistor is the most common type of transistoused to design integrated circuits. MOS transistors have two negatively chargedareas, respectively called source (which has an almost zero charge) and drai(which has a 5V charge), separated by a positively charged region, called substrate). The substrate has a control electrode overlaid, called a gate, thaallows a charge to be applied to the substrate.

    When there is no charge on the control electrode, the positively chargesubstrate acts as a barrier and prevents electron movement from the source tothe drain. However, when a charge is applied to the gate, the positive charges othe substrate are repelled and a negatively charged communication channel iopened between the source and the drain.

    The transistor therefore acts as a programmable switch, thanks to the controelectrode. When a charge is applied to the control electrode, it acts as a closedinterrupter and, when there is no charge, it acts as an open interrupter.

    Integrated Circuits

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    Once combined, transistors can make logic circuits, that, when combined, formprocessors. The first integrated circuit dates back to 1958 and was built by TexaInstruments.

    MOS transistors are therefore made of slices of silicone (called wafers) obtaineafter multiple processes. These slices of silicone are cut into rectangulaelements to form a "circuit". Circuits are then placed in cases with input-outpuconnectors and the sum of these parts makes an "integrated circuit". Th

    minuteness of the engraving, written in microns (micrometers, written mdefines the number of transistors per surface unit. There can be millions otransistors on one single processor.

    Moore' s Law , penned in 1965 by Gordon E. Moore, cofounder of Intel, predictedthat processor performance (by extension of the number of transistors integratedin the silicone) would double every twelve months. This law was revised in 1975bringing the number of months to 18. Moores Law is still being proven today

    Because the rectangular case contains input-output pins that resemble legs, theterm "electronic flea" is used in French to refer to integrated circuits.

    Families

    Each type of processor has its own instruction set. Processors are grouped intthe following families, according to their unique instruction sets:

    80x86: the "x" represents the family. Mention is therefore made to 386, 486

    586, 686, etc.

    ARM

    IA-64

    MIPS

    Motorola 6800

    PowerPC

    SPARC

    ...

    This explains why a program produced for a certain type of processor can onlywork directly on a system with another type of processor if there is instructiotranslation, called emulation. The term "emulator" is used to refer to thprogram performing this translation.

    Instruction Set

    An instruction set is the sum of basic operations that a processor caaccomplish. A processors instruction set is a determining factor in itarchitecture, even though the same architecture can lead to differenimplementations by different manufacturers.

    The rocessor works efficientl thanks to a limited number of instructions

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    hardwired to the electronic circuits. Most operations can be performed using basifunctions. Some architecture does, however, include advanced processofunctions.

    CISC Architecture

    CISC (Complex Instruction Set Computer) architecture means hardwiring theprocessor with complex instructions that are difficult to create using basi

    instructions.

    CISC is especially popular in 80x86 type processors. This type of architecture haan elevated cost because of advanced functions printed on the silicone.

    Instructions are of variable length and may sometimes require more than oneclock cycle. Because CISC-based processors can only process one instruction at atime, the processing time is a function of the size of the instruction.

    RISC Architecture

    Processors with RISC (Reduced Instruction Set Computer) technology do nohave hardwired, advanced functions.

    Programs must therefore be translated into simple instructions which complicatedevelopment and/or requires a more powerful processor. Such architecture has areduced production cost compared to CISC processors. In addition, instructionssimple in nature, are executed in just one clock cycle, which speeds up programexecution when compared to CISC processors. Finally, these processors cahandle multiple instructions simultaneously by processing them in parallel.

    Technological ImprovementsThroughout time, microprocessor manufacturers (called founders) have developea certain number of improvements that optimize processor performance.

    Parallel Processing

    Parallel processing consists of simultaneously executing instructions from thesame program on different processors. This involves dividing a program intomultiple processes handled in parallel in order to reduce execution time.

    This type of technology, however, requires synchronization and communicatiobetween the various processes, like the division of tasks in a business: work idivided into small discrete processes which are then handled by differendepartments. The operation of an enterprise may be greatly affected whencommunication between the services does not work correctly.

    Pipelining

    Pipelining is technology that improves instruction execution speed by putting thesteps into parallel.

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    To understand the pipelines mechanism, it is first necessary to understandthe execution phases of an instruction. Execution phases of an instruction for aprocessor with a 5-step "classic" pipeline are as follows:

    FETCH: (retrieves the instruction from the cache;DECODE: decodes the instruction and looks for operands (register oimmediate values);

    EXECUTE: performs the instruction (for example, if it is an ADD instruction

    addition is performed, if it is a SUB instruction, subtraction is performed, etc.)MEMORY : accesses the memory, and writes data or retrieves data from it;WRITE BACK (retire) : records the calculated value in a register.

    Instructions are organized into lines in the memory and are loaded one after theother.

    Thanks to the pipeline, instruction processing requires no more than the fiv

    preceding steps. Because the order of the steps is invariable (FETCH, DECODEEXECUTE, MEMORY, WRITE BACK), it is possible to create specialized circuits ithe processor for each one.

    The goal of the pipeline is to perform each step in parallel with the precedingand following steps, meaning reading an instruction (FETCH) while the previoustep is being read (DECODE), while the step before that is being executed(EXECUTE), while the step before that is being written to the memory (MEMORY)and while the first step in the series is being recorded in a register (WRITEBACK).

    In general, 1 to 2 clock cycles (rarely more) for each pipeline step or a maximumof 10 clock cycles per instruction should be planned for. For two instructions, maximum of 12 clock cycles are necessary (10+2=12 instead of 10*2=20because the preceding instruction was already in the pipeline. Both instructionare therefore being simultaneously processed, but with a delay of 1 or 2 cloccycles. For 3 instructions, 14 clock cycles are required, etc.

    The principle of a pipeline may be compared to a car assembly line. The camoves from one workstation to another by following the assembly line and icompletely finished by the time it leaves the factory. To completely understand

    the rinci le the assembl line must be looked at as a whole and not vehicle b

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    This document entitled Processor from Kioskea (en.kioskea.net) is made available under the CreativCommons license. You can copy, modify copies of this page, under the conditions stipulated by the licenc

    as this note appears clearly.

    vehicle. Three hours are required to produce each vehicle, but one is producedevery minute!

    It must be noted that there are many different types of pipelines, varying from 2to 40 steps, but the principle remains the same.

    Superscaling

    Superscaling consists of placing multiple processing units in parallel in order tprocess multiple instructions per cycle.

    HyperThreading

    HyperThreading (written HT) technology consists of placing two logiprocessors with a physical processor. Thus, the system recognizes two physicaprocessors and behaves like a multitasking system by sending two simultaneouthreads, referred to as SMT (Simultaneous Multi Threading). This "deceptionallows processor resources to be better employed by guaranteeing the bulshipment of data to the processor.

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