introduction to microprocessors - unc charlottesjkuyath/elet2231/topic/topic 4... · – examine...
TRANSCRIPT
Topic 4Instruction Set
Microprocessor Fundamentals
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Objectives
• Define RISC and CISC– Describe the difference
• To become familiar with the AVR instruction set– Specifically the ATmega instruction set– ATmega adds a few instructions– Examine Atmel’s instruction set nomenclature– Examine both the Instruction Set Summary and the
more detailed documentation
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AVR• AVR Microcontrollers are RISC as opposed to CISC
– RISC: Reduced Instruction Set Computers• 100 – 200 instructions
» Includes all variations of addressing modes» Without variations there may be only 50 (or less) instructions
• Faster: usually executes instructions in one clock cycle• Difficult to program complex math (in assembly)• Can program in C or Java
– CISC: Complex Instruction Set Computers• Hundreds of instructions• Many special purpose• Usually includes complicated (for assembly) math functions• Can program in many high level languages
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The Status Register
• The Status Register
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Flags
• Notation used by ATMEL to inform the programmer that the instruction affects/does not affect the status register bit
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The Status Register
• C bit:– Set (set to a logic 1) if the there is a carry out or a borrow in as
a result of the operation, otherwise 0• Z bit:
– Set to a logic 1 if the result of an operation is 0, otherwise 0• N bit:
– Set to a logic 1 if the result of an operation is negative (the MSb of the result is 1), otherwise 0
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The Status Register
• V bit:– Set to a logic 1 if there is a 2’s compliment overflow
as a result of the operation, otherwise 0• Example: if two positive numbers (MSb = 0) are added
together and the result is a negative number (MSb = 1)– 7F + 1 = 80 (7F = 01111111, 1 = 00000001, 80 = 1000000)
• Example: if two negative numbers (MSb = 1) are added together and the result is a positive number (MSb = 0)
– 80 + 80 = 00 with C = 1 (80 = 1000000, 00 = 00000000)
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The Status Register
• S bit:– Tests N V after the result
• So if both N and V = 1, S =0• If only N = 1 or if only V = 1, S =1
• H bit:– Set to a logic 1 if there is a carry from b3 to b4 during
an ADD operation, otherwise 0– Other special situations set or clear H
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The Status Register
• T bit:– Transfer bit used by BLD and BST instructions
• I bit:– Global interrupt enable/disable flag
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Registers and Operands
• Notations used by ATMEL documentation
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Example Instructions
• Let’s look at a few Add instructions
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Add Instructions
• ADD• The mnemonic is ADD• The operands are the destination register (Rd) and the source
register (Rr)• The description indicates that this is an add without using
the carry bit
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Add Instructions
• ADD• The operation indicates that the values in the two registers
are added and the result is stored in the destination register (Rd)
• The Z, C, N, V, S, and H bits are affected by this instruction• The instruction takes one clock cycle to execute
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Add Instructions
• ADC• The mnemonic is ADC• The operands are the destination register (Rd) and the source
register (Rr)• The description indicates that this is an add with the carry bit
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Add Instructions
• ADC• The operation indicates that the values in the two registers
and the value of the C bit are added and the result is stored in the destination register (Rd)
• The Z, C, N, V, S, and H bits are affected by this instruction• The instruction takes one clock cycle to execute
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Add Instructions
• ADIW• This instruction is NOT as straightforward as the previous
two instructions• The mnemonic is ADIW• The operands are the destination register (Rd) and
immediate data (K) – see nomenclature on pg 11• The description indicates that this is an add immediate to
word– But, what exactly does that mean?
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Add Instructions
• ADIW (You may be asking: exactly where did I get this information?)
• The operation indicates that the register specified (Rd) is combined with the register immediately following it (Rd+1), then ….
• The 16 bit immediate data (K) is added to these two registers, then ….• The results are stored in the two combined registers
» (Rd and Rd+1)• The Z, C, N, V, and S, (but not H) bits are affected by this instruction• Takes 2 clock cycles to execute
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Add Instructions
• ADIW – This information is difficult (impossible??) to get out
of this table– There is more detailed information later in the
documentation ……
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ADIW• The documentation
provides more detailed information
• For example …..
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ADIW
• This description let’s us know that K (the immediate data) can be a number between 0 and 63
• Only the uppermost 4 register pairs can be used• Must specify the “even numbered” register• Also, this instruction is not available on all AVR chips
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ADIW
• This description provides the Boolean expressions for determining the CCR bits
• Not necessary for us to know – it just has to work right• The best information in this section are the examples
adiw r25:24,1 ; adds 1 to r25:r24adiw zm:zl,63 ; adds 63 to the Z-Pointer (r31:r30)
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MOV
• MOV is fairly straightforward• Note: It copies the value in one register to another• The value in the source register (Rr) remains unchanged
– If it got changed by this instruction it would have something like: Rr 00
• LDI is also fairly straightforward• Loads immediate data into Rd (destination register)• But: is K (the immediate data) 8 or 16 bits, or some other range of
numbers?
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LDI• LDI:
– K is 8 bits– Only registers 16
to 31 can be used• That was NOT
obvious in the summary
– No bits in the CCR are affected by this instruction
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LD
• The two LD instructions may need a closer look– LD Rd,X+– What is meant by Rd (X)?– What is meant by X X+1– LD Rd,-X– What is meant by Rd (X)?– What is meant by X X-1– What is meant by the order of these statements?
In-Class Exercise: answer these 5 questions
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LD
• The two LD instructions may need a closer look– LD Rd,X+– What is meant by Rd (X)?– What is meant by X X+1– LD Rd,-X– What is meant by Rd (X)?– What is meant by X X-1– What is meant by the order of these statements?
The data at the memory location pointed to by X is transferred to Rd
The value in X is incremented by 1 and then stored back in X
The data at the memory location pointed to by X is transferred to Rd
The value in X is decremented by 1 and then stored back in X
The order of these statements tells us which is done first. For the LD Rd,X+, first the data is transferred to Rd then X is incremented. In the LD Rd,-X, first X is decremented, then data is transferred to Rd
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Branch Instructions
• The branch instructions (in this case all are conditional) all have an operand of “k”
• What is k?
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Branch Instructions
• The branch instructions (in this case all are conditional) all have an operand of “k”
• What is k?• Can k be a label?
‘k’ is an address (as shown on page 11)
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Branch Instructions
• The branch instructions (in this case all are conditional) all have an operand of “k”
• What is k?• Can k be a label?
• The operation column shows the condition for which the branch is taken
• Example: BREQ branches if the Z bit = 1• Are BRCC and BRSH the same?
‘k’ is an address (as shown on page 11)Yes, ‘k’ can be a label – makes reading your program easier
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Branch Instructions
• The branch instructions (in this case all are conditional) all have an operand of “k”
• What is k?• Can k be a label?
• The operation column shows the condition for which the branch is taken
• Example: BREQ branches if the Z bit = 1• Are BRCC and BRSH the same?
‘k’ is an address (as shown on page 11)Yes, ‘k’ can be a label – makes reading your program easier
Yes, they both branch under the same condition (C = 0)
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BRSH and BRCC
The descriptions are a little different …..
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BRSH and BRCC
The descriptions are a little different. The operations are a little different, but essentially the same (both have “if C = 0”).
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BRSH and BRCC
The descriptions are a little different. The operations are a little different, but essentially the same (both have “if C = 0”).What really gives it away (that they are the same) is that the machine code (the 16-bit opcode) for both is the same – they both assemble to the same instruction
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BRSH and BRCC
And, another thing that becomes clear is that branch instructions can only branch 64 addresses back or 64 addresses forward.
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What’s the point?
• You cannot memorize the whole instruction set• But, the most used instructions will become so
familiar that essentially they have been memorized
• When writing a program, use the summary sheet and example programs to choose instructions
• Then, look them up, every time you use one, in the more detailed section of the documentation, until you know what happens
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Summary
• In this topic we:– Defined RISC and CISC
• And described the difference between them– Became familiar with the AVR instruction set
• Specifically the ATmega instruction set• Examined Atmel’s instruction set nomenclature• Examined both the Instruction Set Summary and the more
detailed documentation