interconnect technology
TRANSCRIPT
![Page 1: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/1.jpg)
TECHNICAL CAPABILITYTECHNICAL CAPABILITY
![Page 2: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/2.jpg)
Thru hole :Thru hole : Aspect ratio =< 14 Drilling diameter 150 µ
Materials (RoHS) : High Tg epoxy (Tg 175°C) completely compatible RoHS (Filler et phenolic hardener) Materials for high frequencies (4 to 15 GHz)M Green materials (Halogen free) Low deformation materials (X,Y,Z)L
Lines & spacing : AOI check Clean room classe 100 40 µ lines / 60 µ spacing
Laser vias : Sequential multilayers (3 levels) Stacked Microvias Laser Holes 75 µ
Finishes : Electroless nickel-gold Electroless tin - OSP HASL- Fused tin-lead Ionic contamination < 0.3 µg/cm2
Blind vias :Blind vias : drilling 100 µ
General capability
![Page 3: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/3.jpg)
Today 2009 2010External lines and spacing 75 µ / 85 µ 60 µ / 75 µ 50 µ / 70 µ
CMS minimum pitch 200 µ 200 µ 200 µ
BGA minimum pitch 300 µ 250 µ 200 µ
Drilled holes (D)--> board 150 µ 100 µ 100
--> laser via 75 µ 75 µ 75 µ
Pad diameter D + 250 µ D + 220 µ D + 200 µ
Aspect ratio 14:1 16:1 16:1
Internal lines and spacing 60 µ / 80 µ 50 µ / 75 µ 40 µ / 60 µ
Base MaterialsHigh Tg Epoxy - Halogen
free - Polyimide - BT epoxy - Rogers
High Tg Epoxy - Halogen free - Polyimide - BT
epoxy - Rogers
High Tg Epoxy - Halogen free - Polyimide - BT
epoxy - Rogers
Technology Sequential multilayers - laser µvias 2 & 3 levels - Stacked vias - Burried &
blind vias - Thermal drains- Rigid-flex
Sequential multilayers - laser µvias 2 & 3 levels - Stacked vias - Burried &
blind vias - Thermal drains- Rigid-flex
Sequential multilayers - laser µvias 2 & 3 levels - Stacked vias - Burried &
blind vias - Thermal drains- Rigid-flex
General capability
![Page 4: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/4.jpg)
Technical investments
![Page 5: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/5.jpg)
Laser vias filling lineRouter with CCD camera and Z axis control
Drilling(OIR & 300KT/MN)
LDI (Paragon 8W)Laser plotter (LP5008)
DES lineAOI & AOR (Automatic Optical Repair)
Electroless nickel-gold line
200920082007
Technical investments
![Page 6: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/6.jpg)
Reliability
![Page 7: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/7.jpg)
• 12 layers • 2.4 mm thickness• 8000 interconnected holes
( « daisy chain ») • Drilled holes from 0.25 mm to 1.1 mm• BGA’s au pas de 1 et 1.27 mm• CMS pads• Internal connections at several levels
Reliability : Process Control BoardReliability : Process Control Board
![Page 8: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/8.jpg)
Process Control BoardProcess Control Board
• Production of 3 boards per week
• Base Materials control (Tg 175°C)B
• Plating Control (Electroless & electrolytic copper baths)
• Thermal shocks and microsections :
- 1 to 4*10s at 287 °C on “standard” high Tg epoxy- 2 to 8*10s at 300 °C on high Tg epoxy « ROHS »
--> Controls according to IPC A600 (classe 3)
Advance detection of board failure modesProcess and Material board qualification
![Page 9: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/9.jpg)
Industrial designs & examples
for high reliable boards
![Page 10: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/10.jpg)
(µ)Thickness 400 to 1500Drilled hole diameter 150 to 250Aspect ratio 4 à 8
"Intermediate board"
Layers (µ)Externals 9 to 18 Signal inner 18 to 35
Base Copper Thickness
or
Base materials : high Tg (175°C°) epoxywith fillers and phenolic hardener
![Page 11: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/11.jpg)
BGA from 0.8 to 1 mm pitch
Pitch Pads diameter Line width Technology
1000 µ 550 µ 120 µ (one line between 2 pads) "Dog bone" and thru holes
75 µ (two lines between 2 pads)
800 µ 400 µ 75 to 100 µ (one line between two pads) "Dog bone" and thru holes
![Page 12: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/12.jpg)
![Page 13: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/13.jpg)
Blind holes
Thru holes
BGA at 1 mmpitch
(1500 boules)
![Page 14: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/14.jpg)
Main technology in the case of “large” BGA’s
(number of balls from 800 to 1800)
Main markets : Avionics, Military, Industriel, “big” computers
Evolutions : high number of layers (+ 40% in 4 years)
Base copper thickness of 35µ (Low voltage ; “differential” signals)
Controlled impedances
“Sequential” boards
![Page 15: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/15.jpg)
High Density PCB’s
Designs & examples
for HDI boards
(Advanced technology)
![Page 16: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/16.jpg)
High Density PCB’s
The packaging “orientation” is mainly due to :
- the market segment (”consumer” vs “professional”...)
- the BGA pitch
- the “matrix” size (number of balls)
- the electrical constraints (impedance, signal quality ...)
- the assembly constraints (thermal shocks, finishes ...)
![Page 17: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/17.jpg)
High Density PCB’s
BGA at 0.5 to 0.3 mm pitch
Pitch Pads diameter Line width Technology
500 µ 250 to 300 µ 70 to 60 µ (one line between 2 pads) Vias laser "in pad"1 to 3 levels of microvias
400 µ 200 to 220 µ 40 to 60 µ (one line between 2 pads) Vias laser "in pad"1 to 3 levels of microvias
"Stacked" microvias
300 µ 160 to 180 µ 30 to 40 µ (one line between 2 pads) Vias laser "in pad"1 to 3 levels of microvias
"Stacked" microvias
![Page 18: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/18.jpg)
High Density PCB’s
1 2 3 4 5 6 7
1
2
3Orientations - 24 pads rangée 1 : connection par couche 1
4 - 16 pads rangée 2 : connection par couche 2 (liaison 1-2 par vias laser) - 8 pads rangée 3 : connection par couche 3 (Liaison 1-3 avec trous superposés)
5
6
7
Rangée 1 2 3 Pastille Trou Diélectrique Traits/isolements
Qté 24 16 8 (µ) (Perçé) (µ)
Couche 1 260 100 (laser) 100/12550 à 75 Prepreg
Couche 2 300 100 (laser) 100/12550 à 75 Prepreg
Couche 3 300 100/125
BGA at 0.5 mm pitch without lines between pads
![Page 19: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/19.jpg)
High Density PCB’s
Example
Thru holes drilled at 0.25 mm
Laser holes drilled at 0.1 mm
100 µ lines
Thickness : 1 mm
BGA pitch 0.5 mm
External Layer Internal Layer
![Page 20: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/20.jpg)
High Density PCB’s
Dimensions en microns
V1 V2
Pas BGA 500 500
Diamètre pad 250 280
Trait 70 60Isolement 90 80Diamètre trou laser 100 100
Diamètre épargne VE 350 380
Pad interne (pour trou laser) 300 300
BGA at 0.5 mm pitch with one line between 2 pads
![Page 21: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/21.jpg)
High Density PCB’s
1 2 3 4 5 6 7 8 9 10
1
2
3
4
5
6
7
8
9
10
Rangées 1 2 et 3 4 et 5 Pad Trou Cuivre Dielectric Trait/isolement(µ) (µ) (µ) (µ)
(laser)
Couche n-2 220 100 25-30 55 / 62.550 à 75 Prepreg
Couche n-1 220 100 25-30 55 / 62.550 à 75 Prepreg
Couche n 250 40-45 120 / 120
Un trait entre 2 pads (au pas de 400 µ) couches n-1 et n-2
BGA at 0.4 mm pitch with one line between 2 pads
![Page 22: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/22.jpg)
High Density PCB’s
1 2 3 4 5
1
2
3
4
5
Rangée 1 2 3 Pastille Trou Ep Vernis Diélectrique Traits/isolements
Qté 16 8 1 (µ) (Perçé) (µ) (µ)
Couche 1 220 100 220 100/12550 à 75 Prepreg
Couche 2 220 100 100 100/12550 à 75 Prepreg
Couche 3 300 100/125
Orientations - 16 pads rangée 1 : connection par couche 1 - 8 pads rangée 2 : connection par couche 2 (liaison 1-2 par vias laser) - 1 pad central : connection par un trait en couche 3
Pas de 300µ
BGA at 0.3 mm pitch without lines between pads
![Page 23: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/23.jpg)
High Density PCB’s
Main packaging when BGA pitch =< 0.5 mm
Main markets : communication and/or handled Electronic devices (mobile phones, Bluetooth, PDA ...)
Future : high packages matrix (more balls)stacked viasLess total plated thru holesthinner lines & spacing
![Page 24: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/24.jpg)
High Density PCB’s
Advanced technology for
Specific Needs (close to silicon devices)
![Page 25: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/25.jpg)
High Density PCB’s
Pastilles couche 6 de 250µ percées à 100µTrait mini interne : 75µIsolement mini interne : 75µ
couche 6
Fonction COUCHE TYPE CU de base Mesures (µ)externe 1 CU 9 50
PPG 50 100PPG 50
plan Cuivre 2 CU 18 18STRAT 100 100
logique 3 CU 18 18PPG 50 86PPG 50
logique 4 CU 18 18STRAT 100 100
plan Cuivre 5 CU 18 18PPG 50 110PPG 50
externe 6 CU 9 27PPG 50 460PPG 50PPG 50
logique 0 CU 0STRAT 150
logique 0 CU 0PPG 50PPG 50PPG 50
plan Cuivre 7 CU 18 18STRAT 508 500
externe 8 CU 18 50MATIERE : époxy haut Tg (175°C) low CTE (Hitachi 679FJ) TOTAL
Sur époxy 1573Sur cuivre 1673
Perçage et métallisations
CuivreDiamètre mini 1-6 100 14-15 µDiamètre mini 1-8 250
Pastilles
Externe 295 base - 280 sommetcouche 6 210 base - 190 sommet
Traitscouche 6 75 base - 65 sommet
DESIGNBGA au pas de 500µ (matrice : 17*17 = 289 boules)Pastilles couche externe de 350µ percées à 100µTrait mini externe : 100µ
![Page 26: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/26.jpg)
High Density PCB’s
BGA at 0.5 mm pitch : one line between 2 pads sequential board
COUCHE TYPECUIVRE (*) SYMBOLES
(microns)
1 E 45 ======
2 P 18 ---------
3 L 18 ---------
4 P 18 ---------
5 L 18 ---------
6 EP 25 ======
L 18 ---------
L 18 ---------
7 EP 25 ======
8 L 18 ---------
9 P 18 ---------
10 L 18 ---------
11 P 18 ---------
12 E 45 ======(mm)
Epaisseur totale sur époxy 4.00Epaisseur totale sur métallisation 4.09
==== cuivre "externe"
------- cuivre "interne"préimprégnésstratifiés
Drilled holes at 150µ60 µ lines
![Page 27: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/27.jpg)
High Density PCB’s
100µ
200µ
Cuivre
Nickel-Or chimique
Double sided board : - Flip-chip at 250 µ pitch - 165 µ pad - Drilling at 100 µ - Base material : Hitachi 679F
![Page 28: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/28.jpg)
High Density PCB’s
COUCHE TYPE CUIVRE (*) SYMBOLES MESURES
(microns) (microns)
1 E 45 ====== 3267
2 ELP 25 ====== 3038
3 ELP 25 ====== 3063
4 ELP 25 ====== 3143
5 ELP 25 ====== 3072
6 LP 12 --------- 12100
7 LP 12 --------- 1382
8 ELP 25 ====== 3043
9 ELP 25 ====== 3264
10 ELP 25 ====== 2736
11 ELP 25 ====== 3168
12 E 45 ====== 30
TOTAL 314
(mm)Epaisseur totale sur époxy 0.94Epaisseur totale sur métallisation 1.00
==== cuivre "externe"
------- cuivre "interne"préimprégnésstratifiés
(*) : E = cuivre de base 9 µ + recharge(*) : L, P ou LP = cuivre de base(*) :EL,EP ou ELP = cuivre de base+recharge
![Page 29: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/29.jpg)
High Density PCB’s
58 µ
55 µ
30 µ
35 µ
45 µ
90 µ
110 µ
External line with Nickel & Gold Inner line
Inner line
100 µ drilled hole
![Page 30: Interconnect Technology](https://reader035.vdocuments.mx/reader035/viewer/2022062419/55a1f76c1a28ab826d8b45ca/html5/thumbnails/30.jpg)
High Density PCB’s