intelligent passanger transportation system 1...p89v51rd2 micro controller description the p89v51rd2...

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INTE TRAN M Departmen YESHWANTR ELLIGENT PASSINGE SPORTATION SYSTE MINI PROJECT REPORT Submitted by SHARDUL DHANORKAR SUMIT BHATT NIKHIL DHABALE KUNAL DAMEDHAR nt of Electronics and Telecommun RAO CHAVAN COLLEGE OF ENGIN NAGPUR MARCH 2011 ER EM nications NEERING

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Page 1: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

INTELLIGENT PASSI

TRANSPORTATION SYSTEM

MINI PROJECT REPORT

Department of Electronics and Telecommunications

YESHWANTRAO CHAVAN COLLEGE OF ENGINEERING

INTELLIGENT PASSINGER

TRANSPORTATION SYSTEM

MINI PROJECT REPORT

Submitted by

SHARDUL DHANORKAR

SUMIT BHATT

NIKHIL DHABALE

KUNAL DAMEDHAR

Department of Electronics and Telecommunications

YESHWANTRAO CHAVAN COLLEGE OF ENGINEERING

NAGPUR

MARCH 2011

NGER

TRANSPORTATION SYSTEM

Department of Electronics and Telecommunications

YESHWANTRAO CHAVAN COLLEGE OF ENGINEERING

Page 2: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

ACKNOWLEDGEMENTS

We would like to express our greatest gratitude to the people who have helped and supported us throughout. First and foremost, we would like to express our deepest appreciation to Dr. M.M. Mushrif (Head of the Dept. Electronics &Telecommunications) for his kind and valuable support and guidance. We would like to extend our sincere thanks to Prof. S.A. Desai for his patient and unfailing support over the successful completion of this mini project. We are convinced that this work would not have been completed without the assistance and support of the lab assistant, Praful sir. Last but not least our course mates who have provided us with invaluable advice and help.

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YESHWANTRAO CHAVAN COLLEGE OF ENGINEERING

DEPARTMENT OF ELECTRONICS AND TE

Certified that this is the bonafide record of the mini project work titled

INTELLIGENT PASSINGER TRANSPORTATION SYSTEM

Shardul Dhanorkar, Sumit Bhatt, Nikhil Dhabale and Kunal Damedhar

during the year 2010-11

award of the degree of Bachelor of Engineering in

Telecommunication Engineering

Nagpur University.

Mini project Coordinator

Prof. S. A. Desai

YESHWANTRAO CHAVAN COLLEGE OF ENGINEERING

NAGPUR

OF ELECTRONICS AND TELECOMMUNICATIONS

CERTIFICATE

Certified that this is the bonafide record of the mini project work titled

INTELLIGENT PASSINGER TRANSPORTATION SYSTEM

Done by

Shardul Dhanorkar, Sumit Bhatt, Nikhil Dhabale and Kunal Damedhar

11 in partial fulfillment of the requirements for the

degree of Bachelor of Engineering in

Engineering of Rashtrasanta Tukdoji Maharaj

oordinator Head of Depart

Dr. M. M. Mushrif

YESHWANTRAO CHAVAN COLLEGE OF ENGINEERING

LECOMMUNICATIONS

Certified that this is the bonafide record of the mini project work titled

INTELLIGENT PASSINGER TRANSPORTATION SYSTEM

Shardul Dhanorkar, Sumit Bhatt, Nikhil Dhabale and Kunal Damedhar

in partial fulfillment of the requirements for the

degree of Bachelor of Engineering in Electronics &

Rashtrasanta Tukdoji Maharaj

Head of Department

Dr. M. M. Mushrif

Page 4: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

CONTENTS

1. Introduction

2. Functional Block Diagram

3. Component description

4. Circuit Diagram

5. Micro controller P89V51RD2

6. Motor Driver Circuit

7. List of Components

8. PCB Layout

9. Programming the controller

10. Flow Chart and Program description

11. Applications

12. Future Scope

13. Bibliography

14. References

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INTRODUCTION

A line follower robot is basically a robot designed to follow a ‘line’ or path already predetermined by the user. This line or path may be as simple as a physical white line on the floor or as complex path marking schemes e.g. embedded lines, magnetic markers and laser guide markers. In order to detect these specific markers or ‘lines’, various sensing schemes can be employed. These schemes may vary from simple low cost line sensing circuit to expansive vision systems. The choice of these schemes would be dependent upon the sensing accuracy and flexibility required. From the industrial point of view, line following robot has been implemented in semi to fully autonomous plants. In this environment, these robots function as materials carrier to deliver products from one manufacturing point to another where rail, conveyor and gantry solutions are not possible. Apart from line following capabilities, these robots should also have the capability to navigate junctions and decide on which junction to turn and which junction to ignore. This would require the robot to have 90 degree turn and also junction counting capabilities. To add on to the complexity of the problem, sensor positioning also plays a role in optimizing the robots. A circuit inside takes an input signal from two sensors and controls the speed of wheels’ rotation. The control is done in such a way that when a sensor senses a blackline, the motor slows down or even stops. Then the difference of rotation speed makes it possible to make turns. For instance, in the figure on the right, if the sensor somehow senses a black line, the wheel on that side slows down and the robot will make a right turn.

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FUNCTIONAL BLOCK DIAGRAM

The microcontroller block consists of the microcontroller P89V51RD2. It is a 8051 series microcontroller. S1 and S2 represent two pairs of sensors respectively. Sensors are nothing but IR transmitters and receivers. A driver IC is L293D which drives two 12V dc motors M1 and M2.

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COMPONENT DESCRIPTION

P89V51RD2 MICRO CONTROLLER

DESCRIPTION

The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key feature of the P89V51RD2 is its X2 mode option. The design engineer can choose to run the application with the conventional 80C51 clock rate (12 clocks per machine cycle) or select the X2 mode (6 clocks per machine cycle) to achieve twice the throughput at the same clock frequency. Another way to benefit from this feature is to keep the same performance by reducing the clock frequency by half, thus dramatically reducing the EMI. The Flash program memory supports both parallel programming and in serial In-System Programming (ISP). Parallel programming mode offers gang-programming at high speed, reducing programming costs and time to market. ISP allows a device to be reprogrammed in the end product under software control. The capability to field/update the application firmware makes a wide range of applications possible. The P89V51RD2 is also In-Application Programmable (IAP), allowing the Flash program memory to be reconfigured even while the application is running.

FEATURES

• 80C51 Central Processing Unit • 5 V Operating voltage from 0 to 40 MHz • 64 kB of on-chip Flash program memory with ISP (In-System Programming) and

• IAP (In-Application Programming)

• Supports 12-clock (default) or 6-clock mode selection via software or ISP • SPI (Serial Peripheral Interface) and enhanced UART

• PCA (Programmable Counter Array) with PWM and Capture/Compare functions • Four 8-bit I/O ports with three high-current Port 1 pins (16 mA each)

• Three 16-bit timers/counters • Programmable Watchdog timer (WDT)

• Eight interrupt sources with four priority levels

• Second DPTR register • Low EMI mode (ALE inhibit)

• TTL- and CMOS-compatible logic levels

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BLOCK DIAGRAM

L293D MOTOR DRIVING IC

DESCRIPTION

The bidirectional rotation of motors is achieved with the help of the motor driving IC. The motor driving IC also acts as a high current source for the DC motors. The Device is a monolithic integrated high voltage, high current four channel driver designed to accept standard DTL or TTL logic levels and drive inductive loads (such as relays solenoids, DC and stepping motors) and switching power transistors. To simplify use as two bridges each pair of channels is equipped with an enable input. A separate supply input is provided for the logic, allowing operation at a lower voltage and internal clamp diodes are included.This device is suitable for use in switching applications at frequencies up to 5 kHz.

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FEATURES

• 600mA OUTPUT CURRENT CAPABILITY PER CHANNEL • 1.2A PEAK OUTPUT CURRENT (non repetitive) PER CHANNEL • ENABLE FACILITY • OVERTEMPERATUREPROTECTION • LOGICAL ”0” INPUT VOLTAGE UP TO 1.5 V • HIGH NOISE IMMUNITY

• INTERNAL CLAMP DIODES

BLOCK DIAGRAM

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LM324 COMPARATOR IC

DESCRIPTION

The LM324 consist of four independent, high gain, internally frequency compensated operational amplifiers which were designed specifically to operate from a single power supply over a wide voltage range. Operation from split power supplies is also possible so long as the difference between the two supplies is 3 volts to 32 volts. Application areas include transducer amplifier, DC gain blocks and all the conventional OP Amp circuits which now can be easily implemented in single power supply systems. FEATURES

• Internally Frequency Compensated for Unity Gain • Large DC Voltage Gain: 100dB • Wide Power Supply Range:

LM324 : 3V~32V (or ±1.5 ~ 16V) • Input Common Mode Voltage Range Includes Ground • Large Output Voltage Swing: 0V to VCC -1.5V • Power Drain Suitable for Battery Operation

BLOCK DIAGRAM

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MAX 232

DESCRIPTION

The MAX232 is a dual driver/receiver that includes a capacitive voltage generator to supply EIA-232 voltage levels from a single 5-V supply. Each receiver converts EIA-232 inputs to 5-V TTL/CMOS levels. These receivers have a typical threshold of 1.3 V and a typical hysteresis of 0.5 V, and can accept ±30-V inputs. Each driver converts TTL/CMOS input levels into EIA-232 levels. The driver, receiver, and voltage-generator functions are available as cells in the Texas Instruments LinASIC library. FEATURES

• Meet or Exceed TIA/EIA-232-F and ITU Recommendation V.28 • Operate With Single 5-V Power Supply • Operate Up to 120 kbit/s • Two Drivers and Two Receivers • ±30-V Input Levels • Low Supply Current . . . 8 mA Typical • Designed to be Interchangeable With Maxim MAX232 • ESD Protection Exceeds JESD 22 • 2000-V Human-Body Model (A114-A) • Applications

TIA/EIA-232-F Battery-Powered Systems Terminals Modems Computers

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IR TRANSMITTER AND RECEIVER

This IR led is used to emit the infrared rays at particular frequency. The emitting light is not visible in human eyes. In the transmitting side led will glow in a particular frequency

Vital role of IR transmitter in ‘line follower robo t’

The IR Transmitter is used is in the project to find out the obstacles in the vehicle path, the transmitter will be generating the IR rays at a particular frequency. This frequency is received by the IR receiver .if any obstacles is present the receiver will fail to receive the IR rays. The IR receiver is a two pin module which will receive the IR rays and decode the

signal into data.

Vital role of IR Receiver in this project ‘line follower robot’

This will receive the control signal which are transmitted from IR remote / IR

transmitter and gives the output to the input of microcontroller.

RS 232 DB9 CABLE

The RS232 connector was originally developed to use 25 pins. In this DB25 connector pinout provisions were made for a secondary serial RS232 communication channel. In practice, only one serial communication channel with accompanying handshaking is present. Only very few computers have been manufactured where both serial RS232 channels are implemented. Examples of this are the Sun SparcStation 10 and 20 models and the Dec Alpha Multia. Also on a number of Telebit modem models the secondary channel is present. It can be used to query the modem status while the modem is on-line and busy communicating. On personal computers, the smaller DB9 version is more commonly used today. The diagrams show the signals common to both connector types in black. The defined pins only present on the larger connector are shown in red. Note, that the protective ground is assigned to a pin at the large connector

Page 13: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

where the connector outside is used for that purpose with the DB9 connector version. This connector is used to download the hex code from computer to the microcontroller.

RS 232 DB9 PINOUT

CRYSTAL

The crystal that we have used in the circuit has the frequency of 11.0592 MHz. The crystal is connected between Pin No 18 and Pin No 19 of the microcontroller. We use 11.0592 MHz crystal only because it can be divide to give exact clock rates for most of the common baud rates for the UART, especially for the higher speeds (9600, 19200). Despite the oddball value, these crystals are readily available and commonly used.

11.0592 MHz crystal

Page 14: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

7805 VOLTAGE REGULATOR IC

DESCRIPTION

These regulators can provide local on-card regulation, eliminating the distribution problems associated with single point regulation. Each type employs internal current limiting, thermal shut-down and safe area protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1 A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltage and currents.

FEATURES

• Output current up to 1.5 A • Output voltage of 5. • Thermal overload protection • Short circuit protection • Output transition SOA protection • 2 % output voltage tolerance • Guaranteed in extended temperature range .

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BLOCK DIAGRAM

BRIDGE RECTIFIER

The four-diode rectifier circuit shown to the right serves very nicely to provide full-wave rectification of the ac output of a single transformer winding. The diamond configuration of the four diodes is the same as the resistor configuration in a Wheatstone Bridge. In fact, any set of components in this configuration is identified as some sort of bridge, and this rectifier circuit is similarly known as a bridge rectifier.

If we compare this circuit with the dual-polarity full-wave rectifier above, we'll find that the connections to the diodes are the same. The only change is that we have removed the center tap on the secondary winding, and used the negative output as our ground reference instead. This means that the transformer secondary is never directly grounded, but one end or the other will always be close to ground, through a forward-biased diode. This is not usually a problem in modern circuits.

Page 16: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

To understand how the bridge rectifier can pass current to a load in only one direction, consider the figure to the right. Here we have placed a simple resistor as the load, and we have numbered the four diodes so we can identify them individually.

During the positive half-cycle, shown in red, the top end of the transformer winding is positive with respect to the bottom half. Therefore, the transformer pushes electrons from its bottom end, through D3 which is forward biased, and through the load resistor in the direction shown by the red arrows. Electrons then continue through the forward-biased D2, and from there to the top of the transformer winding. This forms a complete circuit, so current can indeed flow. At the same time, D1 and D4 are reverse biased, so they do not conduct any current.

During the negative half-cycle, the top end of the transformer winding is negative. Now, D1 and D4 are forward biased, and D2 and D3 are reverse biased. Therefore, electrons move through D1, the resistor, and D4 in the direction shown by the blue arrows. As with the positive half-cycle, electrons move through the resistor from left to right.

In this manner, the diodes keep switching the transformer connections to the resistor so that current always flows in only one direction through the resistor. We can replace the resistor with any other circuit, including more power supply circuitry (such as the filter), and still see the same behavior from the bridge rectifier.

BRIDGE DIODE RECTIFIER

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CIRCUIT DIAGRAM

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CIRCUIT DESCRIPTION

The circuit is built around a P89V51RD2 microcontroller. The Vcc for the

microcontroller is given from a 7805 voltage regulator which regulates the

supply voltage to 5V.P89V51RD2 is operated at 11.0592 MHz frequency

and the crystal connected between pins 18 and 19 generates this. The

microcontroller communicates with the PC via RS 232 DB9 connector

cable. The 22k resistor clamps the serial voltage to 5V to prevent damage

to the chip. Pins 40 and 20 are given 5V and ground respectively. Pin no. 9

of the microcontroller is used for the RESET circuit through which the

microcontroller can be reset. The reset circuit consists of a 10 uF

capacitor, a 10 k resistor and a push-to-make switch. Port 0 of the

microcontroller is connected to the 8 bit parallel port via a resistor array

of 10k which is used as external pull-ups. Port 1 is used as input port while

port 3 is used as output port. The power supply circuit consists of a

voltage regulator IC 7805 whose output voltage is 5V regulated. The

circuit makes use of a Diode Bridge Rectifier and four capacitors for

filtering purpose. A LED is used to display that the circuit is giving the

output as 5V. Pins 14 and 13 of MAX 232 IC are connected to the RS232

DB9 connector. This IC works as an intermediate between computer and

microcontroller. IC L293D is a motor driver IC which is connected to port 0

of the microcontroller. The output of L293D is given to two motor outputs

that are used to control the motion of the robot.

Page 19: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

SENSOR CIRCUIT

The sensor circuit is shown in the above figure. A sensor circuits used in

the project consists of four pairs of transmitter and receivers, a

comparator IC LM324. LM 324 is a quad operational amplifier IC. When

the IR receiver receives a signal transmitted by the transmitter, it

compared to the reference voltage and the output is fed to the

microcontroller where it is decoded and corresponding step is taken by it.

Out of four Tx-Rx, two middle pairs are always on the line while the two

pairs at the two ends may be or may not be on the black line. These two

transmitters tell the microcontroller whether to move left or right

according to the signal strength received by the receiver. Let us assume

Page 20: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

that when a sensor is on the line it reads 0 and when it is off the line it

reads 1. The uC decides the next move according to the algorithm given

below which tries to position the robot such that L1 and R1 both read 0

and the rest read 1.

Page 21: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

MICROCONTROLLER P89V51RD2

The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key feature of the P89V51RD2 is its X2 mode option. The design engineer can choose to run the application with the conventional 80C51 clock rate (12 clocks per machine cycle) or select the X2 mode (6 clocks per machine cycle) to achieve twice the throughput at the same clock frequency. Another way to benefit from this feature is to keep the same performance by reducing the clock frequency by half, thus dramatically reducing the EMI. The Flash program memory supports both parallel programming and in serial In-System Programming (ISP). Parallel programming mode offers gang-programming at high speed, reducing programming costs and time to market. ISP allows a device to be reprogrammed in the end product under software control. The capability to field/update the application firmware makes a wide range of applications possible. The P89V51RD2 is also In-Application Programmable (IAP), allowing the Flash program memory to be reconfigured even while the application is running. PINOUT DIAGRAM

Page 22: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

PIN DESCRIPTION

PIN NO SYMBOL DESCRIPTION

1-8

P1.0-P1.7

Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 pins are pulled high by the internal pull-ups when ‘1’s are written to them and can be used as inputs in this state. As inputs, Port 1 pins that are externally pulled LOW will source current (IIL) because of the internal pull-ups. P1.5, P1.6, P1.7 have high current drive of 16 mA. Port 1 also receives the low-order address bytes during the external host mode programming and verification.

1 P1.0 T2: External count input to Timer/Counter 2 or Clock-out from Timer/Counter 2

2 P1.1 T2EX: Timer/Counter 2 capture/reload trigger and direction control

3 P1.2 ECI: External clock input. This signal is the external clock input for the PCA.

4

P1.3

CEX0: Capture/compare external I/O for PCA Module 0. Each capture/compare module connects to a Port 1 pin for external I/O. When not used by the PCA, this pin can handle standard I/O.

5 P1.4 SS: Slave port select input for SPI CEX1: Capture/compare external I/O for PCA Module 1

6 P1.5 MOSI: Master Output Slave Input for SPI CEX2:Capture/compare external I/O for PCA Module 2

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7

P1.6

MISO: Master Input Slave Output for SPI CEX3:Capture/compare external I/O for PCA Module 3

8

P1.7

SCK: Master Output Slave Input for SPI CEX4:Capture/compare external I/O for PCA Module 4

9

RST

Reset: While the oscillator is running, a HIGH logic state on this pin for two machine cycles will reset the device. If the PSEN pin is driven by a HIGH-to-LOW input transition while the RST input pin is held HIGH, the device will enter the external host mode, otherwise the device will enter the normal operation mode.

10 P3.0 RXD: serial input port

11 P3.1 TXD: serial output port

12 P3.2 INT0 : external interrupt 0 input

13 P3.3 INT1: external interrupt 1 input

14 P3.4 T0: external count input to Timer/Counter 0

15 P3.5 T1: external count input to Timer/Counter 1

16

P3.6 WR: external data memory write strobe

17 P3.7 RD: external data memory read strobe

18 XTAL2 Crystal 2: Output from the inverting oscillator amplifier

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19

XTAL1

Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits.

20 VSS GROUND

21-28

P2.0-P2.7

Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. Port 2 pins are pulled HIGH by the internal pull-ups when ‘1’s are written to them and can be used as inputs in this state. As inputs, Port 2 pins that are externally pulled LOW will source current (IIL) because of the internal pull-ups. Port 2 sends the high-order address byte during fetches from external program memory and during accesses to external Data Memory that use 16-bit address (MOVX@DPTR). In this application, it uses strong internal pull-ups when transitioning to ‘1’s. Port 2 also receives some control signals and a partial of high-order address bits during the external host mode programming and verification

29

PS6EN66

Program Store Enable: PSEN is the read strobe for external program memory. When the device is executing from internal program memory, PSEN is inactive (HIGH). When the device is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. A forced HIGH-to-LOW input transition on the PSEN pin while the RST input

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is continually held HIGH for more than 10 machine cycles will cause the device to enter external host mode programming.

30

ALE/PROG6

Address Latch Enable: ALE is the output signal for latching the low byte of the address during an access to external memory. This pin is also the programming pulse input (PROG͞) for flash programming. Normally the ALE is emitted at a constant rate of 1¤6 the crystal Frequency and can be used for external timing and clocking. One ALE pulse is skipped during each access to external data memory. However, if AO is set to ‘1’, ALE is disabled.

31

EA6

External Access Enable: EA must be connected to VSS in order to enable the device to fetch code from the external program memory. EA must be strapped to VDD for internal program execution. However, Security lock level 4 will disable EA, and program execution is only possible from internal program memory. The EA pin can tolerate a high voltage of 12 V.

39-32

P0.0-P0.7

Port 0: Port 0 is an 8-bit open drain bi-directional I/O port. Port 0 pins that have ‘1’s written to them float, and in this state can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external code and data memory. In this application, it uses strong

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internal pull-ups when transitioning to ‘1’s. Port 0 also receives the code bytes during the external host mode programming, and outputs the code bytes during the external host mode verification. External pull-ups are required during program verification or as a general purpose I/O port.

40 VDD Power supply

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MOTOR DRIVER CIRCUIT

The motor driver circuit is built around the high current half H-Bridge IC

LN 293D. For each motor connected, if the Enable is kept high and DIR1 is

made high, then the motor will rotate in the clockwise direction. If Enable

and DIR2 is made high, then the motor will rotate in the ant-clockwise

direction. If both DIR1 and DIR2 are kept at high, then the motor will

remain static. If enable is low, then the motor remains static. The inputs

DIR1 and DIR2 of each motor are driven by outputs from the Port 0 of

P89v51RD2. The IC L293D is a quadruple high-current half h-Drive. The

L293D is designed to provide bidirectional drive currents of up to 600-mA

at voltages from 4.5 V to 36 V. It is designed to drive inductive loads such

as relays, solenoids, dc and bipolar stepping motors, as well as other high-

current/high-voltage loads in positive-supply applications. All inputs are

TTL compatible. Each output is a complete totem-pole drive circuit, with a

Darlington transistor sink and a pseudo-Darlington source. Drivers are

enabled in pairs, with drivers 1 and 2 enabled by 1,2EN and drivers 3 and

4 enabled by 3,4EN. When an enable input is high the associated drivers

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are enabled and their outputs are active and in phase with their inputs.

When the enable input is low, those drivers are disabled and their outputs

are off and in the high-impedance state. With the proper data inputs,

each pair of drivers forms a full-H (or bridge) reversible drive suitable for

solenoid or motor applications. A VCC1 terminal, separate from VCC2, is

provided for the logic inputs to minimize device power dissipation. The

L293D is characterized for operation from 0°C to 70°C.

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LIST OF COMPONENTS

COMPONENT DESCRIPTION QUANTITY P89V51RD2 MICROCONTROLLER 1

MAX232 PROGRAMMER IC 1

L293D MOTOR DRIVER IC 1

LM324 COPARATOR IC 1

LM7805 VOLTAGE REGULATOR IC 1

BRIDGE SIP DIODE RECTIFIER 1

CRYSTAL 11.0592 MHz CLOCK TO THE uC 1

IR TRANSMITTER BLACK LINE SENSOR 4

IR RECEIVER 4

12V DC MOTORS MOTION OF THE ROBOT 2

RS232 DB9 CONNECTOR DOWNLOADING THE PROGRAM

FROM COMPUTER TO uC

1

LED INDICATORS 5

RESISTORS

270E

330E

10K

470E

10K POT

10K RESISTOR ARRAY(8 BIT)

¼ WATT

CAPACITORS

1000 UF

100 UF

22 UF

10 UF

POLAR

CAPACITOR

0.1 UF

NONPOLAR

2 BIT PORT 8

SPDT SWITCH ON/OFF SWITCH 1

PUSH TO MAKE SWITCH RTESET KEY 1

8 BIT INPUT PORT 4

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PCB LAYOUT

8051 DEVELOPMENT BOARD

SENSOR CIRCUIT

Page 31: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

SOURCE CODE

Page 32: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

APPLICATION

• A line following robot can be used in passenger transport system as it does

not require manual control.

• It can be used in industries where there is continuous placement-

replacement of heavy crates and man power is required. A line follower can

replace human beings if the programming is smart enough.

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FUTURE SCOPE

The Programmable robot has a tremendous scope for improvement.

Some of the possible improvements are listed below.

• With effective programming, the robot can be configured to do

multitasks.

• With a more advanced Microcontroller like ATMEGA 16 or ATMEGA

32, more sensors and output modules can be integrated to the

robot.

Page 34: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

BIBILOGRAPHY

1. Ramakant Gaikwad : Op-Amps and Linear Integrated Circuits

Page 35: INTELLIGENT PASSANGER TRANSPORTATION SYSTEM 1...P89V51RD2 MICRO CONTROLLER DESCRIPTION The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of data RAM. A key

REFERENCES

1.www.microchip.com

2. www.wikipedia.com

3.www.roboticsindia.com

4. www.electro-tech-online.com

5. www.howstuffworks.com

6. www.scribd.com