Instruction CyclePhases of Instruction Cycle

Unit 3 - CONTROL UNIT DESIGN

Abhineet Anand

Computer Science and Engg. DepartmentUniversity of Petroleum and Energy Studies, Dehradun

November 26, 2012

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

IntroductionDiagramCircuit Used

Instruction Cycle

A program residing in the memory unit of the computerconsist of a sequence of Instructions.The program is executed in the computer by going througha cycle for each instruction.Each instruction cycle in turn is subdivided into a sequenceof sub cycle or phase.

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

IntroductionDiagramCircuit Used

Instruction Cycle

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

IntroductionDiagramCircuit Used

Circuits Used

The circuits used in the CPU during the cycle are:Program counter (PC) - an incrementing counter thatkeeps track of the memory address of the instruction that isto be executed next.Memory address register (MAR) - holds the address of amemory block to be read from or written to.Memory data register (MDR) - a two-way register thatholds data fetched from memory (and ready for the CPU toprocess) or data waiting to be stored in memory.

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

IntroductionDiagramCircuit Used

Circuits Used Contd..

Instruction register (IR) - a temporary holding ground forthe instruction that has just been fetched from memoryControl unit (CU) - decodes the program instruction in theIR, selecting machine resources such as a data sourceregister and a particular arithmetic operation, andcoordinates activation of those resourcesArithmetic logic unit (ALU) - performs mathematical andlogical operations

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

Fetching the instructionDecode the instructionIn case of a memory instructionExecute the instruction

Phases of Instruction Cycle

In basic computer, each instruction cycle consists of thefollowing phases:

Fetch an instruction from Memory.Decode the instruction.Read the effective address from memory if the instructionhas an indirect address.Execute the instruction.

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

Fetching the instructionDecode the instructionIn case of a memory instructionExecute the instruction

Fetching the instruction

The next instruction is fetched from the memory addressthat is currently stored in the program counter (PC), andstored in the instruction register (IR).Now, the PC points to the next instruction that will be readat the next cycle.

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

Fetching the instructionDecode the instructionIn case of a memory instructionExecute the instruction

Decode the instruction

The decoder interprets the instruction.During this phases the instruction inside the IR (instructionregister) gets decoded.

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

Fetching the instructionDecode the instructionIn case of a memory instructionExecute the instruction

In case of a memory instruction

In case of a memory instruction (direct or indirect) theexecution phase will be in the next clock pulse.Required data is fetched from main memory to beprocessed and then placed into data registers.During this phases the instruction inside the IR (instructionregister) gets decoded.If the instruction is direct, nothing is done at this clockpulse.If this is an I/O instruction or a Register instruction, theoperation is performed (executed) at clock Pulse.

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

Fetching the instructionDecode the instructionIn case of a memory instructionExecute the instruction

Execute the instruction

The control unit of CPU passes the decoded informationas a sequence of control signals.Signals are passed to the relevant function units of theCPU to perform the actions required.These action may be :

Reading values from registers,Passing them to the ALU to perform mathematical or logicfunctions on them, orWriting the result back to a register

The result generated by the operation is stored in the mainmemory, or sent to an output device.

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

Fetching the instructionDecode the instructionIn case of a memory instructionExecute the instruction

The Fetch Execute cycle in Transfer Notation

Expressed in register transfer notation:MAR <- PCMDR<- Memory {MAR address}; PC <- [PC]+1 (Incrementthe PC for next cycle at the same time)IR<- MDR

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN

Instruction CyclePhases of Instruction Cycle

Fetching the instructionDecode the instructionIn case of a memory instructionExecute the instruction

THANK YOU

Abhineet Anand Unit 3 - CONTROL UNIT DESIGN