input output (afif)

7/30/2019 Input Output (Afif)

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INTRODUCTION

The Computer Systems Input / Output Architecture are its interface to the outside world and ameans of controlling and managing Input / Output activities.

The I/O system consists of I/O devices, device controllers (or I/O modules or I/O interfaces) anddriver software

INPUT / OUTPUT PROBLEM

1. Wide variety of peripherals Delivering different amounts of data At different speeds In different formats

2. All slower than CPU and RAM3. Need I/O modules:

Interface to CPU and memory Interface to one or more peripherals


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EXTERNAL DEVICES

1. Exchanging data between the external environment and the computer. Link to I/O module tocommunicate with computer.

2. Three categories ofEXTERNAL DEVICES- Human readable

Suitable to communicate with the computer users. Example: screen, printer, keyboard

- Machine readable Suitable to communicate with the equipment Monitoring and control Example: magnetic disk and tape systems, sensors and actuators.

- Communication Suitable for communicate with remote devices such as a terminal, a machine

readable device or another computer.

Example: Network Interface Card (NIC)I/O MODULE FUNCTION

1. Control and timing - requirement is needed to coordinate flow of traffic between externaldevices and internal resources. Example: control of the transfer of data from an external device

to processor.

Steps:

- CPU checks I/O module device status-

I/O module returns status- If ready, CPU request data transfer- I/O module gets data from device- I/O module transfers data to CPU- Variations for output, DMA, etc.


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2. Processor Communication - involves command decoding in I/O module, data exchange throughdata bus, status reporting about peripherals, and CPU assigning unique address for each I/O

module.

3. Device Communication - involves commands, status information and data.4. Data Buffering - the data are buffered in the I/O module and then sent to the peripheral device

at its data rate.

5. Error Detection for reporting errors to the processor.

I/O Module Diagram

I/O Mapping

When a processor, memory and I/O share a common bus, there can be 2 types possibleinterfacing:

1. Memory mapped I/O- Devices and memory share an address space- I/O looks just like memory read/write- No special commands for I/O


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- Large selection of memory access commands available2. Isolated I/O

- Separate address spaces- Need I/O or memory select lines- Special commands for I/O- Limited set

Programmed I/O

Data are exchanged between the processor and the I/O module. CPU has direct control over I/O

- Sensing status- Read/write commands- Transferring data

CPU while waiting for I/O module to complete operation, CPU will periodically checks for I/O tosee if it needs CPUs service (restaurant analogy where host would approach patron to ask if

patron ready)

Wastes CPU time


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Programmed I/O detail

CPU requests I/O operation I/O module performs operation I/O module sets status bits CPU checks status bits periodically (known as polling) I/O module does not inform CPU directly I/O module does not interrupt CPU CPU may wait or come back later


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Programmed I/O

Generally, lots of CPU time wasted in polling because processors are faster than I/O devices.- Much of the polls occur when the waited-for event has not yet happened

Results in inefficient CPU usage

Therefore programmed I/O ideally suited for lower performance.

Programmed I/O is simplest method to implement and requires a relatively small amount ofspecial I/O hardware.

Interrupt Driven I/O

Overcomes CPU waiting No repeated CPU checking of device I/O module interrupts when ready (restaurant analogy would have the patron interrupting the

waiter when service is required)


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Interrupt Driven I/O (Basic operation)

1. CPU issues read command2. I/O module gets data from peripheral whilst CPU does other work3. I/O module interrupts CPU4. CPU requests data5. I/O module transfers data

CPU Viewpoint

1. Issue read command2. Do other work3. Check for interrupt at end of each instruction cycle4. If interrupted:

- Save context (registers)- Process interrupt (known as interrupt service routine)- Fetch data & store


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I/O Commands

There are four types of I/O commands that an I/O module may receive when it is addressed by a

processor:

1) Control - used to activate a peripheral and tell it what to do. Example, a magnetic tape may beinstructed to rewind or move forward.

2) Test - used to test various status conditions associated with an I/O module and its peripherals.Example testing a device to see if it is powered and available for use.

3) Read - causes the I/O module to obtain an item of data from the peripheral and place it in aninternal buffer.

4) Write - causes the I/O module to take an item of data from the data bus and subsequentlytransmit that data item to the peripheral.

Design Issues

4 techniques in common use:- Multiple interrupt lines: not so practical.- Software poll: CPU polls each I/O module to determine which module caused the

interrupt.

- Daisy chain: same as hardware poll, share common interrupt request line.- Bus arbitration: I/O module gains control of bus before raising interrupt.

Direct Memory Access

Interrupt driven and programmed I/O require active CPU intervention- Transfer rate is limited- CPU is tied up

DMA is the answer Advantage: Large amounts of data can be transferred between memory and the peripheral w/o

severely impacting CPU performance.


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Direct Memory Access Diagram

DMA Function

1. Additional Module (hardware) on bus2. DMA controller takes over from CPU for I/O

DMA Operation

CPU tells DMA controller:- Read/Write- Device address- Starting address of memory block for data- Amount of data to be transferred

CPU carries on with other work DMA controller deals with transfer DMA controller sends interrupt when finished


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DMA Transfer Cycle Stealing

In cycle-stealing, DMA controller acquires the bus, transfers a single byte or word for a cycle,and then relinquishes the bus.

- Transfer of one word of data- Not an interrupt- CPU does not switch context- CPU suspended just before it accesses bus- i.e. before an operand or data fetch or a data write

This allows other devices, and in particular the CPU, to share the bus during DMA transfers.(Restaurant analogy where a patron can request a check while the host is serving another table).

Slows down CPU but not as much as CPU doing transferDMA Configurations (1)

Single Bus, Detached DMA controller. Each transfer uses bur twice

- I/O to DMA then DMA to memory CPU is suspended twice.

DMA Configurations (2)

Single Bus, Integrated DMA controller. DMA Controller may support >1 device. Each transfer uses bus once.

- DMA to memory CPU is suspended once.


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DMA Configurations (3)

Separate I/O Bus Bus supports all DMA enabled devices Each transfer uses bus once

- DMA to memory CPU is suspended once

Evolution of the I/O Function

1. The CPU directly controls a peripheral device.2. A controller or I/O module is added. The CPU uses programmed I/O without interrupts.3. Same configuration as in step 2 is used, but now interrupts are employed. The CPU need not

spend time waiting for an I/O operation to be performed, thus increasing efficiency.

4. The I/O module is given direct access to memory via DMA. It can now move a block of data to orfrom memory without involving the CPU, except at the beginning and end of the transfer.

5. The I/O module is enhanced to become a processor in its own right, with a specializedinstruction set tailored for I/O

6. The I/O module has a local memory of its own and is, in fact, a computer in its own right. Withthis architecture a large set of I/O devices can be controlled with minimal CPU involvement.

External Interface

Connecting devices together Parallel vs. serial data transfers

- Serial ports are used for serial data transfers especially for slower devices like mouse,keyboard and the common standard

- Parallel ports are used for faster parallel devices like printer, scanner, zip drive. Others: USB, SCSI, Fire Wire

input output (afif)

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