ABSTRACT

This project is based on the security aspect in the industry. Only the Authorized persons can

enter into the room and it is having real-time access of fire detection in the industry. This information can

be displayed at the other end by using the RF Communication.

The aim of this thesis is to explain the working and operation of the industrial intruder security

system kit and the various other applications have been stated.

The basic principles for the working of this kit is

Automatically buzzer goes ON if the unauthorized enters on the basis of wrong password

entry.

Automatically buzzer goes ON if it detects fire on the basis of room temperature.

As a result of our project, we have considered the design of the circuit and both the constraints

stated above have been taken into account.

1

SCOPE OF THE PROJECT:

The present module consists of Microcontroller, RF communication, and Software

developed in Keil software .

In this project we place a Microcontroller circuit with the keypad at the security room where we

allow only the authorized persons to enter into the room based on the password entry. If a person came

and he needs to enter into that security room, he need to enter the password correctly then only the door

opens and displays the message to the controller room stating “Code Accepted” else the message will be

displayed as “Wrong password entered” and at the same time buzzer goes On.

Another application for this system other than this password check is it checks the fire, if it

occurs at any time. We will fix the normal temperature default in the controller itself, if the temperature

of the room exceeds then the message will be displayed to the controller room stating “Fire Detected” in

the LCD and the buzzer goes On. The communication used between the security room and the controller

room is RF Communication.

2

CHAPTER 1

INTRODUCTION

In its most simple form Industrial Intruder Security System through RF Communication is the

ability to check the real time status of the fire and giving permissions to only the authorized persons.

Almost in every industry it is needed because it is a basic need for any industry to look into. By using RF

communication the distance between security room and the controller room is limited but it is useful in

most of the cases.

Industrial Intruder Security Systems are a result of an attempt to enhance the security system in

industries. Of course if the situation demands then we can use it for the Home also. These systems

provide the industries with increased security and safety, economic benefit by not placing a particular

person before the security room to allow only the authorized persons, and convenience by knowing the

real-time status of the fire check.

Designing a industrial intruder security system can be done through a variety of communications

options such as Global Systems for Mobile Communications (GSM), Zigbee, wireless LAN technologies

and so on.

Since the first step of the Industrial Intruder Security Systems is real-time monitoring of the status

of fire that we come across in the industry, the system that we design should have the capability of

checking the fire no matter whether the authorized persons are present or not. Thus, our main objective

for using RF (Radio frequency modem Communication) network for the communication between the

security room and the controller room.

In this project we place a Microcontroller circuit with the keypad at the security room where we

allow only the authorized persons to enter into the room based on the password entry. If a person came

3

and he needs to enter into that security room, he need to enter the password correctly then only the door

opens and displays the message on the LCD at the controller room stating “Code Accepted” else the

message will be displayed as “Wrong password entered” and at the same time buzzer goes On. Actually

the password is preloaded in the microcontroller and wrote the code what to do if password enters

correctly and vice versa. We need to enter the password using the keypad and the information is passed

to the microcontroller through port 0. The password is loaded in a particular memory location and

verifies with the password which is already stored. If it matches then as we said it displays on the LCD at

the security room i.e at the transmitting end and transmits the signal by using the Modem. At the receiver

it receives the signal and it checks the first character with the code, if it matches then the information

according to that character is displayed on the LCD.

Another application for this system other than this password check is it checks the fire, if it

occurs at any time. We will fix the normal temperature default in the controller itself, if the temperature

of the room exceeds then the message will be displayed to the controller room stating “Fire Detected” in

the LCD and the buzzer goes On. Actually the Analog to Digital Converter is used to covert the analog

data which is coming from the LM35 which is a heat measurable instrument to the microcontroller. In the

Microcontroller the digital data is checked with the predefined value in the code. If it greater than or equal

then it will sent the data as mentioned earlier that fire detected to the RF Modem and it will transmits. At

the receiver section if checks the first character and displays the information according to that and the

buzzer will goes On if the first character we got as the ‘F’.

EMBEDDED SYSTEM:

An embedded system is a special-purpose computer system designed to perform one or a few

dedicated functions, sometimes with real-time computing constraints. It is usually embedded as part of a

complete device including hardware and mechanical parts. In contrast, a general-purpose computer, such

as a personal computer, can do many different tasks depending on programming. Embedded systems have

become very important today as they control many of the common devices we use.

Since the embedded system is dedicated to specific tasks, design engineers can optimize it,

reducing the size and cost of the product, or increasing the reliability and performance. Some embedded

systems are mass-produced, benefiting from economies of scale.

4

Physically, embedded systems range from portable devices such as digital watches and MP3

players, to large stationary installations like traffic lights, factory controllers, or the systems controlling

nuclear power plants. Complexity varies from low, with a single microcontroller chip, to very high with

multiple units, peripherals and networks mounted inside a large chassis or enclosure.

In general, "embedded system" is not an exactly defined term, as many systems have some

element of programmability. For example, Handheld computers share some elements with embedded

systems — such as the operating systems and microprocessors which power them — but are not truly

embedded systems, because they allow different applications to be loaded and peripherals to be

connected.

A Digital computer built on a single IC is called single chip microcomputer. Such Computers are

used in instrumentation automatic industrial control, process control, and home and consumer

applications. As it is used for control applications it is called micro controller or embedded

microcontroller. It is very small and compact. It contains CPU, ROM, RAM and I/O lines.

There are so far many microcontrollers developed such as Texas instruments 4-Bit micro

controller, TMS 1000, Motorola’s 8-bit microcontroller 6801 and MC68HC11etc. In the year 1976, Intel

introduced the 8048 series of single-chip microcomputers.

It is also known as MICS-48. Then after in 1981, Intel Corporations introduced a more powerful

series of 8-microcontrollers called 8051. The 8051 series of microcontrollers are faster, have enhanced

instruction set, powers saving modes of operation, full duplex serial port etc.

HISTORY OF RF:

A limited number of short range radio applications were in the use in 1970’s.The garage door opener

was one of them. An L-C tuned circuit oscillator transmitter and super regenerative receiver made up the system

. It suffered from frequency drift and susceptibility to interference which caused the door to open apparently at

random , leaving the premises unprotected .

Similar systems are still in use today , although radio technology has advanced tremendously.

Even with greatly improved circuits and techniques wireless replacements for wired applications- in

security systems for example- still suffer from the belief that wireless is less reliable than wired and that cost

5

differentials are too great to bring about the revolution that cellular radio has brought to Telephone

communication .

Few people will dispute the assertion that cellular radio is in a class with a small number of other

technological advancements-including the proliferation of electric power in the late 19 th century ,mass

production of automobile , and the invention of transistor –that have profoundly affected human lifestyle in the

last century .Another development in electronic communication

Within the last 10 or so years has also impacted our society Satellite Communication and its

Impact is coming even closer to home with the spread of direct broadcast satellite television Transmissions.

That Wireless techniques have such an overwhelming reception is not at all surprising.

After all , the wires really has no intrinsic use. They only tie us down and we would gladly do

without them if we could still get reliable operation at an acceptable price. Cellular radio today is of lower

quality , lower reliability , and higher price than an wired telephone , but its acceptance by the public is

nothing less the phenomenal . Imagine the consequences to life style when electric power is able to be

distributed without wires!

As we have seen how RF modems came into existence in today’s world in the above section, now

the focus is mainly on its features, characteristics and type of modulation it implements. This is

discussed clearly in the further pages.

6

CHAPTER 2

BLOCK DIAGRAM DESCRIPTION

1. TRANSMITTER CIRCUIT:

DESCRIPTION:

Micro Controller take the input from the keypad, it displays on the LCD and also checks the

entered password with the stored password. Keypad will be activated only when interrupt occurs. MAX

232 takes output from micro controller, converts TTL Voltage levels into RS 232 voltage levels and gives

to the RF Transmitter.

Also LM35 sensor detects the temperature, by using ADC we converts the analog data into digital

data and sends it to Micro Controller. It compares the LM35 temperature with the stored limited

7

temperature. MAX 232 takes output from micro controller, converts TTL Voltage levels into RS 232

voltage levels and gives to the RF Transmitter. It is a continuous process.

2. RECEIVER CIRCUIT:

DESCRIPTION:

RF Receiver receives the signal from RF Transmitter and gives it to the MAX232, it converts voltage levels from RS 232

to TTL Logic and gives it to Micro Controller. The status of the password will be displayed on the LCD. Buzzer will be

activated when wrong password entered at transmitter and also when the temperature is greater than the stored

temperature.

8

CHAPTER 3

COMPONENT DETAILS

3.1 COMPONENTS USED:

1KOhm Resistors 3

1microF Capacitor 5

10microF Capacitor 5

470microF Capacitor 1

33pF Capacitor 2

Switch 1

PN Diodes 5

LED 1

Crystal 1

9

3.2 GENERAL DESCRIPTION OF ELEMENTS:

RESISTORS:

It is a 2 terminal device. A resistance can control the amount of current flow in a circuit. A

resistor with a high resistance will only let relatively a small current flow. It can be of fixed or variable

type in which the former provides a fixed resistance the later provides the variable resistance. That can be

varied manually or else.

CAPACITORS:

It is a 2 terminal device. These are the devices that can store on electric charge and release when

needed. They are made from low metallic layers by a layer of non conducting material called ‘DI-

ELECTRIC’. Trimmer is a capacitor whose capacitance can be varied between a specific range.

LCD:

A Liquid Crystal display (LCD) is a thin, flat display device made up of any number of color or

monochrome pixels arrayed in front of a light source or reflector. It is often utilized in battery-powered

electronic devices because it uses very small amounts of electrical power.

TEMPERATURE SENSOR (LM35):

The LM35 series are precision integrated-circuit temperature sensors, whose output voltage is

linearly proportional to the Celsius (Centigrade) temperature. The LM35 thus has an advantage over

linear temperature sensors calibrated in ° Kelvin, as the user is not required to subtract a large constant

voltage from its output to obtain convenient Centigrade scaling.

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3.3 RF MODEM:

DESCRIPTION:

Analogic Technomatics (P) Ltd. specialized in the Design, Development and manufacturing of

wide range of Hand Held Computer for over 10 years. Analogic has developed Hand Held Terminals that

are used successfully in various cross functional applications for Industrial, mobile, remote

communications, automation and stands ahead of the competition in innovative race of integrating

sophisticated technologies.

The Low Power Radio Modem is an ultra low power transceiver, mainly intended for 315, 433,

868 and 915 MHz frequency bands. It has been specifically designed to comply with the most stringent

requirements of the low power short distance control and data communication applications.

A unique UHF RF Radio Modem.

The UHF Transceiver is designed for very low power consumption and low voltage operated

energy meter reading applications. The product is unique with features like compact, versatile, low cost,

short range, intelligent data communication, etc. The product also has 2 / 3 isolated digital inputs and

outputs. Necessary command sequences will be supplied to operate these tele commands from the user

host.

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The radio modem is designed primarily for FSK systems in the ISM / SRD bands at 315, 433,

868 and 915 MHz, but bands can be easily programmed for operation at other frequencies between 300

MHz and 1000 MHz. The modem supports maximum data rates up to 19.2 Kbps.

ACCESSORIES:

Universal Adaptar.

PC Communication Cable.

FEATURES:

Programmable Frequency (300 – 1000 MHz)

Low operating voltage (3.3 V)

Active peak current, less than 75 mA

Incoming status signal indication

High receiver sensitivity (-110 dBm)

Compact and light weight

Programmable output power, ranging from -20 to +10 dBm

Suitable for frequency hopping protocols

USER PROGRAMMABLE:

1. Data rate

2. Centre frequency

3. Channel Frequency (Max. 20 channels).

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TECHNICAL SPECIFICATIONS:

TRANSMISSION:

Transmit data rate : 600 to 19, 200 Baud

Modulation : Binary FSK

(Programmable) 433 MHz : -20 to +10 dBm

(Programmable) 868 MHz : -20 to +5 dBm

RECEPTION:

Receiver sensitivity 433 MHz : -109 dBm

Receiver sensitivity 868 MHz : -105 dBm

Output signal phase noise : -85 dBc / Hz

At 100 KHz offset from carrier

Range : 100 meters plus (open range) with 0 dBi omni directional antenna.

FREQUENCY / CHANNEL OPTIONS:

Spread Spectrum Feature : Hop rates of 1 to 100 (max) depending on bit rate and amount of data to be

sent during each transmission.

Channel Selection : About 20 channels can be selected through software Programmability.

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INTERFACE / CONNECTORS:

Data : RS – 232, through 9 pin D type connector

Antenna : SMA connector

Power : 2 Pin circular jack

POWER:

Supply voltage : 3.3 v Typ. (3 to 3.6 v)

OPTIONS :

Digital Outputs : 2 / 3 nos. of isolated relay contacts

Digital Inputs : 2 / 3 nos. of opto isolated inputs

Packaging : Board only or compact metal enclosure

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3.4 AT89C51 MICRO CONTROLLER:

FEATURES :

Compatible with MCS-51™ Products 4K Bytes of In-System Reprogrammable Flash Memory Endurance: 1,000 Write/Erase Cycles Fully Static Operation: 0 Hz to 24 MHz Three-level Program Memory Lock 128 x 8-bit Internal RAM 32 Programmable I/O Lines Two 16-bit Timer/Counters Six Interrupt Sources Programmable Serial Channel Low-power Idle and Power-down Modes

DESCRIPTION:

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K

bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured

using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard

MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed

in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU

with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a

highly-flexible and cost-effective solution to many embedded control applications.

15

PIN CONFIGURATIONS:

16

17

PIN DESCRIPTION:

VCC - Supply voltage.

GND- Ground.

PORT 0:

Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight

TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may

also be configured to be the multiplexed low order address/data bus during accesses to external program and

data memory. In this mode P0 has internal pull up’s. Port 0 also receives the code bytes during Flash

programming, and outputs the code bytes during program verification. External pull ups are required during

program verification.

PORT 1:

Port 1 is an 8-bit bi-directional I/O port with internal pull ups. The Port 1 output buffers can

sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups

and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL)

because of the internal pull ups. Port 1 also receives the low-order address bytes during Flash programming

and verification.

PORT 2:

Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output buffers can

sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups

and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL)

because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program

memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this

application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that

use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also

receives the high-order address bits and some control signals during Flash programming and verification.

18

PORT 3:

Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output buffers can

sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups

and can be used as inputs.

As inputs Port 3 pins that are externally being pulled low will source current (IIL)

because of the pullups. Port 3 also serves the functions of various special features of the AT89C51 as listed

below:

PORT PIN ALTERNATIVE FUNCTIONS:

Port 3 also receives some control signals for Flash programming and verification.

RST:

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the

device.

ALE/PROG:

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Address Latch Enable output pulse for latching the low byte of the address during accesses to

external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal

operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external

timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external

Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit

set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high.

Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

PSEN:

Program Store Enable is the read strobe to external program memory. When the AT89C51 is

executing code from external program memory, PSEN is activated twice each machine cycle, except that two

PSEN activations are skipped during each access to external data memory.

EA/VPP:

External Access Enable. EA must be strapped to GND in order to enable the device to fetch code

from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is

programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program

executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming,

for parts that require 12-volt VPP.

XTAL1:

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2:

Output from the inverting oscillator Amplifier.

3.5 DB9 CONNECTOR:

20

The DB9 (originally DE-9) connector is an analog 9-pin plug of the D-Subminiature connector

family (D-Sub or Sub-D).

The DB9 connector is mainly used for serial connections, allowing for the asynchronous transmission of

data as provided for by standard RS-232 (RS-232C).

PINS:

Pin number

Name

1 CD - Carrier Detect

2 RXD - Receive Data

3 TXD - Transmit Data

4DTR - Data Terminal Ready

5 GND - Signal Ground

6 DSR - Data Set Ready

7 RTS - Request To Send

8 CTS - Clear To Send

9 RI - Ring Indicator

Shield

3.6 TEMPERATURE SENSOR (LM35):

21

The LM35 is an integrated circuit sensor that can be used to measure temperature with an

electrical output proportional to the temperature (in oC) You can measure temperature more accurately than a

using a thermistor. The sensor circuitry is sealed and not subject to oxidation, etc. The LM35 generates a

higher output voltage than thermocouples and may not require that the output voltage be amplified.

The LM35's low output impedance, linear output, and precise inherent calibration make

interfacing to readout or control circuitry especially easy. It can be used with single power supplies, or with

plus and minus supplies. As it draws only 60 µA from its supply, it has very low self-heating, less than 0.1°C

in still air. The LM35 is rated to operate over a -55° to +150°C temperature range, while the LM35C is rated

for a -40° to +110°C range (-10° with improved accuracy).

3.7 VOLTAGE REGULATOR 7805:

A variable regulated power supply, also called a variable bench power supply, is one where you

can continuously adjust the output voltage to your requirements. Varying the output of the power supply

is the recommended way to test a project after having double checked parts placement against circuit

drawings and the parts placement guide.

This type of regulation is ideal for having a simple variable bench power supply. Actually this is

quite important because one of the first projects a hobbyist should undertake is the construction of a

variable regulated power supply. While a dedicated supply is quite handy e.g. 5V or 12V, it's much

handier to have a variable supply on hand, especially for testing.

22

Most digital logic circuits and processors need a 5 volt power supply. To use these parts we need

to build a regulated 5 volt source. Usually you start with an unregulated power to make a 5 volt power

supply; we use a LM7805 voltage regulator IC (Integrated Circuit).

The LM7805 is simple to use. You simply connect the positive lead of your unregulated DC

power supply (anything from 9VDC to 24VDC) to the Input pin, connect the negative lead to the

Common pin and then when you turn on the power, you get a 5 volt supply from the Output pin.

CIRCUIT FEATURES:

Brief description of operation: Gives out well regulated +5V output, output current capability of

100 mA

Circuit protection: Built-in overheating protection shuts down output when regulator IC gets too

hot

Circuit complexity: Very simple and easy to build

Circuit performance: Very stable +5V output voltage, reliable operation

Availability of components: Easy to get, uses only very common basic components

Design testing: Based on datasheet example circuit, I have used this circuit successfully as part of

many electronics projects

Applications: Part of electronics devices, small laboratory power supply

Power supply voltage: Unregulated DC 8-18V power supply

Power supply current: Needed output current + 5 mA

Component costs: Few dollars for the electronics components + the input transformer

cost.

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3.8 RS232:

RS-232 (Recommended Standard - 232) is a telecommunications standard for binary serial

communications between devices. It supplies the roadmap for the way devices speak to each other using

serial ports. The devices are commonly referred to as a DTE (data terminal equipment) and DCE (data

communications equipment); for example, a computer and modem, respectively.

RS232 is the most known serial port used in transmitting the data in communication and

interface. Even though serial port is harder to program than the parallel port, this is the most effective

method in which the data transmission requires less wires that yields to the less cost. The RS232 is the

communication line which enables the data transmission by only using three wire links. The three links

provides ‘transmit’, ‘receive’ and common ground...

  The ‘transmit’ and ‘receive’ line on this connecter send and receive data between the computers.

As the name indicates, the data is transmitted serially. The two pins are TXD & RXD. There are other

lines on this port as RTS, CTS, DSR, DTR, and RTS, RI. The ‘1’ and ‘0’ are the data which defines a

voltage level of 3V to 25V and -3V to -25V respectively.

The electrical characteristics of the serial port as per the EIA (Electronics Industry Association)

RS232C Standard specifies a maximum baud rate of 20,000bps, which is slow compared to today’s

standard speed. For this reason, we have chosen the new RS-232D Standard, which was recently released.

When communicating with various micro processors one needs to convert the RS232 levels down

to lower levels, typically 3.3 or 5.0 Volts. Here is a cheap and simple way to do that. Serial RS-232

(V.24) communication works with voltages -15V to +15V for  high and low. On the other hand,

TTL logic operates between 0V and +5V. Modern low power consumption logic operates in the range of

0V and +3.3V or even lower.

SPECIFICATIONS:

RS-232 TTL Logic

-15V … -3V +2V … +5V High

+3V … +15V 0V … +0.8V Low

24

PIN OUTS:

Signal OriginDB-25

DE-9(TIA-574)

EIA/TIA 561

YostName Abbrevation DTE DCE

Common Ground G 7 5 4 4,5

Protective Ground PG 1 - -

Transmitted Data TxD ● 2 3 6 3

Received Data RxD ● 3 2 5 6

Data Terminal Ready DTR ● 20 4 3 2

Data Set Ready DSR ● 6 6 1 7

Request To Send RTS ● 4 7 8 1

Clear To Send CTS ● 5 8 7 8

Carrier Detect DCD ● 8 1 2 7

Ring Indicator RI ● 22 9 1 -

RS232 PHYSICAL PROPERTIES:

VOLTAGES:

The signal level of the RS232 pins can have two states. A high bit, or mark state is identified by a

negative voltage and a low bit or space state uses a positive value. This might be a bit confusing, because

in normal circumstances, high logical values are defined by high voltages also. The voltage limits are

shown below

RS232 voltage values

LevelTransmittercapable (V)

Receivercapable (V)

Space state (0) +5 ... +15 +3 ... +25

Mark state (1) -5 ... -15 -3 ... -25

Undefined - -3 ... +3

25

More information about the voltage levels of RS232 and other serial interfaces can be found in

the interface comparison table.

The maximum voltage swing the computer can generate on its port can have influence on the

maximum cable length and communication speed that is allowed. Also, if the voltage difference is small,

data distortion will occur sooner. For example, my Toshiba laptop mark's voltage is -9.3 V, compared to -

11.5 V on my desktop computer. The laptop has difficulties to communicate with Mitsubishi PLC's in

industrial environments with high noise levels where the desktop even far beyond the minimum voltage

levels, 2 volts extra can make a huge difference in communication quality.

MAXIMUM CABLE LENGTHS:

Cable length is one of the most discussed items in RS232 world. The standard has a clear answer,

the maximum cable length is 50 feet, or the cable length equal to a capacitance of 2500 pF. The latter rule

is often forgotten. This means that using a cable with low capacitance allows you to span longer distances

without going beyond the limitations of the standard. If for example UTP CAT-5 cable is used with a

typical capacitance of 17 pF/ft, the maximum allowed cable length is 147 feet.

The cable length mentioned in the standard allows maximum communication speed to occur. If

speed is reduced by a factor 2 or 4, the maximum length increases dramatically. Texas Instruments has

done some practical experiments years ago at different baud rates to test the maximum allowed cable

lengths. Keep in mind, that the RS232 standard was originally developed for 20 kbps. By halving the

maximum communication speed, the allowed cable length increases a factor ten!

RS232 cable length according to Texas Instruments

Baud rate Maximum cable length (ft)

19200 50

9600 500

4800 1000

2400 3000

26

27

Description Signal9-pin

DTE25-pin DCE Source DTE or DCE

Carrier Detect CD 1 8 from Modem

Receive Data RD 2 3 from Modem

Transmit Data TD 3 2 from Terminal/Computer

Data Terminal Ready DTR 4 20 from   Terminal/Computer

Signal Ground SG 5 7 from Modem

Data Set Ready DSR 6 6 from Modem

Request to Send RTS 7 4 from   Terminal/Computer

Clear to Send CTS 8 5 from Modem

Ring Indicator RI 9 22from Modem

3.9 MAX 232:

FEATURES:

Operates With Single 5-V Power Supply

Lin Bi CMOS Process Technology

Two Drivers and Two Receivers

30-V Input Levels

Low Supply Current . . . 8 mA Typical

Meets or Exceeds TIA/EIA-232-F and ITU

DESCRIPTION:

The MAX232 device is a dual driver/receiver that includes a capacitive voltage generator to

supply EIA-232 voltage levels from a single 5-V supply. Each receiver converts EIA-232 inputs to 5-V

TTL/CMOS levels. These receivers have a typical threshold of 1.3 V and a typical hysteresis of 0.5 V,

and can accept 30-V inputs. Each driver converts TTL/CMOS input levels into EIA-232 levels. The

driver, receiver, and voltage-generator functions are available as cells in the Texas.

PIN DIAGRAM:

28

SPECIFICATIONS:

MAX232

Data Rate(kbps) 120

Drivers Per Package 2

Receivers Per Package 2

ESD HBM(kV) 2

Supply Voltage(s)(V) 5

ICC(Max)(mA) 10

Operating Temp Range(Celsius) -40 to 85,0 to 70

Pin/Package 16PDIP,16SO,16SOIC

Approx. Price (US$) 0.48 | 1ku

Rating Catalog

Footprint MAX232

PARTS:

29

1 x female serial port connector

1 x max 232

4 x 1uF capacitor

1 x 10uF capacitor

Soldering iron, wires, breadboard etc.

SCHEMATIC DIAGRAM:

30

LOGIC SIGNAL VOLTAGE:

Serial RS-232 (V.24) communication works with voltages (between -15V ... -3V and

used to transmit a binary '1' and +3V ... +15V to transmit a binary '0') which are not compatible

with today's computer logic voltages. On the other hand, classic TTL computer logic operates

between 0V ... +5V (roughly 0V ... +0.8V referred to as low for binary '0', +2V ... +5V for high

binary '1' ). Modern low-power logic operates in the range of 0V ... +3.3V or even lower.

So, the maximum RS-232 signal levels are far too high for today's computer logic

electronics, and the negative RS-232 voltage can't be grokked at all by the computer logic.

Therefore, to receive serial data from an RS-232 interface the voltage has to be reduced, and the

0 and 1 voltage levels inverted. In the other direction (sending data from some logic over RS232)

the low logic voltage has to be "bumped up", and a negative voltage has to be generated, too.

RS-232 TTL Logic

-----------------------------------------------

-15V ... -3V <-> +2V ... +5V <-> 1

+3V ... +15V <-> 0V ... +0.8V <-> 0

All this can be done with conventional analog electronics, e.g. a particular power supply

and a couple of transistors or the once popular 1488 (transmitter) and 1489 (receiver) ICs.

However, since more than a decade it has become standard in amateur electronics to do the

necessary signal level conversion with an integrated circuit (IC) from the MAX232 family

(typically a MAX232A or some clone). In fact, it is hard to find some RS-232 circuitry in

amateur electronics without a MAX232A or some clone.

MAX232 INTERFACED TO MICROCONTROLLER:

31

MAX232 is connected to the microcontroller as shown in the figure above 11, 12 pin are

connected to the 10 and 11 pin i.e. transmit and receive pin of microcontroller.

APPLICATIONS:

Computers

Modems

Battery powered systems

Terminals

3.10 LCD:

A Liquid Crystal display (LCD) is a thin, flat display device made up of any number of color or

monochrome pixels arrayed in front of a light source or reflector. It is often utilized in battery-powered

electronic devices because it uses very small amounts of electrical power.

A general purpose alphanumeric LCD, with two lines of 16 characters.

32

LCDs with a small number of segments, such as those used in digital watches and pocket

calculators, have individual electrical contacts for each segment. An external dedicated circuit supplies an

electric charge to control each segment. This display structure is unwieldy for more than a few display

elements.

High-resolution color displays such as modern LCD computer monitors and televisions use an

active matrix structure. A matrix of thin-film transistors (TFTs) is added to the polarizing and color

filters. Each pixel has its own dedicated transistor, allowing each column line to access one pixel. When a

row line is activated, all of the column lines are connected to a row of pixels and the correct voltage is

driven onto all of the column lines. The row line is then deactivated and the next row line is activated. All

of the row lines are activated in sequence during a refresh operation. Active-matrix addressed displays

look "brighter" and "sharper" than passive-matrix addressed displays of the same size, and generally have

quicker response times, producing much better images.

Interfacing to LCD Display:

The project with the 8051 CPU requires some form of display. The most common way to

accomplish this is with the LCD (Liquid Crystal Display).

LCDs have become a cheap and easy way to get text display for embedded system Common

displays are set up as 16 to 20 characters by 1 to 4 lines.

UNDERSTANDING LCD

Pin out

8 data pins D7:D0

Bi-directional data/command pins.

Alphanumeric characters are sent in ASCII format.

33

• RS: Register Select

RS = 0 -> Command Register is selected

RS = 1 -> Data Register is selected

• R/W: Read or Write

0 -> Write, 1 -> Read

• E: Enable (Latch data)

Used to latch the data present on the data pins.

A high-to-low edge is needed to latch the data.

• VEE: contrast control

Registers Register Selection

RS RW Operation

0 0 R write as an internal operation (display, clear, etc.,)

0 1 Read busy flag (DB7) and address counter (DB0 to DB6)

1 0 DR write as an internal operation (DR to DDRAM or CGRAM)

1 1 DR read as an internal operation (DDRAM or CGRAM to DR)

34

LCD COMMANDS :

The LCD’s internal controller accepts several commands and modifies the display

accordingly. These commands would be things like:

1. Clear screen

2. Return home

3. Shift display right/left

INTERFACING LCD TO 8051:

The 44780 standard requires 3 control lines as well as either 4 or 8 I/O lines for the data

bus. The user may select whether the LCD is to operate with a 4-bit data bus or an 8-bit data bus. If a 4-

bit data bus is used, the LCD will require a total of 7 data lines.

If an 8-bit data bus is used, the LCD will require a total of 11 data lines.

The three control lines are EN, RS, and RW.

You can use subroutine for checking busy flag or just a big (and safe) delay.

1. Set R/W Pin of the LCD HIGH (read from the LCD)

2. Select the instruction register by setting RS pin LOW

3. Enable the LCD by Setting the enable pin HIGH

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4. The most significant bit of the LCD data bus is the state of the busy flag

(1=Busy, 0=ready to accept instructions/data). The other bits hold the current value of the address

counter.

3.11 BUZZER:

A buzzer or beeper is a signalling device, usually sounds a warning in the form of a continuous or

intermittent buzzing or beeping sound. Ideal for alarms and warning indication.

3.12 KEYPAD :

A keypad is a set of buttons arranged in a block which usually bear digits and other symbols but

not a complete set of alphabetical letters. If it mostly contains numbers then it can also be called a

numeric keypad. Keypads are found on many alphanumeric keyboards and on other devices such as

calculators, combination locks and telephones which require largely numeric input.

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CHAPTER 4

MEMORY ORGANISATION

4.1 PROGRAM MEMORY:

The TEMIC C51 Microcontroller Family has separate address spaces for program Memory and

Data Memory. The program memory can be up to 64 K bytes long. The lower 4 K for the 89C51 (8 K for the

80C52, 16 K for the 83 C154 and 32 K for the 83C154D) may reside on chip. Figure 1 to 4 show a map of

80C51, 80C52, 83C154 and 83C154D program memory.

Figure1. The 89C51 Program Memory.

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4.2 DATA MEMORY:

The C51 Microcontroller Family can address up to 64 K bytes of Data Memory to the chip. The

“MOVX” instruction is used to access the external data memory (refer to the C51 instruction set, in this

chapter, for detailed description of instructions).

The 89C51 has 128 bytes of on-chip-RAM (256 bytes in the 89C52, 83C154 and 83C154D) plus a

number of Special Function Registers (SFR). The lower 128 bytes of RAM can be accessed either by direct

addressing (MOVdata addr). or by indirect addressing (MOV @Ri). Figure5 and 6 show the 89C51, 89C52,

83C154 and 83C154D Data Memory organization.

Figure5. The 89C51 Data Memory Organisation.

38

Note that in Figure 6 - the SFRs and the indirect address RAM have the same addresses (80H-

OFFH).Nevertheless, they are two separate areas and are accessed in two different ways. For example the

instruction MOV 80H, #0AAH writes 0AAH to Port 0 which is one of the SFRs and the instruction

4.3 FLASH MEMORY:

39

Flash memory (sometimes called "flash RAM") is a type of constantly-powered non volatile that

can be erased and reprogrammed in units of memory called blocks. It is a variation of electrically erasable

programmable read-only memory (EEPROM) which, unlike flash memory, is erased and rewritten at the

byte level, which is slower than flash memory updating. Flash memory is often used to hold control code

such as the basic input/output system (BIOS) in a personal computer. When BIOS needs to be changed

(rewritten), the flash memory can be written to in block (rather than byte) sizes, making it easy to update.

On the other hand, flash memory is not useful as random access memory (RAM) because RAM needs to

be addressable at the byte (not the block) level.

Flash memory gets its name because the microchip is organized so that a section of memory

cells are erased in a single action or "flash." The erasure is caused by Fowler-Nordheim tunneling in

which electrons pierce through a thin dielectric material to remove an electronic charge from a floating

gate associated with each memory cell. Intel offers a form of flash memory that holds two bits (rather

than one) in each memory cell, thus doubling the capacity of memory without a corresponding increase in

price.

Flash memory is used in digital cellular phones, digital cameras, LAN switches, PC Cards for

notebook computers, digital set-up boxes, embedded controllers, and other devices.

DIRECT AND INDIRECT ADDRESS AREA:

The 128 bytes of RAM which can be accessed by both direct and indirect addressing can be divided into

3segments as listed below and shown in figure.

1. REGISTER BANKS 0-3:

Locations 0 through 1FH (32bytes). ASM-51 and the device after reset default to register bank 0. To use

the other register banks the user must select them in the software. Each register bank contains 8 one-byte

registers, 0 through 7.Reset initializes the Stack Pointer to location 07H and it is incremented once to start

from location 08H which is the first register (R0) of the second register bank. Thus, in order to use more than

one register bank, the SP should be initialized to a different location of the RAM where it is not used for data

storage (ie, higher part of the RAM).

40

2. BIT ADDRESSABLE AREA:

16 bytes have been assigned for this segment, 20H-2FH. Each one of the 128 bits of this segment

can be directly addressed (0-7FH). The bits can be referred to in two ways both of which are acceptable

by the ASM-51. One way is to refer to their addresses, i.e., 0 to 7FH. The other way is with reference to

bytes 20H to 2FH. Thus, bits 0-7 can also be referred to as bits 20.0-20.7 and bits 8-FH are the same as

21.0-21.7 and so on. Each of the 16 bytes in this segment can also be addresses as a byte.

3. SCRATCH PAD AREA:

Bytes 30H through 7FH are available to user as data RAM. However, if the stack pointer has

been initialized to this area, enough number of bytes should be left aside to prevent SP data destruction.

Figure7. 128 Bytes of RAM Direct and Indirect Addressable.

41

SPECIAL FUNCTION REGISTERS:

42

Table 1 contains a list of all the SFRs and their addresses. Comparing table 1 and figure 8 shows

that all of the SFRs that are byte and bit addressable are located on the first column of the diagram in figure 8.

PSW : PROGRAM STATUS WORD (BIT ADDRESSABLE):

CY PSW.7 Carry Flag.

AC PSW.6 Auxiliary Carry Flag.

F0 PSW.5 Flag 0 available to the user for general purpose.

RS1 PSW.4 Register Bank selector bit 1 (SEE NOTE).

RS0 PSW.3 Register Bank selector bit 0 (SEE NOTE).

RS0 PSW.2 Overflow Flag.

F1 PSW.1 Flag F1 available to the user for general purpose.

P PSW.0 Parity flag.

NOTE:

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The value presented by RS0 and RS1 selects the corresponding register bank.

4.4 TIMER/COUNTERS:

The AT89C51 has two 16-bit Timer/Counter registers: Timer 0 and Timer 1. The AT89C52 has these two

Timer/Counters, and in addition Timer 2. All three can be configured to operate either as Timers or event

Counters.

As a Timer, the register is incremented every machine cycle. Thus, the register counts machine cycles.

Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency. As a

Counter, the register is incremented in response to a l to-0 transition at its corresponding external input pin,

T0, T1, or (in the AT89C52) T2. The external input is sampled during S5P2 of every machine cycle. When

the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count

value appears in the register during S3P1 of the cycle following the one in which the transition was detected.

Since 2 machine cycles (24 oscillator periods) are required to recognize a l-to-0 transition, the maximum

count rate is 1/24 of the oscillator frequency. There are no restrictions on the duty cycle of the external input

44

signal, but it should be held for at least one full machine cycle to ensure that a given level is sampled at least

once before it changes. In addition to the Timer or Counter functions, Timer 0 and Timer 1 have four

operating modes:

1. 13 bit timer,

2. 16 bit timer,

3. 8 bit auto-reload,

4. Split timer

Timer 2 in the AT89C52 has three modes of operation: Capture, Auto-Reload, and baud rate

generator.

TIMER 0 AND TIMER 1:

Timer/Counters 1 and 0 are present in both the AT89C51 and AT89C52. The Timer or Counter

function is selected by control bits C/T in the Special Function Register TMOD (Figure). These two

Timer/Counters have four operating modes, which are selected by bit pairs (M1, M0) in TMOD. Modes 0, 1,

and 2 are the same for both Timer/Counters, but Mode 3 is different. The four modes are described in the

following sections.

MODE 0:

Both Timers in Mode 0 are 8-bit Counters with a divide-by-32 pre scalar. In this mode, the Timer

register is configured as a 13-bit register. As the count rolls over from all 1s to all 0s, it sets the Timer

interrupt flag TF1. The counted input is enabled to the Timer when TR1 = 1 and either GATE = 0 orINT1 =1.

Setting GATE=1 allows the Timer to be controlled by external input INT1, to facilitate pulse width

measurements.TR1 is a control bit in the Special Function Register TCON (Figure 8). GATE is in TMOD.

The 13-bit register consists of all 8 bits of TH1and the lower 5 bits of TL1. The upper 3 bits of

TL1 are indeterminate and should be ignored. Setting the run flag (TR1) does not clear the registers.Mode 0

operation is the same for Timer 0 as for Timer 1,except that TR0, TF0 and INT0 replace the corresponding

Timer 1 signals in Figure 7. There are two different GATE bits, one for Timer 1 (TMOD.7) and one for Timer

0 (TMOD.3).

45

MODE 1:

Mode 1 is the same as Mode 0, except that the Timer register is run with all 16 bits. The clock is

applied to the combined high and low timer registers (TL1/TH1). As clock pulses are received, the timer

counts up: 0000H, 0001H,0002H, etc. An overflow occurs on the FFFFH-to-0000H overflow flag. The timer

continues to count. The overflow flag is the TF1 bit in TCON that is read or written by software.

MODE 2:

Mode 2 configures the Timer register as an 8-bit Counter (TL1) with automatic reload, as shown

in Figure 9. Overflow from TL1 not only sets TF1, but also reloads TL1 with the contents of TH1, which is

preset by software. The reload leaves TH1 unchanged. Mode 2 operation is the same for Timer/Counter 0.

MODE 3:

Timer 1 in Mode 3 simply holds its count. The effect is the same as setting TR1 = 0. Timer 0 in

Mode 3 establishes TL0 and TH0 as two separate counters. The logic for Mode 3 on Timer 0 is shown in

Figure 10. TL0 uses the Timer 0 control bits: C/T, GATE, TR0, INT0, and TF0. TH0 is locked into a timer

function (counting machine cycles) and over the use of TR1 and TF1 from Timer 1. Thus, TH0 now controls

the Timer 1 interrupt. Mode 3 is for applications requiring an extra 8-bit timer or counter. With Timer 0 in

Mode 3, the AT89C51 can appear to have three Timer/Counters, and an AT89C52, can appear to have four.

When Timer 0 is in Mode 3, Timer 1 can be turned on and off by switching it out of and into its own Mode 3.

In this case, Timer 1 can still be used by the serial port as a baud rate generator or in any application not

requiring an interrupt.

46

47

CHAPTER 5

SERIAL COMMUNICATION

5.1 INTRODUCTION:

The Serial Port is harder to interface than the Parallel Port. In most cases, any device you connect

to the serial port will need the serial transmission converted back to parallel so that it can be used. This

can be done using a UART. On the software side of things, there are many more registers that you have to

attend to than on a Standard Parallel Port. (SPP) Now consider a case where we are transmitting data

through parallel communication. Data is being transmitted from the transmitter (i.e) in our case a GUI to a

receiver terminal ,here comes the drawback because the receiver is unable to retrieve the transmitted data

which means that he is in a state of confusion about which data is to be selected for his application but,

whereas, in Serial communication the pattern of the received data is like this:

START BIT DATA BITS STOP BIT

Now it’s very easy for the application to point out the data transmitted to the Receiver .It is strictly

followed because receive data must be same as transmitted data .Let us see some of the differences

between serial and parallel.

The serial port is full duplex, which means it can transmit and receive simultaneously. It is also

receive-buffered, which means it can begin receiving a second byte before a previously received byte has

been read from the receive register. (However, if the first byte still has not been read when reception of the

second byte is complete, one of the bytes will be lost.) The serial port receive and transmit registers are both

accessed at Special Function Register SBUF. Writing to SBUF loads the transmit register, and reading SBUF

accesses a physically separate receive register. The serial port can operate in the following four modes.

MODE 0:

Serial data enters and exits through RXD. TXD outputs the shift clock. Eight data bits are

transmitted/received, with the LSB first. The baud rate is fixed at 1/12 the oscillator frequency.

48

MODE 1:

10 bits are transmitted (through TXD) or received (through RXD): a start bit (0), 8 data bits (LSB first),

and a stop bit (1). On receive; the stop bit goes into RB8 in Special Function Register SCON. The baud rate is

variable.

MODE 2:

11 bits are transmitted (through TXD) or received (through RXD): a start bit (0), 8 data bits (LSB first), a

programmable ninth data bit, and a stop bit (1). On transmit, the 9th data bit (TB8 in SCON) can be assigned

the value of 0 or 1. Or, for example, the parity bit (P, in the PSW) can be moved into TB8. On receive, the

9th data bit goes into RB8 in Special Function Register SCON, while the stop bit is ignored. The baud rate is

programmable to either 1/32 or 1/64 the oscillator frequency.

MODE 3:

Reception is initiated in the other modes by the incoming start bit if REN =1. 11 bits are

transmitted (through TXD) or received (through RXD): a start bit (0), 8 data bits (LSB first), a programmable

ninth data bit, and a stop bit (1). In fact, Mode 3 is the same as Mode 2 in all respects except the baud rate,

which is variable in Mode 3. In all four modes, transmission is initiated by any instruction that uses SBUF as

a destination register. Reception is initiated in Mode 0 by the condition RI = 0 and REN 1.

5.2 SERIAL PORT CONTROL REGISTER:

The serial port control and status register is the Special Function Register SCON, shown in

Figure 15. This register contains the mode selection bits, the 9th data bit for transmit and receive (TB8 and

RB8), and the serial port interrupt bits (TI and RI).

SCON AND PCON FUNCTION REGISTERS:

7 6 5 4 3 2 1 0

THE SERIAL PORT CONTROL (SCON) SPECIAL FUNCTION REGISTER

Bit Symbol Function

7 SM0 Serial port mode bit 0. Set/cleared by program to select mode.

6 SM1 Serial port mode bit 1. Set/cleared by program to select mode.

49

SM0 SM1 Mode Description

0 0 0 Shift register; baud = f/12

0 1 1 8-bit UART; baud = variable

1 0 2 9-bit UART; baud= f/32 or f/64

1 1 3 9-bit UART; baud = variable

5 SM2 Multiprocessor communications bit. Set/cleared by program to enable

multiprocessor communication in modes 2 and 3. When set to 1 an interrupt is

generated if bit 9 of the received data is a 1; no interrupt is generated if bit 9 is

a 0. If set to 1 for mode 1, no interrupt will be generated unless a valid stop bit

is received. Clear to 0 if mode 0 is in use.

REN Receive enable bit. Set to 1 to enable reception; cleared to 0 to disable

reception.

3 TB8 Transmitted bit 8. Set/cleared by program in modes 2 and 3.

2 RB8 Received bit 8. Bit 8 of received data in modes 2 and 3; stop bit in mode 1.

Not used in mode 0.

1 T1 Transmit Interrupt flag. Set to one at the end of bit 7 time in mode and the

beginning of the stop bit for other modes. Must be cleared by the program.

0 R1 Receive Interrupt flag. Set to one at the end of bit 7 time in mode, and halfway

through the stop bit for other modes. Must be cleared by the program.

THE POWER MODE CONTROL (PCON) SPECIAL FUNCTION REGISTER

7 6 5 4 3 2 1 0

Bit Symbol Function

50

7 SMOD Serial baud rate modify bit. Set to 1 by program to double baud rate using timer

1 for modes 1, 2, and 3. Cleared to 0 by program to use timer 1 baud rate.

6-4 --- Not implemented.

3 GF1 General purpose user flag bit 1. Set/cleared by program.

2 GFO General purpose user flag bit 0. Set/cleared by program

1 PD Power down bit. Set to 1 by program to enter power down configuration for

CHMOS processors

0 IDL Idle mode bit. Set to 1 by program to enter idle mode configuration for CHMOS

processors. PCON is not bit addressable.

SBUF REGISTER:

SBUF is actually two separate registers at the same address.

1. Write-only transmit register.

2. Read-only receive register.

Cannot read back what was sent for transmission.

The byte to be transmitted on the serial port is “written” into SBUF. Serial transmission starts

immediately. The byte received from the serial port will be stored in SBUF once the last bit is received.

This is called “double buffering”. Received data is buffered in the serial port itself until the full byte is

received. This allows a little more time to deal with the previous data before its over-written with the new

one. HOWEVER, the previous data must be read before the new byte completes. Otherwise, the old data

will be lost.

Mode 1 of the Serial Port:

In mode 1, the 8051 serial port operates an 8-bit UART with variable baud rate. The essential operation of a

UART is parallel-to-serial conversion of output data and serial-to-parallel conversion of input data. 10 bits are

51

transmitted on TxD or received on RxD. Start bit, 8 data bits, 1 stop bit. The baud rate is set by the Timer 1

overflow rate.

MODE 1 TRANSMISSION:

Transmission starts when anything is written into SBUF.

The period for each bit is the reciprocal of the baud rate.

The transmit interrupt (TI) flag is set as soon as the stop bit appears on TxD.

In Mode 0, the baud rate is fixed at the clock frequency divided by 12.

By default, the baud rate in mode 2 is set to 1/64 of the clock frequency. However, bit 7 of the PCON

(Power Control) Register known as SMOD doubles the baud rate if it is set to 1.

Steps to Transmit a Byte:

1. Program T1 for Mode2 (TMOD ¬ 0x20)

2. Load TH1 and TL1 with the initial value (baud rate dependant) (TH1 ¬ FD /

FA / F4 / E8)

3. Program SCON for Mode1 (SCON ¬ 0x50)

4. Start Timer1 (SETB TR1)

5. Clear TI

6. Load SBUF with the byte to be transferred (SBUF ¬ byte)

7. Wait until TI becomes 1 (JNB TI, not_done)

8. Go back to Step5 for next byte.

Steps to Receive a Byte:

1. Program T1 for Mode2 (TMOD ¬ 0x20)

2. Load TH1 and TL1 with the initial value (baud rate dependant)

(TH1 ¬ FD / FA / F4 / E8)

3. Program SCON for Mode1 (SCON ¬ 0x50)

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4. Start Timer1 (SETB TR1)

5. Clear RI

6. Wait until RI becomes 1 (JNB RI, not_done)

7. Store SBUF (A ¬ SBUF)

8. Go back to Step5 for next byte.

5.3 INTERRUPTS:

The AT89C51 provides 5 interrupt sources: two external interrupts, two timer interrupts, and a

serial port interrupt. The AT89C52 provides 6 with the extra timer. These are shown in below Figure.

The External Interrupts INT0 and INT1 can each be either level-activated or transition-activated,

depending on bits IT0 and IT1 in Register TCON. The flags that actually generate these interrupts are the IE0

and IE1 bits in TCON. When the service routine is vectored to, hardware clears the flag that generated an

external interrupt only if the interrupt was transition-activated. If the interrupt was level-activated, then the

external requesting source (rather than the on-chip hardware) controls the request flag. The Timer 0 and

Timer 1 Interrupts are generated by TF0 and TF1, which are set by a rollover in their respective

Timer/Counter registers (except for Timer 0 in Mode 3).When a timer interrupt is generated, the on-chip

hardware clears the flag that generated it when the service routine is vectored to. The Serial Port Interrupt is

generated by the logical OR of RI and TI. Neither of these flags is cleared by hardware when the service

routine is vectored to. In fact, the service routine normally must determine whether RI or TI generated the

interrupt, and the bit must be cleared in software. In the AT89C52, the Timer 2 Interrupt is generated by the

logical OR of TF2 and EXF2. Neither of these flags is cleared by hardware when the service routine is

vectored to. In fact, the service routine may have to determine whether TF2 or EXF2 generated the interrupt,

and the bit must be cleared in software.

53

PRIORITY LEVEL STRUCTURE:

Each interrupt source can also be individually programmed to one of two priority levels by setting

or clearing a bit in Special Function Register IP (interrupt priority) at address 0B8H (Figure 24). IP is cleared

after a system reset to place all interrupts at the lower priority level by default. A low-priority interrupt can be

interrupted by a high-priority interrupt but not by another low-priority interrupt. A high-priority interrupt can

not be interrupted by any other interrupt source. If two requests of different priority levels are received

simultaneously, the request of higher priority level is serviced. If requests of the same priority level are

54

received simultaneously, an internal polling sequence determines which request is serviced. Thus within each

priority level there is a second priority structure determined by the polling sequence, as follows.

Note that the “priority within level” structure is only used to resolve simultaneous requests of the

same priority level. The IP register contains a number of unimplemented bits. IP.7 and IP.6 are vacant in the

AT89C52, and in the AT89C51 these bits and IP.5 are vacant. User software should not write 1s to these bit

positions, since they may be used in future products.

55

HOW INTERRUPTS ARE HANDLED?

The interrupt flags are sampled at S5P2 of every machine cycle. The samples are polled during

the following machine cycle. The AT89C52 Timer 2 interrupt cycle is different, as described in the Response

Time Section. If one of the flags was in a set condition at S5P2 of the preceding cycle, the polling cycle will

find it and the interrupt system will generate an LCALL to the appropriate service routine, provided this

hardware generated LCALL is not blocked by any of the following conditions.

1. An interrupt of equal or higher priority level is already in progress.

2. The current (polling) cycle is not the final cycle in the execution of the instruction in progress.

3. The instruction in progress is RETI or any write to the IE or IP registers.

Any of these three conditions will block the generation of the LCALL to the interrupt service

routine. Condition 2 ensures that the instruction in progress will be completed before vectoring to any service

routine. Condition 3 ensures that if the instruction in progress is RETI or any access to IE or IP, then at least

one more instruction will be executed before any interrupt is vectored to.

The polling cycle is repeated with each machine cycle, and the values polled are the values that

were present at S5P2 of the previous machine cycle. If an active interrupt flag is not being serviced because of

one of the above conditions and is not still active when the blocking condition is removed, the denied

interrupt will not be serviced. In other words, the fact that the interrupt flag was once active but not serviced

is not remembered. Every polling cycle is new. The polling cycle/LCALL sequence is illustrated in Figure.

Note that if an interrupt of higher priority level goes active prior to S5P2 of the machine cycle

labeled C3 in Figure 25, then in accordance with the above rules it will be serviced during C5 and C6, without

any instruction of the lower priority routine having been executed. Thus, the processor acknowledges an

interrupt request by executing a hardware-generated LCALL to the appropriate servicing routine. In some

cases it also clears the flag that generated the interrupt, and in other cases it does not. It never clears the Serial

Port or Timer 2 flags. This must be done in the user’s software. The processor clears an external interrupt flag

(IE0 or IE1) only if it was transition activated. The hardware-generated LCALL pushes the contents of the

56

Program Counter onto the stack (but it does not save the PSW) and reloads the PC with an address that

depends on the source of the interrupt being serviced, as shown in the following table.

When an interrupt is accepted the following action occurs:

1. The current instruction completes operation.

2. The PC is saved on the stack.

3. The current interrupt status is saved internally.

4. Interrupts are blocked at the level of the interrupts.

5. The PC is loaded with the vector address of the ISR (interrupt service routine).

6. The ISR executes.

The ISR executes and takes action in response to the interrupt. The ISR finishes with RETI

(return from interrupt) instruction. This retrieves the old value of the PC from the stack and restores the old

interrupt status. Execution of the main program continues where it left off.

CHAPTER 6

57

SOFTWARES

6.1 KEIL U VISION2.0:

Keil Software develops, manufactures, and distributes embedded software development tools for

8051, 251, and C166/ST10 microcontroller families.  They provide ANSI C compilers, Macro

Assemblers, real-time executives, debuggers and simulators, integrated environments, and evaluation

boards. This web site provides the latest information about their development tools, evaluation tools,

software updates, application notes, example programs, and links to other sources of information.

Keil Software was founded in 1986 to market add-on products for the development tools

provided by many of the silicon vendors. It soon became evident that there was a void in the marketplace

that had to be filled by quality software development tools. It was then that Keil Software implemented

the first C compiler designed from the ground-up specifically for the 8051 microcontroller.

Today, Keil Software provides a broad range of development tools for the embedded systems

marketplace. Their products include ANSI C compilers, macro assemblers, debuggers, linkers, library

managers, and real-time operating systems. Products such as these have helped Keil become the world's

leading developer of Embedded Systems Software.

Since its beginning, Keil has driven the industry to new heights with advanced software

technology. Their constant, hard-driving research has paid off time and again as we continue to develop

innovative products that make product development easier.

6.2 FLASH MAGIC:

Flash magic is a PC tool for programming flash based microcontrollers from NXP using a serial

protocol while in the target hardware. Flash magic is a feature-rich windows based tool for the

downloading of code into NXP flash Microcontrollers. It utilizes a feature of the microcontrollers called

ISP, which allows the transfer of data serially between a PC and the Device.

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Basic Steps For Code Dumping:

The window is divided up into five sections. Work your way from section 1 to section 5 to

program a device using the most common functions. Each section is described in detail in the following

sections.

At the very bottom left of the window is an area where progress messages will be displayed and

at the very bottom right is where the progress bar is displayed. In between the messages and the progress

bar is a count of the number of times the currently selected hex file has been programmed since it was last

modified or selected.

Just above the progress information EmbeddedHints are displayed. These are rotating

Internet links that you can click on to go to a web page using your default browser. If you

wish to quickly flick through all the hints then you can click on the fast forward button.

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Step 1 – Connection Settings

Before the device can be used the settings required to make a connection must be specified.

Select the desired COM port from the drop down list or type the desired COM port directly into the box.

If you enter the COM port yourself then you must enter it in one of the following formats:

• COM n

• n

Any other format will generate an error. So if you want to use COM 5 (which is not present on the drop

down list) you can directly type in either “COM 5” or “5”.

Select the baud rate to connect at. Try a low speed first. The maximum speed that can be

used depends on the crystal frequency on your hardware. You can try connecting at higher and higher

speeds until connections fail. Then you have found the highest baud rate to connect at. Alternatively,

some devices (Rx2 and 66x families) support high speed communications.

Enter the oscillator frequency used on the hardware. Do not round the frequency, instead

enter it as precisely as possible. Some devices do not require the oscillator frequency to be entered, so this

field will not be displayed.

Select the device being used from the drop down list. Ensure you select the correct one as

different devices have different feature sets and different methods of setting up the serial

communications.

Once the options are set ensure the device is running the on-chip Bootloader.

Note that the connection settings affect all ISP features provided by Flash Magic.

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Step 2 – Erasing

This step is optional, however if you attempt to program the device without first erasing at least

one Flash block, then Flash Magic will warn you and ask you if you are sure you want to program the

device.

Select each Flash block that you wish to erase by clicking on its name. If you wish to erase all the

Flash then check that option. If you check to erase a Flash block and all the Flash then the Flash block

will not be individually erased. If you wish to erase only the Flash blocks used by the hex file you are

going to select, then check that option.

Erasing all the Flash also results in the Boot Vector and Status Byte being set to default

values, which ensure that the Bootloader will be executed on reset, regardless of the state

of the PSEN pin. Only when programming a Hex File has been completed will the Status

Byte be set to 00H to allow the code to execute. This is a safeguard against accidentally

attempting to execute when the Flash is erased.

On some devices (not the Rx+ family) erasing all the Flash will also erase the security bits. This

will be indicated by the text next to the Erase all Flash option. On some devices erasing all the Flash will

also erase the speed setting of the device (the number of clocks per cycle) setting it back to the default.

This will be indicated by the text next to the Erase all Flash option.

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Step 3 – Selecting the Hex File

This step is optional. If you do not wish to program a Hex File then do not select one.

You can either enter a path name in the text box or click on the Browse button to select a

Hex File by browsing to it. Also you can choose Open… from the File menu.

Note that the Hex file is not loaded or cached in any way. This means that if the Hex File is

modified, you do not have to reselect it in Flash Magic. Every time the Hex File is programmed it is first

re-read from the location specified in the main window.

The date the Hex file was last modified is shown in this section. This information is updated

whenever the hex file is modified. The hex file does not need to be reselected. Clicking on more info or

choosing Information… from the File menu will display additional information about the Hex file. The

information includes the range of Flash memory used by the Hex file, the number of bytes of Flash

memory used and the percentage of the currently selected device that will be filled by programming the

Hex file.

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Step 4 – Options

Flash Magic provides various options that may be used after the Hex File has been

programmed. This section is optional, however Verify After Programming, Fill Unused Flash and

Generate Checksums may only be used if a Hex File is selected (and therefore being programmed), as

they all need to know either the Hex File contents or memory locations used by the Hex File.

Also note that if one or more of the security bits are set on the device or the clocks bit (6

clks/cycle) is set on the device, then those set bits will be checked in this section, indicating they are set.

Checking the Verify After Programming option will result in the data contained in the Hex File being

read back from Flash and compared with the Hex File after programming. This helps to ensure that the

Hex File was correctly programmed. If the device does not support verifying then this item will be

disabled.

Checking the Fill Unused Flash option will result in every memory location not used by the Hex File

being programmed with the value 00H. Once a location has been programmed with 00H it cannot be

reprogrammed with any other value, preventing someone from programming the device with a small

program to read out the contents of Flash or altering the application’s operation. Checking the Generate

Checksums option will instruct Flash Magic to program the highest location in every Flash block used by

the Hex File with a special “checksum adjuster value”.

This value ensures that when a checksum is calculated for the whole Flash Block it will equal 55H,

providing the contents of the Flash block have not be altered or corrupted.

Checking the Execute option will cause the downloaded firmware to be executed

automatically after the programming is complete.

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Step 5 – Performing the Operations

Clicking the Start button will result in all the selected operations in the main window taking

place. They will be in order:

• Erasing Flash

• Programming the Hex File

• Verifying the Hex File

• Filling Unused Flash

• Generating Checksums

• Programming the clocks bit

• Programming the Security Bits

• Executing the firmware

Once started progress information and a progress bar will be displayed at the bottom of the main window.

In addition the Start button will change to a cancel button. Click on the cancel button to cancel the

operation.

Note that if you cancel during erasing all the Flash, it may take a few seconds before the operation is

cancelled.

Once the operations have finished the progress information will briefly show the message

“Finished…”. The Programmed Count shown next to the progress bar will increment. This shows the

total number of times the hex file has been programmed. Modifying the hex file or selecting another hex

file will reset the count. Alternatively, right-clicking over the count provides a menu with the option to

immediately reset the count.

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CHAPTER 7

CODING

AT TRANSMITTER END:

ORG 0000H

MOV SCON,#50H

MOV TMOD,#20H

SETB TCON.0

MOV TH1,#-3

SETB TR1

SETB P1.1

SETB P3.3

ACALL LCD_INIT

MOV DPTR,#BEGIN

ACALL TX_STRING

START:

ADC_READ:

CLR P0.2 ;CS=0(CHIP SELECT)

MOV P2,#0FFH

CLR P0.0 ;wr

NOP

NOP

NOP

SETB P0.0

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ACALL DELAY

ACALL DELAY

CLR P0.1 ;RD,READ H-L

MOV A,P2 ;data

SETB P0.1 ;rd

CJNE A,#30H,CHECK

SJMP FIRE

CHECK:

JNC FIRE

SETB P1.1

SETB P3.3

JNB P3.2,MAIN

SJMP START

FIRE:

MOV A,#'F'

ACALL TX

ACALL CLEAR

CLR P1.1

CLR P3.3

MOV DPTR,#ALARM

ACALL TX_STRING

CLR P1.1

66

CLR P3.3

JNB P3.2,MAIN

SJMP START

MAIN:

MOV R0,#50H

ACALL CLEAR

GO:

LCALL KEYPAD

MOV @R0,A

INC R0

CJNE R0,#53H,GO

MOV R0,#50H

MOV DPTR,#PWD

GO1:CLR A

MOVC A,@A+DPTR

MOV B,@R0

CJNE A,B,WRONG

INC DPTR

INC R0

CJNE R0,#53H,GO1

CORRECT:

MOV A,#'C'

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ACALL TX

SETB P1.1

SETB P3.3

ACALL CLEAR

MOV DPTR,#PPWD

ACALL TX_STRING

SETB P1.1

SETB P3.3

LJMP START

WRONG:

MOV A,#'W'

ACALL TX

CLR P1.1

CLR P3.3

ACALL CLEAR

MOV DPTR,#NPWD

ACALL TX_STRING

CLR P1.1

CLR P3.3

LJMP START

TX_STRING:

GO2:CLR A

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MOVC A,@A+DPTR

JZ BACK

;LCALL TX

LCALL DATAWRT

INC DPTR

SJMP GO2

BACK:

RET

TX:

MOV SBUF,A

JNB TI,$

CLR TI

ACALL DELAY

RET

CLEAR:

MOV A,#01H

ACALL COMMD

ACALL DELAY

MOV A,#80H

ACALL COMMD

ACALL DELAY

RET

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KEYPAD:

MOV P0,#0FH ;P0.7 TO P0.4 OUTPUT(ROW) AND P0.3 TO P0.0 INPUT(COL)

K1:

MOV P0,#0FH

MOV A,P0

ANL A,#0FH

MOV P0,A

MOV A,P0

ANL A,#0FH

CJNE A,#0FH,K1

K2:ACALL DELAY2

MOV A,P0

ANL A,#0FH

CJNE A,#0FH,OVER

SJMP K2

OVER:

ACALL DELAY2

MOV A,P0

ANL A,#0FH

CJNE A,#0FH,OVER1

SJMP K2

OVER1:

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CLR P0.4 ; ROW 1 SELECTED

SETB P0.5

SETB P0.6

SETB P0.7

MOV A,P0

ANL A,#0FH

CJNE A,#0FH,ROW0

CLR P0.5 ; ROW 2 SELECTED

SETB P0.7

SETB P0.6

SETB P0.4

MOV A,P0

ANL A,#0FH

CJNE A,#0FH,ROW1

CLR P0.6 ; ROW 3 SELECTED

SETB P0.7

SETB P0.5

SETB P0.4

MOV A,P0

ANL A,#0FH

CJNE A,#0FH,ROW2

CLR P0.7 ; ROW 4 SELECTED

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SETB P0.4

SETB P0.6

SETB P0.5

MOV A,P0

ANL A,#0FH

CJNE A,#0FH,ROW3

SJMP K2

ROW0: MOV DPTR,#KCODE0

SJMP FIND

ROW1: MOV DPTR,#KCODE1

SJMP FIND

ROW2: MOV DPTR,#KCODE2

SJMP FIND

ROW3: MOV DPTR,#KCODE3

FIND: RRC A

JNC MATCH

INC DPTR

djnz r6,FIND

MATCH:

CLR A

MOVC A,@A+DPTR

ACALL TX

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MOV R7,A

ACALL DATAWRT

MOV A,R7

RET

LCD_INIT:

ACALL DELAY

ACALL DELAY

MOV A,#30H

ACALL COMMD

ACALL DELAY

MOV A,#30H

ACALL COMMD

ACALL DELAY

MOV A,#30H

ACALL COMMD

ACALL DELAY

MOV A,#02H

ACALL COMMD

ACALL DELAY

MOV A,#01H

ACALL COMMD

ACALL DELAY

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MOV A,#0CH

ACALL COMMD

ACALL DELAY

MOV A,#80H

ACALL COMMD

ACALL DELAY

RET

COMMD:

ACALL DELAY

MOV R7,A

ANL A,#0F0H

MOV P1,A ;P1 FOR LCD

CLR P1.2 ;RS=0 COMMAND REG

SETB P1.3 ;ENABLE PIN

NOP

CLR P1.3

ACALL DELAY

MOV A,R7

SWAP A

ANL A,#0F0H

MOV P1,A

CLR P1.2

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SETB P1.3

NOP

CLR P1.3

RET

DATAWRT:

ACALL DELAY

MOV R7,A

ANL A,#0F0H

MOV P1,A

SETB P1.2 ;RS=1

SETB P1.3

NOP

CLR P1.3

MOV A,R7

SWAP A

ANL A,#0F0H

MOV P1,A

SETB P1.2

SETB P1.3

NOP

CLR P1.3

RET

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DELAY: MOV R4,#7FH

AGAIN: MOV R5,#0FFH

HERE: DJNZ R5,HERE

DJNZ R4,AGAIN

RET

DELAY2: MOV R2,#25H

AGAIN2:MOV R3,#0FFH

HERE2: DJNZ R3,HERE2

DJNZ R2,AGAIN2

RET

PWD:DB "123",0

PPWD:DB "CODE ACCEPTED",0

NPWD:DB "WRONG PWD ENTERED",0

ALARM:DB "FIRE DETECTED",0

BEGIN:DB"WELCOME",0

KCODE0: DB ' ','1','2','3'

KCODE1: DB ' ','4','5','6'

KCODE2: DB ' ','7','8','9'

KCODE3: DB ' ','*','0','#'

EXIT:

END

AT RECEIVER END:

ORG 0000H

76

MOV SCON,#50H

MOV TMOD,#20H

SETB TCON.0

MOV TH1,#-3

SETB TR1

MOV P2,#0FH

ACALL LCD_INIT

MOV DPTR,#BEGIN

ACALL TX_STRING

RX:

JNB RI,$

MOV A,SBUF

CLR RI

CJNE A,#'F',CORRECT

ACALL CLEAR

MOV P2,#0F0H

MOV DPTR,#FIRE1

ACALL TX_STRING

SJMP RX

CORRECT:

CJNE A,#'C',WRONG

ACALL CLEAR

MOV DPTR,#CORRECT1

ACALL TX_STRING

MOV P2,#0FH

SJMP RX

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WRONG:

CJNE A,#'W',RX

ACALL CLEAR

MOV P2,#0F0H

MOV DPTR,#WRONG1

ACALL TX_STRING

SJMP RX

TX_STRING:

GO2:CLR A

MOVC A,@A+DPTR

JZ BACK

;LCALL TX

LCALL DATAWRT

INC DPTR

SJMP GO2

BACK:

RET

TX:

MOV SBUF,A

JNB TI,$

CLR TI

ACALL DELAY

RET

CLEAR:

MOV A,#01H

ACALL COMMD

78

ACALL DELAY

MOV A,#80H

ACALL COMMD

ACALL DELAY

RET

LCD_INIT:

ACALL DELAY

ACALL DELAY

MOV A,#30H

ACALL COMMD

ACALL DELAY

MOV A,#30H

ACALL COMMD

ACALL DELAY

MOV A,#30H

ACALL COMMD

ACALL DELAY

MOV A,#02H

ACALL COMMD

ACALL DELAY

MOV A,#01H

ACALL COMMD

ACALL DELAY

MOV A,#0CH

ACALL COMMD

ACALL DELAY

79

MOV A,#80H

ACALL COMMD

ACALL DELAY

RET

COMMD:

ACALL DELAY

MOV R7,A

ANL A,#0F0H

MOV P1,A ;P1 FOR LCD

CLR P1.2 ;RS=0 COMMAND REG

SETB P1.3 ;ENABLE PIN

NOP

CLR P1.3

ACALL DELAY

MOV A,R7

SWAP A

ANL A,#0F0H

MOV P1,A

CLR P1.2

SETB P1.3

NOP

CLR P1.3

RET

DATAWRT: ACALL DELAY

MOV R7,A

ANL A,#0F0H

80

MOV P1,A

SETB P1.2 ;RS=1

SETB P1.3

NOP

CLR P1.3

MOV A,R7

SWAP A

ANL A,#0F0H

MOV P1,A

SETB P1.2

SETB P1.3

NOP

CLR P1.3

RET

DELAY: MOV R4,#7FH

AGAIN:MOV R5,#0FFH

HERE: DJNZ R5,HERE

DJNZ R4,AGAIN

RET

BEGIN:DB"WELCOME",0

FIRE1:DB"FIRE DETECTED",0

CORRECT1:DB"CORRECT PSWD",0

WRONG1:DB"WRONG PSWD",0

END

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CHAPTER 8

ALGORITHM

1. Start the procedure and you can observe the “Welcome” on the LCD at the control

room (transmitting end) and as well as at the security room (receiving end).

2. At the control room keypad will be activated after generating the interrupt, else waits

for the interrupt.

3. You need to enter the password, if it matches then it displays at the control room as

“code accepted” and at the security room as “correct password” else at both the ends

it displays as “wrong password entered” and automatically the buzzer goes On by RF

Communication.

4. Irrespective of the interrupt, the program checks for the fire detection. If fire detects

at the control room then it displays as “Fire Detected” at both the ends, and the buzzer

goes On at the security room, the communication is possible by using RF

communication.

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CHAPTER 9

FLOW CHART

No Yes

Yes No

No

Yes

83

Start

Serial Communication Initialization

Displays Text on LCD at both Tx and Rx ends

Check for port pin interrupt at Tx end

Keypad Activation

Enter the password at Tx end

Display text as Correct PSWD at both Tx and Rx ends

Send Information to Security Department through RF Communication

Buzzer ON

Checks the Temperature of the control room

If Temp is more at Control room

Send Information to Security Department through RF Communication

Buzzer ON

Stop

CHAPTER 10

APPLICATIONS

Home Security System :

We can create security to the Home Appliances since we are having fire detection which can be used in the kitchens and password detection for locker in the rooms where we can keep valuable things.

Office Security System :

Our project is an application of this system since we are using password detection.

Bank Lock Security System :

We can use this system for lockers in banks by using this password detection. The privileges are violated for the unauthorized persons. We can use this fire detection also in the banks.

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CHAPTER 11

CONCLUSION

We conclude that only the authorized persons can enter into the control room, if others are trying to enter into the control room then information will be sent to the security department through RF Communication stating ‘wrong password entered’ and the buzzer goes On automatically. If the authorized person enters into the control room then information will be sent to the security department stating ‘code accepted’. If the temperature at the control room is greater than the stored or particular value then it indicates Fire occurs at the control room, the information will be sent to the security department stating ‘fire detects’ and automatically the buzzer goes On. The communication between control room and the security room is based on RF Communication.

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BIBLIOGRAPHY

Microprocessor and microcontroller

-D.V.HALL

The 8051 Micro controller and Embedded systems

-Muhammad Ali Mazidi

Janice Gillispie Mazidi

The 8051 Micro controller Architecture,

Programming & Applications

-Kenneth J.Ayala

Electronic Components

-D.V.Prasad

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