Implementation of 3.3-kW GaN-Based DC-DC Converter for EV On-Board Charger with Series-Resonant Converter that Employs Combination of

Variable-Frequency and Delay-Time Control

Yungtaek Jang, Milan M. Jovanović, Juan M. Ruiz, Misha Kumar, and Gang Liu1, 2 Power Electronics Laboratory, Delta Products Corporation, 5101 Davis Drive, Research Triangle Park, NC, USA

1 Electrical Engineering, Fudan University, Shanghai 200433, People’s Republic of China 2 Delta Power Electronics (Shanghai) Co. Ltd, 201209, People’s Republic of China

Abstract—An isolated dc-dc series-resonant converter that is controlled by a combination of variable-frequency and secondary-side-switch delay-time control is employed as the output stage of the on-board charger module (OBCM) that operates with a wide battery-voltage range. The delay-time control which is implemented by the modulation of secondary-side switches is used to assist the conventional variable-switching-frequency control of primary switches to reduce the switching-frequency range. By substantially reducing the switching-frequency range and utilizing gallium nitride (GaN) switches, the overall operating frequency is increased to reduce the sizes of the passive components, and hence, increase power density.

The performance evaluation of the proposed series-resonant converter with delay-time control was done on a 3.3-kW prototype delivering energy from 400-V bus, which is the output of the PFC front end, to a battery operating with voltage range between 180 V and 430 V. The prototype circuit exhibits the maximum full-load efficiency of 97.3% with a switching frequency variation from 144 kHz to 175 kHz over the entire output-voltage range.

I. INTRODUCTION To maximize the range of electric vehicles (EVs) and

plug-in hybrid electric vehicles (PHEVs), it is necessary to utilize the maximum available energy from the battery pack. As a result, the battery-pack voltage varies in a wide range which makes the design of high-efficiency high-power-density on-board charger modules (OBCMs) extremely challenging. Generally, resonant converters with variable switching-frequency control are extensively used in state-of-the-art power supplies that offer the highest power densities and efficiencies [1]-[11]. However, variable switching-frequency control is seen as a drawback of a resonant converter especially in applications with a wide input-voltage and/or output-voltage range [12]-[15]. Specifically, as the input or output voltage range increases, the control frequency range also increases so that driving and magnetic component losses also increase, thereby reducing conversion efficiency. Recently, a new control technique that significantly improves the performance of a series resonant converter that operates with a wide input-voltage range and/or a wide output-voltage

range by substantially reducing their switching-frequency range has been introduced [16]. Reduction in the switching frequency range is achieved by controlling the output voltage with a combination of variable-frequency feedback control and the open-loop delay-time control. Variable-frequency control is used to control the primary switches of the series resonant converter, while delay-time control is used to control secondary-side rectifier switches provided in place of diode rectifiers.

In this paper, the introduced control method is applied to a dc-dc series-resonant converter employed as the output stage of an OBCM operating with a wide output-voltage range. By substantially reducing the switching-frequency range and utilizing gallium nitride (GaN) switches, the overall operating frequency is increased to reduce the sizes of the passive components, and hence, increase power density without sacrificing its performance. The performance of the proposed dc-dc converter was verified on a 3.3-kW prototype operating with a 400-V input and an output that varies between 180 V and 430 V.

II. SERIES-RESONANT CONVERTER WITH COMBINATION OF

VARIABLE-FREQUENCY CONTROL AND SECONDARY-SIDE-SWITCH DELAY-TIME CONTROL Figure 1 illustrates the proposed control method in a

series-resonant converter with secondary synchronous rectifiers. As illustrated in Fig. 1(a), output voltage regulation is achieved using a combination of variable-frequency feedback control and open-loop delay-time control. Specifically, variable-frequency control is applied to primary switches SP1-SP4, and delay-time control is applied to secondary-side switches SS2 and SS3. Figure 1(b) shows ideal gate waveforms of primary switches SP1-SP4, drain and gate waveforms of secondary switches SS2 and SS3, and resonant inductor current iLR in the resonant converter of Fig. 1(a). As shown in Fig. 1(b), switches in the same leg of the primary full-bridge operate in a complementary fashion with a small dead time between their commutations to achieve zero-voltage switching (ZVS). The delay-time control is

978-1-4673-9550-2/16/$31.00 ©2016 IEEE 1292

implemented by delaying the turn-off of switches SS2 and SS3 with respect to corresponding zero crossings of resonant current iLR so that both switches SS2 and SS3 conduct during delay-time intervals [T0-T1] and [T3-T4] and short the secondary of transformer TR. Because of the shorted secondary of the transformer, the voltage across resonant tank CR-LR during delay-time interval [T0-T1] is VIN instead of VIN–nVO which is the case with no time-delay control. Therefore, with the delay-time control, a higher voltage is applied across the resonant inductor and, consequently, a higher amount of energy is stored in resonant inductor LR. Therefore, at the same input voltage and switching frequency, secondary-side delay-time control provides a higher output voltage compared to the conventional frequency control. This boost characteristic makes optimizing circuit performance possible by selecting: (i) a

higher turns ratio in the transformer to reduce primary conduction losses and (ii) a higher magnetizing inductance to reduce circulating (i.e., magnetizing) current loss. Because of its boost property, in typical applications, the delay-time control is used in the middle and high output-voltage and/or low input-voltage range.

Dc-conversion ratio M=nVO/VIN of the series-resonant converter with proposed delay-time control is derived in [16] by using state-plane analysis. For a given Q and normalized delay time TD-N=TD/TS, dc conversion ratio M = nVO/VIN can be numerically calculated and plotted as function of normalized frequency F = fS/fO, as shown in Fig. 2. When delay time TD is zero, the converter characteristic is the same as that of a conventional series resonant converter. As delay time TD increases, dc gain M increases and exhibits a boost characteristic. Because delay time TD depends on input or output voltage, a microcontroller-based control implementation is preferred since the delay time can be easily programmed.

Figure 3 shows detailed control waveforms of the proposed series resonant converter with delay-time control shown in Fig. 1(a). In this implementation, as shown in Fig. 3, primary switches SP2 and SP4 and secondary switch SS3 turn on together at t=T0 (waveforms 1 and 7), whereas primary switches SP1 and SP3 and secondary switch SS2 turn on together at t=T3 (waveforms 2 and ). To implement the delay-time control, the zero crossing of resonant inductor current iLR at t=T1 should be detected for gating of switch SS3, whereas the gating of switch SS2 requires zero-crossing detection of the inductor current at t=T4. Generally, the sensing of the zero crossings of resonant current iLR can be done by using a current transformer. However, at light loads, the magnitude of resonant current iLR is too small to be used for reliable detection of the zero crossings. As a result, in this paper, the drain-to-source voltage waveforms of secondary-

11

Fig. 1(a)

Fig. 1(b)

Fig. 1. Proposed series resonant converter with additional secondary switch

control: (a) circuit diagram, (b) control waveforms.

DELAYCONTROL

i LR

SP1

SP2

VIN

L R

TR

N1 VO

+

-

LOAD

CO

SS3

N2

SS2

SP4

SP3

CR

CONTROL

VO

SS2 SS3SP2SP1

VO(scld)

VIN(scld)

VO(REF)

VO(scld)

+ -VEA

f S

VE

VIN(scld)

VIN

SP4SP3

DS1 DS4

SCALEEA w/ COMP SCALE

VCO

DRIVER PHASEDELAY DETECT

DRIVER

VSS2VSS3

n= N1N2

SP3

SP4

SP1

SP2OFF ON

t

ONOFF

OFFON

t

Ts

t

tSS2

iLR

T0 T1 T2 T3 T4

tON OFF

SS3

Delay Time

TD

Delay Time

TD

T D

T SD =

Fig. 2. Input-to-output voltage gain of proposed converter for Q=0.5 [16].

It should be noted that converter operates as series resonant converter when delay time TD-N is set to be zero.

1 1.2 1.4 1.6 1.8 20.6

0.7

0.8

0.9

1

1.1

1.2

1.3

0.1

0.05

0.025

0.075 BOOST MODE OPERATION

=0

Q = = 0.5= 0.125

M( , F) =

F =

Series Resonant Converter

Delay Time TD-N

1293

side switches SS2 and SS3 are used to indirectly determine the zero crossings.

This zero-current-detection method is based on the fact that at the zero crossings of the secondary current, the drain-to-source voltage of the secondary–side switch experiences an abrupt change without commutation delay. Specifically, for the zero crossings that occur when the secondary current changes from positive to negative, such as that at t=T1, the drain-to-source voltage of switch SS2, VDS-SS2 (waveform 4), changes from VO to zero because of the commutation of the secondary current from rectifier DS1 to antiparallel diode of switch SS2. Similarly, for the zero crossings that occur at negative-to-positive secondary-current transitions, e.g., at t=T4, the drain-to-source voltage of switch SS3, VDS-SS3 (waveform 8), changes from VO to zero because of the commutation of the secondary current from rectifier DS4 to antiparallel diode of switch SS3.

In the digital implementation of the controller, the zero crossings can be determined by the time differences between the primary switch commutation instants and the instants the drain-to-source voltage of the corresponding secondary-side switch transitions from VO to zero, i.e., by calculating the

durations of time intervals [T1-T0], [T4-T3], [T7-T6], etc. For the calculation of these time intervals at positive-to-negative current transitions, the inverted signal of drain-to-source voltage VDS-SS2 (waveform 5) and gate-to-source voltage VGS-SP2 (waveform 1) are processed by the AND gate as shown in the waveform of Fig. 3. The output signal of the AND gate is read by Enhanced Capture (eCAP) Module of the microcontroller (TMS320F28069) that captures the pulse width and stores its value as Te1. During the next switching cycle, the duration of the time intervals [T1-T0], [T7-T6], etc. is calculated by subtracting Te1 from one half of the current switching period TS, i.e., as TS[n]/2-Te1[n-1]. Finally, the gate pulse width of switch SS3 is determined by the sum of the calculated time interval (TS/2-Te1) and required delay time TD, as shown in the waveform of Fig. 3. It should be noted that although the duration of these time intervals changes over the input voltage, output voltage, and load range, they can be considered to be near constant during a single switching cycle since the voltage and load changes are much slower than the switching period. For gating of switch SS2, the time interval between primary switch gate transition at t=T3 and zero crossing of resonant inductor current iLR at t=T4 should be calculated. For the calculation of these time interval the inverted signal of drain-to-source voltage VDS-SS3 (waveform 9) and gate voltage VGS-SP1 (waveform 2) are processed by the AND gate as shown in the waveform of Fig. 3. The gate pulse width of switch SS2 is determined by the sum of the calculated time interval (TS[n]/2-Te2[n-1]) and required delay time TD, as shown in the waveform .

It should be noted that in the control implementation in Fig. 3, secondary–side switches SS2 and SS3 are conducting only during time intervals that implements the delay-time control, i.e., they are not used as synchronous-rectifier switches. As a result, the body diodes of the switches are utilized as output rectifiers. However, the control method in Fig. 3 can also be extended to synchronous implementation operation by extending the conduction of the secondary-side switches beyond that required by the delay-time control.

III. DESIGN CONSIDERATIONS

For performance evaluation, the proposed dc-dc converter for EV on-board charger has been designed and built according to the following key specifications:

Input voltage VIN: 400 VDC Output voltage VO: 180-430 VDC Maximum output current IO-MAX: 11 A Maximum output power PO-MAX: 3.3 kW Efficiency η: >96% above 50% load Dimension: 250 mm × 180 mm × 75 mm

A. Switching Frequency Selection It is well understood that switching frequency selection is

based on the trade-off between efficiency and size, i.e., power density. In this design, the minimum frequency is set

11 Fig. 3. Detailed control waveforms of proposed series resonant converter

shown in Fig. 1.

VGS-SP1

VDS-SS2

eCAP input

VGS-SP4

1

2

VGS-SS3

7

VGS-SS2

3

4

15

6

VGS-SP2, SP4

VGS-SP3, SP1

VDS-SS3

8

10 2 9

eCAP input

InvVDS-SS2

5

T (n-1) e1

T (n-1) S

2 - T (n-2) e1

Inverted

DS-SS3

9

11

i LR

InvV

T (n) S

2 - T (n-1) e2

T (n) e2

T (n) ST (n-1) S

T (n) e1

T (n) S

2 - T (n-1) e1

T (n+1) S

2 - T (n) e2

T (n+1) S

T0 T3 T4 T5 T6 T9 T10 T11

t

t

t

t

t

t

t

t

t

T1 T2 T7 T8

VDS-SS2

Inverted VDS-SS2

VGS-SP2

VGS-SP3

T D

t

t

T D

T D T D

1294

at 140 kHz, whereas the maximum frequency is limited to 350 kHz to meet power density for the specified dimension.

B. Transformer Design

The turns ratio n=N1/N2=20/16 of transformer TR is chosen to make input-to-output control characteristic M be 1 when the output voltage is approximately 320 V with 400-V input. As a result, the delay time of the secondary switching is set to zero when the converter operates from 180 V to approximately 320 V output so that the proposed converter operates as a series resonant converter. However when the output voltage increases above 320 V, the controller starts monotonically increasing the delay time to provide the boost characteristic to maintain the output voltage regulation with the selected turns ratio of transformer TR.

The transformer has following specifications: Core: A pair of PQ4040-PC40 ferrite cores. Primary winding: N1 = 20 turns, Litz wire (435 strands

/AWG #40). Secondary winding: N2 = 16 turns, Litz wire (435 strands

/AWG #40). Air gap: 0.02 mm.

The measured magnetizing and leakage inductances are 1.05 mH and 1.6 μH, respectively. The maximum flux density at steady state operation is approximately 0.23 T, which gives plenty of margin from the saturation flux of the ferrite core.

C. Resonant Capacitor Design

A high-frequency film capacitor is a suitable candidate for resonant capacitor CR because of its cost and long-term reliability. However, its maximum permissible ac voltage is inversely proportional to frequency. For example, a 33-nF, 2000-VDC, FKP 1 type film capacitor from WIMA has the ac-voltage rating of 700-VAC-RMS at line-frequency of 50/60 Hz and only 180 VAC-RMS at approximately 140-kHz.

The peak voltage of the resonant capacitor can be determined by recognizing that during a half switching period, the positive resonant-inductor current continuously charges the resonant capacitor so that the voltage across resonant capacitor CR increases from its negative to its positive peak, i.e., changes for 2VCR_PK. The relationship between the resonant-capacitor voltage change and stored charge during the half switching cycle is given by · 2 _ (1)

Since the average of the resonant inductor current iLR over a half switching period is equal to the output (load) current reflected to the primary, stored charge during the half switching cycle can be calculated as · (2)

From equations (1)-(2), it follows that _ · , (3) where n=N1/N2 is the turns ratio of transformer TR.

The maximum of capacitor peak voltage VCR_PK occurs at minimum frequency (minimum input voltage) and full load. The peak voltage across a 33-nF capacitors is calculated as

Fig. 4. Flow chart of proposed control scheme.

Softstartflag=0START

END

READ ON TIMES

ANALOG TO DIGITAL CONVERSION

Y

N

INITIALIZATION

Softstartflag=0

BURST MODE OPERATION

OV O(REF)V,

FROM ECAPTURE

OUTPUT VOLTAGE CONTROLLER

LIMITER AND ANTIWINDUP

VOLTAGE CONTROLLED OSCILLATOR

FREQUENCY SOFT START

SoftstartOver ?

Softstartflag=1

Disable Switches

sT sHT≤

Enable Switches

N

Y Y

DELAY TIME CONTROLBASED ON V

TD

sT

UPDATE PWM REGISTERWITH

Y

sT sLT≥

sT D T, , e1T e2T,

e1T T, e2

N

f sLf≤sf sHf≥s

N

:sLf

sHf

Lower limit of frequency for burst mode operation

Higher limit of frequency for burst mode operation

:

O(REF)

TsHsHf

=1

TsLsLf

=1

Voltage-mode control?

Y

Current-mode control?

Y

NN

OUTPUT CURRENT CONTROLLER

OUTPUT POWER CONTROLLER

OI O(REF)I,,

PO OV=

OI

O(REF)P O(REF)V= O(REF)I

1295

4 11 4 · · 33 · 10 · 140 · 10476 Since the voltage waveform across the resonant capacitors is a sine wave shape, rms voltage across the serially connected two capacitors is approximately 336 V. To keep the maximum voltage stress of capacitor within the 180-VAC-RMS limit, two sets of series-connected two 33-nF, 2000-VDC, 700-VAC-RMS, FKP 1 type film capacitors are connected in parallel. As a result, total capacitance of resonant capacitor CR is 33 nF.

D. Resonant Inductor Design

To guarantee the above-resonant-frequency operation with ±10% inductance tolerance of LR and ±5% capacitance tolerance of CR, the resonant-tank inductor value is calculated by assuming resonant frequency of 130 kHz which is 10 kHz lower than the minimum specified switching frequency. For the 130-KHz resonant frequency and 33-nF resonant capacitor value, the required inductance of the resonant-tank inductor is approximately 46 μH. To obtain this inductance, the resonant inductor was built using a pair of ferrite cores (PQ-40/40, PC40) with a 3.8-mm gap in all three legs. The winding was implemented with 28 turns of

Litz wire (435 strands of AWG#40) to reduce the fringing-effect-induced winding loss near the gap of the inductor core. For this inductor design, the maximum flux density which occurs at full load and the minimum switching frequency is approximately 0.28 T.

E. Semiconductor Device Selection

Because the voltage stresses of primary switches SP1 - SP4 and secondary switches SS1 - SS4 are approximately equal to input voltage VIN and output voltage VO, respectively, i.e., they are below 450 V, it is necessary to use switches that are rated at least 600-V to maintain the desirable design margin of 20%. In the prototype circuit a TPH3205WT GaN MOSFET (VDS = 600 V, RDS = 0.051 Ω, COSS=108 pF, Qrr=138 nC) from Transphorm was used for each switch. It should be noted that the body diode of the selected switch has relatively small reverse recovery charge.

F. Control Implementation

The output control of the converter was implemented by a TMS320F28069 digital controller from TI. To implement the battery-charging profile, a constant-current, constant-power, and constant-voltage output control is employed. The flow chart of the employed control is shown in Fig. 4. It should be noted that converter starts with frequency soft start, i.e., the switching frequency starts from the maximum and gradually reduces until the output voltage reaches the desired level. Moreover, the converter enters burst-mode operation at very light load.

IV. EXPERIMENTAL RESULTS

The performance of the proposed converter with the delay-time control shown in Fig. 1 was evaluated on a 3.3-kW prototype circuit that is designed to operate from a 400-V input and deliver power over 180-430-V output voltage range as described in Section III. Figure 5 shows a view of the on-board charger module with the cover removed. The on-board charger in Fig. 5 consists of the proposed dc-dc stage and the front-end PFC stage which is not discussed in this paper.

Figure 6 shows the circuit diagram along with component specifications. It should be noted that all primary and secondary switches are GaN devices. Since in this implementation secondary switches SS1 and SS2 are not operated as synchronous rectifiers, their body diodes are utilized as output rectifiers.

Figure 7 shows the measured waveforms of gate and drain voltages of primary switch SP2, resonant current iLR, and resonant capacitor voltage VCR of the experimental circuit when it delivers full power at 430-V, 320 -V, and 180-V output. The waveforms show ZVS of primary switch SP2. Although Fig. 7 only shows waveforms of switch SP2, the waveforms of all other primary switches are similar to that of switch SP2 and achieve ZVS as well. As shown in Fig. 7, during a half switching period, the positive resonant-inductor current continuously charges the resonant capacitor so that the voltage across resonant capacitor CR increases

Fig. 5. Experimental prototype circuit.

Fig. 6. Prototype circuit diagram with details of employed power components. It should be noted that all primary and secondary switches are GaN devices

4 x 33 nF

V 400 V

BULKV 180 - 430 V

BAT

PQ4040-PC44Litz AWG#40-435 strands

28 turns, 46 uH

S -S TPH3205WT

P1 P4

PQ4040-PC44 N =20 turns, Litz AWG#40-435 strandsN =16 turns, Litz AWG#40- 435 strandsLm = 1.85 mH, Llk = 1.6 uH

1

2

SP1

SP2

L R

TR

N1 CO

SS3

N2

SS2

SP4

SP3

CR

+

-

+

-

SS4SS1

S -S TPH3205WT

S1 S4

4 x2.2 uF

1296

from its negative to its positive peak, i.e., changes for 2VCR_PK. The maximum peak capacitor voltage occurs at 320 V output as shown in Fig. 7(b), which is approximately 400 V. As a result, the rms voltage across each 33-nF resonant capacitor is approximately 140 V at 144 kHz.

Figure 8 shows the measured waveforms of gate and drain voltages of secondary switches SS2 and SS3 of the experimental circuit when it delivers full power at 430-V, 320-V, and 180- V output. As shown in Fig. 8, all the secondary switches operate with ZVS. Figure 8 also shows

delay time TD. Delay time TD is the period when both drain voltages of switches SS2 and SS3 are zero, i.e., both switches conduct and the secondary winding of TR is shorted. It should be noted that the turns ratio of transformer TR is chosen to make input-to-output control characteristic M equal to 1 when the output voltage is approximately 320 V. However to properly regulate the output voltage with component tolerances as well as under a transient condition, delay-time TD is introduced from 260 V output. As a result, the delay time of the secondary switching is set to zero when the converter operates from 180 V to approximately 260 V

(a)

(b)

(c)

Fig. 7. Measured drain and gate voltage waveforms of primary switch SP2,

voltage waveforms of resonant capacitor CR, and current waveformof resonant inductor LR for output voltages: (a) 430 V; (b) 320 V;and (c) 180 V. Time scale is 1 μs/div.

VG-SP2[20 V/div]

VD-SP2[500 V/div]

VCR[500 V/div]

iLR[10 A/div]

ZVS

1 μs/divPO=3.3 kWfS=174 kHz

VIN=400 VVO=430 V

VG-SP2[20 V/div]

VD-SP2[500 V/div]

VCR[500 V/div]

iLR[10 A/div]

ZVS

1 μs/divPO=3.3 kWfS=144 kHz

VIN=400 VVO=320 V

VGS-SP2[20 V/div]

VDS-SP2[500 V/div]

VCR[500 V/div]

iLR[10 A/div]

1 μs/div

ZVS

PO=2 kWfS=171 kHz

VIN=400 VVO=180 V

(a)

(b)

(c)

Fig. 8. Measured drain and gate voltage waveforms of secondary switches

SS2 and SS3 for output voltages: (a) 430 V; (b) 320 V; and (c) 180 V. Time scale is 1 μs/div.

VD-SS2[250 V/div]

VG-SS2[10 V/div]

VD-SS3[250 V/div]

VG-SS3[10 V/div]

PO=3.3 kWfS=174 kHz

ZVS

ZVS

VIN=400 VVO=430 V

TD= 1 μsec

1 μs/div

VD-SS2[250 V/div]

VG-SS2[10 V/div]

VD-SS3[250 V/div]

VG-SS3[10 V/div]

PO=3.3 kWfS=144 kHz

ZVS

ZVS

VIN=400 VVO=320 V

TD= 400 nsec

1 μs/div

VDS-SS2[250 V/div]

VGS-SS2[10 V/div]

VDS-SS3[250 V/div]

VGS-SS3[10 V/div]

1 μs/div

PO=2 kWfS=171 kHz

ZVS

ZVS

VIN=400 VVO=180 V

TD= 0

1297

output. When the output voltage increases above 260 V, the controller increases the delay time to provide the boost characteristic to maintain the output voltage regulation with the selected turns ratio of transformer TR.

Figure 9 shows measured efficiency of the prototype converter as a function of the output voltage. It should be noted that the converter exhibits the best full-load efficiency when the output voltage is between 240-340 V, which is the operating range it most frequently operates. Specifically, the converter exhibits the maximum full-load efficiency of 97.3% at 280-V output. Figure 10 shows the measured full-load switching frequency of the experimental prototype as a function of the output voltage. The measured full-load switching frequencies are in a 144-kHz to 175-kHz range over the entire output-voltage range, which enables more effective optimization of all the magnetic components and filter capacitors. As seen from Fig. 11, the delay-time control is activated above 260-V output.

V. SUMMARY In this paper, an isolated dc-dc series-resonant converter

that is controlled by a combination of variable-frequency and secondary-side-switch delay-time control has been introduced. The proposed converter is designed as the output stage of an OBCM that operates with a wide battery-voltage range. The delay-time control which is implemented by the modulation of secondary-side switches is used to assist the conventional variable-switching-frequency control of primary switches. The performance evaluation of the proposed series-resonant converter with delay-time control was done on a 3.3-kW prototype delivering energy from 400-V bus, which is the output of the PFC front end, to a battery operating with voltage range between 180 V and 430 V. The prototype circuit exhibits the maximum full-load efficiency of 97.3% with a full-load switching-frequency variation from 144 kHz to 175 kHz over the entire output-voltage range.

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Fig. 9. Measured efficiencies of the experimental prototype as functions of

output voltage.

Fig. 10. Measured switching frequency of experimental prototype as

function of output voltage. Frequency range is significantlynarrowed by delay-time control.

180 200 220 240 260 280 300 320 340 360 380 400 430

Output Voltage [V]

94

94.5

95

95.5

96

96.5

97

97.5

98

Effic

ienc

y [%

]

V = 400 VINPUT

POUT = 3.3 kW

IOUT = 11 A

180 200 220 240 260 280 300 320 340 360 380 400 430

Output Voltage [V]

110

120

130

140

150

160

170

180

Freq

uenc

y [k

Hz]

V = 400 VINPUT

171 kHz 175 kHz

144 kHz

POUT = 3.3 kW

IOUT = 11 A

Fig. 11. Measured delay-time TD of experimental prototype as function of

output voltage.

180 200 220 240 260 280 300 320 340 360 380 400 430

Output Voltage [V]

-100

0

100

200

300

400

500

600

700

800

900

1000

1100

1200

Del

ay T

ime

[nse

c]

V = 400 VINPUT

POUT = 3.3 kW

IOUT = 11 A

1298

[7] R. Beiranvand, B. Rashidian, M.R. Zolghadri, S.M.H. Alavi, “A design procedure for optimizing the LLC resonant converter as a wide output range voltage source,” IEEE Transactions on Power Electronics, vol. 27, No. 8, pp. 3749-3763, August 2012.

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