ieee sf bay area council grid magazine · may 2006 visit us at page 1 grid.pdf visit us at...
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M a y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 1
GRID.pdf
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Upcoming Conferences
May 8-11: International Symposium on Electronics and the Environment Hyatt Regency SF Airport [more]
May 15-17: Spring Processor Forum DoubleTree Hotel, San Jose [more]
May 21-24: IEEE Symposium on Security and Privacy The Claremont Resort, Berkeley [more]
June 4-9: Society for Information Display Symposium and Exhibition – Moscone Center, S.F. [more]
June 5-8: Thermophysics and Heat Transfer Conference with the Fluid Dynamics Conference and Exhibit– Hyatt Regency, S.F. [more]
June 11-16: IEEE Int’l Microwave Symposium Moscone Center, S.F. Sessions, Tutorials, Exhibits [more]
June 11-13: IEEE RFIC Symposium Moscone Center, S.F. Tutorials, Workshops, Sessions [more]
June 20-22: POFWorld'06: Plastic Optical Fibers Santa Clara Convention Center [more]
Call for Papers: AVS Int’l Symposium & Exhibition (due May 4) [more]
May 2006CV-IMS - 5/4 | Worldwide Nanometrology Standards Efforts - current standards-setting bodies and what is in-process ... [more]
SCV-SP - 5/8 | New Directions in Home Theater Systems - approaching our perceptual limits without overload and stress ... [more]
SCV-EMC - 5/9 | Meeting the 100 V/m Immunity Requirements by Design - engine-control electronics in off-highway machinery ... [more]
SCV-LEOS&EDS - 5/9 | Nanoscale Imaging of Semiconductor and Biological Systems - beyond standard optical microscopy ... [more]
SCV-CPMT&MTT - 5/10 | Jitter and Signal Integrity Testing at Multiple Gb/s or GHz - challenges in testing ... [more]
SF-PES - 5/11 | Annual Spring Banquet; The Future of the Transmission Business - evening at the Monte Cristo Cafe ... [more]
SCV-CAS - 5/15 | A Fast Stochastic Integral Equation Solver to Model Rough Surface Effects - accounting for imperfections ... [more]
SCV-CNSV - 5/16 | Small Business Administration Means New Business for High-Tech Consultants - financing, contracts ... [more]
SCV-Nano - 5/16 | NanoTech: From Promise to Reality - One-day seminar: photovoltaics & fuel cells as energy solutions ... [more]
SCV-CPMT - 5/17 | From Pong to Xbox: Packaging of Video Game Consoles - hardware, procurement aspects of the XBox ... [more]
SCV-PES+IAS - 5/17 | Cost Allocation in Industrial/Commercial Power Systems - hardware and software solutions, sub-metering. [more]
SCV-EMB - 5/17 | Recent Developments in EMF Exposure Research - leukemia incidence and residential magnetic fields ... [more]
OEB-ComSoc - 5/18 | Wi-Fi Hits the Highway: The Next Logical Step in Vehicle Safety - vehicles talk to others and infrastructure ... [more]
SCV-SSC - 5/18 | A 90nm Power Optimization Methodology and for an ARM Microprocessor - optimization, RTL synthesis ... [more]
SCV-EDS - 5/19 | Half-Day Seminar: Analog and Mixed Signal Devices and Designs - four speakers plus discussion ... [more]
SCV-LEOS - 5/22 | Photon Counting Microdetectors and Their Applications - the ultimate in optical signal measurements ... [more]
SF-IAS - 5/23 | Conductor Insulation - [more]
SCV-Mag+CE - 5/23 | Flash Storage -- Past and Future - audio players and handsets, future outlook ... [more]
SCV-PSES - 5/23 | Wiring Devices -- Know How to Use Them or They Will Bite You - uninsulated 120/240V conductors ... [more]
SCV-LEOS - 6/6 | Taking Laser Technology to the Marketplace - funding, investor interactions, liquidity strategies ... [more]
SCV-CAS - 6/10 | Soft Skills - Things They Don't Teach at Engineering School - public speaking, writing, networking ... [more]
SCV-CPMT - 6/14 | Documentation and Instructions Made Easy!? - a novel and effective format using photos and simple cartoons ... [more]
OEB-Comm - 6/17 | ZigBee Alliance San Jose Open House - product demonstrations, breakout sessions, networking ... [more]
UC Berlekey Extension - Summer Engineering Institute:Developing FPGA Digital Signal Processing Systems June 19 & 20, Downtown S.F. [more]
Professional Skills Classes for May, June [more]
NanoTech: From Promise to Reality One-day seminar: Photovoltaics & Fuel Cells as Alternative Energy Solutions .. [more]
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M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 2
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May 2006 • Volume 53 • Number 5
IEEE-SFBAC ©2006
IEEE GRID is the monthly newsmagazine of the San Francisco Bay Area Council of the Institute of Electrical and Electronics Engineers, Inc. As a medium for both news and opinion, the editorial objectives of IEEE GRID are to inform readers in a timely and objective manner of newsworthy IEEE activities taking place in and around the Bay Area; to publish the official calendar of events; to report on IEEE activities of a national and international scope; and to serve as a forum for comment on areas of concern to the engineering community by publishing contributed articles, invited editorials and letters to the editor. IEEE GRID is published as the GRID Online Edition
residing at www.e-GRID.net, and in a handly printable GRID.pdf edition, and also as the e-GRID sent by email twice each month to more than 24,000 Bay Area members and other professionals.
Editor: Paul Wesling IEEE GRID 12250 Saraglen Dr. Saratoga CA 95070 Tel: 408 331-0114 / 510 500-0106 / 415 367-7323 Fax: 408 904-6997 Email: edi tor@e-gr id.net www.e-GRID.net
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M AY 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 3
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M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 4
During “Microwave Week,” with the IMS, RFIC and ARFTG conferences, there will be over 1000 technical presentations in the form of plenaries, technical sessions, special/focused sessions, poster sessions, panel sessions, and workshops plus a student paper contest and historical exhibits. These will provide many opportunities to network and interact with the leading professionals in the field, master new skills, and learn about advanced developments in our field. The exhibition gives you the opportunity to visit displays from more than 400 companies that will be showing the latest products and services available to our industry.
Come join us as we create the “Bridge to the Future.”
11 Tutorials, including: Introduction to UHF RFID: Readers, Tags and ICs High Speed Digital Signal Integrity Fundamentals to HF Through UHF Design Introduction of MEMs Resonators and Filters Techniques of Frequency Synthesis Ferrite Devices for Low Frequency Applications
31 Workshops, including: Advances in Multi-Mode Multi-Band Radio Transceivers Quality of Automotive RF Systems UWB for Wireless Communications, Positioning and Sensing Passive and Active Differential Measurements Frequency Agile Radio: Systems and Technologies Noise in SiGe and III-V HBTs and Circuits Technology and Applications of Wireless Sensor Network How Accurate are Your THz Measurements
Five Focus Sessions: Microwaves in Support of Societal Security 4 GHz for Mobile Communications Magnetic Resonance Imaging Vibrating RF MEMS THz Integrated Circuits
This year there were 980 abstracts submitted to the 32 technical program committees and more than 230 reviewers. After careful review, the committee selected 364 papers for oral presentations, and 137 for the Interactive Forum.
60 Technical Sessions, including: • GaN for Microwave • Advances in Integrated Filters • Solid State High Power Amplifiers • Couplers and Baluns • Microwave Photonics • Acoustic Filters and Applications • RF MEMS Tunable Components • Applications in RF MEMs • MEMs Switch and Packaging Technology • Compact Dividers and Couplers • Low Noise Components • Synthesis and Design Techniques for Microwave Filters • Time Domain Modeling • Physical Nonlinear Device Modeling • Microwave CAD with Neural Networks and Fuzzy Logic • Antenna Technologies for Emerging Wireless Applications • Practical Realization of Microwave Filters • Planar Filters with Extended Stopband • Measurement-based Modeling • Signal Generation for System Applications • Multi-GHz ICs for Communication • Multiband and Broadband Planar Filters • Ferrite & Ferroelectric Devices • Low Phase Noise Oscillators • Electromagnetic Bandgap and Synthesized Structures • Phased and Retrodirective Arrays • Nonlinear Circuit Analysis and System Simulation • Miniature Filters and Multiplexers
Tuesday Evening Post-Session Activities: • Rump Session
James Rautio will talk on “The Life of James Clerk Maxwell”
• Women in Engineering Reception • Student Reception • Ham Radio Social
Exhibits: Tuesday and Wednesday, 9:00 AM – 5:00 PM Thursday, 9:00 AM – 3:00 PM Separate Exhibits Pass available ($20)
Full details in the 80-page IMC-2006 Program, available as a PDF on the website:
www.ims2006.org
Reduced rates are offered for advance registration when received by May 5, 2006. Students, retirees and IEEE Life Members receive a substantial discount
Take BART to the Powell Street Station and the Moscone Convention Center
2006 IEEE MTT-S
International Microwave Symposium
San Francisco June 11-16, 2006
Friday, June 16: 67th ARFTG Microwave Measurement Conference
Organized by the Automatic RF Techniques Group (ARFTG) Technical papers describing original work in the design and measurements of high power devices and systems
For technical program details, visit: www.arftg.org
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 5
The RFIC Symposium brings focus to the technical accomplishments in RF systems, circuit, device and packaging technologies for mobile phones, wireless communication systems, broadband access modems, radar systems and intelligent transport systems.
It builds upon its heritage as one of the foremost IEEE technical conferences dedicated to the latest innovations in RFIC development of wireless and wire line communication IC’s, with an exciting technical program. Running in conjunction with the International Microwave Symposium and Exhibition, the RFIC Symposium adds to the excitement of Microwave Week with three days focused exclusively on RFIC technology and innovation.
The Plenary Session will be held on Sunday evening at 5:30 PM, following the workshops. Three students will be recognized for their work as part of the best student paper competition. Then, three leading experts will share their own views during the Sunday evening plenary session (details at right). The RFIC reception will follow the plenary session to allow for everyone to relax and discuss the industry outlook among friends. The regular technical program begins on Monday and Tuesday featuring invited and submitted technical papers.
Plenary Session: RF Modems: The Real Application for RF CMOS,
Stefan Wolff, Vice President RF-Engines, Infineon Technologies
Architectural Implications of multimode, multiband cellular radios, Kent Heath, Director, Cellular Operations, Radio Products Division, Freescale Semiconductors
Multiple Antenna Technology in Mobile Broadband - New Challenges for RF Designers, Arogyaswami Paulraj, CTO, Beceem Communications and Professor, Stanford University
19 Sunday Tutorials and Workshops, including: • CMOS RFIC Design – Fundamental Building Blocks • RFICs for Ultra-wideband Systems • Advanced Power Amplifier ICs for High Efficiency Mobile Transmitters • Noise Measurements and Modeling for CMOS • Shrinking Passive Components
Other Tutorials/Workshops: • Low-cost Microwave Photonic Component Technologies to Address Emerging Applications • New Optical Approaches for Microwave, High-speed Signal Transmission (plus others) Technical Sessions: • Cellular ICs • Frequency Generation • WLAN & MIMO • VCOs and Dividers • UWB LNAs • RFIC Technology • Next Gen LNAs • WLAN Power Amplifiers • PLLs and Synthesizers • Silicon-based Millimeter-wave Front Ends • Wireless Remote Sensing & RFID • UWB Transceiver ICs • CMOS Front-Ends • Passive Components and Matching Advances • Wideband Communication System & ICs • Advanced Noise Characterization and Modeling • RFIC Simulation and Layout Optimization • Cellular Bands Power Amplifiers • Advanced ICs for Optical Communications • Poster Papers Exhibits:
Tuesday and Wednesday, 9:00 AM – 5:00 PM Thursday, 9:00 AM – 3:00 PM Separate Exhibits Pass available ($20)
Advance Registration rates through May 5th.
Substantial discount for students, retirees and IEEE Life Members. For full details, please download the 48-page Advance Program from the website:
www.rfic2006.org
Take CalTrain to San Francisco, or BART to the Powell Street Station and the
Moscone Convention Center
Sponsored by the IEEE MTT-S, EDS, and SSCS
2006 IEEE Radio Frequency Integrated Circuits Symposium Moscone Convention Center, S.F.
June 11-13, 2006
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 6
Full-day Seminar: Monday Keynotes and Sessions: Tuesday–Wednesday Doubletree Hotel, San Jose
The dark side of performance is power consumption. Today's design-automation tools and fabrication processes allow developers to create chips with hundreds of millions of gates and multiple processor cores running at fantastic clock speeds. But it's all for nothing if the finished product is a black hole for battery power or a supernova of heat dissipation.
This year's theme is power-efficient design. Technical presentations from leading companies and innovative start-ups will show how the industry's best engineers are designing powerful single- and multicore processors without busting their power budgets. SPF 2006 will also tackle the power-efficiency problem at the system level, with presentations geared for system designers as well as chip developers. Get the big picture in addition to the crucial details.
Keynote Talks: Redefining Performance Through System Balance Chuck Moore, Senior Fellow, AMD
From StrongArm to PWRficient:The Ongoing Battle to Reduce Power in Microprocessors Dan Dobberpuhl, President and CEO, P.A. Semi, Inc. Exhibitors: Come see the newest in microprocessor technology and catch up on the latest company news, cool products, and information from many of today’s leading industry vendors. Spring Processor Forum Expo features the industry’s cutting-edge companies displaying next-generation technology. This is your chance to network with the movers and shakers of the processor world, all while enjoying five-star cuisine.
Participating Sponsors:
Technical Sessions:
Advances in DSP Engines The Elemental Computing Architecture Freescale's Newest Core Architecture from StarCore Freescale's High-performance DSP for Converged Networks F1: TI's Implementation of ARM Cortex-A8
Next-Generation Licensable Processors & IP ARM Cortex Processor for Power-Efficient Embedded Systems ARM996HS: The First Licensable, Clockless 32-Bit Processor Core The ZEVIO Architecture for Consumer SoC Development MIPS32 34K Processor: Multithreading and Single-Issue Pipeline
Technology for Power-Efficient Processing Energy Estimator for Extensible Processor Platform Optimizing the power for multiple voltage domains Improved Scalable Power Management Solutions New Core For Programmable Camera Sensor Signal Processing ARM Cortex-A8: Power-Aware, High-Performance Design Power Reduction using LongRun2 in Efficeon Processors Benchmark for Processor Energy Costs and Performance
Innovative Video Processors CA1024: A Massively Parallel Processor for Cost-Effective HDTV A New Multicore Architecture for High Performance/Low Power MuviStar: New Video-Processor Architecture with Custom Extensions Multicore Content Processors for Efficient HD-Video Encoding New Video Processors for Portable Media Players & Digital TV Bring your laptop – use our wireless LAN access to download any/all presentations. Electronic version also available.
One-Day Seminar at SPF’06: Monday: Implementing Low Power SoC Configurations
A brief tutorial on the latest strategies used in design for low power, and trends for sub-90nm processes; analysis of more than 25 core, chip and SoC products including the latest introductions aimed at cellular telephones, digital cameras, PDAs and other power-aware systems.
.
Register for technical sessions only – or the Seminar – or the full SPF’06.
Special 20% discount for GRID readers!
www.instat.com/spf/deal
Earlybird rates through May 14
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 7
The IEEE S&P Symposium is the premier forum for presenting developments in computer security and electronic privacy, and for bringing together researchers and practitioners in the field.
Sessions on: • Signature Generation • Detection • Formal Methods • Privacy • Analyzing Code • Authentication • Attacks • Systems • Analyzing and Enforcing Policy • Plus 5-minute Work-in-Progress Talks
Invited speakers represent leading entrepreneurs, academics, industry analysts, and venture capitalists in the alternative energy fields of photovoltaics and fuel cells. Entrepreneurs from Ion America, Ultracell Power, GP Solar, among others discuss their challenges, successes, and how they are commercializing products today with the help of nanotechnology. Researchers from Universitat Konstanz in Germany, Arizona State University, and UC Berkeley discuss their efforts to innovate with nanotechnology. Venture Capital firms including Draper Fischer Jurveston and Worldview Technology Partners present their views on how investors view the possibilities in the field
Our panel will assess the Promise versus Reality of the application of NanoTechnology for Alternative Energy.
Sponsored by the IEEE Technical Committee on Security and Privacy
In cooperation with the International Association for Cryptologic Research
The Symposium will be held in its traditional location at the Claremont Resort, in Berkeley, "one of the few hotels in the world with warmth, character and charm" according to Frank Lloyd Wright.
For full Program details, and to register:
www.ieee-security.org
Student travel grants made possible through the generosity of the IBM Corporation.
Date: Tuesday, May 16, 2006
Time: 8:30 AM to 5:30 PM Registration starts at 7:30 AM
Location: Cypress Semiconductor Building 6, 198 Champion Court, San Jose
Registration and Information at:
www.ieee.org/nano Direct Symposium inquiries to [email protected]
Registration: By May 10th
After May 10th
IEEE Members $45 $55 Non-Members $65 $75
Fulltime Students $25 $25
Second Annual All-Day Symposium: NanoTech: From Promise to Reality
Photovoltaics & Fuel Cells as Alternative Energy Solutions
27th annual
2006 IEEE Symposium on Security and PrivacyThe Claremont Resort Berkeley
May 21-24, 2006
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 8
The SID International Symposium, Seminar and Exhibition, now in its 44th year, is the premier international gathering of scientists, engineers, manufacturers and users in the electronic-display industry. The event provides access to a wide range of technology and applications from high-definition flat-panel displays using both emissive and liquid-crystal technology to the latest in OLED displays and large-area projection-display systems. One can find state-of-the-art information on the latest in image processing, systems software and display processor hardware, human factors and applied vision, and exciting new applications such as multimedia and the electronic cinema.
With more than 550 booths and 7,500 attendees, SID is the leading North American show for the electronic-display industry.
Events at SID this year:
Business Conference (Mon & Tues, June 5 & 6) Presentations at the Conference will be given by the highest-level executives of the leading display industrial organizations. A networking reception will be held on Monday evening and the Conference will include the SID 2006 Keynote Addresses on Tuesday morning and continue the rest of the day. Investors Conference (Tues & Wed, June 6 & 7) Company presentations from leading public and private display companies, intended to appeal primarily to securities analysts, portfolio managers, investors, M&A specialists, and display company executives. Display Technology Seminars (Mon, June 5) These twelve 90-minute seminars on diverse topics related to the information display field are held on Monday, June 5. Registering for the Display Technology Seminars entitles you to attend any combination of seminars. Exhibition Tuesday, June 6 10:30 AM - 6:30 PM Wednesday, June 7 9:00 AM - 5:00 PM Thursday, June 8 9:00 AM - 2:00 PM
Sunday Short Courses Fundamentals of Flexible Flat-Panel-Display Technology
Gregory Crawford, Brown University Fundamentals of Display Optics
Pochi Yeh, University of California Santa Barbara Fundamentals of MEMs-Based Displays
Jeff Sampsell, QUALCOMM MEMS Technologies Fundamentals of Vision and Color Science
Louis Silverstein, VCD Sciences, Inc.
Tutorials Active-Matrix-Addressing Technologies for Flat-Panel Displays
Norbert Fruehauf, University of Stuttgart Liquid-Crystal Technology for Display Applications
Phil Bos, Liquid Crystal Institute Emerging Display among Giants
Kimberly Allen, iSuppli Corp. High-Resolution Displays: Path to What the Eye Demands
Mark Fihn, Veritas et Visus LCD Backlighting
Kalil Kalantar, Nippon Leiz Flat-Panel-Display Measurements
Ed Kelly, NIST
Separate registration is allowed for the Workshops and Tutorials
Technical Sessions 72 sessions of invited and contributed papers with over 280 oral presentations and 200 poster presentations, including: OLEDs: Materials; Blue-Emitting; Device Structures; AMOLEDs Projection: Components; Digital Cinema; Laser, Mobile Projection Active Matrix: Organic TFTs; Mobile TFT-LCDs; Flexible;
Integrations; Si-Driven Integration; LCD TV Emissive: Plasma Displays & TV; Phosphors, Discharges and
Cell Structures; Protecting Layers; Manufacturing Electronics: Interfaces; Color, Gamma Control; Processing Applied Vision: Color, Luminance, Contrast; Image Quality Systems: 3-D; Power Savings; Backlights; Motion Blur Manufacturing: Roll-to-Roll; Inkjet; Inspection & Repair Liquid Crystal: VA Mode; Wide Viewing Angle; Alignment;
Fast Switching; Projection … and more! See the Advance Program.
For complete information on SID ’06, please see the
SID’06 website: www.sid2006.org
Early-Bird Rates through May 19
Take BART to the Powell Street Station and the Moscone Convention Center
Society for Information Display INTERNATIONAL SYMPOSIUM, SEMINAR & EXHIBITION
JUNE 4-9, 2006
MOSCONE CENTER, SAN FRANCISCO
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 9
This intensive 2-day course provides introductory and state-of-the-art coverage on the design and implemen-tation of FPGA signal processing systems. The emphasis is on the use of FPGAs for digital communications. The course presents a combination of signal processing theory, FPGA architecture, and datapath design.
Topics covered: • current generation FPGAs • digital filters • multirate filters • building transform processors • adaptive filters • adaptive channel equalizers • symbol timing recovery • carrier removal • DDC, DUC, FEC • sigma-delta modulation • implementing FPGA DSP design using VHDL • visual dataflow methodologies
Design techniques are presented that emphasize silicon-efficient and high-performance FPGA implemen-tations of the various signal processing topics addressed in the course.
Who Should Attend: Signal processing engineers and scientists planning on implementing signal processing systems using programmable logic, and logic/hardware engineers involved with the implementation of FPGA-based signal processing platforms. IEEE Professional Skills Courses
Getting Things Done Across Organizational Borders
– Date/Time: Thurs, May 11, 9 AM – 5 PM – Location: Exar, Fremont – Fee: $375 for IEEE Members; $425 non-members
High-Impact Communication – Date/Time: Tues, May 16, 9 AM – 5 PM – Location: Carl Zeiss Meditec, Dublin – Fee: $350 for IEEE Members; $425 non-members
Communication & Conflict Management Using MBTI
– Date/Time: Thurs, May 24, 9 AM – 5 PM – Location: LSI Logic, Milpitas – Fee: $375 for IEEE Members; $425 non-members
Process Metrics to Improve Results – Date/Time: Tues, June 6, 9 AM – 5 PM – Location: LSI Logic, Milpitas – Fee: $375 for IEEE Members; $425 non-members
Advance your career!
Two-Day Short Course June 19 and 20 Monday-Tuesday, 9 AM-5 PM
UC Berkeley Extension Downtown Center 425 Market St., 8th Floor, San Francisco
Credit: 1.4 CEU Tuition: $1295 Instructor: Chris Dick, Ph.D., is the director of signal processing engineering at Xilinx, responsible for coordinating the DSP IP engineering activities, and chief DSP architect at Xilinx.
For full course outline and registration details:
www.unex.berkeley.edu/cat/course109.html
Take BART to the Montgomery Street Station. Paid parking also available in the basement of 425 Market.
Another course of interest
Applications of Digital Signal Processing
Saturday, June 17 Redwood City
www.unex.berkeley.edu/cat/course618.html
SCV Chapters, Engineering Management & Components, Packaging and Manufacturing Technology Societies
Breakthrough Project Management – Date/Time: Tues-Wed, June 6-7, 9 AM – 5 PM – Location: Flextronics, San Jose – Fee: $600 for IEEE Members; $650 non-members
Managing Time & Multiple Priorities – Date/Time: Thurs, June 8, 8:30 AM – 12:30 PM – Location: Flextronics, San Jose
Fee: $275 for IEEE Members; $300 non-members
Presentation Skills – Date/Time: Thurs, June 15, 9 AM – 5 PM – Location: Cypress Semiconductor, San Jose – Also July 19, Flextronics, San Jose
Fee: $450 for IEEE Members; $500 non-members
Improve your skills – register for one of these classes, or for others coming up this spring. Bring a team!
For complete course information, schedule, and registration form, see our website:
www.EffectiveTraining.com
Developing Field Programmable Gate Array (FPGA) Digital Signal Processing Systems
A course in the Berkeley Summer Engineering Institute (BSEI) 2006
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 10
The 9th AIAA/ASME Thermophysics and Heat Transfer and Conference includes papers covering all aspects of heat transfer and thermophysics. Topics range from basic research and development to applied and advanced technology, including novel experimental and computational observations, interdisciplinary papers that bridge theoretical, experimental approaches and papers that provide innovative concepts and analyses. More than 50 sessions and 300 papers are planned that include areas in aerothermal design, ablation, high speed flows, boiling and condensation, conduction and convection heat transfer, heat pipes, radiation heat transfer, microscale/nanoscale heat transfer, measurements of thermophysical properties, and thermal control of spacecrafts. Panel discussion groups will be pertinent to heat transfer and aerospace related issues. Invited speakers will consist of a mix of experimentalists and theoreticians. An invited presentation by the recipient of the Thermophysics Award is planned for the conference.
PROGRAM
300 papers in 50 sessions, including: • Environmental Heat Transfer • Heat and Mass Transfer in Bioengineering • Electronics Packaging and Cooling • Boiling and Condensation • Ablation • High Speed Flows • Energy Transfer in Combined Energy and Power Systems • Thermal Protection Systems • Microscale and Nanoscale Heat Transfer • Computational Heat Transfer • Convection Heat Transfer • Experimental Heat Transfer • Heat Pipes • Phase Change Heat Transfer • Thermophysical Properties • Heat Exchangers • Convection Heat Transfer
Exhibits: Monday, June 5: 5:30 – 7:00 PM Reception Tuesday, June 6: 10 AM – 5 PM Wednesday, June 7: 10 AM – 4 PM
The 36th AIAA Fluid Dynamics Conference includes papers covering all aspects of fluid dynamics, particularly those relevant to aerospace applications. Topics range from basic research and development to applied and advanced technology, including novel experimental and computational observations, interdisciplinary papers that bridge theoretical, experimental, and numerical approaches, and papers that provide innovative concepts and analyses, especially new insight into flow physics.
PROGRAM 240 papers in 40 sessions, including: • Biological and Biologically Inspired Flows • Analysis and Modeling • Laminar Instability and Transition • Turbulent Boundary Layer Scaling • Circulation Control Applications • Multidisciplinary Fluid Mechanics • Boundary Conditions for Complex 3D Flows • MEMS and Microfluidics • Unsteady Flows
Professional Development Courses (2 days each) • Stability and Transition: Theory, Modeling,
and Experiments • Fundamentals of Satellite Thermal Control • Hypersonic Test Facilities • Specialist’s Course on Flow Control • Modern Design of Experiments • CFD Drag Prediction Workshop
REGISTER TODAY!
Special low student, retired rates!
For full information on both events:
www.aiaa.org
Earlybird registration deadline: May 8th – save $100
AIAA/ASME Joint Thermophysics and Heat Transfer Conference
June 5-8, 2006
Co-located with the 36th AIAA
Fluid Dynamics Conference & Exhibit June 5-8, 2006
Hyatt Regency San Francisco
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The ISEE/SUMMIT is the premier event for presenting and learning about environmental topics and sustainability as they pertain to the life-cycle of electronic products and the electronics industry across the fields of medical devices, vehicles, material handling and construction equipment, games, telecommunication devices, and consumer electronics. The program for this year’s event has more than ever - including:
The ISEE technical conference tracks will have 15 sessions with 70 high quality papers selected by a committee of industry and academic experts. One track will have traditional ISEE sessions spanning topical areas from design, to end-of-life, and public policy. This year there will also be a special track on emerging technologies.
The SUMMIT track will have 4 sessions including several interactive forums with industry leaders – as well as 2 technical ISEE sessions with additional selected papers on electronics recycling topics.
The conference program will also have Guest Speaker and Plenary panel sessions for all attendees.
The Exhibits program will include recyclers, manufacturers, service providers and related organizations.
Two special networking events will be held – including one off-site on Wednesday evening.
And there will again be a number of organization meetings held in conjunction with the event. Tutorials June 20 | Conference June 21-22, 2006 Santa Clara Convention Center The only trade show for Plastic Optical Fibers that covers all aspects of the business – technology, markets and applications – coming to Santa Clara in June. Plan to attend and participate.
POF World 2006 has as one of its main objectives the display of how plastic optical fiber can be used for Ethernet from 10 Mbps to 10Gbps. The conference program reviews developments in fibers, components and applications of POF and Ethernet, providing insights into component availability and pricing. Recent announcements of "POF & 10G" will be a major highlight of the conference.
Tutorials and Short Courses:
• Brominated Flame Retardants: Science, Regulation, and Public Policy
• EcoDesign Tools and Strategies for Electronics • Maximizing Returns on Materials • Best Practices for Export
Technical Sessions: 15 sessions (over 60 papers) including • Green Manufacturing • Nanotechnology • Material Recovery • Energy Generation and Supply • Small Tech Manufacturing • Recycling of Wireless Devices • Green Engineering Education • Design for Environment and Energy Efficiency • Economic Models • Industry Outlook, Trends • Ethical Issues • Collection Programs
Special student, retired rates.
Register on the website:
www.iseesummit.org
POF & the Internet From 10M to 10G
Sess ion Papers: • Mult i -Gigabi t Transmission Over POF • Needs for 10Gigabit Links • Transceivers for Fast Ethernet • Aerospace Applicat ions of POF Ethernet • 425 Mbps Ethernet Transmission over 1mm PMMA-POF • Market for POF-over-Ethernet for Industr ia l Controls • Sources for POF Links • POF to the Desktop for High Defini t ion Televis ion … and more
Early Discount Rate through May 20th Discount for two or more registrations
www.pofworld.com
May 8-11, 2006 Hyatt Regency San Francisco Airport
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Worldwide Nanometrology Standards Efforts
Speaker: Dr. David Rivkin, VP Engineering,
SciEssence Intl. Time: Networking at 7:30 PM,
Presentation at 8:00 PM Cost: none Place: Cogswell College (Room 197), 1175
Bordeaux Drive, Sunnyvale RSVP: to David Rivkin, [email protected] Web: www.ewh.ieee.org/r6/scv/ims
A presentation by: David Rivkin, PhD, Chairman IEEE IMS TC-34, VP Engineering SciEssence Intl & Pres. GCPI
We will review the current standards setting bodies,
their relationships and the standards for nanometrology that currently exist and are in process. ISO, IMS and IEEE standards will be presented including IEEE 1650 "EEE Standard Test Methods for Measurement of Electrical Properties of Carbon Nanotubes". We will also discuss the needs for future standards and recommendations to be presented by IEEE IMS TC-34
THURSDAY MAY 4SCV Instrumentation and Measurement
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New Directions in Home Theater Systems
Speaker: Dr. Victor Ramamoorthy, Infinite Algorithms Time: Fast food and drinks ($1) at 6:30;
Presentation at 7:00 PM Cost: donation for food Place: National Semiconductor Credit Union
Building (Building 31), 955 Kifer Rd., Sunnyvale
RSVP: not required Web: www.ewh.ieee.org/r6/sps
Victor Ramamoorthy, PhD, has over 35 years
experience in industry, academia, and management. He has held various senior R&D positions in various Silicon Valley companies as well as in AT&T Bell Labs and SBC. Ramamoorthy holds a number of patents in signal processing of audio and video signals. He has published over 50 papers in international professional journals and has organized several conferences. He received 1997 Lucent Patent Award for his work on audio noise filtering. He has also served as advisor to Ph.D. students and has taught courses. He is a member of IEEE and Audio Engineering Society. His consulting company, Infinite Algorithms, is serving Silicon Valley high tech companies in the design of cutting edge entertainment products and in developing new product concepts. He received his Masters degree from IIT, Madras, India and Ph.D. from University of Linkoping, Sweden .
.
We are currently on the verge of stepping into
exciting new possibilities in home entertainment systems. New insights into human perceptual systems have resulted in improved designs that can approach our perceptual limits of satisfaction without overload and stress. Fueled by developments in imaging, display, video, audio, and radio technologies, entirely new entertainment designs are emerging. In this talk, we will explore these trends and technologies that support them: Wavelet decomposition ideas have led to very high quality compression designs supporting Digital Cinema. Wave Field Synthesis is driving high definition spatial audio rendering systems. UWB radio technologies promise high data rates in short distances eliminating need for cable connections. High dynamic range imaging is transforming camera systems design. The confluence of these advances portends endless opportunities to innovate and build new products for consumers. Some examples will be illustrated.
MONDAY MAY 8SCV Signal Processing
Digital Chip Design Services
ASIC Design • EDA Evaluation • Verilog HDL • Synthesis • Design for Visibility • Timing • Scan • Verification • Low Power techniques • Power Analysis • BIST • DFT • ATPG • Silicon Debug
Testable logic for high-volume production with low DPM
Contact Mahesh Siddappa ME (CS, India), MS (EE, SUNY at Stony Brook)
[email protected] 408-981-6612
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Meeting the 100 V/m Immunity Requirements by Design
Speaker: Oscar Fallah, Cisco Systems Time: Social at 5:30 PM, Presentation at 7:00 PM Cost: none Place: Applied Materials Bowers Cafeteria,
3090 Bowers Ave., Santa Clara RSVP: not required Web: www.scvemc.org
Oscar Fallah is a design engineer with a few years of experience in the design of rugged embedded control systems and sensors. He has served as the resident EMC/ESD expert at John Deere and Sauer Danfoss, and has often been called upon to solve difficult immunity and emissions problems. He has been successful at applying EMC design fundamentals to circuit, PCB layout, and chassis/enclosure design. He is currently with Cisco Systems, Inc.
Oscar holds a MSEE from North Dakota State University, where he spent a few years studying the subject matter, and a number of hours in the EM lab for the applied work that he has presented in EMC and other symposia. He has also been a consultant to a few telecommunication and consumer electronic companies in Silicon Valley.
Since 1997, Oscar has been serving in the IEEE-EMCS Education and Student Activities Committee (ESAC), as the chair and co-chair of the Student EMC Design Competition, currently in its sixth year; and also holds the treasurer position in the Santa Clara Valley Chapter.
The controllers and sensors employed in today’s off-highway machinery are required to operate in the presence of strong EM fields, as much as 100-120 V/m. Meeting this requirement is no easy task, particularly when a plastic enclosure is used.
A combination of EMC design at the schematic level, choice of components used, along with close attention to the PCB layout is required to achieve the goal of undisturbed device operation in the presence of 100 V/m filed levels. In this talk, application of this methodology to the successful deployment of an electronic embedded control system intended for engine control is presented. The schematic design of a current feedback control loop will be briefly reviewed with an emphasis on susceptible circuit elements/devices, the filter device parasitics, and circuit paths identified as the weak loop for layout purposes. Finally, measurement data is presented to demonstrate how different the system performs when a device in the circuit under investigation (an op-amp) is swapped with one from a different IC supplier.
TUESDAY MAY 9SCV Electromagnetic Compatibility
Bernie Siegal
650-961-5900
[email protected] www.thermengr.com
Device Thermal Characterization Package Thermal Characterization Thermal Test Boards Thermal Test Equipment & Fixtures
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Nanoscale Imaging of Semiconductor and Biological Systems
Speaker: Prof. M. Selim Unlu, Boston University
IEEE LEOS Distinguished Lecturer Time: Pizza Social at 6:00 PM,
Presentation at 6:15 PM Cost: none Place: National Semiconductor Credit Union
Auditorium, 955 Kifer Road, Sunnyvale RSVP: not required Web: www.ewh.ieee.org/r6/scv/leos/archive/
leosabs20060509.htm
M. Selim Ünlü is a Professor of Electrical and Computer Engineering, Biomedical Engineering, and Physics at Boston University. Prof. Ünlü received the B.S. degree in electrical engineering from Middle East Technical University, Ankara, Turkey, in 1986, and the M.S.E.E. and Ph.D. in electrical engineering from the University of Illinois, Urbana-Champaign, in 1988 and 1992, respectively. In 1992, he joined the Department of Electrical and Computer Engineering, Boston University.
Dr. Ünlü's career interest is in research and development of photonic materials, devices and systems focusing on the design, processing, characterization, and modeling of semiconductor optoelectronic devices, especially photodetectors, as well as high-resolution microscopy and spectroscopy of semiconductor and biological materials.
During 1994-1995, Dr. Ünlü served as the Chair of IEEE Laser and Electro-Optics Society, Boston Chapter, winning the LEOS Chapter-of-the-Year Award. He was awarded National Science Foundation Research Initiation Award in 1993, United Nations TOKTEN award in 1995 and 1996, and both the National Science Foundation Career and Office of Naval Research Young Investigator Awards in 1996. He has authored and co-authored over 200 technical articles and several book chapters and magazine articles; edited one book; and holds several patents. His professional service includes the former chair of the IEEE/LEOS technical committee on photodetectors and imaging and currently, the current chair of IEEE/LEOS Nanophotonics committee. He is also serving as an Associate Editor for IEEE Journal of Quantum Electronics and a VP of LEOS.
We present two innovative approaches to go beyond the capabilities of standard optical microscopy which is limited to a transverse resolution of approximately half a wavelength due to the diffraction, also termed the Rayleigh or Abbe limit. The resolution is inversely proportional to the Numerical Aperture (NA). One method to increase the NA is to increase n, the refractive index of the material in the object space. We recently developed a new technique involving a Numerical Aperture Increasing Lens (NAIL) for diffraction limited subsurface microscopy. The NAIL technique is demonstrated by near-IR inspection of Si integrated circuits yielding a 230 nm resolution at 1050 nm wavelength representing a factor of 4 improvement over the state-of-the-art. We have applied this technique to photoluminescence and PLE measurements of InAs/GaAs quantum dots and demonstrated high collection efficiency and spatial resolution better than 400 nm. We also used NAIL technique in subsurface thermal emission microscopy of Si integrated circuits and achieved improvements in the amount of light collected and the spatial resolution, well beyond the limits of conventional thermal emission microscopy. We experimentally demonstrate a lateral spatial resolution of 1.4 µm and a longitudinal spatial resolution of 7.4 µm, for thermal imaging at free space wavelengths up to 5 µm. We also examine in detail the ability of sharp metal tips to enhance local optical fields and describe a new approach to nano-optics, that of combining solid immersion microscopy with tip-enhanced focusing and show how such an approach may lead to 20 nm resolution with near-unity throughput.
Spatial resolution can also be improved beyond the diffraction limit by collecting spectral information. We have built on our experience on resonant optoelectronic devices and developed a novel application to fluorescence microscopy that promises nanometer resolution in biological imaging. Over the past 20 years fluorescence microscopy has developed into a standard tool in biological sciences. Today, confocal microscopy provides three-dimensional resolution on lateral length scales of 0.5 micron and axial length scales of 0.75 micron with good imaging speed for studies of biological systems. In the past few years, the increased resolution achieved through advanced fluorescent probes and two-photon sources has made possible the coarse examination of structures at the subcellular level,
TUESDAY MAY 9SCV Lasers and Electro Optics & Electron Devices
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 16
complementing decades of molecular biology with the nascent ability to localize subcellular processes. We have developed an alternative method, spectral self-interference fluorescent microscopy. The technique transforms the variation in emission intensity for different path lengths used in fluorescence interferometry to a variation in the intensity for different wavelengths in emission, encoding the high-resolution information in the emission spectrum. Using monolayers of streptavidin, we have demonstrated better than 5nm axial height determination for thin layers of fluorophores and built successful models that accurately fit the data. Initial experiments on fluorescently labeled lipid layers successfully determined the binding of fluorescent molecules in membranes with sub-nanometer precision. Recently, the orientation of ss and dsDNA monolayers on silicon oxide is studied by tracing the location of a fluorescent label attached to the DNA.
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 17
Jitter and Signal Integrity Testing
at Multiple Gb/s or GHz
Speaker: Dr. Mike Li, Chief Technical Officer, Wavecrest
Time: Seated dinner served at 6:30 PM, Presentation (no cost) at 7:30 PM
Cost: $25 if reserved by May 7; $30 at the door Place: Ramada Inn, 1217 Wildwood Ave (Fwy 101
frontage road, between Lawrence Expy and Great America Pkwy), Sunnyvale
RSVP: Please reserve and pay in advance using our PayPal on-line system or email Janis Karklins, [email protected]
Web: www.cpmt.org/scv
Dr. Mike Li is the Chief Technology Officer (CTO) with Wavecrest. Dr. Li pioneered a jitter-separation method (Tailfit) and the DJ, RJ, and TJ concept and theory formation. Currently he is Co-Chair for the PCI Express jitter standards committee. Dr. Li has more than 15 years of high-speed-related measurement instrumentation, testing, and analysis experience in applications including IC, microprocessor, clock and serial data communications for electrical, optical and wireless communication. He holds a BS in physics from the University of Science and Technology of China, a MSE in electrical engineering and a Ph.D. in physics from University of Alabama in Huntsville. He did his postdoc at University of California, Berkeley and worked there as a research scientist on high-energy astrophysics before he joined industry. Dr Li has published more than 70 papers in refereed technical journals, holds 4 patents and has 8 patents pending, and authored/edited one book on multiple Gb/s design and test.
In this presentation, we will first review where the technology is heading for multiple Gb/s high-speed links or I/O buses for networks and computer devices and systems. Then we will discuss why jitter and signal integrity have become the major challenges, as well as limiting factors for developing those high-speed and high-performance link devices and systems. Finally, we will cover the testing requirements and associated testing methodologies for jitter and signal integrity from a generic perspective, as well as from a practical application perspective, with examples of PCI Express and FB DIMM jitter and signal integrity testing.
WEDNESDAY MAY 10
SCV Components, Packaging and Manufacturing Technology, with Microwave Theory and Techniques
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Annual Spring Banquet, with keynote talk: The Future of the
Transmission Business Speaker: Stewart Ramsay, VP, Transmission &
Asset Management, PG&E Time: 5:00 PM Cost: $30 members, $35 non-members, $15
students, through April 17; $5 more after 4/17
Place: Monte Cristo Cafe at Four Embarcadero Center in downtown San Francisco
RSVP: Please reserve and pay in advance – see flyer
Info: www.e-grid.net/docs/0605-sf-pes.pdf
Stewart Ramsay, VP, Transmission of PG&E, will be our keynote speaker at the banquet to discuss these issues in greater details.
This will be an enjoyable evening for engineers and non-engineers alike, so invite a friend or a family member. All are welcome!
SF PES is also offering corporate group discounts for 8 or more attendees. You can purchase a table for 8 attendees at a price of $300.
Construction of new transmission facilities have
become increasingly challenging in California due to stringent environmental regulations and permitting uncertainties. Due to retirement of aging power plants and lack of adequate local generation addition, transmission infrastructure expansion is needed to gain access to resources which are remote from customer load. Transmission system is being used very differently than it was designed to be used thereby creating grid congestion. FERC has adopted new rules on the certification of an Electric Reliability Organization and the procedures for the establishment, approval and enforcement of mandatory electric reliability standards. How will these issues affect the transmission business and PG&E efforts to expand the infrastructure? Will PG&E have adequate incentives for the construction of new transmission facilities in the near future? How will PG&E Sea Breeze HVDC Project improve grid reliability and provide benefit to customers in California?
SFPES will also host the annual award ceremony during this event. Various recipients will be given IEEE awards for their notable contributions to our PES Society. In addition, we will be enjoying fine dining at Monte Cristo Cafe. Dinner is being subsidized by the SFPES ADCOM committee, so that all attendees can enjoy this great memorable evening at a reasonable price!
THURSDAY MAY 11SF Power Engineering
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A Fast Stochastic Integral Equation Solver to Model
Rough Surface Effects Speaker: Zhenhai Zhu, Cadence Berkeley
Laboratories Time: Snacks at 6:30 PM,
Presentation at 7:00 PM Cost: none Place: Cadence Design Systems, Building 5,
2655 Seely Avenue, San Jose RSVP: not required Web: ewh.ieee.org/r6/scv/cas
Zhenhai Zhu received his M.S. and Ph.D. degrees in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology in 2002 and 2004, respectively. He was a Josef Raviv Memorial Postdoctoral Fellow at IBM T.J. Watson Research Center from 2004 to 2005. He joined Cadence Berkeley Laboratories as a Research Scientist in July, 2005.
He is a recipient of IEEE/ACM William J. McCalla 2005 ICCAD Best Paper Award for his work on fast stochastic integral equation solver. At MIT he also developed FastImp, a public-domain fast impedance extraction code, and pfft++, a public-domain fast integral equation solver. FastImp is generally considered as the state-of-the-art academic solver for the high-frequency analysis of 3D interconnects. The code pfft++ has been used to solve various partial differential equations in different engineering applications, such as computational aerodynamics, bio-molecular simulation and drug design, and computational electromagnetics.
His research interests focus on the development of efficient numerical methods for modeling and simulation of high frequency electronic systems. Current research projects include variational model order reduction, statistical timing and lithography simulation.
He lives with his wife and son in the city of Alameda. He likes to jog or bike along coast line, work out in gym and play table tennis and badminton. He was a leading player and co-captain of MIT table tennis team.
Rough surfaces are pervasive in integrated circuits and systems at both on-chip and off-chip levels. They are caused mainly by the imperfection in manufacturing processes such as electroplating and etching. And they can lead to serious performance degradation. For example, extensive experiments have shown that surface roughness can cause the conduction loss on the printed circuit boards to increase by a factor of 3 at high frequencies.
The calculation of the equivalent circuit elements of complicated 3D interconnect structures, so called parasitic extraction, has become a mature sub-field in EDA research and industry. The integral equation based methods have been proven to be the most powerful approaches. But so far the surfaces of those 3D structures have always been assumed to be perfectly smooth. The presence of surface roughness changes the nature of the problem and has unfortunately raised the numerical difficulty of the parasitic extraction to such a new level that even the state-of-the-art parasitic extraction algorithms are not able to handle practical structures.
In this talk, I will show: - Why the rough surface problem is important - A quick review of integral equation based parasitic
extraction solvers - Why these solvers fail to efficiently solve the
rough surface problem - The key elements in the proposed fast stochastic
integral equation solver (FastSies) - The potential applications of FastSies in high
frequencyelectromagnetic analysis of 3D structures with rough surfaces
MONDAY MAY 15SCV Circuits and Systems
ANSYS Channel Partner
• Multiphysics, Multidisciplinary Engng • CFD, Stress, Heat Transfer, Fracture • Fatigue, Creep, Electromagnetics • Dynamics, Design Optimization • Linear/Nonlinear Finite Element Analyses
Ozen Engineering (408) 732-4665
[email protected] www.ozeninc.com
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Small Business Administration Means New Business for High-
Tech Consultants Speaker: Michael Elkind, Small Business Admin, San
Francisco office Time: Presentation at 7:00 PM Cost: none Place: KeyPoint Credit Union, 2805 Bowers Ave.,
Santa Clara RSVP: not required Web: www.CaliforniaConsultants.org
Michael Elkin is the Assistant District Director for Entrepreneurial Development for the San Francisco District of the U.S. Small Business Administration He is responsible for all management training and consulting programs in the San Francisco region, including 10 small business development centers, 5 SCORE chapters and 3 entrepreneur centers. Last year these programs provided services to over 43,000 business and start-ups.
Mr. Elkin has been with the Small Business Administration for 16 years. Prior to his position as Assistant District Director, he managed the Oakland One Stop Capital Shop, and was the Regional Manager for SBA's International Trade program, responsible for developing the Agency's trade programs throughout California, Arizona, Nevada and Hawaii.
Mr. Elkin served as a U.S. Peace Corps Volunteer in Kenya from 1986-1988, providing management consulting to small businesses in the Mt. Kenya region. He continues to stay involved in global development issues and has worked as a consultant for the International Labour Organization, most recently assisting the organization in the development of a new initiative to target growth oriented enterprises throughout East and Southern Africa and South Asia.
Mr. Elkin has a Bachelor of Science degree in Business Administration and a Bachelor of Arts in Economics from San Francisco State University.
The U.S. Small Business Administration (SBA) is the Federal Agency that provides guaranteed loans, training, counseling, government contracting assistance and a host of other services to small business throughout the United States.
Michael Elkin, Assistant District Director for Entrepreneurial Development in San Francisco, will discuss how the SBA can help your consulting company benefit from the various SBA programs and how you can work with organizations like SCORE and the Small Business Development Center to provide more services to Bay Area small businesses.
Some of the services Mr. Elkin will discuss include: • How to obtain SBA Financing • Management training and counseling for small
businesses • How to participate in SCORE or Small Business
Development Center as a consultant • How SBA can help you get you get Federal
Government contracts • How to access government grants for technology
research (Small Business Innovation Research)
TUESDAY MAY 16SCV Consultants' Network of Silicon Valley
Professional Consulting Services to assist clients in developing & executing any and all elements of Reliability throughout an Organization & Product Life Cycle.
• Assessments • Goals • Benchmarking • Reliability Prog. Plans • MTBF Pred • FMECA • EOL Assessment • Warranty Analysis • HALT/HASS • DVT/V&V • Rel. Demo. Tests • Software Reliability • CAPA/CLCA • DoE • Training/teaching • RoHS/WEEE Transition
pioneered Reliability IntegrationSM - using multiple tools in conjunction to increase the power and value of any Reliability Program.
(408) 472-3889 [email protected] www.opsalacarte.com
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 21
One-day Seminar NanoTech: From Promise to
Reality – Photovoltaics & Fuel Cells as Alternative Energy
Solutions Speakers: leading entrepreneurs, academics,
industry analysts, and venture capitalists in the alternative energy fields
Time: 8:30 AM - 5:30 PM Cost: Advance registration: $45 members, $65
non-members ($10 more after May 10), $25 students
Place: National Semiconductor Building 31, 955 Kifer Road, Santa Clara
RSVP: Register on the website Web: www.ieee.org/nano
• Invited speakers represent leading entrepreneurs, academics, industry analysts, and venture capitalists in the alternative energy fields of photovoltaics and fuel cells.
• Entrepreneurs from Ion America, Ultracell Power, GP Solar, among others discuss their challenges, successes, and how they are commercializing products today with the help of nanotechnology.
• Researchers from Universitat Konstanz in Germany, Arizona State University, and UC Berkeley discuss their efforts to innovate with nanotechnology.
• Venture Capital firms including Draper Fischer Jurveston and Worldview Technology Partners present their views on how investors view the possibilities in the field
• Our panel will assess the Promise versus Reality of the application of NanoTechnology for Alternative Energy.
Peter Fath. Founder, International Solar Energy
Research Center, Konstanz Germany Bill Mulligan. Vice President of Research &
Technology, SunPower Corporation Eicke Weber. Prof. Materials Science, UC Berkeley;
Director, Integrated Materials Lab Scott Elrod. Manager Hardware Systems Lab,
PARC Slobodan Petrovic. Associate Prof ASU; Vice Pres
of Engineering, Clear Edge Power Jim Kaschmitter. Chairman & CEO, Ultracell
Corporation K. R. Sridhar. CEO, Ion America
Panel Moderator: Steve Eglash. Principal, World
View Partners Panelists:
Erik Straser. General Partner, Mohr Davidow Ventures Tom Hauskin. Director Components Practice, Strategies Unlimited Raj Atluru. Managing Director, Draper Fisher Jurvetson
TUESDAY MAY 16SCV Nanotechnology
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 22
From Pong to Xbox: Packaging of Video Game Consoles
Speaker: Dean Takahashi, San Jose Mercury-News Time: Seated dinner served at 6:30 PM,
Presentation (no cost) at 7:30 PM Cost: $25 if reserved by May 14; $30 at the door Place: Ramada Inn, 1217 Wildwood Ave (Fwy 101
frontage road, between Lawrence Expy and Great America Pkwy), Sunnyvale
RSVP: Please reserve and pay in advance using our PayPal on-line system or email Janis Karklins, [email protected]
Web: www.cpmt.org/scv Dean Takahashi is a staff writer in the Business section of the San Jose Mercury News and author of Opening the Xbox: Inside Microsoft's Plan to Unleash an Entertainment Revolution. He currently writes about semiconductor chips, video games and Microsoft for the newspaper of Silicon Valley. He podcasts and blogs on video games for the Mercury News. His book chronicles the efforts of a few Microsoft renegades to convince Bill Gates to spend billions on a bid to challenge Sony and Nintendo in the $20 billion video game industry. The book offers an insider's view of how Microsoft galvanized itself for one of the biggest startups in its history. Since the book's release in April, 2002, Takahashi has been interviewed extensively in game publications and in mainstream media such as CNBC, CNN, USA Today, the San Francisco Chronicle and the TechNation radio show. Takahashi wrote the book while covering the video games and chip beats as a senior writer at the Red Herring magazine. For most of his 18 years as a journalist he has written stories about technology, including the video game industry for nine years and the semiconductor industry for 11 years. Previously, he worked at the Wall Street Journal's San Francisco bureau, the San Jose Mercury News, the Los Angeles Times Orange County edition, the Orange County Register and the Dallas Times Herald. He has won several journalism awards, including Best Technology Writer of 2005 for
Dean will speak about the hardware strategy that Microsoft pursued as it designed, manufactured and shipped the Xbox 360 video game console. In 2002, Takahashi wrote a book, Opening the Xbox: Inside Microsoft's Plan To Unleash an Entertainment Revolution, which chronicled the birth of Microsoft's first Xbox console. He is now writing a sequel to that book, dubbed The Xbox 360 Uncloaked: The Real Story Behind Microsoft's Next-Generation Video Game Console. The book will be published as an e-book by SpiderWorks as early as May. He will talk about the lessons Microsoft learned from its first attempt and how it plans to compete with Sony and Nintendo this time around. Biography (continued) the San Francisco Publicity Club, co-winner of the Society of Professional Journalists Northern California Chapter award for hard news writing in 2005, and a second place award on opinion writing for the Peninsula Press Club in 2005. He was co-winner of an award for investigative journalism for a series of stories on chip theft in the San Jose Mercury News in 1996. Takahashi has been an active member in the past of the Asian American Journalists Association. He was president of the Los Angeles chapter of AAJA for two years and recipient of the national organization's prestigious special recognition award. Currently he is writing an e-book on the making of the Xbox 360. Due in May, the e-book is entitled: The Xbox 360 Uncloaked: Inside the Real Story of Microsoft's Next-Generation Video Game Console. When he has time, he's an avid gamer. He lives in the suburbs of San Jose.
WEDNESDAY MAY 17SCV Components, Packaging and Manufacturing Technology
Board Logic Systems
Complete Product Solutions Provider TM
Experienced consultants in the fields of: • Board & Verilog Design • Debug and Test • Signal Integrity • EMI • Power Electronics • Layout • Software Development • Documentation
www.boardlogics.com
[email protected] (650) 867-0869
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 23
Cost Allocation in Industrial/ Commercial Power Systems
Speaker: Richard Celio, PE, President of Applied
Power Technologies Time: Dinner 6:00 PM, Presentation 7:00 PM Cost: : $25.00 IEEE members, $30.00
nonmembers, and $10.00 students Place: Ramada Inn, 1217 Wildwood Ave (Fwy
101 frontage road, between Lawrence Expy and Great America Pkwy), Sunnyvale
RSVP: Please email/call James Alvers, [email protected] , (925) 730-3105
Web: www.ewh.ieee.org/r6/scv/pes_ias/ Richard C. Celio is a registered professional electrical
engineer in the State of California. He is a member AFE as well as the Vice Chairman of the Silicon Valley Chapter of the IEEE Power Engineering & Industry Applications Society. Richard has over 20 years experience in helping industrial/commercial customers solve difficult electrical systems problems. He graduated from San Jose State University with a BSME, then joined Pacific Gas & Electric where he worked with large industrial/commercial customers inspecting electrical systems, evaluating control strategies and design changes to optimize efficiency. In 1986 he was instrumental in developing PG&E's Power Quality Enhancement Service. In February 1992 he joined CRS Sirrine Engineers (now Jacobs Engineering), and as manager of the San Jose Office for Energy Systems Planning and Analysis, he was responsible for engineering studies, research projects, consulting work, and instruction. In 1994, Mr. Celio started Applied Power Technologies to help utilities and end-users reduce electrically related losses. In addition, Mr. Celio is on staff at De Anza College teaching electrical power systems courses for the Energy Management Technology Program.
Electricity is quite possibly your highest operating
expense. WOW! Think about that! On average, around 44% (excluding real estate). If your goal is energy cost reduction, you need to make the cost of consumption visible to the people who use it. It has been known for years that the best way to influence end-user behavior is to allocate responsibility for the bill or in some way share the burden. In one organization, cost allocation involves actually charging departments for use. In another organization, where this would not be feasible, it makes sense to use other tactics.
This presentation will discuss energy cost allocation, sub-metering and system integration. It will discuss both hardware and software solutions, specifically:
• Energy metering • Utility bill verification • Cost allocation • Rate structure evaluation • Support of non- electrical meter data such as gas
and water • Time stamping and alarming energy events • Data output: reporting, graphing, etc. • Justification strategies
WEDNESDAY MAY 17SCV Power Engineering & Industry Applications
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 24
Recent Developments in EMF Exposure Research
Speaker: Robert Kavet, MS, MEE, ScD, Program
Manager, EMF and RF Safety, Electric Power Research Institute
Time: Presentation 7:30 PM Cost: none Place: Clark Center Auditorium, Stanford Hospital
(parking free after 4 PM) RSVP: not required Web: www.ewh.ieee.org/r6/scv/embs/
Dr. Robert Kavet is the Program Manager for both the EMF Health Assessment and Radio-Frequency Safety program and the Occupational Health and Safety program. Dr. Kavet's primary research activities focus on unraveling the basis for the association between magnetic fields and childhood leukemia reported in epidemiologic studies, and elucidating the technical basis for guidelines that recommend exposure limits for electric fields, magnetic fields, and contact currents. In collaboration with several teams of investigators, Dr. Kavet is investigating whether the association between magnetic fields and childhood leukemia might be attributable mainly to children's exposure to contact current in their residences.
Dr. Kavet is responsible for developing the programs' technical research projects; communicating research results to members; and expanding the programs' membership and resources. In addition, Dr. Kavet currently holds the position of Visiting Lecturer on Environmental Health Sciences at Harvard University.
Dr. Kavet was a Senior Staff Scientist with the Health Effects Institute in Cambridge, MA, joining in 1984. From 1986 until 1992 he worked as a consultant, focusing largely on potential health effects from exposure to electric and magnetic fields (EMF). He has published extensively in the area of EMF health effects, and has directed short courses and seminars on this subject.
Dr. Kavet received his ScD degree in respiratory physiology and his MS degree in environmental health sciences, both from Harvard School of Public Health. He received a BS degree in electrical engineering as well as an MEE degree from Cornell University.
Several recent high-profile risk assessments have
concluded that an association exists between childhood leukemia incidence and residential magnetic fields above 0.3-0.4 µT. The relative risk for these exposures is between 1.7 and 2.0, using fields <0.1 µT as a reference. Thus far, a causal role for the magnetic field has not been justified based on unresolved questions about potential biases and confounding, negative bioassay results and the lack of biophysical plausibility. Over the past six years we have developed a hypothesis that magnetic fields serve as a surrogate for exposure to contact current, and that the source voltage for this exposure is the potential between a residence's grounding system - which includes residential water pipes - and the earth. We have proposed that exposure would occur when the wet hand of a bathing child contacted the faucet, spout or the water stream; the proximal source would be the closed-circuit voltage from the water system to the drain (the latter would necessarily need to be conductive and sunk in the earth). Three criteria, at a minimum, must be satisfied for contact current to qualify as candidate exposure that explained the epidemiology. The failure to verify any one of the three would be a signal to stop this line of research. The three are (1) Plausible dose to bone marrow; (2) Strong association of magnetic fields with the source of contact current; and (3) Frequent access to exposure. Each has been satisfied, as described in this presentation, and as a result, epidemiology and laboratory studies are under way to further address the contact current hypothesis' validity.
WEDNESDAY MAY 17SCV Engineering in Medicine and Biology
MET Laboratories
EMC – Product Safety
US & Canada
• Electromagnetic Compatibility • Product Safety Cert. • Environmental Simulation • Full TCB Services • Design Consultations • MIL-STD testing • NEBS (Verizon ITL & FOC) • Telecom • Wireless, RFID (BQTF & EPCglobal Test Lab)
Facilities in Union City, Santa Clara
www.metlabs.com [email protected] 510-489-6300
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 25
Wi-Fi Hits the Highway - The Next Logical Step in Vehicle Safety
Speaker: Dr. Wieland Holfelder, VP & CTO, DaimlerChrysler Research & Technology
Time: Pizza at 6:30 PM, Presentation at 7:00 PM Cost: none Place: Bishop Ranch 1, 6101 Bollinger Canyon
Road, San Ramon RSVP: Please reserve by email to
[email protected] by May 17, for pizza count
Web: www.comsoc.org/oeb
Dr. Wieland Holfelder is Vice President and Chief Technology Officer of DaimlerChrysler Research and Technology North America, Inc. DaimlerChrysler’s Silicon Valley research office focuses on Vehicle IT & Services research for the North American market. Prior to DaimlerChrysler, Holfelder worked for two Silicon Valley start-up companies on streaming Internet media as well as for the University of Mannheim, Germany, IBM’s European Networking Center in Heidelberg, Germany and the International Computer Science Institute (ICSI) at the University of California at Berkeley.
Holfelder holds a Masters in Computer Science and Economics (Dipl. Wirtsch. Inf.) and a Ph.D. (Dr. rer. nat.) in Computer Science, both from the University of Mannheim, Germany.
Dedicated Short Range Communication (DSRC), a
Wi-Fi based technology exclusively for automotive use, allows vehicles to talk to each other and with the roadside infrastructure. Together with positioning technology, DSRC will support a variety of new applications and services that have the potential to dramatically improve safety and efficiency of the transportation network and introduce new comfort and convenience features. Dr. Holfelder's presentation will give an overview on DSRC technology and outline potential automotive use cases of DSRC for safety and non-safety applications from an OEM perspective. An update on the standardization process as well as on currently ongoing activities between the government and the automotive industry to deploy DSRC technology in the future will be given.
We will continue our feature at the meeting of providing discussion of the latest happenings in the field of communications. This is a discussion and everyone is welcome to contribute. Please notify Bill Kaminsky ([email protected]) if you have something to comment about.
There will be time before and after the formal meeting for one-on-one discussions.
THURSDAY MAY 18OEB Communications
Valon Technology, LLC
valontechnology.com
RF and Wireless Product Design & Development
- System Engineering - Test & Measurement - Schematic Capture & PCB layout - Expert Witness
Redwood City (650) 369-0575
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 26
A 90nm Power Optimization Methodology and its Application to the
ARM 1136JF-S Microprocessor Speaker: Aurangzeb Khan, Cadence Design Systems Time: Refreshments/networking at 6:00 PM,
Presentation at 6:30 PM Cost: Donation to partially cover food cost Place: National Semiconductor Building 31
Auditorium, 955 Kifer Road, Sunnyvale RSVP: Please reserve by email to
[email protected] Web: www.ewh.ieee.org/r6/scv/ssc
Aurangzeb Khan is Corporate Vice President for Market Development at Cadence Design Systems, Inc. Earlier, he was CVP/GM for Cadence Design Foundry (now part of engineering services), and focused on the IC design business, including IP development and integration. Aurangzeb joined Cadence in 2002 when Cadence acquired Simplex Solutions, where he served as EVP/GM of Simplex's SoC Design Foundry. He co-founded Altius Solutions and served as its' President and CEO, merging with Simplex Solutions and contributing to a successful IPO in May 2001. Before founding Altius, Aurangzeb was VP for Silicon Engineering at Cirrus Logic and Director of Engineering for systems technology development at Tandem Computers (now part of HP). He also developed high-speed SRAMs at Fairchild Semiconductor. Over the past 25 years, Aurangzeb contributed - in engineering and general management positions - to the development and business success of several generations of high-performance systems and ICs, such as the Sony GSRI-32 and PlayStationR2 Graphics Synthesizers, the Cirrus Logic 3CiT SOC and the NonStopT Himalaya™ and Cyclone™ series of massively-parallel servers. Several products achieved ~$200M to $2B in annual revenues.
An electrical and physical design power
optimization methodology and design techniques developed to create an ARM 1136JF-S microprocessor in 90nm standard CMOS are presented. Multiple supply voltage operation, leakage current management, clock rate optimization, single-pass RTL synthesis, VDD selection, power optimization and timing and electrical closure considerations in a multi-VDD domain design are addressed. These techniques, and the methodology contributed to a 40% reduction in dynamic and a 46% reduction in leakage power dissipation while maintaining a 355 MHz operating clock rate under typical conditions. Functional and electrical design requirements in that IC were achieved with the first silicon. The results achieved via subsequent enhancements, such as the optimization of operational and sleep modes through power gating, will also be briefly discussed.
THURSDAY MAY 18SCV Solid State Circuits
Patent Agent Jay Chesavage, PE
MSEE Stanford 3833 Middlefield Road, Palo Alto 94303
www.File-EE-Patents.com TEL: 650-619-5270 FAX: 650-494-3835
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 27
Half-Day Seminar: Analog and Mixed Signal Devices and Applications
Time: Registration at 12:30; ends at 5:30 PM Cost: $55/members, $65/nonmembers, $20 for
students & unemployed Place: National Semiconductor Building 31
Auditorium, Santa Clara RSVP: not required Web: www.ewh.ieee.org/r6/scv/eds
The IEEE Electron Device Society (EDS) Santa Clara Valley Chapter (SCV) has organized a half-day symposium on Analog and Mixed Signal Devices and Applications on May 19th, 2006. The main focus area of the symposium is to learn from the invited distinguished speakers about recent developments, device and design challenges in analog and mixed signal devices. Topics and Speakers: “Analog Design in Sub-100nm Technologies” by Prof. Boris Murmann, Stanford University “Future Processes Challenges for RF and High speed Integrated Systems” by Stephane Barbu, Maxim Integrated Products, Inc. “Characterization and Modeling of Process Variations” by Seán Minehane, PDF Solutions Inc. “ESD Device Solutions for Analog Design: Challenges and Opportunities” by V.A. Vashchenko, National Semiconductor Corp. “CMOS Designs at 60GHz and Beyond for 1Gbit/s+ Wireless Communications” Luiz M Franca-Neto, Intel Corp.
FRIDAY MAY 19SCV Electron Devices
Mixed-Signal IC Development
• From Inception to Production Transfer • Turnkey, Design Services & Consulting • Design Reviews & TroubleShooting
Mixel, Inc. Excellence in Mixed Signal Design
(408) 274-2736 [email protected] www.mixl.com
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 28
Photon Counting Microdetectors
and Their Applications Speaker: Prof. Sergio Cova, Politecnico di Milano,
Italy and LEOS Distinguished Lecturer Time: Social and Pizza at 7:00 PM, Presentation
at 8:00 PM Cost: none Place: National Semiconductor Credit Union
Auditorium, 955 Kifer Road, Sunnyvale RSVP: by email to
[email protected] Web: www.ewh.ieee.org/r6/scv/leos
Prof. Sergio Cova was born in Roma, Italy. He is a full Professor of Electronics since 1976 at Politecnico di Milano, Italy, where he had received a doctor degree in Nuclear Engineering in 1962. He is a Life Fellow of the IEEE. He has given contributions to research and development of detectors for optical and ionizing radiations, of microelectronic devices and circuits, of electronic and optoelectronic measurement instrumentation systems. In this frame he carried out also interdisciplinary work in collaboration with researchers in physics, astronomy, biochemistry and molecular biology. He pioneered the development of silicon Single-Photon Avalanche Diodes (SPAD) and the extension of photon counting techniques to the infrared spectral range with devices in germanium and III-V semiconductors. He invented the Active-Quenching Circuit (AQC) that opened the way to the application of SPADs and developed it up to monolithic integrated form. He is author of over 170 papers in international journals and conferences and of 5 international patents (USA and EU). In 2005 he established with other colleagues the university spin-off company MPD Micro-Photon-Devices.
Photon counting is the technique of choice for the
ultimate sensitivity in optical signal measurements. Started and developed with photomultiplier tubes, it received new impulse from the introduction of microelectronic detectors, called Single-Photon avalanche Diodes SPAD. They combine typical advantages of microelectronics (small size, high reliability, ruggedness and suitability to integrated systems) with improved basic performance (high photon detection efficiency, low dark-counting rate, picosecond photon-timing and high counting-rate capability). The seminar will outline the evolution of SPAD devices and associated electronics and will illustrate some examples of recent applications, such as: analysis of DNA and proteins; single molecule spectroscopy; adaptive optics in modern telescopes; non-invasive testing of ULSI circuits.
MONDAY MAY 22SCV Lasers and Electro Optics
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 29
Flash Storage -- Past and Future
Speaker: Eli Harari, President and CEO, SanDisk
Corporation Time: Pizza and drinks at 6:30 PM, Presentation
at 7:00 PM Cost: $5 for members, $10 for non-members Place: Oak room at Hewlett Packard, 19447
Pruneridge Avenue (Building 48), Cupertino RSVP: not required Web: Email to www.ewh.ieee.org/r6/scv/mag
Dr. Eli Harari has served as CEO since SanDisk’s inception in 1988, during which SanDisk has grown to over $2 billion in annual revenues. Harari is a pioneer in non-volatile semiconductor storage with more than 100 U.S. and foreign patents and numerous technical articles. He has more than 30 years experience in the electronics industry, and is widely regarded in the industry as the “father of flash memory cards.” Under Harari’s leadership, SanDisk either invented of co-invented most of the flash memory card formats being sold today.
Prior to founding SanDisk, Dr. Harari co-founded Waferscale Integration Inc. and served as its President and CEO from 1983 to 1985 and Chairman from 1985 to 1988. Between 1973 and 1981, Dr. Harari held technical management positions at Intel, Honeywell and Hughes Aircraft Microelectronics .He received a Ph.D. and M.A. in Solid State Sciences from Princeton University in 1973 and a B.S. (Honors) degree in Physics from Manchester University in 1969.
This presentation will cover Flash storage as seen
through a history of SanDisk. We will cover the current market drivers for Flash demand, in particular in audio players and handsets. We will discuss the competitive landscape from the semiconductor side as well as the perspective of consumer electronics. SanDisk’s NAND Flash technology roadmap will be contrasted with future potentially disruptive technologies such as 3D semiconductor memory. We will briefly touch on the future outlook for HDD versus Flash as both reach scaling limits in the coming decade.
TUESDAY MAY 23SCV Magnetics, with Consumer Electronics
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 30
Wiring Devices – Know How to Use Them or They Will Bite You
Speaker: John Herschbach, Underwriters
Laboratories Time: Social/Dinner (no host) at 5:45 PM;
Presentation at 7:00 PM Cost: none Place: Dinner with speaker at El Torito Mexican
Restaurant, 2950 Lakeside Drive, Santa Clara; meeting at Bowers Cafe, Applied Materials, 3090 Bowers Ave, Santa Clara
RSVP: not required Web: www.ewh.ieee.org/r6/scv/pses
John Herschbach has over 35 years experience
in the field of Product Safety with Underwriters Laboratories. Although he has worked in more than 100 different product categories from data processing equipment to power supplies, he is "the" expert in cord sets, power supply cords and wiring devices. John also is the "Christmas in the Park" Vice President.
What uninsulated 120/240V conductors are
sometimes OK to touch? Don't know? Come hear tonights speaker to find out!
One of the most common, and potentially one of the most dangerous electrical products is covered in this presentation. The speaker addresses cord sets and both detachable and nondetachable power supply cords for use with appliances. Historical development, safety aspects for usage today, and design criteria are all discussed in a comprehensive talk.
TUESDAY MAY 23SCV Power Safety Engineering
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 31
Taking Laser Technology to the Marketplace
Speaker: Dr. Aram Mooradian, Founder and CTO,
Novalux, Inc. Time: Social and Pizza at 7:00 PM, Presentation
at 8:00 PM Cost: none Place: National Semiconductor Credit Union
Auditorium, 955 Kifer Road, Sunnyvale RSVP: by email to
[email protected] Web: www.ewh.ieee.org/r6/scv/leos
Aram Mooradian is the founder and Chief Technology Officer of Novalux, Inc., a company located in Sunnyvale that manufactures high power surface emitting semiconductor lasers and laser arrays for projection display in a joint effort with Seiko-Epson of Japan based on his patented technology. He received the Ph.D. degree in physics at Purdue University where he studied semiconductors and lasers. He then joined the MIT Lincoln Laboratory as a staff member and later became the Leader of the Quantum Electronics Group. He founded Micracor, Inc., in 1992, an MIT spin-off company that developed technology such as optically pumped and tunable semiconductor lasers. Dr. Mooradian has been involved in the transfer of Department of Defense technology into the commercial marketplace.
The history of Novalux is presented as an example of the pathway to commercialization of technology into one or more large dollar volume markets. Included is the progression of funding, investor interactions, identification of markets, technology required to meet the market demands and liquidity strategies. Specific Novalux technology is based on high-power frequency-doubled surface-emitting semiconductor laser arrays that operate in the visible wavelength range for use in projection display. These devices can meet the price and performance goals for displays from small format to home theater to signage, a total annual market that will exceed $25B. The revenue for the laser light sources can exceed $2B/year with licensing fees exceeding this amount. Good technology with a strong patent base needs a large market with little major competition to be teamed with smart, patient investors and one or more large corporate partners in order to succeed. A recently announced joint effort between Novalux and Seiko-Epson for the production of Novalux lasers for projection display has endorsed the position of lasers for the home TV market for the first time. Lasers have been known for a few decades to provide outstanding picture color gamut and high brightness but have been limited by their cost and complexity. A description of how the Novalux laser technology was developed and now it can meet the needs of projection display and specialty lighting markets will be discussed.
TUESDAY JUNE 6SCV Lasers and Electro Optics
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 32
Soft Skills - Things They Don't Teach at Engineering School
Speakers: Dr. William Kao, Cadence; Carl Thormeyer,
KSBW TV8; Eric Pan, Meridian Deployment; Dr. Lou Scheffer, Cadence; Cheryl Kennedy, Transformational Hypnotherapy
Time: 8:30 AM - 1:00 PM (includes lunch) Cost: $20 for IEEE members; $30 for
non-members; $15 for students (includes donuts and coffee, box lunch)
Place: Cadence Design Systems, Bldg. 5 Cafeteria, 2655 Seely Ave, San Jose
RSVP: register on-line by May 31, on website. Information: Dr. Weikai Sun at [email protected]
Web: www.ewh.ieee.org/r6/scv/cas
A soft skill refers to the cluster of personality
traits, social graces, facility with language, personal habits, friendliness, and optimism that mark each of us to varying degrees. Soft skills complement hard skills which are the technical requirements of a job. Ideally someone is strong in both technical and personal skills. In this seminar, you will have a chance to listen to five outstanding technical and business professionals presenting various topics and aspects relating to soft skills, with the objective of applying directly some of these techniques to advance your individual career. 8:30-9 AM: Registration (Donuts and coffee 9:00 AM: Introduction and Overview by Dr. William
Kao 9:15 AM: Public Speaking by Carl Thormeyer
The talk is not textbook oriented, but rather based on real life experiences in public speaking during the speaker's long career as a scientific and technical person, with the focus on technical presentations to a nontechnical audience and effective use of visual aids (including PowerPoint).
9:55 AM: Perpetual Business Machines by Eric Pan Perpetual Business Machines addresses three fundamental problems faced by corporations and technical professionals: • If business is sponsoring technology, who is preparing
technical professionals for business? • If technical professionals are expendable, who can
assure career continuation? • If business is a multidimensional • universe, how do we remove the invisible wall dividing
professionals? Perpetual Business Machines is a blueprint for technical professionals working in the global economy.
10:50 AM: Writing Technical Papers by Dr. Lou Scheffer The talk will outline various aspects of writing a technical paper, including why to write a technical paper and what to put in a paper. We will walk through a typical flow for a technical paper, including Abstract, Introduction, Prior work, Details of your method, Experimental results, Conclusions and future work, Acknowledgments and References, Appendices
11:30 AM: Job Stress: Causes, Effects, and Tools for Coping by Cheryl Kennedy Stress is your reaction and perception to what you are experiencing. The amount of control you believe you have over your circumstances will generally influence the amount of stress you experience. Changing the way you respond to your stress, will help you reduce the stress in your life. Stress may cause a physiological and psychological reaction. In this Talk, Cheryl will go over the general cause of stress and several effective tools to deal with it, including a group laughter exercise.
Noon – 1:00 PM: Lunch and Networking
SATURDAY JUNE 10SCV Circuits and Systems
M A Y 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 33
Documentation and Instructions Made Easy!?
Speaker: Terry Chappell, Chappell Enterprises Time: Seated dinner served at 6:30 PM,
Presentation (no cost) at 7:30 PM Cost: $25 if reserved by June 11; $30 at the door Place: Ramada Inn, 1217 Wildwood Ave (Fwy 101
frontage road, between Lawrence Expy and Great America Pkwy), Sunnyvale
RSVP: Please reserve and pay in advance using our PayPal on-line system or email Janis Karklins, [email protected]
Web: www.cpmt.org/scv
Terry Chappell has worked in Silicon Valley
since the 60’s. He is past chair of CPMT’s Santa Clara Valley Chapter and an IEEE member for over 20 years. He holds a B.S. in physics from Stanford where he also studied EE and IE.
Terry has been an inventor and tinkerer for many years, with some key innovations in catalysis. He developed the present novel training techniques while watching assembly workers and trying to figure out a better way for them to understand and implement complex instructions; one of the keys was his ability to listen to the workers themselves and see it from their point of view.
A novel documentation format has been developed and proved that uses photos and simple cartoons. It requires no proprietary software. SeeQuick™ instructions take the same amount of time to create as those using traditional formats. They communicate effectively with the “hands on” employees that work in a manufacturing environment.
Applications: • Transferring knowledge and procedures to contract
manufacturers or off-shore sites
• Rapidly implementing engineering changes • Maintaining and repairing equipment • Reducing rework
and field returns • Communicating effectively with employees not proficient in English • Reducing process drift • Reducing engineering time spent on
documentation • Improving effectiveness of safety training
Mr. Chappell will also discuss: • How to create good pictured instructions • Documentation mistakes to avoid when managing
a quality system • Techniques for reducing development time The new format was developed at Finisar, a fiber optics components manufacturer. It is also used by: ASTI — ammonia safety training A.D. Banker — insurance and securities training Santa Cruz County, Emergency Medical Services —
operating emergency medical equipment
WEDNESDAY JUNE 14SCV Components, Packaging and Manufacturing Technology
HOW 2
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Ja
Check for pinched fibers
Move these fibers
1) Remove plug
2) Insert module on PCB