Tu02( Invited) 11 :00am-11:30am

Photonic Analog to Digital Converter Using Ultrafast Photoconductors

David A. B. Miller Ginzton Laboratov, Stanford University, 450 Via Palou, Stanford CA 94305-4085

(650) 723-01 11, (650) 725 9355 fm, dabm@ee.stanford.edu http://ee.stanford. edu/-dabm

It has proved difficult with conventional electronic analog-to-digital conversion (ADC) techniques to achieve very high sampling rates (e.g., 100 GS/s) at even moderate resolutions (e.g., 4 - 6 bits). The ability to achieve much improved high speed ADC would open new application possibilities in, for example, digitally processing of radar signal. There are many difficulties associated with such high sampling rates. One difficulty is in making sure that the sampling window is sufficiently precise in time, independent of the signal level or of other factors. Optical solutions may be able to improve this sampling precision.

Our approach to this problem is to use photoconductive gates to sample electrical signals on a picosecond timescale. Achieving precisely timed delivery of optical pulses to trigger the sampling gates is expected to be relatively straightforward with optics without substantial degradation of the short pulse shape or variation in its arrival time. The architecture is illustrated in Fig. 1. The optical trigger pulses would trigger each gate, one after the other, sampling each successive value of the

electrical signal in

photoconductive gates

- conventional

electronic NDs

staggered optical trigger

pulses -

Fig. 1. Illustration of ADC architecture.

electrical signal onto a different hold capacitor, and then cycling back to the first gate again and repeating the process. The architecture assumes that - 100 such gates would be implemented, so the whole system would cycle in 1 ns. There would therefore be - 1 ns to perform the ADC on any specific held signal. Hence conventional electronic ADC conversion could be performed, with multiple (- 100) parallel converters. We are investigating the individual components of such a system, and the integration of the gates with CMOS ADC circuits. We are using low-temperature-grown GaAs photoconductive switches integrated with very small (- 10-1 00 fF) hold capacitors.[ 11 We are designing ADC circuits in conventional CMOS, which should allow low power ADC with large numbers of converters per chip, and are intending also to integrate the gates and sampling capacitors onto the CMOS ADC chips by solder bonding. We are also exploring the use of linearized optical modulators to allow remoting of the sampling operation fiom the converters to eliminate the coupling of digital noise from the circuits back to the sampling gates.[2] We have been able to demonstrate sampling of up to 20 GHz signals, as illustrated in Fig. 2, with linearity of better than 4 bits. These and other results will be discussed.

0-7803-7105-4/01/$10.0002001 IEEE 251

[ l ] R. Urata, R. Takahashi, V. A. Sabnis, D. A. B. Miller, and J. S. Harris, “Ultrafast differential sample and hold using low- temperature-grown GaAs MSM for photonic A/D conversion,” IEEE Photonics Tech. Lett. 13, 717-719

[2] H. Chin, P. Atanackovic, and D. A. B. Miller, “Optical Remoting of Ultrafast Charge Packets Using Self-Linearized Modulation,” Conference on Lasers and Electro- Optics 2000, San Francisco, CA (May 7-12,2000). Paper CThN3.

(200 1)

0 100 200 300 400

time (ps)

Fig. 2 Dynamic sample and hold measurement results for input frequencies of 2, 10 and 20 GHz. The experimental traces are overlaid with best-fit sinusoids, with little apparent discrepancies between the two. The close fit indicates accurate sampling is occurring at these individual frequencies

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