IE

1. Converters

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Diode rectifier with capacitive DC link

Figure 1.1: A single-phase diode rectifierwith a capacitive DC link.

��

Llineiline

eLN

��

Cdcvdc

D1

D2

D3

D4

0 5 10 15 20−400

−200

0

200

400

t [ms]

v dc [

V] e

LN

−eLN

Figure 1.2: Line-to-neutral voltage and DC side voltage for a single-phase diode rectifier with a capacitive DC link.

LNLNLN

TLNdc Eetdtedtte

TV

ππωω

πω

π

π

22ˆ2)()cos(2ˆ2)cos(ˆ

21 2

22==== ∫∫

−

0 5 10 15 20−100

−50

0

50

100

t [ms]

i line [

A]

0 300 600 900 1200 1500 1800 21000

5

10

15

20

f [Hz]

i line,

pk [

A]

Figure 1.3: Line current (left) and its frequency spectrum (right),for a single-phase diode rectifier with a capacitive DC link.

IE

Diode rectifier with inductive DC link

Figure 1.4: A single-phase diode rectifierwith an inductive DC link.

Figure 1.5: Line current for a single-phase diode rectifier with an inductive DC link.

Figure 1.5: Line current frequency spectrum for a single-phase diode rectifier with an inductive DC link.

��

Llineiline

eLN

D1

D2

D3

D4

��

vdc

idcLdc

0 0.005 0.01 0.015 0.02−8

−6

−4

−2

0

2

4

6

8

t [s]

i line [

A]

eLN

/50

0 300 600 900 1200 1500 1800 21000

2

4

6

8

10

f [Hz]

i line,

pk(f

) [A

]

IE

The three-phase diode rectifier with capacitive DC link (I)

Figure 1.6: A three-phase diode rectifierwith capacitive DC link.

Figure 1.7: DC side voltage for a three-phase diode rectifier with capacitive DC link.

� �

��

Llineiline

eLN

Cdcvdc

D1

D4

D3 D5

D6 D2

0 0.005 0.01 0.015 0.02−600

−400

−200

0

200

400

600

t [s]

v dc [

V]

eRS

eTR

eST

LLLL

TLLdc Etdtedtte

TV

πωω

πω

π

π

23)()cos(2ˆ6)cos(ˆ

61 6

66=== ∫∫

−

IE

The three-phase diode rectifier with capacitive DC link (II)

Figure 1.7: DC side voltage for a three-phase diode rectifier with capacitive DC link.

Figure 1.8: Line current frequency spectrum for a three-phase diode rectifier with capacitive DC link.

0 0.005 0.01 0.015 0.02−600

−400

−200

0

200

400

600

t [s]

v dc [

V]

eRS

eTR

eST

0 300 600 900 1200 1500 1800 21000

5

10

15

20

25

f [Hz]

i line

,pk(f

) [A

]

Figure 1.8: Line current (R-phase)for a three-phase diode rectifier with capacitive DC link.

0 0.005 0.01 0.015 0.02−100

−75

−50

−25

0

25

50

75

100

t [s]

i line [

A]

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Three-phase thyristor rectifier with inductive DC link

� �

��

Llineiline

eLN

vdc

T1

T4

T3 T5

T6 T2

idcLdc

Figure 1.9: Three-phase thyristor rectifier with an inductive DC link.

( )

)cos()cos(23

)cos(2ˆ6)cos(ˆ

61

0

6

66

ααπ

ωωπ

ωαπ

απ

dcLL

LL

TLLdc

VE

tdtedtteT

V

==

=== ∫∫+

+−

⎪⎩

⎪⎨⎧

=

=

)sin(3

)cos(3

1,

1,

α

α

lineLL

lineLL

IEQ

IEP

)cos(23 απ dcLLdcdc IEIVP ==

dclinedcLLlineLL IIIEIEPπ

απ

α 6)cos(23)cos(3 1,1, =⇔==

⎟⎠⎞

⎜⎝⎛=3

sin22,

ππ

kIk

I dckline

IE

HVDC

idc,i

Ldci

��

vdci

��

Lline,iiline,i

eLNiT1

T4

T3 T5

T6 T2

� �

��

Lliner,riline,r

eLNr

vdcr

T1

T4

T3 T5

T6 T2

idcr

Ldcr

��

vcable,r

��

vcable,i

Cable

Figure 1.10: Principal schematic of a HVDC power transmission system.

Figure 1.11: Line-to-line voltages, DC side voltage and control angles for the rectifier (left) and inverter (right) of an HVDC transmission system.

0 0.005 0.01 0.015 0.02−600

−400

−200

0

200

400

600

t [s]

v dc,r [

kV] e

RS,r

α

eTR,r

eST,r

0 0.005 0.01 0.015 0.02−600

−400

−200

0

200

400

600

t [s]

v dc,i [

kV]

eRS,i

α

eTR,i

eST,i

IE

HVDC Converter Currents

0 300 600 900 1200 1500 1800 21000

0.5

1

1.5

2

2.5

f [Hz]

i line,

r,pk

(f)

[kA

]

0 0.005 0.01 0.015 0.02−3

−2

−1

0

1

2

3

t [s]

i line

,r [

kA]

0 0.005 0.01 0.015 0.02−3

−2

−1

0

1

2

3

t [s]

i line,

i [kA

]

0 300 600 900 1200 1500 1800 21000

0.5

1

1.5

2

2.5

f [Hz]

i line

,i,pk

(f)

[kA

]

Figure 1.12: R-phase line current (top) and its spectrum (bottom) for the rectifier of an HVDC transmission system.

Figure 1.13: R-phase line current (top)and its spectrum (bottom) for theinverter of an HVDC transmissionsystem.

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Commutation Overlap

Figure 1.14: Commutation current (top) and voltage (bottom) for the rectifier.

9.15 9.17 9.19 9.21 9.23 9.25−1

0

1

2

3

t [ms]

i T,r [

kA]

iT1

µ

iT3

9.15 9.17 9.19 9.21 9.23 9.25350

400

450

500

550

600

650

t [ms]

v dc,r [

kV]

eST,r

µ

−eTR,r

dcdcrdcdclinedc

dclinedcdcdcdcr

IRVIXV

ILVVVV

−⋅=−⋅=

=−⋅=∆−⋅=

)cos(3)cos(

3)cos()cos(

00

00

απ

α

ωπ

αα

The line inductance determines the commutation time, and therefore results in a loss of average voltage

IE

Practical HVDC installations

Figure 1.15: Realistic schematic of an HVDC power station.

Ldc

��

vcable

��

vdc

T1

T4

T3 T5

T6 T2

Y Y

T1

T4

T3 T5

T6 T2

Y D

Ldc

CVAr

LfAC

CfAC

LfDC

CfDC

LfDC

CfDC

IE

The Buck Converter (Step-Down Converter)

Figure 1.16: Buck converter.

Figure 1.17: Ideal waveforms of the Buck converter.

S ”on”

swloaddc

LL

Lloaddc DTLVVi

dtdiLvVV ⋅

−=∆⇒==−

S ”off”

( ) swloadL

LLload TD

LVi

dtdiLvV −⋅−=∆⇒==− 1

IE

The Boost Converter (Step-Up Converter)

Figure 1.18: Boost converter.

Figure 1.17: Ideal waveforms of the Boost converter. ReplaceVdc and Vload of the Buckconverter with Vout and Vin

S ”on”

S ”off”

swin

L DTLV

i ⋅=∆inSinLL VvVvdtdiL ≈−== ⇒

outinoutDinLL VVVvVvdtdiL −≈−−== ⇒

( ) swoutinL TD

LVV

i −⋅−

=∆ 1

IE

The Buck-Boost Converter (Half-Bridge)

Figure 1.19: Buck-boost converter.

Figure 1.17: Ideal waveforms of the Buck-boost converter.

S ”on”

swloaddc

LL

Lloaddc DTLVVi

dtdiLvVV ⋅

−=∆⇒==−

S ”off”

( ) swloadL

LLload TD

LVi

dtdiLvV −⋅−=∆⇒==− 1

IE

Diode rectifier with Power Factor Corrector

��

Llineiline

eLN

��

Cdcvdc

D1

D2

D3

D4

Time

0s 2ms 4ms 6ms 8ms 10ms 12ms 14ms 16ms 18ms 20ms

I(L1)

0A

10A

20A

30A

SEL>>

V(V4:+)- V(V4:-)

0V

-325V

325V

Single-phase diode rectifier with power factor corrector (PFC).

Line-to-neutral voltage (top) and rectified line current (bottom)for a diode rectifier equipped with PFC.

IE

VSC Based HVDC

Figure 1.30 Basic VSC based HVDC power transmission interconnection.

� �

��

Ll1Rl1eLN1

Cdc1 Vdc1

��

�

�

Ll2 Rl2eLN2

Cdc2Vdc2

��

Vcable1

��

Vcable2

Cable

Figure 1.31 DC bus voltage controller for VSC based HVDC.PI+

Vdc,ref+

++

ICdc,ref+ -

Vdc

Iq,dc,ref

Vdc

eq

Iq,inv,ref

1

eqPinverter

Iq,ref�

�

Ll1

Cdc1 Vdc1D Y

��

Cf21

��

��

Cf31 Vcable1

Lf21

Lf31

Lf11

Cf11

Figure 1.32 Realistic VSC based HVDC light converter station.

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Effect of DSP Controller Delay

Figure 1.33 Inverter AC side power (black) and rectifier AC side power (grey).

Figure 1.34 Rectifier DC side voltage.

20 20.25 20.5 20.75 21 21.25 21.5 21.75 22−200

−150

−100

−50

0

50

100

150

200

t [ms]

p i, pr [

MW

]

0 0.01 0.02 0.03 0.04 0.05 0.06250

275

300

325

t [s]

v dc [

kV]

IE

Converter Currents for VSC Based HVDC

0 0.01 0.02 0.03 0.04 0.05 0.06−1500

−1000

−500

0

500

1000

1500

t [s]

i line

, ico

nv [

A]

0 0.01 0.02 0.03 0.04 0.05 0.06−1500

−1000

−500

0

500

1000

1500

t [s]

i line

, ico

nv [

A]

0 0.005 0.01 0.015 0.02−1500

−1000

−500

0

500

1000

1500

t [s]

i line

, ico

nv [

A]

1650 1750 1850 1950 2050 2150 22500

10

20

30

40

50

60

f [Hz]

i line

,pk(f

), i co

nv,p

k(f)

[A]

Figure 1.35 Line current (black) and converter current (grey) for the rectifier (top) and line current (black) and converter current (grey) for the inverter (bottom) during load power increase.

Figure 1.36 Line current (black) andconverter current (grey) for the inverter(top) and line current spectrum (black)and converter current spectrum (grey)for the inverter at frequencies close toswitching frequency (bottom).

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General SMPS

Figure 1.20: Principal schematic of a switch-mode power supply.

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The Laboratory Flyback Converter

Flyback converter with input filter, inrush current limitation, diode rectifier, dc link capacitors, power MOSFET, transformer, output filter and three snubber circuits. The controller circuits are not included in the circuit.

C

CC

DC

CDC

N1

N2

N2

GND

+15 V

-15 V

F

N T-

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The Flyback Converter

Figure 1.23: Principal schematic of a flyback converter. Only the devices needed to understand the operation are included.

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The switch-transformer

Figure 1.21: Principal transformer withco-ordinated reference directions marked.

( )

( )⎪⎪⎩

⎪⎪⎨

⎧

Φ⋅=Φ⋅=

Ψ=≈

Φ⋅=Φ⋅=

Ψ=≈

dtdNN

dtd

dtdev

dtdNN

dtd

dtdev

2222

222

1111

111

2

1

2

1

2

2

1

121 N

Nvv

Nv

Nv

=⇒=⇒Φ=Φ

1

2

2

12211 N

Niiiviv =⇒⋅=⋅

2

2

2

1

2

22

2

1

1

12

2

1

2

1

1

2

22 R

NN

iv

NN

ivR

NN

iv

ivR ⋅⎟⎟

⎠

⎞⎜⎜⎝

⎛=⋅⎟⎟

⎠

⎞⎜⎜⎝

⎛==′⇒⎟⎟

⎠

⎞⎜⎜⎝

⎛⋅==

Figure 1.22: The equivalent circuit of a transformer.Note that the winding resistances have been neglected.In the full equivalent circuit they show up in serieswith the leakage inductances, L1λ and L2λ. The coreloss equivalent resistance has also been omitted.This is located in parallel to the magnetizing inductance.

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The Flyback Converter

Figure 1.23: Principal schematic of a flyback converter. Only the devices needed to understand the operation are included.

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Flyback Converter - Operation

Figure 1.25: The flyback converter when the switch S is open. Since the transformer is demagnetized from the secondary, the magnetizing inductance is placed on the secondary.

Figure 1.24: The flyback converter when the switch S is closed. Since the transformer is magnetized from the primary in this case, the magnetizing inductance is placed on the primary.

( ) ( ) ( ) 000 ttttLVtiti

tiL

dtidLV

m

dcmm

mm

mmdc >−⋅

′+′=′⇒

∆′∆

⋅′≈′

⋅′=

( ) ( ) ( ) 111 ttttLVtiti

tLL

dtidLV

m

Cmm

mm

mmC >−⋅

′′−′′=′′⇒

∆′′∆

⋅′′≈′′

⋅′′=−

IE

Power Semiconductor Voltage Stress

CdcD VVNNV +⋅=1

2,maxS ”on”:

S ”off”: ( )CONDDCS VVNNVV +⋅+= )(2

1,max

Figure 1.23: Principal schematic of a flyback converter. Only the devices needed to understand the operation are included.

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Ideal Waveforms

Figure 1.26: Waveforms for ideal operation of aflyback converter.

The energy stored in the transformerCore is conserved (during switchings)

maxmax ,1

2,

2

2

1 , mmmm iNNiL

NNL ′′⋅=′′′⋅⎟⎟

⎠

⎞⎜⎜⎝

⎛=′

2,

2,, 2

121

maxmaxmax mmmmm iLiLW ′′⋅′′⋅=′⋅′⋅=

( )pswm

Cmm

pm

dcmm

tTLVii

tLVii

−⋅′′

−′′=′′

⋅′

+′=′

maxmin

minmax

,,

,,

and

Cdc

C

sw

p

VNNV

VTt

⋅+=

2

1

The duty cycle is calculated from the current changes

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The Forward Converter

Figure 1.27: Principal schematic of a forward converter. Only the devices needed to understand the operation are included. Note that in this schematic a zener diode is connected across the primary, which is rarely used in practice.

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Forward Converter - Operation

( ) ( ) ( ) 000 ttttLVtiti

tiL

dtidLV

m

dcmm

mm

mmdc >−⋅

′+′=′⇒

∆′∆

⋅′≈′

⋅′=

loadmmm iNNii

NNiiii ⋅+=⋅+=′+=

1

22

1

221

( ) ( ) ( ) 111 ttttLVtiti

tiL

dtidLV

m

Zmm

mm

mmZ >−⋅

′−′=′⇒

∆′∆

⋅′≈′

⋅′=−

Figure 1.28: The forward converter with the simplified transformer equivalent included.

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Power Semiconductor Voltage Stress

S ”off”:

Figure 1.27: Principal schematic of a forward converter. Only the devices needed to understand the operation are included. Note that in this schematic a zener diode is connected across the primary, which is rarely used in practice.

ZdcS VVV +=max,

ZD VNNV ⋅=1

2,1max

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Ideal Waveforms

Figure 1.29: Waveforms for ideal operation of aforward converter.

The duty cycle is calculated from the fact that the energy stored in the transformer core is conserved (during switchings)

( ) pm

dcmm t

LVii ⋅′

=′⇒=′ max,00

( ) ( ) ( ) ( )pswm

Zpmswmswm tT

LVtiTiTi −⋅′

−′=′⇒=′ 0

Zdc

Z

sw

p

VVV

Tt

+≤

Note that when S is on:

loadmmm iNNii

NNiiii ⋅+=⋅+=′+=

1

22

1

221