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A PROPOSAL TOWARDS LAB

IMPROVEMENT FOR FUTURE TRENDS

(LIFT PROGRAMME)

DEPARTMENT OF ECE

By

T.SATYANARAYANA

SUBJECT: IC APPLICATIONS LAB

ECE-III YEAR

1. Objectives and Relevance

2. Scope

3. Prerequisites

4. Syllabus

5. Lab Schedule

. Su!!ested "oo#s

$. %ebsites

&. '(perts) *etails

+. ,appin! o- Lab ith Projects/0onsultancy/R*s

1. ndustrial isits

11. Shado 'n!ineerin!

12. 0alibration6estin! and nspection

13. Preventive ,aintenance Schedules

14. 6roubleshootin!

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1 OBJECTIVES AND RELEVANCE

6he 7ain objective o- this lab course is to !ain the practical hands one(perience by e(posin! the students to various linear 0 applications. 6hestudents ill have an understandin! o- the concepts involved in various Linear

and *i!ital inte!rated circuits and their various applications.

6hrou!h this lab the students ill !et a thorou!h understandin! o- variouslinear 0s and -inally this lab introduces so7e 66L 0s8$4LS series9 -or di!italcircuit applications and the $41 operational a7pli-ier 555 ti7er and its variousapplications. 6he lab also introduces various volta!e re!ulators.

2 SCOPE

6his lab is 7ore use-ul in :nderstandin! o- Linear and *i!ital 0;pplications and :nderstandin! the application o- 0)s in consu7er electronicindustries to 7anu-acture the electronic appliances.

PRERE!UISITES

6heoretical #noled!e on subject nte!rated 0ircuit ;pplications alsorequires the aareness o- various di!ital electronics and analo! electronics li#eelectronic devices and circuits pulse di!ital circuits nu7berin! syste7sco7binational and sequential circuits.

PREAMBLE

This lab covers the experiments in Integrated Circuit Applicationssubject.The JNTU has given 17experiments and divided in to 2parts in the syllabus out

of hich 12minimum of experiments have to be conducted!6from each part".

PART- A

TO VERIFY T"E FOLLOWING FUNCTIONS.

1. ;**'R S:"6R;06OR 0O,P;R;6OR :S;,P.2.

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PART- B

TO VERIFY T"E FUNCTIONALITY OF #$ %&'&% TTL IC%.

1. * ?LP>?LOP 8$4LS$49 and AB ,aster> Slave ?lip>?lop8$4LS$39.

2. *'0;*' 0O: $4155$. R;, 81 (49>$41&+ 8Read and %rite operation9

PART - 1

$. SYLLABUS-JNTU

UNIT-I

;7p.

OBJECTIVE

6o study the applications o- 0 $41 as adder subtractor co7parator.

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Operation o- 0 $41 Re!ulatedPoer Supply ?unction =enerator 0RO.

DESCRIPTION

a. ntroduction to e(peri7ent >3 7in

b. 0onnection o- e(peri7ent and its veri-icationsc. '(peri7ental deter7ination o- ;dder Subtractor 0o7parator.

d. =raphical deter7ination o- input and output ave-or7s o- co7parator.OPAMP ASADDER

6o desi!n adder subtractor and co7parator usin! opa7p.

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APPARATUS:

S.N*.N+,& * /&

0*,*&3&45,&!5+y

1. Op a7p $41 0 12. Resistance> 1BE 4

3. Resistance >1 BE 1

4. *ual Re!ulated Poer supply 2

5. "read "oard

. 0RO

$. ,ulti7eter 1

CIRCUIT DIAGRAM:

PROCEDURE:

1. 0onnect the circuit as shon in -i!ure.2. ;pply Fcc GF15 and Ccc G C 15 to Pin $ and 4 o- $4103. ;pply the i/p volta!e 1and 2.4. ,easure the o/p volta!e usin! ,ulti 7eter.5. eri-y ith theoretical value.. Repeat the above -or di--erent values o- 1and 2.

RESULT: n the above circuit Opa7p or#s as su77in! a7pli-ier.

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OPAMP AS SUBTRACTOR

6o desi!n subtractor usin! $41opa7p.

APPARATUS:

S.N*.N+,& * /&

0*,*&3&45,&!5+y

1. Op a7p $41 0 1

2. Resistance 1BE 5


4. "read "oard

5. 0RO

. ,ulti7eter 1

CIRCUIT DIAGRAM:

PROCEDURE:

1. 0onnect the circuit as shon in -i!ure.

2. ;pply Fcc GF15 and Ccc G C 15 to Pin $ and 4 o- $4103. ;pply the i/p volta!e 1and 2.4. ,easure the o/p volta!e usin! ,ulti 7eter.5. eri-y ith theoretical value.. Repeat the above -or di--erent values o- 1and 2.

RESULT: n the above circuit Op a7p or#s as subtractor.

COMPARATOR USING IC#$1

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6o co7pare the applied input si!nal ith the re-erence volta!es to the 0o7parator0ircuit.

.APPARATUS:

S.N*. N+,& * /&0*,*&3&45,& !5+y

1. Op a7p $41 0 1

2. Resistor> 1BE 2

3. Resistor>1E 2


5 "read "oard

. 0RO

$. *iode>414& 2

CIRCUIT DIAGARAM

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PROCEDURE:

1. 0onnect the co7parator circuit as shon in -i! 819.2. 0onnect the 1,@H -unction !enerator to the input ter7inals. ;pply 1 si!nal at non>

invertin! ter7inals o- the op>a7p 0$41.3. 0onnect the 2,@H 0.R.O at the output ter7inals.4. Beep 1 re-erence volta!e at the nvertin! ter7inal o- the Op>a7p. %hen in is less

than the re- then output volta!e is at Csat because o- the hi!her input volta!e atne!ative ter7inal. 6here-ore the output volta!e is at lo!ic lo level

5.

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6o desi!n and veri-y the operation o- an inte!rator and di--erentiator -or a !iven input.

PRERE!UISITES


DESCRIPTION


b. 0onnection o- e(peri7ent and its veri-ications

c. '(peri7ental deter7ination o- an inte!rator and di--erentiator -or a !iven input.

d. =raphical deter7ination o- input and output ave-or7s o- integrator and

diferentiator.

APPARATUS: 0$41 Op>;7p 6rainer.Resistors> 5.B 1B 1B0apacitors> .1 J?Si!nal =enerator.0RO.Probes.0onnectin! ires.

CIRCUIT DIAGRAM :D&'&+*':

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I&6'+*' :

T/& I&6'+*':

; circuit in hich the output volta!e ave-or7 is the inte!ration o- the input is calledinte!rator

P'*0&75'&:

1. 0onnect the inte!rator shon in -i!ure and sitch on the 7ains.2. 0onnect the -unction !enerators to the input ter7inals apply square ave at the input

ter7inals.3. ,easure the output volta!e o- re!ulated poer supply circuit F5 volts and >5volts.

4. Observe output o- the square ave oscillator usin! 0RO the output volta!e ill beappro(i7ately 4.5vpp and -requency is 1 @H to 2 [email protected]. Select required -requency usin! potentio7eter and connect it to the input o- the

di--erentiator.. 0hoose capacitor value such that R0 ti7e constant is s7aller than the input si!nal

8R0KK69.$. 0onnect the capacitor and observe the output si!nal suin! 0RO.&. 6hus the output si!nal ill be the derivative o- the input si!nal.+. Si7ilarly chan!e the capacitor 0 value -or di--erent ti7e constants

R06 R0G6

R0KK6

T/& D&'&+*':

6he di--erentiator circuit per-or7s the 7athe7atical operation o- di--erentiation. 6hat isthe output ave-or7 is the derivative o- the input ave-or7.

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dt

d#C$#

in

%out 1=

P'*0&75'&:

1. 0onnect the di--erentiator shon in -i!ure and sitch on the 7ains.2. 0onnect the -unction !enerators to the input ter7inals apply square ave at the inputter7inals.

3. ,easure the output volta!e o- re!ulated poer supply circuit F5 volts and >5volts.4. Observe output o- the square ave oscillator usin! 0RO the output volta!e ill be

appro(i7ately 4.5vpp and -requency is 1 @H to 2 [email protected]. Select required -requency usin! potentio7eter and connect it to the input o- the

di--erentiator.. 0hoose capacitor value such that R0 ti7e constant is s7aller than the input si!nal

8R0KK69.$. 0onnect the capacitor and observe the output si!nal suin! 0RO.

&. 6hus the output si!nal ill be the derivative o- the input si!nal.+. Si7ilarly chan!e the capacitor 0 value -or di--erent ti7e constants R06 R0G6

R0KK6

APPLICATIONS

1. 6he di--erentiator used in ave shapin! circuits to detect hi!h -requency co7ponentsin an input si!nal and also as a rate>o- Cchan!e detector in ?, de7odulators.

2. 6he inte!rator is used in analo! co7puters and analo! to di!ital converters andsi!nal>ave shapin! circuits

EPERIMENT NO.

Sch7itt tri!!er circuits usin! 0 $41 0 555.

OBJECTIVE

6o desi!n the Sch7itt tri!!er circuit usin! 0 $41 and 0 555.

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Operation o- 0 $41 Operation o- 0 555 Re!ulated Poer Supply ?unction =enerator 0RO.

DESCRIPTION

a. ntroduction to e(peri7ent >3 7in.

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b. 0onnection o- e(peri7ent and its veri-ications.c. '(peri7ental deter7ination o- Sch7itt tri!!er.d. =raphical deter7ination o- :6P and L6P o- the Sch7itt tri!!er.

6o study the Sch7itt tri!!er characteristics by usin! $41 0.

APPARATUS : $41 Op>;7p Resistors C 1 E C 2

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EPECTED WAVEFORMS:

TABULAR COLUMN :

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RESULT : Sch7itt tri!!er characteristics o- $41 0 is studied by notin! the e(pectedave-or7s.

APPLICATIONS1. Sch7itt tri!!ers are typically used in open loop con-i!urations -or noise i77unity

and closed loopcon-i!urations to i7ple7ent -unction !enerators.

EPERIMENT NO. $

olta!e Re!ulator usin! 0 $23.

OBJECTIVE

6o desi!n a lo volta!e variable re!ulator o- 2 to $ usin! 0 $23.

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Operation o- 0 $23 Operationo- 0 555 Re!ulated Poer Supply ?unction =enerator 0RO.

DESCRIPTION

a. ntroduction to e(peri7ent >3 7in.b. 0onnection o- e(peri7ent and its veri-ications.c. '(peri7ental deter7ination o- characteristics o- a volta!e variable re!ulator.d. =raphical deter7ination o- Load and Line Re!ulation characteristics.

6o construct and test volta!e Re!ulator usin! $23 0.

APPARATUS:

S.N*. N+,& * /& 0*,*&3&45,& !5+y

1.0 $23

1

2.

Resistor C 2.2 BE 1BE 1.5 BE5. BE

1

3.0apacitor C 1p?

2

4.Re!ulated Poer supply

1
http://en.wikipedia.org/wiki/Feedbackhttp://en.wikipedia.org/wiki/Function_generatorhttp://en.wikipedia.org/wiki/Function_generatorhttp://en.wikipedia.org/wiki/Function_generatorhttp://en.wikipedia.org/wiki/Feedback

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5."read "oard

1

.0RO

1

CIRCUIT DIAGRAMM

PROCEDURE:

1. 0onnect the circuit as shon in -i! 0onsistin!. 2. 6he internal re- is applied to Potential divides the consistin! o- R1and R2. 3. ary the input volta!e and note don the correspondin!values o- Output.

4. *ra a s7oother curve by tal#in! input volta!e on D> a(is ;nd Output volta!e on N>a(is.

RESULT:

"y e(peri7ent volta!e Re!ulator usin! $23 0 e observed i and ovalues.

T"REE TERMINAL VOLTAGE REGULATORS-#89; #89+*'

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#+6& R&65>+*'

6he volta!e re!ulators o- $&DD series all have the sa7e internal circuitry e(pect

-or di--erent values o- one resistor hich deter7ines the output volta!e level.?i! represents the circuit connections -or $&DD series. Pin 1 represents the input Pin 2

represents !round and Pin3 represents the output ter7inal.

$+DD 6@R'' 6'R,5 >5.2 > >& >12 >15 >1& and >24 . 6he 7a(i7u7 input volta!e -or oG24v is 4hile -or the re7ainin! options is >35

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PROCEDURE:

1. 0onnect the circuit as shon in -i!.2. Sitch O< the 3 Pin re!ulator 0 trainer.3. Observe the output volta!es -or $&DD and $+DD 0 re!ulators at Pin 2 by applyin!

input at Pin 1.4. 6abulate the readin! -or di--erent 0)s.

TABULAR COLUMN:

S.N* V*>+6&R&65>+*'

I5 V (=*>%)

O55 V* (=*>%)

1 #89

2 #89?

#812 $ #

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G 8 1 F R ?/ R19 1 in

6hat is G 8 1 F R ?/ R19 >>>>>>>>> 1Fj2Q-R0

or /in G ;? /1F j8- / - @9T

%here 8 /in9 G !ain o- the -ilter as a -unction o- -requency . R?;? G 1 F >>>>>> G passband !ain o- the -ilter.

R1- G ?requency o- the input si!nal.

1-@ G >>>>>>>>> G hi!h cuto-- -requency o- the -ilter. 2 QR0

6he !ain 7a!nitude and pahse an!le equations o- the Lo C Pass -ilter can be obtainedby convertin! equation into its equivalent polar -or7 as -ollos.

U /in U G ;?/1F 8- / -@9 2

V G > tan>18- / -@9%here V is the phase an!le in de!rees .6he operation o- the lo C pass -ilter can be veri-ied -ro7 the !ain 7a!nitude equation.

1. ;t very lo -requencies that is - K -@U /in U G ;?

2. ;t - G -@ U /in U G ;?/2 G .$$ ;?

3. ;t - -@ U /in U K ;?6hus the Lo C Pass -ilter has a constant !ain ;?-ro7 @H to the hi!h cuto-- -requency-@ the !ain is .$$;? and a-ter -@it decreases at a constant rate ith an increase in-requency . 6hat is hen the -requency is increased ten-old 8 one decade9 the volta!e!ain is divided by 1 . n other ords the !ain decreases 2 d" 8 G 2 lo! 19 each ti7ethe -requency is increased by 1. @ence the rate at hich the !ain rolls o-- a-ter -@is 2d"/decade or d"/octave here octave si!ni-ies a to -old increase in -requency. 6he-requency - G -@ is called the cut o-- -requency because the !ain o- the -ilter at this-requency is don by 3 d" 8 G2lo! .$$9 -or7 @H. Other equivalent ter7s -or cuto--

-requency are >3d" -requency brea# -requency or corner -requency.

PROCEDURE :

1. Sitch O< lo pass -ilter trainer #it by connectin! any one capacitor providede(ternally on the trainer to the 0 ter7inals o- the circuit.2. 0onnect input ter7inals to the -unction !enerator.

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3. 0onnect channel >1 o- 0RO to input ter7inals 8in 9 and channel >2 to outputter7inals 8o9.4. Set in G 17 usin! -unction !enerator.5. "y varyin! the input -requency in re!ular intervals note don the output volta!e.. 0alculate the !ain 8o/ in 9 and =ain in d" G 2 lo! 8o/ in 9 at every -requency.

$. Plot the -requency response curve 8 ta#in! -requency in D>a(is =ain in d" in N>a(is9.&. eri-y the practical 8-@G 3 d" -requency -ro7 !raph 9 the calculated theoretical cut>o-- -requency8-@G 1/2 QR0 9.

TABULAR COLUMN :

R G 1 # 0 G .1 J? in G 1 7S.

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EPECTED GRAP" :

RESULT : 6he -requency response o- 1storder Lo Pass ?ilter is plotted. 6he cut o---requency is calculated and is veri-ied ith the theoretical value.

APPLICATIONS@i!h>pass -ilters have 7any applications.

1. 6hey are used as part o- an audio crossoverto direct hi!h -requencies to a teeterhile attenuatin! bass si!nals hich could inter-ere ith or da7a!e the spea#er.

2. @i!h>pass -ilters are also used -or;0 couplin!at the inputs o- 7anyaudio poera7pli-iers.

EPERIMENT NO. ?RC P/+%& S/ +7 W& B'76& O%0>>+*'% 5%6 IC #$1 *-+,.

OBJECTIVE

6o desi!n veri-y the 8i9 phase shi-t oscillator 8ii9 %ien "rid!e oscillator -or the !iven-requency o- oscillation and veri-y it practically.

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Operation o- 0 $41Re!ulated Poer Supply ?unction =enerator and 0RO.

DESCRIPTION

a. ntroduction to e(peri7ent >3 7inb. 0onnection o- e(peri7ent and its veri-icationsc. '(peri7ental deter7ination o- -requency response -or second order lo pass hi!h
http://en.wikipedia.org/wiki/Audio_crossoverhttp://en.wikipedia.org/wiki/Tweeterhttp://en.wikipedia.org/wiki/AC_couplinghttp://en.wikipedia.org/wiki/AC_couplinghttp://en.wikipedia.org/wiki/AC_couplinghttp://en.wikipedia.org/wiki/Audio_power_amplifierhttp://en.wikipedia.org/wiki/Audio_power_amplifierhttp://en.wikipedia.org/wiki/Audio_power_amplifierhttp://en.wikipedia.org/wiki/Audio_crossoverhttp://en.wikipedia.org/wiki/Tweeterhttp://en.wikipedia.org/wiki/AC_couplinghttp://en.wikipedia.org/wiki/Audio_power_amplifierhttp://en.wikipedia.org/wiki/Audio_power_amplifier

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pass -ilter.

d. =raphical deter7ination o- 7easurin! the ti7e period and a7plitude o- the outputave-or7

6o co7pare theoretical and practical -requency o- oscillation o- R0 Phase Shi-t

Oscillator.

APPARATUS : R0 Phase Shi-t Oscillator Bit 0RO Probes 0onnectin! ires

CIRCUIT DIAGRAM :

Oscillator is a circuit hich !enerates output ithout any input. Oscillator can be de-inedas a device that converts dc to ac.

O%0>>+*'% 0+ @& 0>+%%&7 +%

"ased on the co7ponents used.

R0 Oscillators > R0 Phase shi-t %ein "rid!e Oscillator L0 oscillators > 0olpitts @artley 0lapp Oscillator 0rystal Oscillators "ased on the type o- ave-or7 Sinusoidal Oscillators C R0 Phase shi-t %ein "rid!e 0olpitts @artleyW. Sinusoidal Oscillators> :A6 rela(ation Oscillators "ased on -requency ran!e ;udio -requency oscillator C R0 oscillators Radio -requency oscillator C L0 oscillators

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B+'/+5%& % 0'&'* *' *%0>>+*%:

19 ?or sustained oscillations the phase shi-t around the circuit8 a7pli-ier and -eedbac#circuit9 should be 3oor o.296he !ain o- the a7pli-ier should !reater than or equal to unity; Phase shi-t oscillator consists o- an Op>;7p as the a7pli-yin! sta!e and threecascaded netor#s as the -eedbac# circuit. 6he -eedbac# circuit provides -eedbac#volta!e -ro7 the output bac# to the input o- the a7pli-ier. 6he Op>;7p is used in theinvertin! 7ode there-ore any si!nal that appears at the invertin! ter7inal is shi-ted by1&oat the output. ;n additional 1&ophaseshi-t is provided by the 3 R0 sections C eachsection providin! a Phase shi-t o- o. 6here -ore -eedbac# circuit 8 3 R0>sections9provide additional around the loop 1&o totally !ivin! 3ophaseshi-t around the loop. ;speci-ic -requency hen the phaseshi-t o- the cascaded R0 sections is 1&oand the !aino- the a7pli-ier is su--iciently lar!e the circuit ill oscillate at that -requency hich iscalled the -requency o- oscillation -o and is !iven by

-o G 1/2XR0 G .5/ R0;t this -requency the !ain ;v 7ust be atleast 2+

i.e. R-/R G 2+.6he circuit ill produce a sinusoidal ave-or7 o- -requency -o i- the !ain is 2+ and thetotal Phase shi-t around the circuit is e(actly 3o or o. ?or desired -requency o-oscillation. 0hoose a capacitor 0 and then calculate the value o- R.

PROCEDURE :

1. 0onnect Resistors and 0apacitors provided e(ternally on the #it.2. Sitch O< the R0 Phase Shi-t Oscillator Bit.3. 0onnect the output o- the circuit to 0RO throu!h probes.

4. 0alculate the practical -requency o- oscillation - G 1/6 by observin! the ti7eperiod o-the output sinusoidal ave-or7 on the 0RO and co7pare it ith theoretical -requency

o- Oscillation - G 1/2XR05. S#etch the output ave-or7 by notin! the ti7eperiod and pea# to pea# volta!e o- theoutput ave-or7

TABULAR COLUMN:

S.N* R CJ? T/&*'&0+> -oG 1/2XR0

T,&&'*7 6

P'+00+>-o G 1/6

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EPECTED WAVEFORMS :

RESULT:Practical -requency o- oscillation o- R0 Phase Shi-t Oscillator is co7pared ith thetheoretical value.

IC-#$1 OSCILLATOR CIRCUITS

RC P"ASE S"IFT OSCILLATOR WEIN BRIDGE OSCILLATOR

@) W& B'76& O%0>>+*'.

6o co7pare theoretical and practical -requency o- oscillation o- %ein "rid!e Oscillator.

APPARATUS : %ein brid!e Oscillator Bit 0RO Probes 0onnectin! ires

CIRCUIT DIAGRAM :

6his ein "rid!e Oscillator is the standard oscillator circuit -or lo to 7oderate -requencies inthe ran!e o- 5 @H to about 1 ,@H . 6his oscillator is pre-erred -or co77ercial audio !eneratorsand other lo -requency applications. 6o avoid the da7ped oscillations at the output the %ein"rid!e oscillator it uses a -eedbac# circuit called a lead C la! netor#. 6o !enerate un da7pedoscillations the positive -eedbac# 7ust be used because the output 7ust !enerate itsel-."ar#hausen Ys criterion -or oscillationsM

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19 ?or sustained oscillations the phase shi-t around the circuit8 a7pli-ier and -eedbac#circuit9 should be 3oor o.

296he !ain o- the a7pli-ier should !reater than or equal to unity.6his type o- R0 oscillator)s is used -or -requencies -ro7 1 @H to 5 ,@H

6he co77only used audio -requency oscillator is %ein "rid!e oscillator as shon in the

circuit. 6he -eedbac# si!nal in this circuit is connected to the non>invertin! ter7inal there-orethe Op>;7p is or#in! in non>invertin! 7ode. @ence this a7pli-ier doesn)t provide any phaseshi-t. 6here -ore the -eedbac# netor# need not provide any phase shi-t. 6he condition o- HeroPhase shi-t around the circuit is achieved by balancin! the brid!e.

?or sustained oscillations the a7pli-ier 7ust have a !ain o- precisely 3. but practically;v 7ay be sli!htly less or !reater than 3.

?or ;v K 3 the oscillations ill either die don or -ail to start.?or ;v 3 the oscillations ill be !roin!.

PROCEDURE :

1. 0onnect Resistors and 0apacitors provided e(ternally on the #it.2. Sitch O< the %ein brid!e Oscillator Bit.3. 0onnect the output o- the circuit to 0RO throu!h probes.4. 0alculate the practical -requency o- oscillation - G 1/6 by observin! the ti7eperiod o- theoutput sinusoidal ave-or7 on the 0RO and co7pare it ith theoretical -requency o- Oscillation- G 1/2XR05. S#etch the output ave-or7 by notin! the ti7eperiod and pea# to pea# volta!e o- the outputave-or7

TABULAR COLUMN:

S.N* R CJ? T/&*'&0+>-oG 1/2XR0 T,&&'*7 6 P'+00+>-o G 1/6

EPECTED WAVEFORMS :

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RESULT:Practical -requency o- oscillation o- %ein "rid!e Oscillator is co7pared ith thetheoretical value.

APPLICATIONSOscillators are used in

1. Radio2. 6elevision3. 0o7puters and co77unications

UNIT-IV

EPERIMENT NO. #

0 555 6i7er>,onostable Operation 0ircuit

OBJECTIVE

6o !enerate a pulse usin! ,onostable ,ultivibrator by usin! 0555

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Operation o- 0 555Re!ulated Poer Supply ?unction =enerator 0RO.

DESCRIPTION


b. 0onnection o- e(peri7ent and its veri-icationsc. '(peri7ental deter7ination o- -requency response -or second order lo pass hi!h

pass -ilter.

d. =raphical deter7ination o- output ave-or7 and 7easure the pulse duration.

6o co7pare theoretical and practical -requency o- oscillation o- an ,onostable,ultivibrator usin! 0555

APPARATUS : ,onostable ,ultivibrator Bit 0RO Probes 0onnectin! ires

CIRCUIT DIAGRAM :

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,onostable can also called as One C shot ,ultivibrator. hen the output is lo thecircuit is in stable state 6ransistor Z1 is O< and 0apacitor 0 is shorted out to !round. @oeverupon application o- a ne!ative tri!!er pulse to Pin C 2 transistor Z1 is turned O?? hichreleases short circuit across the e(ternal capacitor and drives the output @i!h. 6he capacitor 0no starts char!in! up toard 00throu!h R;. @oever hen the volta!e across the e(ternalcapacitor equals 2/ 3 00co7parator C 1)s 8019 output sitches -ro7 lo to hi!h hich is turnderives the output to its lo state via the output o- the -lip -lop turns transistor Z1 O

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%ave-or7s -or 0555 ,onostable ,ultivibrator

Once tri!!ered the circuit Ys output ill re7ain in the hi!h state until the set ti7e tpelapses. 6he output ill not chan!e its state even i- an input tri!!er is applied a!ain durin! thisti7e interval tp.

PROCEDURE:1.0onnect the circuit as shon in -i!.2. 0onnect -unction !enerator at Pin 2 and 0h>1 o- 0RO at Pin 2 and ch>2o- 0RO at Pin 3.3. ;pply square ave -ro7 -unction !enerator and observe the output volta!e o ith respect toinput.4. 2 o- 0RO across capacitor and observe the volta!e across the capacitor c.

5.

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EPECTED WAVEFORMS:

RESULT: 6heoretical and Practical -requency o- oscillation o- 7onostable 7ultivibrator iscalculated and co7pared.

APPLICATIONS1. ,issin! Pulse *etector.

2. ?requency *ivider.

3. P%,.

4. Linear Ra7p =enerator

EPERIMENT NO. 8

0 55 PLL ;pplication.

OBJECTIVE

6o study and veri-y the operation o-

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DESCRIPTION



c. '(peri7ental deter7ination o- operation o-

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1. Phase *etector.

2. Lo Pass ?ilter

3. 0O 8 olta!e 0ontrolled Oscillator9

P"ASE DETECTOR :6he -unction o- phase detector is to co7pares the input si!nal - linear ?, de7odulation. *urin! loc# the avera!edc level o- the phase co7parator output si!nals is directly proportional to this -requency o- theinput si!nal. ;s the input -requency shi-ts it is this output si!nal hich caused the 0O to shi-tits -requency to 7atch that o- the input. 0onsequently the linearity o- the phase co7parator

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output ith the -requency is deter7ined by the volta!e to -requency trans-er -unction o- the0O.

PROCEDURE:

1. 0onnect the circuit as shon in -i!. Sitch O< the circuit2. 6he 0O -ree runnin! -requency -o should be adjusted to be at the centre o- the input si!nal-requency ran!e. 01 can any value R1 should be in the ran!e o- 2 to 2 B ith an opti7u7value o- the order o- 4B.3. 6he input si!nal be directly coupled i- the dc resistance seen -ro7 pin 2 3 are equal andthere is no *0 volta!e di--erence beteen the pins. ;pply 2p>p volta!e throu!h the capacitor G1`?.4. Pin provides *c re-erence volta!e that is also to the *0 potential o- the de7odulated output8 at pin $95. 6hus i- a resistance is connected beteen pin 1 and $ the !ain o- the output sta!e can bereduced ith little chan!e in *0 volta!e level at the output.

. 6his allos the loc# ran!e to be decreased ith little chan!e in -ree runnin!.$. ; s7all capacitor 8 1Bp-9 should be connected beteen pins $ and & to eli7inate the possibleoscillations in the control current source.&. Sin!le loop -ilter is -or7ed by the capacitor 02 connected beteen pin $ and F5 supply.+. 0onnect channel>1 at the input pin 2 and channel >2 o- 0RO to the pin $ hich displays thede7odulated output.1. 0han!e the input -requency and observe the output is phase loc#ed at a particular -requency.

EPECTED WAVEFORM:

RESULT: 550 is used -or ?, de7odulation.

APPLICATIONS

Phase>loc#ed loops are idely e7ployed in

1. Radio.
http://en.wikipedia.org/wiki/Radiohttp://en.wikipedia.org/wiki/Radio

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2. 6eleco77unications.

3. 0o7putersand other electronic applications.

4. 6hey can be used to recover a si!nal -ro7 a noisy co77unication channel !eneratestable -requencies at a 7ultiple o- an input -requency 8-requency synthesis9 or

distribute cloc# ti7in! pulses in di!ital lo!ic desi!ns such as7icroprocessors.UNIT V

EPERIMENT NO. 7++ *3 S&'+> 7++ 3

LSB

+. S&'+> %&'+> *5 (%%*) @. S&'+> -+'+>>&> *5 (%*)

MSB MSBP+'+>>&> S&'+> 7++ *3 P+'+>>&>7++ 3 7++ 3

LSB LSB LSB 0. P+'+>>&> %&'+> *5 (%*) 7. P+'+>>&> -+'+>>&> *5 (*)

Shit

register

(4 bits)

Shit

register

Shit

register

(4 bits)

Shit

register

(4 bits)
http://en.wikipedia.org/wiki/Telecommunicationshttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Frequency_synthesishttp://en.wikipedia.org/wiki/Microprocessorhttp://en.wikipedia.org/wiki/Microprocessorhttp://en.wikipedia.org/wiki/Microprocessorhttp://en.wikipedia.org/wiki/Telecommunicationshttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Frequency_synthesishttp://en.wikipedia.org/wiki/Microprocessor

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;. Serial in>Serial outM n this type o- shi-t re!ister data is stored into the re!ister onebit at a ti7e 8serial9 and ta#en out serially too.

". Serial in>Parallel outM @ere data is stored serially into the re!ister and is ta#en outcollectively at one shot 8parallel9.

0. Parallel in>Serial outM n this case entire data is stored into the re!ister in one shotand is ta#en out serially.*. Parallel in> Parallel outM *ata is stored into the re!ister at one !o and is ta#en out

collectively at one shot too.

BLOC DIAGRAM: 0> '&%&

7++ :9 4 :9

1H

SISO *' SIPO *' PISO *' PISO

4-bit Shift

Register

reg (1)-reg

(4)

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SISO: SERIAL IN SERIAL OUT :

Serial>in serial>out shi-t re!isters delay data by one cloc# ti7e -or each sta!e. 6hey illstore a bit o- data -or each re!ister. ; serial>in serial>out shi-t re!ister 7ay be one to 4bits in len!th lon!er i- re!isters or pac#a!es are cascaded.

TRUT" TABLEM

S C> ! S*5 R% 9999 9 1 9999 9 1 2 1999 9 9 9199 9 1 $ 1919 9

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SIPOM SERIAL IN PARALLEL OUT

; serial>in/parallel>out shi-t re!ister is si7ilar to the serial>in/ serial>out shi-t re!ister inthat it shi-ts data into internal stora!e ele7ents and shi-ts data out at the serial>out data>out pin. t is di--erent in that it 7a#es all the internal sta!es available as outputs. 6here-ore

a serial>in/parallel>out shi-t re!ister converts data -ro7 serial -or7at to parallel -or7at. --our data bits are shi-ted in by -our cloc# pulses via a sin!le ire at data>in belo the databeco7es available si7ultaneously on the -our Outputs Z;to Z*a-ter the -ourth cloc#pulse.

6he practical application o- the serial>in/parallel>out shi-t re!ister is to convert data -ro7serial -or7at on a sin!le ire to parallel -or7at on 7ultiple ires. Perhaps e illillu7inate -our L'*s 8Li!ht '7ittin! *iodes9 ith the -our outputs 8!A!B!C!D9.

6he above details o- the serial>in/parallel>out shi-t re!ister are -airly si7ple. t loo#s li#e

a serial>in/ serial>out shi-t re!ister ith taps added to each sta!e output. Serial data shi-ts inat SI8Serial nput9. ;-ter a nu7ber o- cloc#s equal to the nu7ber o- sta!es the -irst databit in appears at SO 8Z*9 in the above -i!ure. n !eneral there is no SO pin. 6he last sta!e8Z*above9 serves as SO and is cascaded to the ne(t pac#a!e i- it e(ists.

- a serial>in/parallel>out shi-t re!ister is so si7ilar to a serial>in/ serial>out shi-t re!isterhy do 7anu-acturers bother to o--er both types %hy not just o--er the serial>in/parallel>out shi-t re!ister 6hey actually only o--er the serial>in/parallel>out shi-t re!ister as lon! asit has no 7ore than &>bits. in/ serial>out shi-t re!isters co7e in !i!!er than&>bit len!ths o- 1& to to 4>bits. t is not practical to o--er a 4>bit serial>in/parallel>out shi-tre!ister requirin! that 7any output pins. See ave-or7s belo -or above shi-t re!ister.

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6he shi-t re!ister has been cleared prior to any data by CLR an active lo si!nal hichclears all type * ?lip>?lops ithin the shi-t re!ister. in/ serial>out shi-t re!ister 8not shon here9. On the -irst cloc# at 1 the data 1atSIis shi-ted -ro7 Dto !o- the -irst shi-t re!ister sta!e. ;-ter 2this -irst data bit is at !B.

;-ter it is at !C. ;-ter $it is at !D. ?our cloc# pulses have shi-ted the -irst data bit allthe ay to the last sta!e !D. 6he second data bit a 9is at !Ca-ter the 4th cloc#. 6he thirddata bit a 1is at !B. 6he -ourth data bit another 1is at !A. 6hus the serial data inputpattern 1911is contained in 8!D!C!B!A9. t is no available on the -our outputs. t illavailable on the -our outputs -ro7 just a-ter cloc# $to just be-ore . 6his parallel data 7ustbe used or stored beteen these to ti7es or it ill be lost due to shi-tin! out the Z*sta!eon -olloin! cloc#s to 8as shon above.

TRUT" TABLEM

APPLICATIONS

1 0o7parator desi!ned -or use in co7puter and lo!ical applications that require the

co7parison o- to 4>bit ords.UNIT VI

!

'% 9999

9 1 9999

1 2 1999

9 9199

1 $ 1919

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EPERIMENT NO. 19

3 > & *'0O*'R>$4LS13&

OBJECTIVE

6o veri-y operation o- the 3 to & decoder usin! 0 $413&.

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Sitchin! 6heory and Lo!ic*esi!n Operation o- 0 $4LS13& Re!ulated Poer Supply ?unction =enerator 0RO.

DESCRIPTION

a. ntroduction to e(peri7ent >3 7inb. 0onnection o- e(peri7ent and its veri-icationsc. '(peri7ental deter7ination o- 3 to & decoder by veri-yin! truth table.

; *ecoder is a co7binational circuit ith 7ultiple input 7ultiple output lo!ic

circuit that converts Pro!ra7d inputs into Pro!ra7d outputs here the inputs are lesser

in nu7ber than and output Pro!ra7s. 6he input data is !enerally has -eer bits than the

output bits there is one>to>one 7appin! -ro7 input Pro!ra7 ords into output Pro!ra7

ords. n a one>to>one 7appin! each input Pro!ra7 ord produces a di--erent output

Pro!ra7 ord.

6he !eneral structure o- a *ecoder circuit can be shon as -ollos. 6he enable inputs i-

present 7ust be asserted -or the *ecoder to per-or7 its nor7al 7appin! -unction.

Otherise the *ecoder 7aps all the input Pro!ra7 ords into a sin!le disabled output

Pro!ra7 ord. 6he correspondin! .0 nu7ber is $413&.

BLOC DIAGRAM:

a89 Outputs y89 to y8$9

a819

a829

3X8

DECODER

(74138)

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!1 !2a !2b

TRUT" TABLE:

Select nputs *ecoder Outputs

a829 a819 a89 y8$9 y89 y859 y849 y839 y829 y819 y89

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

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APPLICATIONS

*ecodin! is necessary in applications such as

1. *ata ,ultiple(in!.

2. $ se!7ent display and 7e7oryaddress decodin!.

UNIT-VIII

EPERIMENT NO. 11

* ?lip ?lop>0 $4LS$4 and AB ,aster Slave ?lip ?lop>0 $4LS$3.
http://en.wikipedia.org/wiki/Multiplexinghttp://en.wikipedia.org/wiki/Multiplexinghttp://en.wikipedia.org/wiki/Memoryhttp://en.wikipedia.org/wiki/Multiplexinghttp://en.wikipedia.org/wiki/Memory

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OBJECTIVE

6o veri-y the truth table o- * ?lip ?lop>0 $4$4 and AB ,aster Slave ?lip ?lop>0$4LS$3.

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Sitchin! 6heory andLo!ic *esi!n Operation o- 0 $4LS$3 and 0 $4LS$4 Re!ulated Poer Supply?unction =enerator 0RO.DESCRIPTION

a. ntroduction to e(peri7ent >3 7inb. 0onnection o- e(peri7ent and its veri-icationsc. '(peri7ental deter7ination o- * ?lip ?lop>0 $4$4 and AB ,aster Slave ?lip ?lop>0$4LS$3 by veri-yin! truth table.

BOOLEAN EPESSION:0haracteristic 'quation is !(K1) 7

LOGIC SYMBOL: TRUT" TABLE: S&

R&%&

C>(K=& &76&)

D !(K1)

1

1

9

9 9

1 1

1

d

q

IC

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APPLICATIONS1. ?lip>?lops and latches are used as data stora!e ele7ents.

2. * ?lip>?lop is a stora!e device used in re!ister.

3. ,aster slave AB ?lip>?lop is used in counter.

EPERIMENT NO. 12

*ecade 0ounter $4LS+

OBJECTIVE

6o construct and veri-y the or#in! o- a sin!le di!it decade counter usin! 0 $4+.

PRERE!UISITES

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"asic #noled!e about 'lectronic *evices and 0ircuits Sitchin! 6heory and Lo!ic*esi!n Operation o- 0 $4+ Re!ulated Poer Supply ?unction =enerator 0RO.

DESCRIPTION

a. ntroduction to e(peri7ent >3 7in.

b. 0onnection o- e(peri7ent and its veri-ications.

c. '(peri7ental deter7ination o- decade counter.

APPLICATIONS

*ecade 0ounter used in

1. ,ultiple(ersand *e>7ultiple(ers

EPERIMENT NO. 1

:niversal Shi-t Re!ister > $4LS1+4/+5.

OBJECTIVE

6o study the -olloin! applications o- the :niversal shi-t re!ister usin! 0 $4LS1+4/+5.

a. Shi-t Ri!ht Lo!icb. Shi-t Le-t Lo!icc. Parallel Load

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Sitchin! 6heory and Lo!ic*esi!n Operation o- 0 $4LS1+4/+5 Re!ulated Poer Supply ?unction =enerator 0RO.

DESCRIPTION

a. ntroduction to e(peri7ent >3 7inb. 0onnection o- e(peri7ent and its veri-ications

c. '(peri7ental deter7ination o- * ?lip ?lop>0 $4$4 and AB ,aster Slave ?lip?lop>0

$4LS$3 by veri-yin! truth table.

APPLICATIONS
http://en.wikipedia.org/wiki/Multiplexerhttp://en.wikipedia.org/wiki/Multiplexerhttp://en.wikipedia.org/wiki/Multiplexer

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1. ; shi-t re!ister is used -or 7ultiplyin! and division. - a binary nu7ber o- say "in.111 83$ *ec.9 is 7ultiplied by 2 the bits have to be le-t shi-ted one ti7e and thenu7ber ill then be "in. 111 8$4 *ec.9 and to divide by 2 the bits have to beri!ht shi-ted

EPERIMENT NO. 1$

&(1 ,ultiple(er $4151 and 2(1 *e7ultiple(er $4155

OBJECTIVE

6o veri-y the truth table o- a !iven & to 1 ,ultiple(er and 2 to 1 *e>,ultiple(er usin! 0$4151 and $4155 .

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Sitchin! 6heory and

Lo!ic *esi!n Operation o- 0 $4151/$4155 Re!ulated Poer Supply ?unction=enerator 0RO.

DESCRIPTION



c. '(peri7ental deter7ination o- & to 1 ,ultiple(er and 2 to 1 *e>,ultiple(er by

veri-yin! truth table.

; ,ultiple(er consists have a set o- and !ate hose outputs are connected to sin!le

or !ate "ecause o- this construction o- any "oolean -unction in a SOP -or7 can be easily

realiHed usin! 7ultiple(er. 'ach ;

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BLOC DIAGRAMM TRUT" TABLEM

819

829 839 N 849

859

89 8$9

S 89 S819 S829 enable

8S'L'06 L

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EPERIMENT NO. 1

R;, 8149 > 0 $4&+ usin! 8read and rite operation9.

OBJECTIVE

6o study the operation o- the R;, c$4&+.

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Sitchin! 6heory andLo!ic *esi!n Operation o- 0 $4151/$4155 Re!ulated Poer Supply ?unction=enerator 0RO.

DESCRIPTION



c. '(peri7ental deter7ination o- read and rite operation o- R;,.

BLOC DIAGRAM:

A77'(:9) D*5(:9)

D(:9)

C>

R&%&

R

; 1D4 Ra7 has -our data inputs *in 83M9 three control inputs 0l# Reset R and -our

data outputs. 6he control input R provides a 7echanis7 -or ritin! into or readin! -ro7

Ra7.%hen RG rite operation is per-or7ed and vive versa. 6he top priority is !iven to

Reset and then 0loc#.

16 x 4

RAM

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APPLICATIONS1. R;,)s are used in Personal 0o7puters.2. Lap 6ops.3. ,usic Players etc.

LAB SC"EDULEM

(A) LAB SC"EDULE: 6he lab schedule should be planned once in a ee#. 6he ee# isescheduled e(peri7ent should be co7pleted.

CYCLE 1:CYCLE 1

B+0/&% &&-1 &&-2 &&- &&-$ &&- &&-? ee#>$"1831>

129"28313>249"38325>

339

*e7o '(p.1 '(p.2 '(p.3 '(p.+ '(p.& test

"4833$>34&9"5834+>

39"

*e7o '(p.2 '(p.1 '(p.+ '(p.& '(p.1 test

"3 *e7o '(p.1 '(p.+ '(p.& '(p.1 '(p.2 test

"4 *e7o '(p.+ '(p.& '(p.1 '(p.2 '(p.1 test

"5 *e7o '(p.& '(p.1 '(p.2 '(p.1 '(p.+ test

CYCLE 2B+0/&% &&-1 &&-2 &&- &&-$ &&- &&-? ee#>$

"1 '(p.3 '(p.4 '(p. '(p.11 '(p.12 '(p.5 test

"2 '(p.$ '(p. '(p.11 '(p.12 '(p.5 '(p.4 test

"3 '(p.3 '(p.11 '(p.12 '(p.5 '(p.4 '(p. test

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"4 '(p.1 '(p.12 '(p.5 '(p.4 '(p. '(p.11 test

"5 '(p.+ '(p.5 '(p.4 '(p. '(p.11 '(p.12 test

(B) VIVA SC"EDULE: 6he viva schedule should be planned prior startin! to the labe(peri7ent.

ROUND -1B+0/&% &&-1 &&-2 &&- &&-$ &&-

"1"2"3 viva

"1"2"3 viva

"1"2"3 viva

"1"2"3 viva

"1"2"3 viva

ROUND -2B+0/&% &&-1 &&-2 &&- &&-$ &&-

S=1 viva

S=2 viva

S=3 viva

S=4 viva

S=5 viva

S=M Selected =roup ith a 7a(i7u7 o- or 12 students

SUGGESTED BOOS

1. Linear nte!rated 0ircuits>*. Roy 0hodhury ne ;!e international 8p9Ltd 3rd 'dition2&.

2. *i!ital ?unda7entals> ?loyd and AainPearson 'ducation &th edition25.3. Op>;7p Linear nte!rated 0ircuits>0oncepts ;pplications by

Aa7es,.?iore0en!a!e/Aaico2/e 2+.

WEB SITES

1. httpM//nptel.iit7.ac.in/courses/11$13/2. httpM//.nprcet.or!/e\2content/,isc/e>Learnin!/'''/\2N';R/''2254\2>

\2Linear\2nte!rated\20ircuits\2and\2;pplications.pd-3. httpM//ho7e.co!eco.ca/rpaisley4/L,555.ht7l4. httpM//electronicsclub.in-o/555ti7er.ht7
http://nptel.iitm.ac.in/courses/117106030/http://www.nprcet.org/e%20content/Misc/e-Learning/EEE/II%20YEAR/EE2254%20-%20Linear%20Integrated%20Circuits%20and%20Applications.pdfhttp://www.nprcet.org/e%20content/Misc/e-Learning/EEE/II%20YEAR/EE2254%20-%20Linear%20Integrated%20Circuits%20and%20Applications.pdfhttp://home.cogeco.ca/~rpaisley4/LM555.htmlhttp://electronicsclub.info/555timer.htmhttp://nptel.iitm.ac.in/courses/117106030/http://www.nprcet.org/e%20content/Misc/e-Learning/EEE/II%20YEAR/EE2254%20-%20Linear%20Integrated%20Circuits%20and%20Applications.pdfhttp://www.nprcet.org/e%20content/Misc/e-Learning/EEE/II%20YEAR/EE2254%20-%20Linear%20Integrated%20Circuits%20and%20Applications.pdfhttp://home.cogeco.ca/~rpaisley4/LM555.htmlhttp://electronicsclub.info/555timer.htm

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EPERTSH DETAILS

6he e(pert details hich have been 7entioned belo are only a -e o- the e7inent ones#non nternationally $&13+.

PhoneM F+1>31>25&>2512 8O9

?a(M F+1>31>25&2542 2+$2

'7ailM roypailyiit!.ernet.in

2. Pro-. =aurav 6rivedi *eptt. o- '0' 6 =uahati.

O--ice ;ddressM Roo7

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O< Li!ht. Li!ht is sitched O< at ni!ht and O?? in the 7ornin! hours.

PRERE!UISITES


DESCRIPTION



c. '(peri7ental deter7ination o- relay operation and then li!ht control.

COMPONENTS RE!UIRED:

1# resistor (2

4.$# resistor (1

Photo resistor (1

1& oh7 resistor

L,$41 opa7p ic

L'* 8any color9 (1

ju7per ires

+v battery

; breadboard

WORING

%hen li!ht -alls on the L*R then its resistance decreases hichresults in increase o- the volta!e

at pin 2 o- the 0 555.

0 555 has !ot co7parator inbuilt hich co7pares beteen the input volta!e -ro7 pin2 and

1/3rd o- the poer supply volta!e

%hen input -alls belo 1/3rd then output is set hi!h otherise it is set lo.

Since in bri!htness input volta!e rises so e obtain no positive volta!e at output o- pin 3 to

drive relay or L'* besides in poor li!ht condition e !et output to ener!iHe.

LDR

t is a special type o- resistor hose value depends on the

bri!htness o- li!ht hich is -allin! on it.

t has resistance o- about 17e!a oh7 hen in total dar#ness

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but a resistance o- only about 5# oh7s hen bri!htness illu7inated.

t responds to a lar!e part o- li!ht spectru7.

TRANSFORMER

?or +v ac poer supply e can use step don trans-or7er in order to convert 23 volt to + volt.

P.C.B

%ith the help o- P.0." it is easy to asse7ble circuit ith neat and clean end products.

P.0." is 7ade o- "a#elite ith sur-ace pasted ithcopper trac#>layout.

0onnection pin is passed throu!h the hole and is soldered.

F6: C'05 D+6'+, * D+' S&%*' 5%6 #$1 IC

F6: C'05 D+6'+, * D+' S&%*' 5%6 IC

APPLICATIONS

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6he applications are

1. t can be used -or =;6' li!hts controllin!.2. t can also be used as a ;uto7atic street li!hts control syste7.

EPERIMENT NO. 2

TITLE: A5*,+0 +&' + >&=&> 0*'*>>&'.

OBJECTIVE

6he 7ain objective o- this e(peri7ent is to desi!n and veri-y the operation andapplication o- a si7ple econo7ical and versatile circuit sitches on the 7otor pu7p hen aterin the overhead tan# -alls belo the loest level and turns it Yo--) hen the tan# is -ull.,oreover i- the pu7p is runnin! dry due to lo volta!e it sounds an alar7 to alert you tositch o-- the controller circuit 8and hence the 7otor pu7p9 to avoid coil burn and poer

asta!e.

PRERE!UISITES

"asic #noled!e about 'lectronic *evices and 0ircuits Operation o- 0 $41Re!ulated Poer Supply 0RO.

DESCRIPTION

a. ntroduction to e(peri7ent >3 7inb. 0onnection o- e(peri7ent and its veri-ications

c. '(peri7ental deter7ination o- O< and O?? -unctionin! o- the circuit6his si7ple econo7ical and versatile circuit sitches on the 7otor pu7p hen

ater in the overhead tan# -alls belo the loest level and turns it Yo--) hen the tan# is-ull. ,oreover i- the pu7p is runnin! dry due to lo volta!e it sounds an alar7 to alertyou to sitch o-- the controller circuit 8and hence the 7otor pu7p9 to avoid coil burn andpoer asta!e.

6he ater>level controller circuit 8see ?i!. 19 is built around 0 555 8029 to7onitor the ater level in the overhead tan# and Yon)/Yo--) status o- the 7otor throu!h theinverter and driver circuits. 6he transistor sitch circuitry 7onitors the -lo o- ater and

raises an alar7 i- the pu7p runs dry.

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F6: C'05 D+6'+, * +&' + >&=&> 0*'*>>&' 5%6 IC

W*'6 * A5*,+0 +&' + >&=&> 0*'*>>&':

/ %e #no the property o- 555 ti7er 0 i.e. its output !oes @=@ hen volta!e at the second pin8tri!!er pin9 is less than 1/3 cc.

;lso e can reset bac# the 0 by applyin! a LO% volta!e at the 4th pin 8Reset pin9.

n this project 3 ires are dipped in ater tan#. Let us de-ine to ater levels> "otto7 8L9 level and6op 8@9 level. One o- the ire or probe is -ro7 cc hich can be called as 7iddle level 8,9.

F6.?: P*%* * /'&& %&%*'% ,&'

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6he probe -ro7 botto7 level is connected to the tri!!er 82nd9 pin o- 555 0. So the volta!e at

2nd pin is cc hen it is covered by ater.

. %hen ater level !oes don the 2nd pin !ets disconnected8untouched9 -ro7 ater i.e.olta!e at the tri!!er pin beco7es less than cc. 6hen the output o- 555 beco7es hi!h.

6he output o- 555 is -ed to a SL 1 transistor it ener!iHes the relay coil and the ater pu7p set is turned O

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1. t can be used -or ater level control.2. t can also be used as a ;uto7atic -luid level control syste7 in ndutries.

CONCLUSION

6hus by usin! this si7ple arran!e7ent e can save asta!e o- ater andelectricity. t is very i7portant -or us to control the use o- natural source o- ener!y. "yusin! this circuit e can solve our purpose very easily.

REFERENCE

1. .eboo#brose.co72. .electronics-oryou.co73. .di!ite#.in4. .sridi!ite#.co75. httpM//.buildcircuit.co7/ldr>en!ineer/. httpM//.tal#in!electronics.co7/projects/5\2>\2555\20ircuits/5>

5550ircuits.pd-$. httpM//.buildcircuit.co7/ldr>en!ineer/&. httpM//.instructables.co7/id/*;RBL=@6>S'";S'*>Othe>L,$41>

opa7p/;LLS6'PS+. httpM//.technolo!ystudent.co7/elec1/opa7p3.ht7
http://www.sridigitek.com/http://www.buildcircuit.com/ldr-engineer/http://www.talkingelectronics.com/projects/50%20-%20555%20Circuits/50-555Circuits.pdfhttp://www.talkingelectronics.com/projects/50%20-%20555%20Circuits/50-555Circuits.pdfhttp://www.buildcircuit.com/ldr-engineer/http://www.instructables.com/id/DARKLIGHT-SENSOR-BASED-ON-the-LM741-opamp/?ALLSTEPShttp://www.instructables.com/id/DARKLIGHT-SENSOR-BASED-ON-the-LM741-opamp/?ALLSTEPShttp://www.technologystudent.com/elec1/opamp3.htmhttp://www.sridigitek.com/http://www.buildcircuit.com/ldr-engineer/http://www.talkingelectronics.com/projects/50%20-%20555%20Circuits/50-555Circuits.pdfhttp://www.talkingelectronics.com/projects/50%20-%20555%20Circuits/50-555Circuits.pdfhttp://www.buildcircuit.com/ldr-engineer/http://www.instructables.com/id/DARKLIGHT-SENSOR-BASED-ON-the-LM741-opamp/?ALLSTEPShttp://www.instructables.com/id/DARKLIGHT-SENSOR-BASED-ON-the-LM741-opamp/?ALLSTEPShttp://www.technologystudent.com/elec1/opamp3.htm

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