HyperTransport™ HyperTransport™ Technology Technology

INTRODUCTIONINTRODUCTION

WHAT IS HYPER TRANSPORT WHAT IS HYPER TRANSPORT TECHNOLOGY?TECHNOLOGY?

CAUSES LEADING TO DEVELOPMENT CAUSES LEADING TO DEVELOPMENT OF HYPER TRANSPORT TECHNOLOGYOF HYPER TRANSPORT TECHNOLOGY

I/O bandwidth problemI/O bandwidth problem High pin countHigh pin count High power consumtionHigh power consumtion

The I/O Bandwidth The I/O Bandwidth Problem Problem

While microprocessor performance While microprocessor performance continues to double every eighteen continues to double every eighteen months, the performance of the I/O bus months, the performance of the I/O bus architecture has lagged, doubling in architecture has lagged, doubling in performance approximately every three performance approximately every three years.years.

Every time processor performance Every time processor performance doubles, latency only increases by a factor doubles, latency only increases by a factor of 1.2.of 1.2.

The I/O Bandwidth The I/O Bandwidth ProblemProblem

The HyperTransport™ The HyperTransport™ Technology Solution Technology Solution

HyperTransport is intended to support HyperTransport is intended to support “in-the-box” connectivity“in-the-box” connectivity

High-speed, high-performance, point-High-speed, high-performance, point-to-point link for interconnecting to-point link for interconnecting integrated circuits on a board. integrated circuits on a board.

Max signaling rate of 1.6 GHz on each Max signaling rate of 1.6 GHz on each wire pair, a HyperTransport technology wire pair, a HyperTransport technology link can support a peak aggregate link can support a peak aggregate bandwidth of 12.8 Gbytes/s. bandwidth of 12.8 Gbytes/s.

HyperTransport™ Design HyperTransport™ Design GoalsGoals Improve system performance Improve system performance

- - Provide increased I/O bandwidth Provide increased I/O bandwidth - Ensure low latency responses - Ensure low latency responses - Reduce power consumption - Reduce power consumption

Simplify system design Simplify system design

- Use as few pins as possible to allow smaller - Use as few pins as possible to allow smaller packages and to reduce cost packages and to reduce cost

Increase I/O flexibility Increase I/O flexibility - Provide a modular bridge architecture - Provide a modular bridge architecture

HyperTransport™ Design HyperTransport™ Design GoalsGoals

Maintain compatibility with legacy Maintain compatibility with legacy systems systems - Complement standard external buses - Complement standard external buses - Have little or no impact on existing - Have little or no impact on existing operating systems and drivers operating systems and drivers

Ensure extensibility to new system Ensure extensibility to new system network architecture (SNA) buses network architecture (SNA) buses

Provide highly scalable multiprocessing Provide highly scalable multiprocessing systems systems

Device Configurations Device Configurations

HyperTransport technology creates a HyperTransport technology creates a packet-based link implemented on two packet-based link implemented on two independent, unidirectional sets of signals. independent, unidirectional sets of signals. It provides a broad range of system It provides a broad range of system topologies built with three generic device topologies built with three generic device types: types:

Cave—A single-link device at the end of the chain. Cave—A single-link device at the end of the chain. Tunnel—A dual-link device that is not a bridge. Tunnel—A dual-link device that is not a bridge. Bridge—Has a primary link upstream link in the Bridge—Has a primary link upstream link in the

direction of the host and one or more secondary direction of the host and one or more secondary links. links.

Device ConfigurationsDevice Configurations

Signal PinsSignal Pins

Protocol LayerProtocol Layer All HyperTransport technology commands are All HyperTransport technology commands are

either four or eight bytes long and begin with a 6-either four or eight bytes long and begin with a 6-bit command type field. The most commonly used bit command type field. The most commonly used commands are Read Request, Read Response, and commands are Read Request, Read Response, and Write. Write.

Session LayerSession Layer

Link Width OptimizationLink Width Optimization

- All 16-bit, 32-bit, and - All 16-bit, 32-bit, and asymmetrically-sized asymmetrically-sized configurations must be enabled configurations must be enabled by a software initialization step.by a software initialization step.

- After a cold reset BIOS - After a cold reset BIOS reprograms all linked to the reprograms all linked to the desired widthdesired width

HyperTransport HyperTransport EnvironmentsEnvironments

CONCLUSIONCONCLUSION

Hyper Transport technology is a new Hyper Transport technology is a new high-speed, high-performance, point-high-speed, high-performance, point-to-point link for integrated circuits. It to-point link for integrated circuits. It provides a universal connection provides a universal connection designed to reduce the number of designed to reduce the number of buses within the system, provide a buses within the system, provide a high-performance link for embedded high-performance link for embedded applications, and enable highly applications, and enable highly scalable multiprocessing systems. scalable multiprocessing systems.

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