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Page 1: HP Archive · 2018-04-15 · HP Archive This vintage Hewlett ... Block coding, suchasthe 100 Mbit/s, 4B/5B standard,is usedinFDDI LAN applications. ... ATM Cell Mapping - SONET/SDH

HP Archive

This vintage Hewlett Packard document was preserved

and distributed by

www. hparchive.com

Please visit us on the web !

Thanks to on-line curator: Istvan Novak

Page 2: HP Archive · 2018-04-15 · HP Archive This vintage Hewlett ... Block coding, suchasthe 100 Mbit/s, 4B/5B standard,is usedinFDDI LAN applications. ... ATM Cell Mapping - SONET/SDH

Understanding EvolvingATM Standards andATM Design Verification

Fli;' HEWLETT~~ PACKARD

Rick Tinsley

TranSwitch Corporation8 Progress DriveShelton, CT 06484Phone: (203) 929-8810Fax: (203) 926-9453

Dan Upp

TranSwitch Corporation8 Progress DriveShelton, CT 06484Phone: (203) 929-8810Fax: (203) 926-9453

1993High Speed DigitalSystems Design & TestSymposium

© Hewlett-Packard Company 1993

Page 3: HP Archive · 2018-04-15 · HP Archive This vintage Hewlett ... Block coding, suchasthe 100 Mbit/s, 4B/5B standard,is usedinFDDI LAN applications. ... ATM Cell Mapping - SONET/SDH

Abstract

In the last two years, ATM hasbecome the fastest evolvingcommunication standard.Understanding where thestandard is in its developmentcan become a significant barrierto designing ATM-compatibleequipment. This paper describesthe latest advancements in thedevelGpment ofATM standardsand discusses tools that canprovide ATM design verification.

Authors

Rick Tinsley

Current Activities:Rick Tinsley is Director ofMarketing responsible forTranSwitch's ATM product line.

Author Background:Rick received his BSEE fromRensselaer PolytechnicInstitute and MBA from theUniversity of Dallas. Formerlywith Texas Instruments, heheld various marketing, sales,and business developmentpositions. Prior to TI, he wasan Analog Designer at GeneralElectric.

DanUpp

Current Activities:Dan Upp is Vice President ofTechnology Development anda founder of TranSwitchCorporation.

Author Background:Dan received his BSEE andMSEE from Ohio StateUniversity and worked onsatellite communications systemsand antenna array systems atthe OSU ElectroScience Labs.Subsequently, he was employedby North Electric Co. in thehardware design of the DSS-1(later referred to as the ITT1210) switching system.

FliiiW HEWLETT~~ PACKARD

Dan spent ten years at theITT Advanced TechnologicalCenter where he was Directorof Exploratory Systems,responsible for VLSI, hardware,and software developmentfor packet switching, telephoneswitching, LAN and PABXproducts.

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #1

Understanding Evolving ATMStandards and ATM Design

Verification

Slide #3

Current Technology

• Circuit switched- Fixed bandwidth- Low latency

• Packet switched- Simpler multiplexing- Delay variations and high latency

Fl., HEWLETT~PACKARO

Slide #2

Outline

• Evolution of ATM Technology

• BISON Protocol Reference Model- Physical Layer- ATM Layer- ATM Adaptation Layer

• Summary & References

This paper explains the rationale for the develop­ment ofATM as a new, fast-packet networkingtechnology. ATM standards are reviewed, includingphysical layers, the ATM layer, and the ATMadaptation layer. Reference material is listed onthe last two pages.

7-3

Current network technology generally falls intotwo classifications: circuit-switched technologyin the traditional telephony arena and packetswitching in the LAN/data networking community.

Circuit switching is characterized by fixedgraduations of bandwidth, such as a 64kbit/s voicechannel with prescribed subrate and superratemultiplexings. Circuit switching requires acontinuous hold of the physical path for eachconnection, regardless of actual bandwidth used.This provides very low latency, and thus excellentperformance for voice and other isochronousinformation.

Packet switching is more efficient with respect tobandwidth utilization since access is limited to thetime required to transmit a given packet or frame.Switching and multiplexing are also simpler sincerouting is software oriented, but much slower as aresult. Packet-or frame-oriented protocols includeX.25, Frame Relay, Ethernet, Token Ring, andFDDI. All are characterized by higher latency anddelay variations as compared to circuit switching.

r~3 HEWLETTa:~ PACKARD

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #4

What Would Be the Characteristicsof an Ideal Network Technology?

Slide #5

ATM: A New Network Technology

• Routable at smallest possible level

• Low latency

• Common, scaleable access

• Global interconnectivity

• 53-byte cell

• All types of data

• Transport & switching

• International standards

Call Header(5 Bytes)

Cell Payload(48 Bytes)

Ifyou could define an ideal network technology,you would combine the best features of existingcircuit and packet standards for optimum efficiency.To obtain maximum utilization of network band­width, you should route information at the smallest"molecular" level, or in other words, you should usevery small, fixed-sized packets. This allows dynamicmultiplexing or grooming ofmultiple signals on thesame physical media. Small, fixed-size packets alsoenable the short, predictable delays required byconstant bit-rate services.

Such a network technology would be well suitedto all types of data, including voice, video, and burstydata. To be successful, governing standards wouldhave to be internationally accepted and global inscope.

7-4

Asynchronous Transfer Mode (ATM) is a newnetworking technology based on internationalstandards. It is intended and expected to besuitable for all types of information and providesthe infrastructure for broadband networks beyondthe year 2000.

With ATM, all information transfers are performedusing standard 53-byte cells, each havingprescribed structures and methods of formation.All switching and multiplexing is done one cellat a time with each cell being routed independently.All information required by the network to relaya cell from node to node is contained in the cellitself. Bandwidth and access may be dynamicallyallocated.

Fli;' HEWLETTa:~ PACKARD

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #6 Slide #7

CellHeader

CellPayload

ATM Cell FormatBIT

87654321

GFC I VPI

VPI I VCI

VCI

VCI I PT ICLP

HEC

* * *

1 OCTET

2

3

4

5

6

7

8

52

53

BISON: Broadband IntegratedServices Digital Network

• Driven by CCITI and ANSI T1 Sl

• High bandwidth, multimedia platform

• Connection-oriented service

The ATM cell header is composed ofthe followingfields:

GFC Generic Flow Control (UNI only)Note: The GFC is replaced with anadditional 4 bits ofVPI at NNI.

VPI Virtual Path Identifier

VCI Virtual Circuit Identifier

PT Payload Type

CLP Cell Loss Priority

HEC Header Error Control (8-bit CRC).

The remaining 48 bytes form the cell payload.

7-5

ATM has been chosen by standards committees,including ANSI Tl and CCITT SG XVIII, as anunderlying transport technology within manyBroadband Integrated Services Digital Network(BISDN) protocol stacks. Transport technologyrelates to the switching and multiplexing techniquesat the data link layer.

FA3 HEWLETTa:~ PACKARD

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #8

BISON Protocol Reference Model

Slide #9

ATM Physical Layer

PlaneManagement

LayerManagement

PlaneManagement

LayerManagement

Implementing an ATM bearer service requires thespecification of an ATM layer and a related physicallayer. These two layers are service-independentand contain functions applicable to all upper layers.

The ATM Adaptation Layer (AAL) adapts theATM bearer service to provide various networkingservices including Constant Bit Rate (CBR) andVariable Bit Rate (VBR) services.

The user plane provides the transfer of user­application information. The control plane dealswith call establishment, call release, and otherconnection control functions. The managementplane provides management functions and allowsthe interchange of information between the userplane and control plane.

7-6

The ATM Physical Layer consists of two sublayers:Transmission Convergence (TC) and PhysicalMedia Dependent (PMD). ATM cell mappingscorrespond to existing physical layer standardssuch as SONET and SDH (synchronous opticalnetworking hierarchies for North Americaand Europe, respectively), DS3 and E3 (level 3asynchronous digital interface standards),Block Coding, and others.

The PMD sublayer deals with bit transmissionover a physical link, such as fiber optic cable, coax,or copper twisted pair. Issues and specifications,such as line coding, electro-optic conversion, pulsemasks, and clock recovery, fall within this sublayer.

Transmission Convergence generates and receivestransmission frames and contains all the functionsnecessary to adapt the service offered by thephysical layer to the service required by the ATMlayer. In other words, the TC sublayer provides53-byte cells to the ATM layer. All overheadfunctions associated with the transmission formatare included.

Cell delineation is performed by the TC sublayerbased on either explicit control signals or byidentification of the HEC. For some physical layerstandards such as SONET, the ATM cell payloadmust be scrambled prior to transmission anddescrambled upon reception. Also included in theTC sublayer are HEC generation and verification.This is the 8-bit Cyclic Redundancy Check (CRC)that forms the fifth byte ofthe ATM cell header.

r~~ HEWLETT~~ PACKARD

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #10

ATM Physical Layers

• SONET/SOH

• Asynchronous

• Block Coded

The physical layers currently defined to transportATM cells fall into three categories: synchronous,asychronous, and block coded. The synchronousand asynchronous standards are borrowed fromexisting telecom transmission specifications.Block coding, such as the 100 Mbit/s, 4B/5Bstandard, is used in FDDI LAN applications.One of the strengths of ATM is that all switchingand multiplexing is compatible via 53-byte cells,regardless of which physical layer is used totransport the cells. Physical layer compatibilityis only necessary on a given physical link. Forthis reason, a variety of different physical layers,including some yet to be defined, may be deployedin production networks to address different priceand performance requirements.

At present, most development work is directed atATM cell mappings for various rates of the SONET/SDH hierarchy, various asynchronous standardssuch as DS3 and E3, and the 100 Mbit/s blockcoded protocol.

Slide #11

ATM Cell Mapping - SONET/SDHSTS-1 POHSTS·3c POHSTS-12c POH

~86 Bytes260 Bytes

~1043 BytesJl IHI IHI I

t~~..!:!.

ATM cell 9 Rows~

!HI !HI I .. · !H4

"i3-Z4

... IHT"""-Z5

SONET (or SDH as it is referred to outside NorthAmerica) is a set of international optical networkinterface standards enabling global networkinterconnection. It is expected that SONET/SDHinterfaces will provide a means for attaining globalinteroperability in the long run for both public andprivate networks.

ATM cells are mapped into the SynchronousPayload Envelope (SPE) in a continuous fashion asshown. Upon termination of the SONET frame,cell boundaries are identified and delineated byobserving the REC sequence. The cell payload isscrambled to improve the efficiency of the RECframing algorithm, as well as randomizing the datafor more reliable transport.

rJ~ HEWLETT~~ PACKARD

7-7

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #12

HP 75000 Series 90 ATM Analyzer

Slide #13

ATM Cell Mapping - E3

~ 530 Byte Payload

\\ ..I

125 ~S

lIP's ATM analyzer, shown above, can analyzeATM cell streams over a variety of physicalinterfaces including DS-3, SONET/SDH at 155 and622 Mbitls and Pure-ATM at 155 Mbitls. Physicallayer design verification can be performed to ensurethat the physical transport system is capable oftransmitting ATM cell streams. Physical layer testsinclude: exercising all of the SONET/SDH overheadfunctionality, all the PLCP overthead functionalitywithin the DS-3 mapping, and physical OAMfunctionality within the Pure-ATM cell stream.

7-8

Although SONET/SDH is considered the preferredtransport for ATM cells, it is not yet widelydeployed. As a result, ATM cell mappings havebeen defined for the traditional PlesiochronousDigital Hierarchy (PDH) or asynchronoustransmission standards. E3 is a 34.368 Mbitlsstandard that is used in Europe and elsewhere.A new frame structure, shown above, is defined,whereby seven overhead bytes are followed by tencontiguous ATM cells. The cells are delineatedby identifying the HEC within each cell. The cellpayloads are scrambled to provide security againstfalse cell delineation and cell payload replicatingthe frame alignment word.

Similar mapping has been proposed for otherasynchronous and plesiochronous rates.

Fli;' HEWLETT~~ PACKARD

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #14

100 Mbit/s Private UNI Interface

Slide #15

ATM Layer

• Less complex than SONET/SOH

• FOOl PMO Specification

• 48/58 line coding - 125 Mbaud line rate

• Explicit asynchronous cell delineation

PlaneManagement

LayerManagement

Since a private User-Network Interface (UNI)does not require the operations and maintenancecomplexity (nor the link distance provided bytelecom standards, such as SONET/SDH), aLAN-like standard has been defined. The100 Mbitls standard is based on FDDI physicallayer specifications and is intended to use multimodefiber and eventually copper. Unlike the varioustelecom standard cell mappings, the 100 Mbitlsinterface specifies cell delineation based on explicitcodes preceding each 53-byte cell. The celltransmission rate is fully asynchronous, and idlecodes are sent continuously when no traffic exists.The 100 Mbitls standard is an economical physicalinterface for lower performance LAN applications.

7-9

The ATM Layer provides transparent andsequential transfer offixed-size data unitsbetween source and destinations with an agreedupon Quality of Service (QOS) and throughput.The ATM layer is service-independent meaningthat all information transfers utilize the same cellformats and procedures.

FA3 HEWLETT~!II PACKARD

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #16

Functions of the ATM Layer

• Cell Construction

Slide #17

ATM NetworkingConnection Identifiers

• Connection Management

• Cell Rate Adaptation

• Switching and Multiplexing

• Performance Monitoring & Network Operation

• Generic Flow Control

Physical Layer Connection--------+--_....._'"

-------i-----..-~

_______+-__---lI~~

VCla

VClb

The functions ofthe ATM Layer are numerous andare categorized as follows:

1. Cell Construction2. Connection Management

Connection Assignment/Removal3. Cell Rate Adaptation

Unassigned Cell GenerationlExtraction4. Switching and Multiplexing

Cell ReceptionCell Header ValidationCell RelayingCell ForwardingCell Multiplexing/DemultiplexingCell Copying

5. Performance Monitoring & NetworkOperationDelay HandlingCell Loss Priority HandlingUsage Parameter ControlExplicit Forward Congestion NotificationCell Payload Type Discrimination

6. Generic Flow control

With ATM cell multiplexing, multiple informationtransfers may exist simultaneously on a givenphysical link. For this reason, it becomes necessaryto distinguish between different transfers in alogical fashion.

A Virtual Channel eVC) is the basic unit ofATMswitching and refers to an individual logicalcircuit. VCs are distinguished by a VirtualChannel Identifier evCI), which is a routing fieldin the header of each cell. VCIs are definedunidirectionallyon a link-by-link basis.

A Virtual Path (VP) is a logical association orbundle ofVCs. The Virtual Path Identifier (VPI)field in the header of each cell is used to distinguishbetween different VPs.

r~3 HEWLETT~~ PACKARD

7-10

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #18

ATM Switch Operation

Slide #19

Switch Performance IssuesPhysicalMedium

Switch

PhysicalMedium

• Multiple cells will rQute into same output

• Statistical cell arrival times

• Queuing has performance effects- Cell delay variation- Cell loss probability

In ATM networking, the switching function relatescells received on every port to the destination outletport number and VPI or VCI number. The relationsbetween the VPI/VCI assignments for a given inletport and the VPI/VCI assignments for each outletport are established as part of call setup.

Switching may be performed on the basis of VirtualPaths or Virtual Channels. With Virtual Pathswitching, Virtual Paths are not demultiplexed; cellsare routed to outlet ports based only on VPI number.With Virtual Channel switching, Virtual Pathsare demultiplexed and cells are routed based oncombinations ofVPI and VCI numbers.

Since cells from multiple inlet ports may route tothe same outlet port and the arrival time of allincoming cells is of a statistical nature, queuing isrequired to resolve the inevitable contention bymultiple cells for the same outlet port. Cell queuesare normally implemented in first-in first-out(FIFO) fashion and this produces two performanceeffects: cell delay variation and cell loss probability.Cell delay variation is a function of statistical FIFOlength, while cell loss probability occurs due to FIFOoverflow. In a simplistic sense, a tradeoff existsbetween cell delay variation and cell loss probabilityin an ATM switch.

Switch architects must balance traffic managmentparameters, such as average cell rates, peak cellrates, and burst duration per VPI/VCI, withrequired cell delay variation and cell-loss probabilitylimits for proper network operation.

Fli.. HEWLETTIt.:~ PACKARD

7-11

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #20 Slide #21

Network Connections ATM Analyzer Test Configurations

SWITCH SWITCH

ATM ATM ATM serviceTesler cell Terminal service T I

Slream Adapler es er

VPI

VCI

NNINNIt

UNI

Subscriber

VPIVCI

A Virtual Channel Connection (VCC) is an end-to­end connection formed by concatenating a series ofVC links. Grade-of-Service (GOS), bandwidth, celldelay, and other traffic parameters are negotiatedand allocated for each VCC.

A Virtual Path Connection (VPC) is an analogousconcatenation ofVP links. A VPC must sustain theGOS of the highest VCI which it contains.

The ATM analyzer, a VXI-based measurementsystem, can be configured by its user to performa variety of ATM design verification functions.It can be used to verifY the ATM-layer functionsperformed by an ATM switch including: cellswitching, cell performance analysis, and cellcongestion evaluation. ATM Optical Loadgenerators can be used to overload the ATM switch.

The ATM Analyzer's terminal adapter testingcapabilities will be discussed later in thispresentation.

Fli.. HEWLETTa:~ PACKARD

7-12

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #22 Slide #23

ATM Adaptation Layer AAL Protocol StructureSAP

SAP

CS

SAR

sscs

CPSC

Primitives

Segmentadon 8fld Reassembly(SAR)

SAR·POU

CPCS-POU

SAR-SDU

1Com~~Parl

AAl

LayerManagement

PlaneManagement

IAU Common Part IL~1..1 SAR I

ATM

PHY

The ATM Adaptation Layer (AAL) defines theprocesses by which network terminal equipmentsegments user information into standard dataunits suitable for transport by the ATM Layer.The AAL matches diverse service requirementsto the common format of an ATM cell payload.Networking efficiency is high since all types ofinformation may utilize common resources andprotocols for switching, multiplexing and physicallayer mapping.

The VBR service AAL protocol structure is shown.The Service Specific Convergence Sublayer(SSCS) may optionally provide services or maybe null. Services of the SSCS include assured andnonassured data transport. The CPCS sublayerconverts user information of an indeterminedlength into standard packets or into CS-PDUs tobe segmented. The SAR sublayer in turn segmentsCS-PDU packets into 48-byte data units which formthe payload ofATM cells.

The sublayering ofthe AAL depends on theservice; in particular, CBR and VBR servicesare handled separately.

Fli;' HEWLETT~~ PACKARD

7-13

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #24

ATM Adaptation Layers

AAl1 I AAL2 AAl3 I AAL4 IAAL5

T1mlng relationbetween source Required Not Requiredand destination

Bit rate Constant I Variable

Connection Connection-oriented Iconnecuo""lconnecuonmode lees ~rlented

Multiple AALs have been defined to addressvarious requirements as shown. AAL1 is fortransfer of audio, continuous bit rate video, andother services having a constant rate related tonetwork timing. AAL2 is used to transport variablebit rate information which has timing related tonetwork timing. AAL3/4 is used for transport ofdata, MPEG compressed (bursty) video. AAL5 isan alternative data transfer methodology which hasbeen promoted by commercial LAN interests.

Slide #25

Adaptation Layer Verification

ATMTerminal service serviceAdapter Tester

L..-_.r--~

Testing higher layer ATM protocols can beaccomplished using either the HP ATM Analyzeror an HP Broadband Protocol Tester.

HP's ATM analyzer provides design verfication oftheAAL type 0, type 1, type 3, type 4 and type 5 adaptationlayers. Included in the test suite is functional verifi­cation ofthe service segmentation and reassemblyprocess and verification ofthe ATM adaptationprotocols.

For testing above the ATM Layer, HP will introducethe HP Broadband Protocol Tester in April, 1993. Thenew test system is designed to help you develop Broad­band switches, network equipment &Ild networks.This tester is also the first DUAL-PORT, Broadbandtester that provides fully BI-DIRECTIONAL andREAL-TIME measurements of:

• Higher-layer Broadband protocols• Switch performance throughput• Conformance testing

The tester also provides verification for all AALtypes 3/4 and 5.

B-ISDN services testing includes:• User network signalling (Q.93B, ATM Forum)• Connectionless services (SMDS, CBDS, and

Lcls/1.364)• Limited test capabilities for the ATM layer

and the physical layers

The HP B-ISDN protocol tester is packaged as eithera VXI-based system or as a self-contained portablesystem.

FA3 HEWLETTa:~ PACKARD

7-14

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #26

Segmentation & ReassemblyAAL3/4

a.:C;;;JHL....,;C;;'P---ll Lc:;;,;H.......;;;CP---J *. * CH CP cell

Slide #27

ICH CP

tEOM

••• I CH CP

tEOM

Cell

The AAL3/4 segmentation and reassembly processis illustrated. The CPCS-PDU is segmented intocontiguous groups of 44 bytes. A 2-byte headerand a 2-byte trailer are appended to the 44 bytesforming a SAR-PDU or ATM cell payload. TheSAR header and trailer contain information relat­ing to reassembly and cell payload error checking.

AAL5, which has also been referred to as SimpleEfficient Adaptation Layer (SEAL), was developedby the computer and datacom community. TheBISDN AAL3/4 protocol previously proposed forVBR traffic was perceived as being incomplete andinefficient for data communications. As a result,AAL5 was proposed particularly for local usage.AAL5 uses the full 48 bytes of cell payload and hasno'SAR-PDU header or trailer. Reassembly is basedon VCI only and there is no MID field as in AAL3/4.One bit in the Payload Type field in the ATM cellheader is used to distinguish between End-of­Message (EOM) cells and all others.

Fli.. HEWLETT~~ PACKARD

7-15

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #28

AAL Common Part Format

pg~~~:~er I AAL3/4 I Trailer

~ Info ~1 1 2 0-3 1 1 2

C Octets ---------;~~

Slide #29

AAL SAR Format

AAL3I4 SAR-PDU

2 bytes 44 bytes 2 bytes

Header Segmentation Unit Trailer

51 ISN IMID PL I CRe

AAL5

Us... Data: 0-05535 Octets

Trailer

~ Octets

AAL5 SAR-PDU

48 bytes

Segmentation Unit

The CPCS-PDU or packet formats for AAL3/4 andAAL5 are shown above. The AAL3/4 informationfield is padded to a multiple of4 bytes and bracketedby a header and trailer. Payload error checking isperformed by a 10-bit CRC within each cell, not atthe packet level. The BAsize field indicates thesize of the packet such that upon reception of thefirst cell, the amount of information to follow isdetermined.

An AAL5 packet has no header, only a trailer. Thelength of the packet is not known until the final cellis sent, or is received as the case may be. Within thetrailer is a 32-bit CRC covering the entire packet.There is no individual cell payload error checking orother information, which means that a full 48 bytesof payload may be used instead of only 44 in the caseofAAL3/4. The packet is padded to a multiple of48 bytes such that the AAL5 CPCS-PDU always fitsexactly into an integer number ofATM cell payloads.

The SAR-PDU or cell payload for AAL3/4 contains44 bytes of user data and the following header andtrailer fields:

Segment Type 2 bitsSequence Number 4 bitsMessage Identifier 10 bitsPayload Length 6 bitsPayload CRC 10 bits

The AAL5 SAR-PDU simply contains 48 bytes ofuser data.

Fli;' HEWLETTa:~ PACKARD

7-16

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #30

TranSwitch ATM Components

• Physical layer: SONET/SOH, E3, OS3, etc.- Framers- Overhead terminators- Multiplexing & mapping functions- Transceivers

• ATM layer- Cell delineation/mapping

• ATM adaptation layer- Segmentation & reassembly controllers

TranSwitch designs and produces VLSI componentsfor advanced telecom and datacom applications. Afull family of physical layer devices are available forSONET/SDH, E3, and DS3 and all may be used inATM applications. Cell delineation functions whichimplement transmission convergence and ATMlayer functionality have been developed and a highperformance AAL controller (SARA Chipset) whichsupports AAL3/4, AAL5, and CBR traffic at ratesup to 155 Mbitls is in production now. Evaluationboards, user documentation, and applicationssupport are available for all devices.

TranSwitch's products may be configured in avariety of architectures to realize standards-basedterminal, LAN, transmission, and switching appli­cations. Such products can significantly reducethe development cost as well as the time-to-marketfor new system products, and allow system man­ufactures to concentrate on additional value addedfunctionality above the defined ATM standards.

Slide #31

Deployment Trends

• LAN internetworking - mostly data

• Cell switching vs. shared media

• Variety of physical layers

• Wide area access will develop more slowly

At present, the focus for near-term ATM deploy­ment is on LAN intemetworking or backboneapplications. Initially, ATM is expected to becompetitive with FDDI on a price and perform­ance basis and be deployed in similar networkingenvironments. The switching capabilities ofATM will be used to improve the performance,scaleability, and management of private, local,and campus networks. In particular it is theswitching characteristics which distinguish ATMfrom existing shared media LAN technologies.A variety of physical layers will be deployed toaddress varying price/performance requirements,while maintaining compatibility at the cell levelfor switching and multiplexing. Public wide-areanetwork access will grow over time, although itwill not be ubiquitous for many years.

r~3 HEWLETT~~ PACKARD

7-17

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #32

Summary

• ATM is being driven by internetworking

• Deployment will enable new applications

• Strong standards support

• No real technology alternatives

• New design verification challenges

ATM is a new networking technology which issuitable for all types of information and is based oninternational standards. A strong commercial focusis accelerating standardization and deploymentof initial systems. ATM has been selected as theunderlying transport technology for BISDN and isexpected to eventually be widely deployed in privateand public networks around the world. Designersand developers can derive significant utility fromtools which can recognize and verify ATM protocols.

Slide #33

References

• CCITI

• ATM Forum

• IEEE

CCITr1.113: Vocabulary ofTerms for Broadband

Aspects ofISDN1.121: Broadband Aspects ofISDN1.150: B-ISDN Asynchronous Transfer Mode

Functional Characteristics1.211: B-ISDN Service Aspects1.311: B-ISDN General Network Aspects1.321: B-ISDN Protocol Reference Model and its

Applications1.327: B-ISDN Functional Architecture1.361: B-ISDN ATM Layer Specification1.362: B-ISDN ATM Adaptation Layer (AAL)

Functional Description1.363: B-ISDN ATM Adaptation Layer (AAL)

Specification1.413: B-ISDN User-Network Interface1.432: B-ISDN User-Network Interface - Physical

Layer Specification1.610: OAM Principles of the B-ISDN Access

ATM ForumATM User-Network Interface Specification

IEEEIEEE 802.6: Distributed Queue Dual Bus

Subnetwork of a Metropolitan AreaNetwork

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Understanding Evolving ATM Standardsand ATM Design Verification

Slide #34

References (Cont.)

• ANSI

• Bellcore

ANSIT1S1.5/92-001 AAL SSCOP Baseline DocumentTl.ATM-199X ATM Layer Functionality and

SpecificationTl.AL4-199X AAL 3/4 Common PartTl.CBR-199X AAL for Constant Bit Rate

Services Functionality and ServicesT1S1.5/92-005 Connectionless Service Layer

Functionality and ServicesT1S1.5/92-010 AAL5 Common Part

Functionality and ServicesT1S1.5/92-111 Constant Bit Rate AAL

Architecture

BellcoreTR-TSY-000772: Generic Requirements in

Support of Switched Multi-Megabit DataService

TR-TSY-000773: Local Access Switching SystemGeneric Requirements in Support ofSMDS

FA-NWT-OOl109: Broadband ISDN TransportNetwork Elements Framework GenericCriteria

FA-NWT-OOll10: Broadband ISDN SwitchingSystem Framework Generic Criteria

FA-NWT-OOllll: Broadband ISDN AccessSignalling Framework Generic Criteria forClass II equipment

TA-NWT-OOll12: Broadband-ISDN Used toNetwork Interface and Network NodeInterface Physical Layer Generic Criteria

TA-NWT-OOll13: Asynchronous Transfer Mode(ATM) and ATM Adaptation Layer (AAL)Protocols Generic Requirements

SR-NWT-001763: Preliminary Report onBroadband ISDN Transfer Protocols

Slide #35

Recommended Resources

• Equipment and Accessories- HP 75000 series 90 ATM Analyzer- HP Eclipse Protocol Analyzer

• Other Resources- HP's BISON seminar- TranSwitch's ATM Technology

and Applications Seminar

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