ECE

5655

/465

5 La

bora

tory

Pro

blem

sAssignment #4

Due Monday April 13, 2020

Make Note of the Following:• If possible write your lab report in Jupyter notebook• If you choose to use the spectrum/network analyzer to obtain tiff graphics, just

import these graphics files into Jupyter notebook as well.

Problems: Real-Time FIR Digital Filters1. Linear phase lowpass filter design from amplitude response specifications.

a.) Design a test filter using a 48 kHz sampling rate. The design is to be an equalripple lowpass that satisfies the amplitude response specifications shownbelow:

One design approach is to use MATLAB’s fdatool. I recommend you use thescikit-dsp-comm module fir_design_helper. The details of this areexplained in the Jupyter notebook Assignment4_sp2019.ipynb contained inthe Python folder of Assignment 4 ZIP package, Assignment4_sp2019.zip.Save the coefficients from the design in a header file as explained in theJupyter notebook. Run the filter in real-time on the FM4 board using the rou-tine:FIR_filt_float32(&FIR1,&x,&y,1).

b.) Now quantize the coefficients the coefficients in the Jupyter notebook andsave out a quantized coefficient header file, similar to

f Hz24.0k3.0k 4.0k0

0.10.1–

50–

H f dB

fs2---

passband ripple = 0.2 dB

stopband loss = 50 dB

ECE 5655/4655 Page 2 Assignment #4

Run the filter on the FM4 using:FIR_filt_int16(&FIR2,&left_in_sample,&left_out_sample,1,15);

Compare measured results with theory results, similar what is shown below for a 78 taplowpass design. In particular provide magnitude and phase response plots before and afterquantization. Your plots should use a digital frequency axis scaled to the actual samplingfrequency, e.g., as shown in the Jupyter notebook code cell and plot screen shot below:

c.) Finally compare the execution performance under -o3 optimization of the float_32 andint_16 design, and compare the floating-point filter performance with the CMSIS-DSPFIR filter function arm_fir_f32(), which has the identical interface to FIR_filt_f32(),except pState needs to managed differently as described in Problem 2c. From ARM’sCMSIS-DSP Web Site the f32 pState array has length equal to numTaps+blockSize-1, hereblockSize=1, so in the end pState has length numTaps. Note: On the fixed-point side arm_-fir_fast_q15()/arm_fir_q15() are the CMSIS-DSP function equivalent to FIR_-

filt_int16(). The fixed-point filter functions, on M3 & M4 chips, claim to requirepState length equal to numTaps+blockSize, which is one more point than the f32 imple-mentation. Measuring timing using GPIO signals is recommended. To be clear, in the endyou will have four timing results: (1) FIR_filt_f32(), (2) FIR_filt_int16(), (3) arm_-fir_f32(), and arm_fir_fast_q15() or arm_fir_q15().

Note: With the ARM fixed-point functions the number of filter coefficients must begreater than four and even! If numTaps is odd the fix is to append one zero coefficient to theend of the filter and increase numTaps by one.

ECE 5655/4655 Page 3 Assignment #4

2. Consider an equal-ripple FIR bandpass with amplitude response:

The objective is to implement this filter on both channels, left and right. Yes, you will need toinstantiate two filter data structures and two state arrays.a.) Design this filter in the Jupyter notebook using fir_d.fir_remez_bpf(). Note: To get the

desired 60 dB stopband attenuation you will have to tweak the final argument N_bump.Export the coefficients to a C header file as float32_t.

b.) The filter length in taps should be near 190 for 1 dB peak ripple, but the intent of 0.5 dBpeak ripple will give just over 200 taps. This filter will not run at using ISR-based processing. Show that the filter will meet real-time requirement at Hzusing the CMSIS-DSP function arm_fir_f32(). Obtain the frequency response of the filter(one channel is OK here) using the network analyzer (Agilent of Analog Discovery) andverify that the critical frequencies are scaled accordingly for operating a design at reduced sampling rate. Measure the interrupt processing time using the GPIOpin. How far is this time away from meeting real-time at Hz?

c.) To get the design running at Hz you are forced to use DMA to increase theprocessing efficiency. Furthermore you must use the CMSIS-DSP function

arm_fir_f32(&FIR1, xL, yL, DMA_BUFFER_SIZE);arm_fir_f32(&FIR2, xR, yR, DMA_BUFFER_SIZE);

and its frame based capabilities. Note when using arm_fir_f32() with DMA the statearray, pState, will have length DMA_BUFFER_SIZE + N_FIR_Taps - 1. Note in this problemthe function

FIR_filt_float32(&FIR1,xL,yL,DMA_BUFFER_SIZE);is not fast enough to do even one channel. For filtering with DMA you unfortunately needthe break the frame into left and right channel buffers before using frame-based FIR filter-ing. For example on the FM4 we have to unpack and then re-pack:void process_dma_buffer(void) { int i; uint32_t *txbuf, *rxbuf;

if(tx_proc_buffer == PING) txbuf = dma_tx_buffer_ping; else txbuf = dma_tx_buffer_pong; if(rx_proc_buffer == PING) rxbuf = dma_rx_buffer_ping; else rxbuf = dma_rx_buffer_pong;

// Unpack DMA buffer

f Hz24.0k5.0k 7.0k0

0.50.5–

60–

H f dB

fs2---

passband ripple = 1 dB

stopband loss = 60 dB

7.5k4.5k

6.0k

fs 48000=fs 8000=

fs 48000=

fs 48000=fs 48000=

ECE 5655/4655 Page 4 Assignment #4

for(i=0; i<DMA_BUFFER_SIZE ; i++) { //*txbuf++ = *rxbuf++; audio_chR = (rxbuf[i] & 0x0000FFFF); audio_chL = ((rxbuf[i] >>16)& 0x0000FFFF);

xL[i] = FM4_GUI.P_vals[0]*audio_chL; xR[i] = FM4_GUI.P_vals[1]*audio_chR; } // Frame-based processing // TBD

// Repack DMA buffer for(i=0; i<DMA_BUFFER_SIZE ; i++) { audio_chL = (int16_t) yL[i]; audio_chR = (int16_t) yR[i]; *txbuf++ = ((audio_chL<<16 & 0xFFFF0000)) + (audio_chR & 0x0000FFFF); }

tx_buffer_empty = 0; rx_buffer_full = 0;}

Test the full Hz sampling rate design using the DMA processing functionshown above. Obtain a network analyzer plots of the filter response on both the left andright channels to compare with the Python theory. Measure the frame processing timeusing the GPIO pin. What is the equivalent time to process one sample per channel?

3. Hilbert transform filter design and real-time analytic signal formation for envelope detectionof an AM signal. The basic idea of this problem is to implement the following block diagram:

The Hilbert transform is discussed in ECE 4625/5625 Communication Systems I. The heart ofthe matter is that in the frequency domain, the Hilbert transform of a signal phase shiftsequally all frequency components by , i.e.,

,

where , is the special Hilbert transforming filter, and

fs 48000=

DelayFIR

HilbertFIR

FM4A/D

M 31 taps=

FM4A/D

EnvelopeDetector

FM4D/A

Re

Im2 11

You get to use a fast square-root here

AM modulatedcarrier at 16 kHz

fs 48kHz= fs 48kHz=

x n

x n nd–

x̂ n nd–

with message frequency a 1kHzsinusoid at adepth of 80%.

Head-phone

r n z n 1 z 1––

1 z 1––

--------------------

JackDC Block

90–

X̂ f HHilbert f X f jsgn f – X f = =

X f F x t = H f

ECE 5655/4655 Page 5 Assignment #4

In the discrete-time domain the results are the same, that is

Here the Hilbert transforming filter is an FIR filter of 31 taps which approximates the idealHilbert transforming filter. See the Jupyter notebook for design details, but note that an alter-nate FIR design, which has a narrow passband centered on 16 kHz is now recommended. Withthis design the passband ripple is very small around 16 kHz, e.g, The mean time delay for sig-

nals passing through the filter is , hence in the above block diagram samples. The second design (orange) will produce a optimum analytic signal when

the input is centered on 16 kHz and has a narrow spectrum.

An analytic signal (a complex signal) is formed by adding . The new signal

has magnitude which is the so-called signal envelope.In this problem we are interested in demodulating an amplitude modulated (AM) carrier of

the form

,

where is the AM modulation index, is the message frequency, and is the car-rier frequency. When the signal is processed into the analytic signal , the corre-sponding envelope is

The message signal is proportional to the second term. Hence to complete the processing youneed at include a DC blocking filter to remove the bias term . This filter, shown in theabove block diagram, has z-transform representation

sgn f 1, f 01,– f 0

=

X̂ ej2f fs

jsgn ej2f fs

– X ej2f fs

=

31-Tap designs withdifferent passbanddefinitions; thus thetrade to get a flatgain over a narrowbandwidth in thesecond design.

31 1– 2 15=nd 15=

x n jx̂ n +

z n x n jx̂ n + r n ej n = =

r n

x n Ac 1 a 2fmfs-----n

cos+ 2fcfs---n

cos=

0 a 1 fm fcx n z n

r n Ac 1 a 2fmfs-----n

cos+ Ac Aca 2fmfs-----n

cos+= =

Ac

ECE 5655/4655 Page 6 Assignment #4

,

with close to, but less than one. A value of 0.95 works well here. In code you will need toimplement the filter difference equation

This is best done by creating two global variables to hold the filter state. In Python code, writ-ten to look like C, this might appear as shown below:

a.) Validate the system concept in the Jupyter notebook by completing the simulation modelalready started in Assignment4_sp2019.ipynb. The objective is to verify that the envelop ofthe complex signal does indeed contain the original 1 kHz message signal.

b.) Implement the system on the FM4 board and input an AM test signal with 16 kHz carrierfrequency and 1 kHz message sinusoid at 80% modulation. Configuration of the AnalogDiscovery waveform generator is:

c.) Compare results captured from the FM4 headphone output jack with the Python simula-tion of (a).

d.) Going beyond the call, consider increasing the Hilbert FIR length to 63 or 121 to see whatimprovement you see in the recovered AM message signal.

Hblock z 1 z 1––

1 z 1––

--------------------=

y n y n 1– x n x n 1– –+=