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HiPEAC: High- Performance Embedded Architecture and Compilation Granted: ICT 217068 Review Munich June 5, 2009 1

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Review Munich June 5, 2009. HiPEAC :. Hi gh- P erformance E mbedded A rchitecture and C ompilation. Granted : ICT 217068. Agenda. Agenda. Core objectives of HiPEAC. Create an integrated and visible community in Europe. Core Objectives. 12 HiPEAC partners. FORTH. - PowerPoint PPT Presentation

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Page 1: HiPEAC :

1

HiPEAC:High-PerformanceEmbeddedArchitecture andCompilation Granted: ICT 217068

Review MunichJune 5, 2009

Page 2: HiPEAC :

2

Agen

daAgenda

08:30–9:00 Private Meeting Reviewers9:00-9:15 Introduction + Recommendations (Koen)

9:15–9:45 Administrative aspects + WP 4 (Koen, Wouter)

9:45-10:00 WP1: Mobility (Mike)10:00-10:30 BREAK

10:30-12:00 WP2: Research (Olivier, Cluster Coordinators)

12:00-13:00 LUNCH13:00-13:30 WP3: Spreading Excellence (Per)13:30-14:15 HiPEAC Roadmap (Marc)14:15-14:30 BREAK 14:30-15:30 Private Meeting EC15:30-16:00 Feedback08:30–9:00 Private Meeting Reviewers

Page 3: HiPEAC :

Core

Obj

ectiv

esCore objectives of HiPEAC

3

Steer and increase the

European research

efforts in the HiPEAC domain

Stimulate cooperation

between computer

architects and tool builders

Stimulate cooperation

between industry and

academia

Create an integrated and

visible co

mmunity in

Europe

Page 4: HiPEAC :

12 HiPEAC partners

4

FORTH

Page 5: HiPEAC :

5

Page 6: HiPEAC :

6

Page 7: HiPEAC :

7

WP1: Mobility

WP2: Research Program

WP3: Spreading Excellence

WP4: Management

Page 8: HiPEAC :

WP1: Mobility

8

1.1 Internships1.2 Collaboration grants 1.3 Mini-sabbaticals1.4 Cluster meetings

Page 9: HiPEAC :

WP2: Research

9

2.1 Multi-core architecture

2.7 Binary translation and virtualization

2.3 Adaptive compilation

2.2 Programming models and operating systems

2.4 Interconnects

2.5 Reconfigurable computing2.6 Design methodology

and tools

2.8 Simulation platform

2.9 Compilation platform

TF Low powerTF Education and trainingTF ApplicationsTF Reliability and availability

Page 10: HiPEAC :

WP3: Spreading excellence

10

3.1 Conference3.2 Summer school3.3 Journal 3.4 Roadmap3.5 Newsletter 3.6 HiPEAC tech reports 3.7 Web site 3.8 Web seminars 3.9 Industrial workshops 3.10 Promoting start-ups3.11 Award program

10

Page 11: HiPEAC :

Agenda

11

08:30–9:00 Private Meeting Reviewers9:00-9:15 Introduction + Recommendations (Koen)

9:15–9:45 Administrative aspects + WP 4 (Koen, Wouter)

9:45-10:00 WP1: Mobility (Mike)10:00-10:30 BREAK

10:30-12:00 WP2: Research (Olivier, Cluster Coordinators)

12:00-13:00 LUNCH13:00-13:30 WP3: Spreading Excellence (Per)13:30-14:15 HiPEAC Roadmap (Marc)14:15-14:30 BREAK 14:30-15:30 Private Meeting EC15:30-16:00 Feedback08:30–9:00 Private Meeting Reviewers

Page 12: HiPEAC :

The project should urgently develop, implement and present a concrete strategy for raising the industrial interest and involvement in HiPEAC

Reco

mm

enda

tion

sRecommendations

12

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13

Reco

mm

enda

tion

sIndustry involvement

Make “HiPEAC” known

Communicate benefits

Promote activities

Use the network

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14

◦Visibility outside the network: Booth at DATE

◦Redesigned website launched on May 14 Industry specific section

Indu

stry

invo

lvem

ent

Concrete Actions

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15

◦FP7 Call 4 industry participants: new contacts?!

◦Re-organised Industrial Workshop: Increased company input:

Indu

stry

invo

lvem

ent

Concrete Actions

INFINEON presentation (Dr. Chr. Kutter) INFINEON wireless solutions overview (Prof. Dr. J. Hausner) "System Engineering" (Dr. Matthias Sauer, Infineon) Scalable processors - a low power future? (John Goodacre, ARM)

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16

DATE Booth:◦Visitors from companies:

◦all companies were added to the newsletter◦all new contacts receive a personal

introduction by the coordinator

Indu

stry

invo

lvem

ent

Results

• Samsung• Texas

Instruments• Tensilica• Csill• ARM• Saab• Compaan• Agilent• Atmel

• Ruchip• MoSys• XJ Tag• Same• Numonyx• CiaoTech

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17

New industry members until now:◦Ronny Ronen (Intel)◦Daniel Schiebli (SAP)◦Sergey Lounev (Intel)◦David Molony (Movidia)

Indu

stry

invo

lvem

ent

Results

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18

The collaboration needs to follow a more holistic approach where there is a greater integration and focus of all activities

Each cluster in WP2 needs to have a clearly defined objective and a clear strategy for achieving that objective. Together these sets of objectives and strategies need to form a coherent whole. The interactions between the different clusters need to be clearly presented. For each cluster, there needs to be a list of active members. All of these need to be reported in the Cluster Report. More quantitative figures about the different topics would also be helpful

Reco

mm

enda

tion

sRecommendations

Answer at WP2 Presentation

Auteur
Answer to be added
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19

The Project Management should increase HiPEAC’s visibility and the link with Artemis

Reco

mm

enda

tion

sRecommendations

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20

Concrete actions◦Communicate Artemis call to HiPEAC

members◦Visit Artemis booth at DATE

Information gathered “Centers of Excellence”

◦Expertise from HiPEAC members Large research projects (20-30 partners)

Follow-up:◦Contact with Artemis chair

HiPE

AC &

Ar

tem

isHiPEAC & Artemis

Page 21: HiPEAC :

21

The Management Report should contain a section giving an overview of related projects and initiatives at the European, National and International levels and their interaction with HiPEAC

◦A list of project proposals was added to the report.Reco

mm

enda

tion

sRecommendations

Auteur
Lijst inplakken? Of gewoon melden: "done".
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22

The Reconfigurable Computing cluster does not appear to address high-level language compilation to target devices such as FPGAs. This deficiency should be urgently addressed. This cluster needs to work more closely with the Programming Model cluster. There is a clear need to involve EU companies such as Mitrion, Nallatech, Alpha Data and Ylichron. The cluster urgently needs to set out a clear course of actions to realise relevant industrial involvement from within the EU. Industry needs to be more involved in clusters activities, especially requesting what they really need from the academic research. This course of actions should be reported at the formal review.

Reco

mm

enda

tion

sRecommendations

Answer at WP2 Presentation

Auteur
Voor Georgi
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23

Section 3.2.1 of D2.1 presents a scenario "where multiple threads compete for shared resources". The scalability of this approach and alternatives such as distributed memory models should be discussed in this section.

Reco

mm

enda

tion

sRecommendations

Answer at WP2 Presentation

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24

A more systematic approach for analyzing real applications should be found. This should involve finding the characteristics of real applications vs. 4 benchmarks. Quantitative figures for comparing the different platforms should be provided to demonstrate the potential for further research and development.Reco

mm

enda

tion

sRecommendations

Answer at WP2 Presentation

Auteur
Voor Nacho
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25

The management report for the formal review should rank the HiPEAC conference relative to the list of the top conferences.

Reco

mm

enda

tion

sRecommendations

Answer at WP3 Presentation

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26

For all events such as the Summer School and workshops, detailed feedback should be gathered from the participants and presented to the reviewers. This feedback should be used to establish a strategy to improve the spreading of excellence (HiPEAC Conference, Journal, Summer School, etc.)Reco

mm

enda

tion

sRecommendations

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27

Event feedback gathered at:◦Computing Systems Week Barcelona◦Summer School 2008

Will be done again in the next project year:◦Computing Systems Week Muenchen◦Summer School 2009◦Conference 2010Even

t Fee

dbac

kEvent Feedback

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28

Efforts should be made to increase the number of submissions to the HiPEAC journal in order to raise its quality and standing.

Reco

mm

enda

tion

sRecommendations

Answer at WP3 Presentation

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29

The project website (www.hipeac.net) should be improved and much more focused towards the attraction of new members. In particular, the web presentations of the clusters need to be improved. Website statistics should be presented on a monthly basis and carefully analysed to guide the improvement of the site. Publications should be available from the Web page, especially those who done jointly within the WP2 clusters.

Reco

mm

enda

tion

sRecommendations

www.hipeac.net

Page 30: HiPEAC :

30

Input gathered from IBM Communications

New website launched on May 14, 2009◦New layout

Modern look HiPEAC Colours

◦New structure Easier to find what you’re looking for Mimicking the project’s structure Dynamic menus

Web

site

Website

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31

Industry appeal◦Industry specific section◦Activity highlights

Cluster websites◦Updated and new layout

Publications◦Full publications overview of all

members and affiliates◦(http://www.hipeac.net/

publications_overview)

Web

site

Website

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32

The circulation of the newsletter should be presented on a quarterly basis

◦This information will be presented as such in the next reporting.

Reco

mm

enda

tion

sRecommendations

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33

The repository of Task 3.6 should be urgently implemented

Reco

mm

enda

tion

sRecommendations

Answer at WP3 Presentation

Auteur
Georgi
Page 34: HiPEAC :

34

The web seminars should be more strongly promoted and numbers of downloads for each seminar should be presented

Reco

mm

enda

tion

sRecommendations

Answer at WP3 Presentation

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35

WP3 needs to maintain an overall list of publications indicating to which cluster(s) each publication belongs

◦The list was attached to the report.

Reco

mm

enda

tion

sRecommendations

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36

A clear formula for allocation of funding for internships (partner/member and academic/industrial) urgently needs to be found.

Reco

mm

enda

tion

sRecommendations

Answer at WP1 Presentation

Page 37: HiPEAC :

37

Agenda

08:30–9:00 Private Meeting Reviewers9:00-9:15 Introduction + Recommendations (Koen)

9:15–9:45 Administrative aspects + WP 4 (Koen, Wouter)

9:45-10:00 WP1: Mobility (Mike)10:00-10:30 BREAK

10:30-12:00 WP2: Research (Olivier, Cluster Coordinators)

12:00-13:00 LUNCH13:00-13:30 WP3: Spreading Excellence (Per)13:30-14:15 HiPEAC Roadmap (Marc)14:15-14:30 BREAK 14:30-15:30 Private Meeting EC15:30-16:00 Feedback08:30–9:00 Private Meeting Reviewers

Page 38: HiPEAC :

WP4: Management

38

4.1 Steering committee meetings4.2 General assembly meetings4.3 Reimbursement service4.4 Membership management4.5 Administrative staff4.6 Technical staff

WP4: Management

Page 39: HiPEAC :

39

◦Project start date: February 01, 2008◦Kick-off in Gotheborg, January 30,

2008

◦October 2008: change of parties ST Italy (Marco Cornero)

ST France (Christian Bertin)◦December 2008: subcontract with

TiLS needed (Summer School)

◦(Formal amendment procedure ongoing)

Adm

inAdministrative aspects

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40

SC Meetings◦Monthly:

Physical meetings during HiPEAC Events In between: WebEx Conference call

General Assembly Meetings◦1st general assembly meeting:

Gotheborg, 127 attendants◦2nd general assembly meeting:

Paphos, 81 attendants

WP4

: M

anag

mee

ntWP4: Management

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41

Reimbursement service◦Located in Ghent◦Lightweight and easy-to-use web

application◦Used for mobility funding

60 cluster funding requests 14 collaboration grant funding requests

HiPEAC Staff◦Located in Ghent:

Administrative staff: Wouter De Raeve Technical staff: Klaas Millet

WP4

: M

anag

emen

tWP4: Management

Page 42: HiPEAC :

42

Mobility Program

Collaboration Grants: 65 000 euro committed

Mini-sabbaticals: 8 200 euro committed

WP4

: M

anag

emen

tBudget overview

Activity Total Budget Reported Y1 Total Remaining

Internships 240 000 HiPEAC 1 240 000Collaboration Grants 280 000 0 280 000

Mini-sabbaticals 100 000 0 100 000

Clusters 608 500 57 778,53

550 721,47

Page 43: HiPEAC :

43

Spreading Excellence

Conference will be reported Y2 Newsletter: issue 16/17 Roadmap meetings Summer School 2008: HiPEAC 1 budget

WP4

: M

anag

emen

tBudget Overview

Activity Total Budget Reported RemainingConference 80 000 80 000

Newsletter 52 500 6 724.16 45 775.84

Roadmap 2 012.77 -2 012.77Summer School 300 000 300 000

Page 44: HiPEAC :

44

Partner Specific Costs

WP4

: M

anag

emen

tBudget overview

Partner Total Budget Reported RemainingGENT 769 000 54 359 714 641RWTH 340 000 89 639 250 361BSC 335 000 97 105 237 895CHALMERS 335 000 60 963 274 037TU DELFT 335 000 20 099 314 901EDINBURGH 335 000 11 565 323 435FORTH 335 000 24 052 310 948INRIA 295 000 25 401 269 599ARM 15 000 3 646 11 354IBM 15 000 1 789 13 211NXP 15 000 2 299 12 701ST 15 000 0 15 000

Page 45: HiPEAC :

45

178 members (56 new, 16/56 from industry)◦43 industry members, 31 companies◦21 countries

19 associate members◦Outside Europe

Brazil USA Russian FederationMem

bers

hip

HiPEAC Members

Page 46: HiPEAC :

46

Company Member CountryTransitive Alasdair Rawsthorne United KingdomAbsint Daniel Kästner GermanyCoWare Bart Vanthournhout BelgiumInfineon Xiaoning Nie GermanyARC Phil Barnard United KingdomRecore Systems Paul Heysters The NetherlandsClearspeed Ray McConnell United KingdomiNOCS Frederico Angiolini SwitzerlandInfrasoft IT Solutions Zbigniew Chamski PolandMicrotech International Agnieszka Skotarczyk PolandMicrotech International Adam Handzlik Poland

CAPS Enterprise François Bodin FranceIntel Ronny Ronen Israel

Mem

bers

hip

New industry members

Page 47: HiPEAC :

47

Mem

bers

hip

Members in Europe(on May 14) •Austria: 5

•Belgium: 28•Cyprus: 14•Denmark: 1•Finland: 6•France: 67•Germany: 49•Greece: 30•Ireland: 3•Israël: 23•Italy: 45•Norway: 12•Poland: 5•Portugal: 19•Serbia: 4•Spain: 196•Sweden: 22•Switzerland: 10•The Netherlands: 46•Turkey: 2•United Kingdom: 48

Page 48: HiPEAC :

Agen

daAgenda

08:30–9:00 Private Meeting Reviewers9:00-9:15 Introduction + Recommendations (Koen)

9:15–9:45 Administrative aspects + WP 4 (Koen, Wouter)

9:45-10:00 WP1: Mobility (Mike)10:00-10:30 BREAK

10:30-12:00 WP2: Research (Olivier, Cluster Coordinators)

12:00-13:00 LUNCH13:00-13:30 WP3: Spreading Excellence (Per)13:30-14:15 HiPEAC Roadmap (Marc)14:15-14:30 BREAK 14:30-15:30 Private Meeting EC15:30-16:00 Feedback08:30–9:00 Private Meeting Reviewers

Page 49: HiPEAC :

49

Internships Collaboration Grants

Mini-sabbatical

Cluster MeetingW

P1: M

obilit

yWP1: Mobility Program

Page 50: HiPEAC :

50

Funded by HiPEAC 110 granted in 2008

WP1

: Mob

ility

Internships

HiPEAC Company

HiPEAC student

Defines topic

Internship

Company chooses candidate

Applies to call

Approval by SC

Page 51: HiPEAC :

51

A clear formula for allocation of funding for internships (partner/member and academic/industrial) urgently needs to be found.

Reco

mm

enda

tion

sRecommendations

Page 52: HiPEAC :

52

Funding: evenly distributed among partners:

Changes to the distribution are agreed upon by the industry partners if necessary

Inte

rnsh

ip

Fund

ing

Internship Funding

ARM

IBMNXPST

Page 53: HiPEAC :

53

13 granted (out of 34)

WP1

: Mob

ility

Collaboration Grants

HiPEAC Institutio

n

HiPEAC student

Student and hostprepare a proposal

Collaboration Grant

Ranking by independent reviewers

Approval by SC

Page 54: HiPEAC :

54

Always open2 mini-sabbaticals granted

◦Enrique Torres, ICSI, USA◦Rainer Leupers, ACE Amsterdam

WP1

: Mob

ility

Mini-sabbaticalHiPEAC

Institution

HiPEACSENIOR

researcherCommon project

Proposal + budget

Mini-sabbatical

Approval by SC

Page 55: HiPEAC :

55

Cluster Meetings◦Gathering of the community◦1 kick-off +3 Meetings in Period 1

WP1

: Mob

ility

Cluster Meetings

Location Date # attendant

sChalmers -Gotheborg (Kick-off)

January 28, 2008 142

BSC – Barcelona June 2-3, 2008 200THALES – Paris November 27-28,

2008158

Amathus - Paphos January 29, 2009 90

Page 56: HiPEAC :

56

9 Clusters◦Multi-Core architecture◦Programming models and operating

systems◦Adaptive compilation◦Interconnects◦Reconfigurable computing◦Binary translation & virtualization◦Design methodology & tools◦Simulation and modeling platform◦Compilation platform

WP2

: Res

earc

hWP2: Research Program

Page 57: HiPEAC :

57

4 Task Forces:◦Task Force on Education and Training◦Task Force on Reliability and

Availability◦Task Force on Applications◦Task Force on Low Power

WP2

: Res

earc

hWP2: Research Program

Page 58: HiPEAC :

58

Publication output

WP2

: Res

earc

hPublication Output

WP2: Research Program

# active members

# companies involved

# publication output

# joint papers

# joint papers with industry

T2.1: Multi-core architecture

64 8 68 16 3

T2.2: Programming models and OS

56 7 52 15 -

T2.3: Adaptive Compilation

51 7 44 6 2

T2.4: Interconnects

36 3 52 22 3

T2.5: Reconfigurable Computing

41 3 112 26 5

T2.6: Design methodology and Tools

43 6 38 8 2

T2.7: Binary Translation and Virtualization

42 10 7 4 1

T2.8: Simulation Platform

59 9 26 1 1

T2.9: Compilation Platform

47 7 38 12 2

WP2: Research Program

# active members

# companies involved

# publication output

# joint papers

# joint papers with industry

Task Force on Education and Training

8 2 2 - -

Task Force on Reliability and Availability

28 4 14 5 -

Task Force on Applications

23 2 46 21 -

Task Force on Low Power

16 1 11 3 -

Page 59: HiPEAC :

59

The collaboration needs to follow a more holistic approach where there is a greater integration and focus of all activities

Each cluster in WP2 needs to have a clearly defined objective and a clear strategy for achieving that objective. Together these sets of objectives and strategies need to form a coherent whole. The interactions between the different clusters need to be clearly presented. For each cluster, there needs to be a list of active members. All of these need to be reported in the Cluster Report. More quantitative figures about the different topics would also be helpful

Reco

mm

enda

tion

sRecommendations

Auteur
Answer to be added
Page 60: HiPEAC :

60

Rese

arch

Col

labo

ratio

n

 

T2.1 Multi-core architecture

T2.2 Programming models and operating systems

T2.3 Adaptive compilation

T2.4 Interconnects

T2.5 Reconfigurable computing

T2.6 Design 

methodology and tools

T2.7 Binary 

translation and virtualization

T2.8 Modeling and Simulation 

Framework

T2.9 Compilation platform

Task Force on Applications

Task Force on Education and training

Task Force on Low power

Task Force on Reliability and availability

T2.1 Multi-core architecture 63 25 17 9 20 18 15 18 17 7 4 7 11

T2.2 Programming models and operating systems 55 19 2 10 9 14 15 20 15 3 1 5

T2.3 Adaptive compilation 50 0 10 10 21 21 31 5 3 2 4

T2.4 Interconnects 34 6 6 0 4 0 1 2 6 5

T2.5 Reconfigurable computing 40 18 8 11 10 3 1 4 4

T2.6 Design methodology and tools 42 6 21 8 2 1 6 4

T2.7 Binary translation and virtualization 41 13 18 4 2 1 6

T2.8 Modeling and Simulation Framework 58 17 6 3 7 5

T2.9 Compilation platform 46 5 1 2 3

Task Force on Applications 22 2 1 1

Task Force on Education and training 7 1 1

Task Force on Low power 15 5

Task Force on Reliability and availability 26

Page 61: HiPEAC :

61

WP2: Research Program

# active members

# companies involved

# publication output

# joint papers

# joint papers with industry

T2.1: Multi-core architecture 64 8 68 16 3

T2.2: Programming models and OS 56 7 52 15 -

T2.3: Adaptive Compilation 51 7 44 6 2

T2.4: Interconnects 36 3 52 22 3

T2.5: Reconfigurable Computing 41 3 112 26 5

T2.6: Design methodology and Tools 43 6 38 8 2

T2.7: Binary Translation and Virtualization 42 10 7 4 1

T2.8: Simulation Platform 59 9 26 1 1

T2.9: Compilation Platform 47 7 38 12 2

Task Force on Education and Training 8 2 2 - -

Task Force on Reliability and Availability 28 4 14 5 -

Task Force on Applications 23 2 46 21 -

Task Force on Low Power 16 1 11 3 -

Rese

arch

Col

labo

ratio

nResearch Collaboration

Page 62: HiPEAC :

62

MulticoreArchitecture

WP2

: Res

earc

h

Page 63: HiPEAC :

63

Progress Indicators

# Active members 64# Companies involved 8# Publications 68# Joint papers 16# Joint papers with industry 3

Mul

ticor

e Ar

chite

ctur

e

Page 64: HiPEAC :

64

Scientific ChallengesTopics

◦Processor/core architecture◦Memory system architecture

Challenges – The 3Ps◦Performance scalability◦Power efficiency◦Programmability

Approaches◦Thread-level parallelism◦Specialization

Mul

ticor

e Ar

chite

ctur

e

Page 65: HiPEAC :

65

Summary of ActivitiesCompilation of research activitiesFormulation of a roadmapStimulation of research

interactionStimulation of creating research

consortia for upcoming callsMeetings:

◦1st meeting: Input on topics◦2nd meeting: Presentations &

roadmap ◦3rd meeting: Collaboration esp. Call

Mul

ticor

e Ar

chite

ctur

e

Page 66: HiPEAC :

66

Inter-cluster collaborationMulticore architecture and

Programming Models clusters:

◦Organization of three international workshops First MULTIPROG workshop in conjunction

with HiPEAC conf. 2008 Barcelona Multicore Workshop (June,

2008) Second MULTIPROG workshop in

conjunction with HiPEACH conf. 2009

Mul

ticor

e Ar

chite

ctur

e

Page 67: HiPEAC :

67

Programming Models and OS

WP2

: Res

earc

h

Page 68: HiPEAC :

68

Progress Indicators

# Active members 56# Companies involved 7# Publications 52# Joint papers 15# Joint papers with industry -

Prog

ram

min

g M

odel

s and

OS

Page 69: HiPEAC :

69

Scientific ChallengesPr

ogra

mm

ing

Mod

els a

nd O

S

Page 70: HiPEAC :

70

Summary of ActivitiesPr

ogra

mm

ing

Mod

els a

nd O

S

Page 71: HiPEAC :

71

Inter-cluster collaboration

Prog

ram

min

g M

odel

s and

OS

Page 72: HiPEAC :

72

Adaptive Compilation

WP2

: Res

earc

h

Page 73: HiPEAC :

73

Section 3.2.1 of D2.1 presents a scenario "where multiple threads compete for shared resources". The scalability of this approach and alternatives such as distributed memory models should be discussed in this section.

Reco

mm

enda

tion

sRecommendations

Page 74: HiPEAC :

74

Scalability◦ General-purpose parallel have more than one multi-threaded

job running concurrently.◦ We focussed on adapting the number of threads within a job

to achieve scalable performance. Memory Model

◦ The form of memory model can also have an impact on scalability

◦ Phyically centralised memory is clearly non-scalable modern compilers assume decentralised. physically distributed

memory◦ Message-passing approaches needed for privates address

spaces is cumbersome Single address space approaches are considerably easier to program

eg OpenMP

Reco

mm

enda

tion

s

Page 75: HiPEAC :

75

Future◦Design of the memory model is

beyond our control. future multi-cores will support a single-

address space they will execute several jobs

concurrently our aim is to adapt applications to

maximise their performance regardless of their environment.Reco

mm

enda

tion

s

Page 76: HiPEAC :

76

Progress Indicators

# Active members 51# Companies involved 7# Publications 44# Joint papers 6# Joint papers with industry 2

Adap

tive

Com

pila

tion

Page 77: HiPEAC :

77

Scientific ChallengesSystem adapts to hardware

◦Machine-learning based compilation◦Auto-tuning/parallelising compilation

Hardware adapts to system◦Resource-aware compilation◦Dynamic reconfiguration

Three main areas of work◦Parallelisation◦Adaptive Optimisation◦Energy-Aware Compilation

Adap

tive

Com

pila

tion

Page 78: HiPEAC :

78

Summary of ActivitiesFunded member collaborations

◦6 Groups in total◦13 Different institutions◦Wide range of topics considered

Context-aware optimisation Split compilation and vectorisation Value-based optimisation Power and temperature schemes

Range of meeting styles adopted◦Keynotes from industry figures◦Subgroup discussions

Adap

tive

Com

pila

tion

Page 79: HiPEAC :

79

Inter-cluster collaborationInstruction cache power

reduction◦Linker uses profile to lay out code◦Tag checks disabled for these

program regions◦With BTV cluster

Split compilation◦Optimisations partitioned into two

sets Runtime dependent and runtime

independent◦Leave bare minimum for runtime

when execution environment is known

◦With Compilation Platform cluster

Adap

tive

Com

pila

tion

Page 80: HiPEAC :

80

Interconnects

WP2

: Res

earc

h

Page 81: HiPEAC :

81

Progress Indicators

# Active members 36# Companies involved 3# Publications 52# Joint papers 22# Joint papers with industry 3

Inte

rcon

nect

s

Page 82: HiPEAC :

82

Scientific ChallengesIn

terc

onne

cts

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Summary of ActivitiesIn

terc

onne

cts

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Inter-cluster collaborationIn

terc

onne

cts

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Reconfigurable Computing

WP2

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The Reconfigurable Computing cluster does not appear to address high-level language compilation to target devices such as FPGAs. This deficiency should be urgently addressed. This cluster needs to work more closely with the Programming Model cluster. There is a clear need to involve EU companies such as Mitrion, Nallatech, Alpha Data and Ylichron. The cluster urgently needs to set out a clear course of actions to realise relevant industrial involvement from within the EU. Industry needs to be more involved in clusters activities, especially requesting what they really need from the academic research. This course of actions should be reported at the formal review.

Reco

mm

enda

tion

sRecommendations

Auteur
Voor Georgi
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Progress Indicators

# Active members 41# Companies involved 3# Publications 112# Joint papers 26# Joint papers with industry 5

Reco

nfigu

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mpu

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Scientific ChallengesApplication domain extensionsImproved run-time reconfigurationPower-efficient computationReliabilityTools, Methods and Runtime SupportTargeted Systems

◦Embedded◦High Performance-Multicores

RC Specific Memory architecturesRealization/Technology

Reco

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Summary of Activities Organizing the cluster:

◦ Cluster board to steer activities◦ Cluster WIKI page (who is who, forum, writing roadmap

etc. ) http://ce.et.tudelft.nl/HiPEACRC/wiki/

◦ Special Interest Groups Applications Runtime reconfiguration

Scientific:◦ RC roadmap (chapter) ◦ Cluster meetings (attendance ~56)

Talks by the cluster members Discussions e.g. RC Challenges.

◦ Workshops and keynote talks Other:

◦ Involving Industry◦ Joint publications and proposals

Reco

nfigu

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Inter-cluster collaboration

Reco

nfigu

rabl

e Co

mpu

ting Interconnects:

Reconfigurable NoC

TF on Reliability: Reconfigurable HW for Fault Tolerant SoC

Design Meth & Tools:Methods & Tools forReconf. Systems

Prog. models & OS:Adaptive Runtime supportfor Reconfig. Systems

Multi-core Arch. : RC for High-Perf. Computing/Acceleration

Modeling & Simulation:Reconfigurable HW for Simulation AccelerationCompilation:Compiling for RC platforms

TF on Low Power: Reconfigurable HW for Low Power Computing

TF on Applications: -ES, HP, automotive, etc.

Reconfigurable Computing

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Reco

nfigr

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mpu

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Industry InvolvementCompanies currently in the RC cluster

ARM, UKCodeplay, UKMovidia, IR

Recore Systems, NLSAP, DE

ST-NXP Wireless, NLST-Micro, ITThales, FR

Potential Indutsrial RC members

Integronics SL, ESASD, DE

Deutsche Thomson, DE

Hewlet Packard, ESIntracom S.A., GR

Barco, BEFoxIT, NL

Safenet, NLCompaan Design BV,

NL Abond Logic, FR

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Design Methodology and Tools

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Progress Indicators

# Active members 43# Companies involved 6# Publications 38# Joint papers 8# Joint papers with industry 2

Desig

n M

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nd

Tool

s

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Scientific Challenges Design methodology and tools driven by the

trend towards multiprocessor system-on-chip (MPSoC) architectures

Applications include: wireless communications, multimedia, automotive, health care

Very high efficiency goals (MIPS/Watt or Joule/bit), therefore programmable, yet application-specific and heterogeneous MPSoCs

Currently shift towards Electronic System Level (ESL) design methodologies, will provide the required next productivity boost beyond RTL design

Key for managing the complexity of today´s and future digital chip designs in advanced CMOS technologies (45nm, 32nm, and beyond)

Desig

n M

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nd

Tool

s

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Objectives & StrategyObjectives

◦ Make optimal use of limited cluster funding◦ Generally in line with usual NoE objectives

(networking, information exchange, building new cooperation opportunities etc.)

◦ Specific for EDA cluster: strengthen embedded computing perspectives in HiPEAC community, provide design technology know-how and infrastructure

Strategy◦ Regular meetings (full cluster and cluster “SIGs”,

latter similar to ARTIST2 NoE)◦ Tight interaction with industry (e.g. CoWare,

Infineon)◦ Organization of EDA specific events

Desig

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Summary of ActivitiesDe

sign

Met

hodo

logy

and

To

ols

Cluster meetings: Three regular cluster meetings were held in 2008. Several new members have been accepted, among them associate members from USA and Japan.

HiPEAC workshops and schools: Cluster members attended major HiPEAC events such as the ACACES summer school and various industrial workshops.

MPSoC Forum: The cluster provided sponsorship for the MPSoC Forum (Aachen, June 2008). The MPSoC Forum (www.mpsoc-forum.org) is the premier international event in application specific MPSoC architectures and design tools.

ECSI workshops: Aachen´s research results on Virtual Platform technology, developed jointly with CoWare, have been successfully demonstrated at various ECSI workshops,

Infineon MPSoC workshop: German HiPEAC partners (Aachen, Erlangen, Augsburg) have organized a joint workshop with Infineon Technologies (Nov 2008) in Munich.

Industry internships: Students from Aachen have performed 6 months industry internships at ACE and Infineon.

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Inter-cluster collaboration Simulation related

◦ RAPIDO workshop: Together with O. Temam, S. Niar a new workshop on simulation and architecture exploration has been organized at the HiPEAC conference in Jan 2009

◦ Joint FP7 project proposal with O. Temam et al.◦ New Springer book on processor and system-level

simulation under preparation Compiler related

◦ First HiPEAC2 mini-sabbatical ongoing (R. Leupers @ ACE)

◦ Best Paper Award at DATE 2008 (joint work Aachen, ACE, NXP on predicated execution support for CoSy)

Desig

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Binary Translation & Virtualization

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Progress Indicators

# Active members 42# Companies involved 10# Publications 7# Joint papers 4# Joint papers with industry 1

Bina

ry Tr

ansla

tion

& Vi

rtual

izatio

n

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Bina

ry Tr

ansla

tion

& Vi

rtual

izatio

n

Hardware

Software

Requirements

• Multi-cores• FPGAs• Accelerators • Abstractions

• Design techniques• Layers

• Security• Reliability• Networking

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Scientific ChallengesBi

nary

Tran

slatio

n &

Virtu

aliza

tion

• Understanding & modelling system behaviour

• Certification & validationRQ

• Support for BTV• Variation (from embedded to big

iron)• Variability (manufacturing defects,

wearout)HW

• Generic intermediate format• Annotations to help BTV (meta-

information)• Active cooperation between BTV

host/clientSW

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Summary of ActivitiesThree cluster meetings*Virtualization roadmap*BTV web page*ARM internship*Dagstuhl seminar DBT (23

participants)*Support for virtualization course

at ACACES2008Diablo maintenance & support*Cross-ISA optimisation*

Bina

ry Tr

ansla

tion

& Vi

rtual

izatio

n

*: worked on by cluster researcher

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Inter-cluster collaborationCooperation with the Adaptive

Compilation cluster on reducing power usage of the instruction cache through disabling tag checks and static binary rewriting of programs

Cooperation with the Compilation Platform cluster on generic & common virtualization platform & intermediate format

Bina

ry Tr

ansla

tion

& Vi

rtual

izatio

n

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Simulation & Modelling Platform

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Progress Indicators

# Active members 59# Companies involved 9# Publications 26# Joint papers 1# Joint papers with industry 1

Sim

ulat

ion

& M

odel

ling

Plat

form

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Scientific ChallengesSi

mul

atio

n &

Mod

ellin

g Pl

atfo

rm

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Summary of ActivitiesSi

mul

atio

n &

Mod

ellin

g Pl

atfo

rm

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Inter-cluster collaboration

Sim

ulat

ion

& M

odel

ling

Plat

form

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Compilation Platform

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Progress Indicators

# Active members 47# Companies involved 7# Publications 38# Joint papers 12# Joint papers with industry 2

Com

pila

tion

Plat

form

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Scientific ChallengesCo

mpi

latio

n Pl

atfo

rm

Disseminate open platform for compiler research◦ GROW’09 workshop, Jan. 25, 2009, Paphos, Cyprus◦ SSA seminar, April 2009, Autrans, France◦ GROW’10 workshop, planned for 2010, Pisa, Italy

Collaborations among European compiler teams Loop xformation and vectorization: HiPEAC Ph.D. internship

at IBM (PACT'09 paper); cont’ polyhedral xformation cost model framework

Data-flow computing: U. of Cyprus Ph.D. student visit to INRIA and IBM (1 week each)

Code generation: several exchanges with Imperial College Transactional memory: TU Karlsruhe engineer and U.

Bologna Ph.D. student joint work (GROW'09 paper); cont’ Ph.D thesis, RedHat with Intel

Loop xformation and parallelization: IBMer visit to INRIA (2 weeks)

HW accelerators: support U. of Cyprus and TU Delft students to cluster meeting

Compilation for VLIW: support STEricsson engineer to GCC summit and cluster meeting

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Summary of ActivitiesCo

mpi

latio

n Pl

atfo

rm

Goteburg, January 31, 2008◦ Initial list of topics and contact people◦ Engineer position on Transactional Memory in GCC; offered to

Martin Schindewolf from TU Karlsruhe, April-December Barcelona, June 2, 2008

◦ Invited speakers from SuSE/Prague, TU Karlsruhe and École des Mines to present current research and development in GCC

Paris, November 28, 2008◦ Presentations by members from INRIA/Saclay and ISP/RAS◦ TM in GCC – adopted by major GCC maintainer◦ Engineer position on JIT compilation for CIL bytecode

Paphos, January 29, 2009◦ Inter-cluster static-dynamic compilation w/ virtualization cluster◦ Inter-cluster split vectorization w/ adaptive compilation cluster

Munich, June 4, 2009◦ Finalize strategy on static-dynamic compilation initiative◦ Presentation by members from Bilkent/Ankara,

STEricsson/Eindhoven, INRIA/Rennes

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Inter-cluster collaborationCo

mpi

latio

n Pl

atfo

rm

Transactional memory support(w/ programming models and operating systems)Continued R&D effort includes Ph.D. thesis (T. U. Karlsruhe), INRIA Saclay, U. of Bologna and RedHat

Polyhedral compilation framework(w/ adaptive compilation)Originated from summer internship, strengthens open collaboration between IBM Haifa, École des Mines, INRIA Saclay and AMD Austin (may extend to other partners, including Vector Fabrics, Bilkent)

Static-dynamic split compilation(w/ virtualization and adaptive compilation)Initial participants: Ghent U., Thales, INRIA Rennes, INRIA Saclay and IBM Haifa

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Task Force onReliability and Availability

WP2

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Progress Indicators

# Active members 28# Companies involved 4# Publications 14# Joint papers 5# Joint papers with industry -

TF R

elia

bilit

y

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Scientific ChallengesTF

Rel

iabi

lity

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Summary of ActivitiesTF

Rel

iabi

lity

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Inter-cluster collaborationTF

Rel

iabi

lity

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119

Task Force onApplications

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A more systematic approach for analyzing real applications should be found. This should involve finding the characteristics of real applications vs. 4 benchmarks. Quantitative figures for comparing the different platforms should be provided to demonstrate the potential for further research and development.Reco

mm

enda

tion

sRecommendations

Auteur
Voor Nacho
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Progress Indicators

# Active members 23# Companies involved 2# Publications 46# Joint papers 21# Joint papers with industry -

TF A

pplic

atio

ns

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Scientific ChallengesTF

App

licat

ions

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Summary of ActivitiesTF

App

licat

ions

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Inter-cluster collaborationTF

App

licat

ions

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Task Force onLow Power

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Progress Indicators

# Active members 16# Companies involved 1# Publications 11# Joint papers 3# Joint papers with industry -

TF L

ow P

ower

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Scientific ChallengesTF

Low

Pow

er

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Summary of ActivitiesTF

Low

Pow

er

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Inter-cluster collaborationTF

Low

Pow

er

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Task Force onEducation & Training

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Progress Indicators

# Active members 8# Companies involved 2# Publications 2# Joint papers -# Joint papers with industry -

TF E

duca

tion

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Scientific ChallengesTF

Edu

catio

n

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Summary of ActivitiesTF

Edu

catio

n

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Inter-cluster collaborationTF

Edu

catio

n

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Agen

daAgenda

08:30–9:00 Private Meeting Reviewers9:00-9:15 Introduction + Recommendations (Koen)

9:15–9:45 Administrative aspects + WP 4 (Koen, Wouter)

9:45-10:00 WP1: Mobility (Mike)10:00-10:30 BREAK

10:30-12:00 WP2: Research (Olivier, Cluster Coordinators)

12:00-13:00 LUNCH13:00-13:30 WP3: Spreading Excellence (Per)13:30-14:15 HiPEAC Roadmap (Marc)14:15-14:30 BREAK 14:30-15:30 Private Meeting EC15:30-16:00 Feedback08:30–9:00 Private Meeting Reviewers

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136

Conference Summer School Journal Roadmap Newsletter Technical Reports

Website Web Seminars Industrial Workshops Promoting Start-Ups Award Program

WP3

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eWP3: Spreading Excellence

Visibility

Integration

Spreading Excellence

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HiPEAC 2009: Paphos, CyprusJanuary 26-28, 2009196 attendants, 12 industry97 papers submitted, 27

accepted37 grants

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HiPEAC Conference

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Workshops & Tutorials: 155 attendants Workshops:

◦ GROW: GCC Research Opportunities Workshop◦ 3rd Workshop on Interconnection Network Architectures: On-Chip, Multi-

Chip◦ 2nd Workshop on Programmability Issues for Multi-Core Computers

(MULTIPROG-2009)◦ 1st Workshop on Rapid Simulation and Performance Evaluation: Methods

and Tools (RAPIDO09)◦ 3rd HiPEAC Workshop on Reconfigurable Computing WRC 2009◦ 1st Workshop on Design for Reliability (DFR)◦ 3rd Workshop on Statistical and Machine learning approaches to

Architectures and compilation (SMART'09) Tutorials:

◦ Tutorial on Architecture Design for Soft Errors, Joel Emer & Shubu Mukherjee, Intel Corporation

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HiPEAC Conference

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139

Co-chairs: Andre Seznec, IRISA/INRIA, France; Joel Emer, INTEL/MIT, USA

Local arrangements chair: Yiannakis Sazeides, University of Cyprus, Cyprus

Program co-chairs: Michael O'Boyle, University of Edinburgh, UK; Margaret Martonosi, Princeton University, USA

Workshops/Tutorials chair: Stefanos Kaxiras, University of Patras, Greece

Publicity chair: Hans Vandierendonck, Ghent University, Belgium

Publications chair: Theo Ungerer, University of Augsburg, Germany

Submissions chair: Michiel Ronsse, Ghent University, Belgium

Finance & Registrations chair: Wouter De Raeve, Ghent University, Belgium

Web chair: Klaas Millet, Ghent University, Belgium

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PISAGeneral Chairs:

◦Piero Foglia (Pisa)◦Yale Patt (Texas at Austin)

Program chairs:◦Paolo Faraboschi (HP)◦Evelyn Duesterwald (IBM)

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The management report for the formal review should rank the HiPEAC conference relative to the list of the top conferences.

Reco

mm

enda

tion

sRecommendations

CGO

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Ranking:◦Existing rankings: no solid method◦Which criteria to rank?

Acceptance rate Citations

◦Conferences to benchmark against? ACM EMSOFT ACM LCTES CGO Europar

Conf

eren

ce R

anki

ngConference Ranking

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Citation Results◦Source: “Google Scholar”

Conf

eren

ce R

anki

ngConference Ranking

1 2 3 4 5 6 7 8 9 10 >10

LCTES 5 2 - - - 2 2 - - - -HiPEAC 1 - - - - - - - - 1 -EMSOFT 4 - 1 - - - - 1 - 1 -CGO 7 1 2 4 1 2 1 1 - 1 12EUROPAR 5 2 - - - - - - - - -

The number of papers from a conference that were cited x times since 2005.

• In general, very few hits• Could be improved by being added to IEEE or ACM DL

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Courses on topics covered by the HiPEAC research agenda

Teaching staff: academic and industrial researchers, European & non-European

PhD Poster Session

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eACACES Summer School

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376 applicants (294 in 2007)201 admitted (maximum

capacity)26 countries represented28 delegates from 17 companies140 PhD students64 grants (out of 107 requested)80 posters

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ACACES ‘08 Summer School

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ACACES ‘08 Summer SchoolLecturer Course title

Slot 1

Mary Lou Soffa Dynamic, Path and Model-Based Code Optimizations

Chaitali Chakrabarti + Trevor Mudge Low Power System Design

Josep Torrellas Dynamic, Path and Model-Based Code Optimizations

Slot 2

Nikil Dutt Bus-based On-Chip Communication Architectures

Paolo Ienne Automatic Customization of Embedded Processors

Dean Tullsen Multicore and multithreaded processor architectures

Slot 3Luca Benini

Communication-dominated architectures: toward Networks on Chip

Babak Falsafi Bridging the Processor Memory Performance Gap

Leendert Van Doorn Virtualization Technologies

Slot 4

Olav LysneMultiprocessor Interconnection Networks; Routing, Fault Tolerance and Scalabilty

Christos KozyrakisTransactional Memory: Concepts, Implementations, and Opportunities

Wayne Luk Reconfigurable Technology and Custom Computing

Keynote: Yale Patt:“The Multi-core Era: What does it mean? (and even more importantly, what does it NOT mean?)”

Invited talk: Peter Magnusson:“What your mother should have taught you about entrepreneurship”

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ACACES 2009David Albonesi Cornell University Power- and Reliability- Aware Microarchitecture

Lieven Eeckhout

Ghent University Performance Evaluation and Benchmarking

Kim Hazelwood University of Virginia Process Virtualization and Symbiotic Program Optimization

Bruce Jacob University of Maryland Embedded Systems, Memory Systems, and Embedded Memory Systems

Jaejin Lee Seoul National University Compilers and Runtimes Support for Explicitly Managed Memory Hierarchies

Radu Marculescu

Carnegie Mellon University Interconnects

Grant Martin Tensilica, Inc. Practical System-Level Design Methodologies for Processor-Centric SoC and Embedded Systems

Paul McKenney IBM LTC Performance, Scalability, and Real-Time Response From the Linux Kernel

Walid Najjar University of California Riverside

Opportunities and Challenges of Reconfigurable Computing

Peter Puschner Vienna University of Technology

WCET Analysis: Problems, Methods, and Time-Predictable Architectures

Ram Ramanujam

Louisiana State University Optimizations for multi-core and GPGPU architectures

David Wood University of Wisconsin-Madison

Transactional MemoryKeynote by Steven Furber

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Transactions on HiPEACPeriodic journalThree month reviewing cycle

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HiPEAC Journal

Paper acceptance

Published on website

HiPEAC Journal

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3rd Volume◦4 issues◦22 papers submitted◦15 accepted

Volume 4◦Issue 1 ready

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HiPEAC Journal

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Efforts should be made to increase the number of submissions to the HiPEAC journal in order to raise its quality and standing.

Reco

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Consider other publisher than Springer

Invite best papers from other conferences

Arrange special issues on hot topics

Extend editorial boardShorter review period

HiPE

AC Jo

urna

lHiPEAC Journal

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152

Quarterly printed newsletterExternal communication

◦Announcing events◦Activity reports◦HiPEAC news◦Guest columns◦PhD news◦Start-Ups

Freely available to all members and interested partiesW

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Exc

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nce

HiPEAC Newsletter

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5 issues, printed on 730 copies

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HiPEAC Newsletter

Info 13: January 2008

Info 14: April 2008

Info 15: July 2008Info 16: October 2008

Info 17: January 2009

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HiPEAC Tech Reports

Published material

•Publication database•Mined from the Web•Joint papers

Research Findings

•Uploaded to the website•Time-stamping•Lightweight•Open-source

Auteur
Georgi presentatie, hier of bij recommendations
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155

The repository of Task 3.6 should be urgently implemented

Reco

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sRecommendations

Auteur
Georgi
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Main instrument of communication

Developed and maintained by technical staff

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HiPEAC WebsiteEventsNewsCluster presentationRegistration for activitiesPublication databasePresentation databaseReimbursementGrant application

External

Steering committeeAgenda, MinutesReference documentsFinancial overviewProgress indicatorsGrant rankingFunding request moderation

Internal

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301 867 hits461 new registrations between

02/08-01/0940 563 visitors, 50/50

new/returning

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HiPEAC Website

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158

152 visiting countries

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HiPEAC Website

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New website launched May 14◦New layout

Modern look HiPEAC Colours

◦New structure Easier to find what you’re looking for Mimicking the project’s structure Dynamic menus

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HiPEAC Website

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Increase integration, trainingStreaming and downloads of

keynotes, presentations,...Recorded web seminars:

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Web Seminars

Title Speaker Date # downloads (10/2008-01/2009)

NVIDIA CUDA Software and GPU Parallel Computing Architecture

David Kirk (NVIDIA) April 16, 2008 10

Industrial and Research Challenges in the Area of Multi-Core and Many Cores

Avi Mendelson (Intel) December 19, 2008 20

Thermal Modeling, Analysis and Management of Multi-Processor Systems-on-Chip

David Atienza (Universidad Complutense de Madrid, EPFL)

January 7, 2009 7

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Streamed Web Seminars:◦Available only at the moment of the

presentation◦10 presented in period 1

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Web Seminars

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The web seminars should be more strongly promoted and numbers of downloads for each seminar should be presented

Reco

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Downloads data (October 2008-Jan 2009):

Web

Sem

inar

sWeb Seminars

NVIDIA CUDA Software and GPU Parallel Computing Architecture

David Kirk (NVIDIA)

April 16, 2008 10

Industrial and Research Challenges in the Area of Multi-Core and Many Cores

Avi Mendelson (Intel)

December 19, 2008

20

Thermal Modeling, Analysis and Management of Multi-Processor Systems-on-Chip

David Atienza (Universidad Complutense de Madrid, EPFL)

January 7, 2009

7

Auteur
Nacho
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Strengthen relationships between the organizing company and HiPEAC community

Hosted by a company◦Spring Industrial Workshop◦Autumn Industrial Workshop

During the Computing Systems Week

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Industrial workshops

Exposure of research topics

Relevant research results

Industrial priorities and opinions

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HP LabsJune 4th, 2008121 attendants

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Industrial Workshops

Thales R&TNovember 26,

2008104 attendants

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Start-ups are privileged partnersEasy access to resources of the

networkPromoting and stimulating young

companiesStimulating new start-ups (yearly

event)Presentation in the HiPEAC

NewsletterMembership through contact

person

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HiPEAC Start-Ups

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AcumemCaps EnterpriseNanochronousNema LabsQuviQSplitted desktopiNOCS

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HiPEAC Start-Ups

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Stimulate publishing in selected conferences

Increase European visibilityCertificate + Financial AwardFunded by external resources

◦Positive balance from conference/summer school, other funding

A member can receive the (financial) award only onceW

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Exc

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nce

HiPEAC Award Program

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Conferences (selected by SC):◦ Symposium on Principles of Programming Languages (POPL)◦ Conference on Programming Language Design and

Implementation (PLDI)◦ Conference on Architectural Support for Programming

Languages and Operating Systems (ASPLOS)◦ International Symposium on Computer Architecture (ISCA)◦ International Symposium on High Performance Computer

Architecture (HPCA)◦ Symposium on Field-Programmable Custom Computing

Machines (FCCM)◦ Design Automation Conference (DAC)◦ Symposium on Microarchitecture (MICRO)

WP3

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eHiPEAC Award Program

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POPL

PLDI

ASPLOS

ISCA

HPCA

FCCM

DAC

MICRO

WP3

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eHiPEAC Award Program

15 papers awarded10 financial awards

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Agen

daAgenda

08:30–9:00 Private Meeting Reviewers9:00-9:15 Introduction + Recommendations (Koen)

9:15–9:45 Administrative aspects + WP 4 (Koen, Wouter)

9:45-10:00 WP1: Mobility (Mike)10:00-10:30 BREAK

10:30-12:00 WP2: Research (Olivier, Cluster Coordinators)

12:00-13:00 LUNCH13:00-13:30 WP3: Spreading Excellence (Per)13:30-14:15 HiPEAC Roadmap (Marc)14:15-14:30 BREAK 14:30-15:30 Private Meeting EC15:30-16:00 Feedback08:30–9:00 Private Meeting Reviewers

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Q&A

Questions & Answers