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ECE1371 Advanced Analog Circuits Higher-Order ∆Σ Modulators and the ∆Σ Toolbox Richard Schreier [email protected] ECE1371 2 NLCOTD: Dynamic Flip-Flop Standard CMOS version Can the circuit be simplified? Is a complementarty clock necessary? D Q CK Q

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Page 1: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 Advanced Analog Circuits

Higher-Order ∆Σ Modulatorsand the ∆Σ Toolbox

Richard [email protected]

ECE1371 2

NLCOTD: Dynamic Flip-Flop• Standard CMOS version

• Can the circuit be simplified?Is a complementarty clock necessary?

D Q

CKQ

Page 2: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 3

Review: A ∆Σ ADC System

∆ΣModulator

DigitalDecimator

U

V

W

LoopFilter

DAC

U V

E

V (z ) = STF (z )U( z ) + NTF (z )E (z )

STF (z ): signal transfer functionNTF (z ): noise transfer functionE (z ): quantization error

desired

shaped

Nyquist-ratePCM Data

noise

f s 2⁄f B

f s 2⁄f B

f B

signal

Y

ECE1371 4

Review: MOD1

QUE

NTF z( ) 1 z 1––( )=STF z( ) 1=z-1

z-1

V

0 0.1 0.2 0.3 0.4 0.50

1

2

3

4NTF ej 2πf( ) 2

Normalized Frequency ( f )

ω2≅

NTF poles & zeros:

IQNPπ2σe

2

3------------- OSR( ) 3–=

Page 3: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 5

Review: MOD2

Q1z−1

zz−1

U V

E

NTF z( ) 1 z 1––( )2=STF z( ) z 1–=

0 0.1 0.2 0.3 0.4 0.50

8

16

NTF ej 2πf( ) 2

Normalized Frequency ( f )

ω4≅

NTF poles & zeros:

IQNPπ4σe

2

5------------- OSR( ) 5–=

ECE1371 6

Review Summary• ∆Σ works by spectrally separating the

quantization noise from the signalRequires oversampling. .Achieved by the use of filtering and feedback.

• A binary DAC is inherently linear,and thus a binary ∆Σ modulator is too

• MOD1-CT has inherent anti-aliasing

• MOD1 has NTF (z) = 1 – z–1

⇒ Arbitrary accuracy for DC inputs;9 dB/octave SQNR-OSR trade-off.

• MOD2 has NTF (z) = (1 – z–1)2⇒ 15 dB/octave SQNR-OSR trade-off.

OSR f s 2f B( )⁄≡

Page 4: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 7

MODN[Ch. 4 of Schreier & Temes]

• MODN’s NTF is the Nth power of MOD1’s NTF

Q1z−1

zz−1U Vz

z−1

NTF z( ) 1 z 1––( )N=STF z( ) z 1–=

N integrators(N–1) non-delaying, 1 delaying

ECE1371 8

NTF Comparison

NT

Fe

j2πf

()

(dB

)

Normalized Frequency ( f )10

-310

-210

-1–100

–80

–60

–40

–20

0

20

40

MOD1

MOD2

MOD3

MOD4

MOD5

Page 5: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 9

Predicted Performance• In-band quantization noise power

• Quantization noise drops as the (2 N+1)th powerof OSR— (6N+3) dB/octave SQNR-OSR trade-off

IQNP NTF e j 2πf( ) 2 See f( )⋅ fd

0

0.5 OSR⁄

∫=

2πf( )2N 2σe2⋅ fd

0

0.5 OSR⁄

∫≈

π2N

2N 1+( ) OSR( )2N 1+-------------------------------------------------------σe

2=

ECE1371 10

Improving NTF Performance–NTF Zero Optimization

• Minimize the integral of over thepassband

Normalize passband edge to 1 for ease ofcalculation:

NTF 2

–1 1a–a

H f( )2

Need to find the ai which minimize

x 2 a12–( )2 x 2 a2

2–( )2 xd1–

1∫ , n = 4

x 2 x 2 a12–( )2 xd

1–1

∫ , n = 3

x 2 a12–( )2 xd

1–1

∫ , n = 2

f/fB

the integral

Page 6: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 11

Solutions Up to Order = 8Order

Optimal Zero PlacementRelative to fB

SQNRImprovement

1 0 0 dB

2 3.5 dB

3 0, 8 dB

4 13 dB

5 0, [Y. Yang] 18 dB

6 ±0.23862, ±0.66121, ±0.93247 23 dB

7 0, ±0.40585, ±0.74153, ±0.94911 28 dB

8 ±0.18343, ±0.52553, ±0.79667, ±0.96029 34 dB

1 3⁄±

3 5⁄±

3 7⁄ 3 7⁄( )2 3 35⁄–±±

5 9⁄ 5 9⁄( )2 5 21⁄–±±

ECE1371 12

Topological Implication• Feedback around pairs integrators:

1z−1

zz−1

-g

1z−1

1z−1

-g

2 Delaying Integrators Non-delaying + DelayingIntegrators (LDI Loop)

Poles are the roots of

1 g 1z 1–------------

2+ 0=

i.e. z 1 j g±=

Not quite on the unit circle,but fairly close if g<<1.

Poles are the roots of1 gz

z 1–( )2--------------------+ 0=

i.e. z e jθ±=

Precisely on the unit circle,θcos 1 g 2⁄–=,

regardless of the value of g.

Page 7: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 13

Problem: A High-Order ModulatorWants a Multi-bit Quantizer

E.g. MOD3 with an Infinite Quantizerand Zero Input

0 10 20 30 40-7

-5

-3

-1

1

3

5

7

Sample Number

v

Quantizer input getslarge, even if the

6 quantizer levels areused by a small input.

input is small.

ECE1371 14

Simulation of MOD3-1b(MOD3 with a Binary Quantizer)

• MOD3-1b is unstable, even with zero input!

0 10 20 30 40–1

0

1

0 10 20 30 40–200

–100

0

100

200

Sample Number

v

yHUGE!

Longstringsof +1/–1

Page 8: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 15

Solutions to the Stability ProblemHistorical Order

1 Multi-bit quantizationInitially considered undesirable because we lose theinherent linearity of a 1-bit DAC.

2 More general NTF (not pure differentiation)Lower the NTF gain so that quantization error isamplified less.Unfortunately, reducing the NTF gain reduces theamount by which quantization noise is attenuated.

3 Multi-stage (MASH) architecture

• Combinations of the above are possible

ECE1371 16

Multi-bit QuantizationA modulator with NTF = H and STF = 1 isguaranteed to be stable if at all times,where and

• In MODN , so,

and thus

• impliesMODN is guaranteed to be stable with an N-bitquantizer if the input magnitude is less than ∆/2 = 1.This result is quite conservative.

• Similarly, guarantees that MOD N isstable for inputs up to 50% of full-scale

u u max<u max nlev 1 h 1–+= h 1 h i( )i 0=

∞∑=

H z( ) 1 z 1––( )N=h n( ) 1 a1– a2 a3– … 1–( )N aN 0…, , , , ,{ }= ai 0>

h 1 H 1–( ) 2N= =

nlev 2N= u max nlev 1 h 1–+ 1= =

nlev 2N 1+=

Page 9: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 17

M-Step Symmetric Quantizer∆ = 2, (nlev = M + 1)

• No-overload range: ⇒

M even: mid-treadM odd: mid-rise

y

e = v – y

v

e = v – y

v

y1

M

–M

2

M

–M

–M –1 M +1 –M –1 M +1

v: odd integersfrom – M to +M

v: even integersfrom – M to +M

y nlev≤ e ∆ 2⁄≤ 1=

ECE1371 18

Inductive Proof of Criterion• Assume STF = 1 and

• Assume for .[Induction Hypothesis]

Then⇒⇒

• So by induction for all i > 0

h 1

n∀( ) u n( ) u max≤( )e i( ) 1≤ i n<

y n( ) u n( ) h i( )e n i–( )i 1=∞∑+=

u max h i( ) e n i–( )i 1=∞∑+≤

u max h i( )i 1=∞∑+≤ u max h 1 1–+=

u max nlev 1 h 1–+=y n( ) nlev≤e n( ) 1≤

e i( ) 1≤

Page 10: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 19

More General NTF• Instead of with ,

use a more generalRoots of B are the poles of the NTF and must beinside the unit circle.

NTF z( ) A z( ) B z( )⁄= B z( ) z n=B z( )

Moving the poles awayfrom z = 1 toward z = 0makes the gain of theNTF approach unity.

ECE1371 20

The Lee Criterion for Stabilityin a 1-bit Modulator:

[Wai Lee, 1987]

• The measure of the “gain” of H is the maximummagnitude of H over frequency, aka the infinity-norm of H:

Q: Is the Lee criterion necessar y for stability?No. MOD2 is stable (for DC inputs less than FS)but .

Q: Is the Lee criterion sufficient to ensure stability?No. There are lots of counter-examples,but often works.

H ∞ 2≤

H ∞ maxω 0 2π,[ ]∈

H ejω( )≡

H ∞ 4=

H ∞ 1.5≤

Page 11: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 21

Simulated SQNR vs.5th-order NTFs; 1-b Quant.; OSR = 32

H ∞

1 1.25 1.5 1.75 250

70

90

1 1.25 1.5 1.75 2–20

–10

H ∞

umax

(dB

FS

)S

QN

R(d

B)

0

Stable input limit dropsas increases.H ∞

H ∞

SQNR has a broad maximum

cliff!

ECE1371 22

SQNR Limits— 1-bit Modulation

OSR

Pea

k S

QN

R (

dB)

N =

4

N =

3

N = 2

N = 1

N =

6N

= 5

N =

7N

= 8

4 8 16 32 64 128 256 512 10240

20

40

60

80

100

120

140

Page 12: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 23

SQNR Limits for 2-bit Modulators

N = 4 N = 3 N = 2

N = 1

N =

6N

= 5

N =

7N

= 8

OSR

Pea

k S

QN

R (

dB)

4 8 16 32 64 128 256 512 10240

20

40

60

80

100

120

140

ECE1371 24

SQNR Limits for 3-bit Modulators

N = 4 N = 3 N = 2

N = 1

N =

6N

= 5

N =

7N

= 8

OSR

Pea

k S

QN

R (

dB)

4 8 16 32 64 128 256 512 10240

20

40

60

80

100

120

140

Page 13: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 25

Generic Single-Loop ∆Σ ADC• Linear Loop Filter + Nonlinear Quantizer:

E

L1

L0 Y VU

Inverse Relations:L1 = 1 – 1/NTF, L0 = STF / NTF

Y L0U L1V+=V Y E+=

NTF 11 L1–---------------= & STF L0 NTF⋅=

V STF U⋅ NTF E⋅+= , where

ECE1371 26

∆Σ Toolboxhttp://www.mathworks.com/matlabcentral/fileexchange

Search for “Delta Sigma Toolbox”

NTF (and STF)available.

Specify OSR,lowpass/bandpass,

no. of Q. levels.

synthesizeNTF

realize-

predictSNR,

ABCD: state-space descriptionof the modulator.

scaleABCD

Parameters fora specifictopology.

stuffABCD

mapABCD

Time-domainsimulation andSNR measure-

ments.

simulateDSM,

calculateTF

simulateSNR

mapCtoDsimulateESLdesignHBF

Also

Manual is delsig.pdf (App. B of Schreier & Temes)

NTF

Page 14: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 27

∆Σ Toolbox Modulator Model

L1

L0 Y VU

Quantizer:M = 1 M = 2 M = 3

Mid-tread quantizer;v: even integers [ – M,+M ]

Mid-rise quantizer;v: odd integers [ – M,+M ]

Modulator:

[ -M, +M ][ -M, +M ]

∆ = 2

NTF 11 L1–---------------=

STFL0

1 L1–---------------=

yv

y

v1

–1

2

–2

2

ee

–2 3–3 4–4y

v3

1

-1

-3

e

Loop filter can be specified by NTF orby ABCD, a state-space representation

ECE1371 28

NTF SynthesissynthesizeNTF

• Not all NTFs are realizableCausality requires , or, in the frequencydomain, . Recall

• Not all NTFs yield stable modulatorsRule of thumb for single-bit modulators:

[Lee].

• Can optimize NTF zeros to minimize themean-square value of H in the passband

• The NTF and STF share poles, and in somemodulator topologies the STF zeros are notarbitraryRestrict the NTF such that an all-pole STF is maximallyflat. (Almost the same as Butterworth poles.)

h 0( ) 1=H ∞( ) 1= H z( ) h 0( )z 0 h 1( )z 1– …+ +=

H ∞ 1.5<

Page 15: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 29

Lowpass Example [ dsdemo1 ]5th-order NTF, all zeros at DC

• Pole/Zero diagram:

OSR = 32;H = synthesizeNTF(5);plotPZ (H);

f = linspace(0,0.5);z = exp(2i*pi*f);H_z = evalTF (H,z);plot(f,dbv(H_z));g = rmsGain (H,0,0.5/OSR)

ECE1371 30

Lowpass NTF

0 0.5–80

–60

–40

–20

0

rms in-band

0 1/64–60

–50

–40

Out-of-band gain = 1.5

gain = –47 dB

dB

Normalized Frequency ( f /fs)

Page 16: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 31

Improved 5 th-Order Lowpass NTFZeros optimized for OSR=32

OSR = 32;H = synthesizeNTF (5,OSR,1);...

Zeros spread acrossthe band-of-interest tominimize the rms valueof the NTF.

optimizationflag

ECE1371 32

Improved NTF

0 0.5–80

–60

–40

–20

0

0 1/64–80

–70

–60rms gain = –66 dB

dB

Normalized Frequency ( f /fs)

Page 17: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 33

Bandpass ExampleOSR = 64;f0 = 1/6;H=synthesizeNTF (6,OSR,1,[], f0 );...

center frequency

[] or NaN meansuse default value,i.e. Hinf = 1.5

ECE1371 34

Bandpass NTF and STF

0 0.5–60

–40

–20

0

NTFdB

Normalized Frequency ( f /fs)

all-pole STF with same poles as∆Σ toolbox NTF

Page 18: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 35

Summary: NTF Selection• If OSR is high, a single-bit modulator may work

• To improve SQNR,Optimize zeros,Increase , orIncrease order.

• If SQNR is insufficient, must use a multi-bitdesign

Can turn all the above knobs to enhanceperformance.

• Feedback DAC assumed to be ideal

H ∞

ECE1371 36

NTF-Based Simulation [ dsdemo2 ]

• In mex form; 128K points in < 0.1 sec

order=5; OSR=32;ntf = synthesizeNTF (order,OSR,1);N=2^17; fbin=959; A=0.5; % 128K pointsinput = A*sin(2*pi*fbin/N*[0:N-1]);output = simulateDSM (input,ntf);spec = fft(output.* ds_hann (N)/(N/4));plot( dbv (spec(1:N/(2*OSR))));

0 1024 2048–200

–150

–100

–50

0

FFT Bin Number (128K-point FFT)

dBF

S/N

BW

NBW=1.5 bins

Page 19: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 37

Simulation Example Cont’d

0 0.5–120

–100

–80

–60

–40

–20

0

dBF

S/N

BW

0 50 100

–1

0

1

Time (sample number)

NBW = 1.8x10–4 fs(8k-point FFT)

u

v

Normalized Frequency ( f /fs)

ECE1371 38

SNR vs. Amplitude: simulateSNR

Input Amplitude (dBFS)

SQ

NR

(dB

)

–100 –80 –60 –40 –20 00

20

40

60

80

100

Peak SNR is 85 dB.Max. input is –3 dBFS.

[snr amp] = simulateSNR (ntf,OSR);plot(amp,snr,'b-^');

OSR=32

Page 20: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 39

MOD2 Expanded

Q1z−1

zz−1

U VE

z-1

u n( )z-1

x 1 n( )

x 1 n 1+( ) x 2 n 1+( )Q

x 2 n( ) v n( )

Difference Equations:v n( ) Q x 2 n( )( )=

x 2 n 1+( ) x 2 n( ) v n( )– x 1 n 1+( )+=x 1 n 1+( ) x 1 n( ) v n( )– u n( )+=

ECE1371 40

Example Matlab™ Codefunction [v] = simulateMOD2(u)

x1 = 0; x2 = 0; for i = 1:length(u) v(i) = quantize( x2 ); x1 = x1 + u(i) - v(i); x2 = x2 + x1 - v(i);

endreturn

function v = quantize( y ) if y>=0 v = 1; else v = -1; endreturn

Page 21: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 41

NLCOTD: True Single-PhaseDynamic FF

+ Clock not inverted anywhere

+ Small

+ Fast

D

C Q

ECE1371 42

TSPFF Operation

D

C Q

C

C

X

Y Z

DCXYZQ

d

~d

d~d

d

Can drop inverter.(Handy if makinga divider.)

Page 22: Higher-Order∆ΣModulators and the ∆Σ Toolboxjohns/ece1371/slides/Modn+DSToolbox-2.pdf · ECE1371 Advanced Analog Circuits Higher-Order∆ΣModulators and the ∆Σ Toolbox Richard

ECE1371 43

TSPFF Gotchas• Leakage:

Won’t work if clock is too slow.Possible high current if clock is stopped.

Need to add devices to hold the dynamic nodes at asafe value.

• No positive feedbackVulnerable to metastability.