high-speed serial interface - yonseitera.yonsei.ac.kr/class/2017_2_2/lecture/lect 8 linear... ·...
TRANSCRIPT
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High-speed Serial Interface
Lect. 8: Linear Equalizers
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Why equalization?• Inter-symbol interference (ISI) caused by frequency-
dependent loss of channel
TxDriver Channel Rx
RxEqualizer
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Equalizer Frequency ResponseGain [dB]
Frequency (log)
0
fBW
-3
fBW,EQ
High-pass filter / High-frequency boosting
Continuous Time Linear Equalizer (CTLE)
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CTLE Frequency ResponseAssuming channel has one pole, CTLE should provide 1 zero and 2 poles
Gain [dB]
Frequency (log)
ADC,EQ
fz fp1
AAC,EQ
fp2
High frequency boosting
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Tunability• CTLE should be tunable
– Channel variation• Variations in channel fabrication • Uncertainty in channel modeling• Channel degradation/defect after usage
– PVT variation of equalizer
Tunability is a must
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Tunability• Tuning pole/zero locations
Gain [dB]
Frequency (log)
TuningZero location
FixedADC,EQ
ControllingAAC,EQ
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Controllability• Tuning DC gain
Gain [dB]
Frequency (log)
TuningDC gain
ControllingADC,EQ
FixedAAC,EQ
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Passive CTLE– Various passive high-pass filters available
No power consumption
But - Lossy- PVT dependent- Difficult to achieve 50-ohm matching- Difficult to tune- Often large size
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Active CTLE • Differential amplifier
– Basic differential amp. has 1 pole from load capacitance
| |~ //1
VDD
VSS
OUT-
IN+
OUT+
IN-
Ibias
Zload Zload
gm gm
Cload Cload
1
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Active CTLE• Inductive load
– Shunt inductor providesa pole/zero pair
| |~ //1
VSS
OUT-
IN+
OUT+
IN-
Ibias
Rload Rload
gm gm
Cload Cload
Lload Lload
VDD
1
1
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Source Degeneration for CTLE
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1 2
//1
VDD
VSS
OUT-
IN+
OUT+
IN-
Ibias/2
Zload Zload
gm gm
Cload CloadIbias/2
Zdeg
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Source Degeneration for CTLE– Capacitive generation provides high-frequency boosting since a
capacitor has lower impedance at high frequency
VDD
VSS
OUT-
IN+
OUT+
IN-
Ibias/2
Zload Zload
gm gm
Cload CloadIbias/2
Rdeg
Cdeg
1 2
//1
1
1 2 1
Design Exercise
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Limitations of CTLE• Channels may not be properly modeled with one
poleGain [dB]
Frequency (log)
Additional zero
Additional pole
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Limitations of CTLE
– Applicable to only ISIs due to linear frequency-dependent loss
– Other causes for ISI are;• Impedance mismatching• Cross-talk• Parasitic poles and zeros (ex: package parasitics)
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Limitations of CTLE• High-frequency Noise boosting
Gain [dB]
White noise
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Time-Domain Analysis– Frequency-Domain Analysis
• Freq. Response of Input x Freq. Response of Channel= Freq. Response of Output
– Time-Domain Analysis
x Equalizer
- Equalization: Force pre- and post-cursors to zero
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FIR Filter
IIR (Infinite Impulse Response) for CTLE
FIR (Finite Impulse Response)
Tap and Delay
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FIR Filter
- Difficult to implement Rx FIR filter
Tx FIR filter
Because the precise amount of delay (clock period) is not known in Rx
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FIR Filter- Any CTLE filter can be converted into a discrete-time domain filter
- IIR (Infinite Impulse Response)
- Hard to implement Rx FIR filter because the precise amount of delay (clock period) is not available in Rx
Tx FIR filter
FIR (Finite Impulse Response)
Tap and Delay
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Tx FIR
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Frequency-Domain Analysis
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Circuit implementation• Tx FIR can be easily implemented with current-mode drivers(For 2-tap Tx FIR)
– D1=D0 Vout,diff = +/- 100 x (C0 - C1)/4– D1≠D0 Vout,diff = +/- 100 x (C0 + C1)/4 – By setting C1/C0, Tx FIR is achieved
D1- D1+
C1
Positive channel
Negative channel 100Ω
VSS
D0+ D0-
C0
50Ω 50Ω
VDD
Main cursor 1st post-cursor
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Pre-/De-Emphasis– Tx FIR is also called Feed-Forward Equalizer (FFE) or
Pre-/De-Emphasis • Pre-emphasis: to enhance high-frequency components• De-emphasis: to reduce low-frequency components
NormalWaveform
De-emphasisWaveform
Pre-emphasisWaveform
Nominalswing
Nominal swing
Nominalswing