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High Speed Digital Systems High Speed Digital Systems laboratory laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

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Page 1: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

High Speed Digital Systems High Speed Digital Systems laboratorylaboratory

Midterm PresentationSpring 2009

Cellular Signal Source

Student : Hammad Abed Essam Masarwi

Instructor: Yossi Hipsh

Page 2: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

Project Description Project Description Designing Pulser which will illustrate

how the cellular works during receiving and transmitting sms message.

Pulser - will create a single / packet made of a short (0.5-1 nsec)/ long(10-13 nsec) pulse signal, with very low rise/fall time (200ps).

Page 3: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

Block DiagramBlock Diagram

Splitter

MC100EP11

OSC

F=50MHz

AND

MC100EP05

MUX

NC7SV157 MUX ים בוחרים בין יציאת-

BNCהרכיב הקודם לבין כניסת

1 Shot

MC74LCX74

MUX

Delay ChipMC100EP19

5

SN74LVC1T45DBVR

Translater

MC100EPT20 Delay Chip

MC100EP195

MicrostriplineExternal controllers (Dip switches)

ECL technology

Page 4: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

Signals waveformSignals waveform

After and operation~0.5nsec

Signal 1 after the translator and the delay

Signal 2 after the translator and the delay

Splitting the signal

Oscillator waveform

Vcc

Gnd

Level “1”

1-shot waveform

12ns

Level “0”

8ns

WIDE

SHOW THE SLOPES

Page 5: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

OutputOutput

output

Q

Q#

DC hight

Output #

Page 6: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

D-1318 PCB development D-1318 PCB development ::D-1318 Block diagram Electrical schemeTable of components and statusComponents places upon the

printed board

Page 7: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

PCB stack upPCB stack up

FR4Insulator -

1 Oz = 0.035 m”m

1 Oz = 0.035 m”m

PCB thickness ~1.6m”m

Components & microstriplines

GND

Vtt = 1.33[Volt]

Vcc = 3.3 [Volt]

Signal control L1

Signal control L2

FR4

FR4

FR4

FR4

FR4

Page 8: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

Parts ListParts ListName Component

codeStatus

1. Oscillator K1144ACE Valid

2. Mux NC7SV157 Valid

3. Dual supply bus SN74LVC1T45DBVR

Valid

4. 1-shot (Flip flops) MC74LCX74 Valid

5. Translator TTL to ECL MC100EPT20 Valid

6. Splitter MC100EP11 Valid

7. Programmable delay chip

MC100EP195 Valid

8. AND gate MC100EP05 Valid

9. SMA connectors - Valid

10.

Dip switch 4 switches 76RSB04ST Valid

11.

Dip switch 12 switches 76RSB12ST Valid

12.

Capacitors - Valid

13.

Resistors - Valid

Page 9: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

Electrical schemeElectrical scheme

Page 10: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

High speed Transmit ion High speed Transmit ion lineslines MC100EPT20 MC100EP11

1. pin 2 pin 72. pin 3 pin 6

MC100EP11 (1),(2) MC100EP1951. pin 1 pin 4 (1)2. pin 2 pin 5 (1)3. pin 3 pin 4 (2)4. pin 4 pin 5 (2)

MC100EP195 (1),(2) MC100EP051. pin 21 (1) pin 12. pin 20 (1) pin 2 3. pin 21 (2) pin 34. pin 20 (2) pin 4

MC100EP05 (OUTPUT) Pins : 6,7

Page 11: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

Microstripline features (PCB Microstripline features (PCB editor) editor)

Microstripline

Metal 1

t

h

w

Z0 = impedance of free space.

dielectric constant of substrate.w = width of strip.h = thickness ('height') of substrate .t = thickness of strip metallization.

Page 12: High Speed Digital Systems laboratory Midterm Presentation Spring 2009 Cellular Signal Source Student : Hammad Abed Essam Masarwi Instructor: Yossi Hipsh

ReferencesReferencesWikipedia

http://en.wikipedia.org/wiki/Microstrip

Microwaves, K. C. Gupta, New age international p. 198-201 .