high-speed circuit-tuning techniques based on lagrangian relaxation

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High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation Charlie Chung-Ping Chen ICCAD 99’ Embedded Tutorial Session 12A [email protected] (608)265114

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High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation. Charlie Chung-Ping Chen ICCAD 99’ Embedded Tutorial Session 12A. [email protected] (608)2651145. People Involved. Joint work - PowerPoint PPT Presentation

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Page 1: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

Charlie Chung-Ping Chen

ICCAD 99’ Embedded Tutorial

Session 12A

[email protected] (608)2651145

Page 2: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

People Involved

• Joint work Charlie Chen, University of Wisconsin at Madison

Chris Chu, Iowa State University

D. F. Wong, University of Texas at Austin

• Publication“Fast and Exact Simultaneous Gate and Wire Sizing by Lagrangian

Relaxation”, IEEE Transactions on Computer-Aided Design, July 1999

Page 3: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Acknowledgement

• Strategic CAD Labs, Intel Corp.

Steve Burns, Prashant Sawkar, N. Sherwani, and Noel Menezes

• IBM T. J. Watson Center

Chandu Visweswariah• C. Kime, L. He (UWisc-Madison)

Page 4: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Outline

• Motivation• Overview of Circuit Tuning Techniques• Lagrangian Relaxation Based Circuit Tuning

Page 5: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Motivation

• Double the work load and design complexity every 18 months

Page 6: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Motivation• Trends

– Increased custom design– Aggressive tuning for performance improvement– Shorter time to market– Interconnect effects severe– Signal integrity issues emerging

• Circuit Tuning– Can significantly improve circuit performance and signal integrity without major modification

Page 7: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Manual Sizing

• Pros – Takes advantage of human experience– Reliable– Simultaneously combines with other

optimization techniques directly

• Cons– Slow, tedious, limited, and error-prone

procedure– Rely too much on experience, requires

solid training– Optimality not guaranteed (don’t know

when to stop)

Change

Satisfy?

1000+ iterations

Simulate

Page 8: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Automatic Circuit Tuning• Pros

– Fast– Achieves the best performance with interconnect considerations– Explores alternatives (power/delay/noise tradeoff)– Boosts productivity– Optimality guaranty (for convex problems)– Insures timing and reliability

• Cons– Complicated tool development and support ($$)– Tool testing, integration, and training

Page 9: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Good Tuning Algorithm

• Fast• Optimality guaranteed (for convex problem)• Versatile• Easy to use• Solution quality index (error bound to the optimal

solution)• Simple (Easy to develop and maintain)

Page 10: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Static vs. Dynamic Sizing • Static Sizing

– Stage Based – Nature circuit decomposition, large scale tuning capability– Very reasonable accuracy (when using good model)– No need for sensitization vectors– Solves for all critical paths in a polynomial formulation– False paths; Potentially inaccurate modeling of slopes of input excitation

• Dynamic Sizing– Simulation based– More accurate – No false path problems– Need good input vectors; good for circuits for which critical paths are

known and limited– Takes care of a few scenario only– Relatively slower

Page 11: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

A Simple Sizing Problem• Minimize the maximum delay Dmaxmax by changing w1,…,wn

ww11

ww22

ww99

ww1010

ww1111 ww66ww88ww33

ww55

ww44ww77

DD11<D<Dmaxmax

DD22<D<Dmaxmax

niUwL

miDDtosubject

DMinimize

i

i

..1 ,

..1 ,)(

max

max

w

aa

bb

Page 12: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Existing Sizing Works

• Algorithm: fast, non-optimal for general problem formulation– TILOS (J. Fishburn, A. Dunlop, ICCAD 85’)

– Weight Delay Optimization (J. Cong et al., ICCAD 95’)

• Mathematical Programming: slower, optimal – Geometrical Programming (TILOS)

– Augmented Lagrangian (D. P. Marple et al., 86’)

– Sequential Linear Programming (S. Sapatnekar et al.)

– Interior Point Method (S. Sapatnekar et al., TCAD 93’)

– Sequential Quadratic Programming (N. Menezes et al., DAC 95’)

– Augmented Lagrangian + Adjoin Sensitivity (C. Visweswariah et al., ICCAD 96’, ICCAD97’)

• Is there any method that is fast and optimal?

Page 13: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Converge?

MathematicalProgramming

Algorithm

?

SLP

SQP

Augmented Lagrangian

TILOS

Weighted Delay

Fast Optimal

Page 14: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Heuristic Approach• TILOS: (J. Fishburn etc ICCAD 85’)

– Find all the sensitivities associated with each gate

– Up-Size one gate only with the maximum sensitivity

– To minimize the object function

ww44

ww1111

ww11

ww55

ww77 ww99ww88 ww1010

ww66

ww33ww22

DD11<D<Dmaxmax

DD22<D<Dmaxmax

Minimize DMinimize Dmaxmax

aa

bb

Page 15: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Weighted Delay Optimization

DriversDrivers LoadsLoads

• J. Cong ICCAD 95’

– Size one wire at a time in DFS order

– To minimize the weighted delay

– best weight?

ww33

ww55ww44

ww11 ww22 11DD11

22DD22

Minimize Minimize 11DD1 1 22DD22

Page 16: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Mathematical Programming

• Problem Formulation:

• Lagrangian:

• Optimality (Necessary) Condition: (Kuhn-Tucker Condition)

0 ,1

)()()(

i

wherem

ix

ig

ixfL

on)ty Conditi(Feasibilii

xi

g

ConditionaryComplementi

gi

m

ix

ig

ixf

xL

i

,0 ,0)(

) ( ,0

01

)()(0)(

mixgtosubject

xfMinimize

i ..1 ,0)(

)(

Page 17: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

PSLP v.s. SQP

• Penalty Sequential Linear Programming

• Sequential Quadratic Programming

mixxgxgtosubject

xPxxfxfMinimize

ii..1 ,0)()(

)()()(

mixxgxgtosubject

xxLxxxfxfMinimize

ii

t

..1 ,0)()(

)()()( 2

21

Page 18: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Lagrangian Methods• Augmented Lagrangian

• Lagrangian Relaxation

2

11))(())(()(

i

m

ii

i

m

ii cxgcxgxfMinimize

mnixgtosubject

xgxfMinimize

i

n

iii

.. ,0)(

)()( 1

miccxgtosubject

xfMinimize

iii ..1 0, ,0)(

)(

mnixg

nixgtosubject

xfMinimize

i

i

.. ,0)(

..1 ,0)(

)(

Page 19: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Lagrangian Relaxation Theory

mnixgtosubject

xgxfMinimize

i

n

iii

.. ,0)(

)()( 1

mixgtosubject

xfMinimize

i ..1 ,0)(

)(

• LRS (Lagrangian Relaxation Subproblem)

• There exist Lagrangian multipliers will lead LRS to find the optimal solution for convex programming problem

• The optimal solution for any LRS is a lower bound of the original problem for any type of problem

Page 20: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Lagrangian Relaxation

niUwL

miDDtosubject

DMinimize

i

i

..1 ,

..1 ,)(

max

max

w

niUwLtosubject

DDDMinimize

i

i

m

ii

..1 ,

))(( max1

max

w

niUwLtosubject

DMinimize

i

i

m

ii

..1 ,

)( 1

w

m

iiλe , we hav

DL

By 1

max

10

Lagrangian Relaxation

Page 21: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Lagrangian Relaxation

SLP

SQP

Augmented Lagrangian

TILOS

Weighted Delay

MathematicalProgramming

Algorithm

LagrangianRelaxation

Page 22: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Lagrangian Relaxation Framework

Update Multipliers

Weighted Delay Optimization

Converge?

Page 23: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Lagrangian Relaxation Framework

DD11

DD22

DDmaxmax

DD11 DD22

DDmaxmax

DD11 DD22

11 2211 22

More Critical -> More Resource -> More Weight

Page 24: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Weighted Minimization• Traverse the circuit in topological order

• Resize each component to minimize Lagrangian during visit

ww22 ww33

ww11

DD11

DD22

aa

bb

Minimize Minimize 11DD1 1 22DD22

Page 25: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Multipliers Adjustmenta subgradient approach

solution feasiblenearest to Project :2

,,0lim

),( :1

1kk

max

λStep

where

DDStep

kk

ikoldi

newi

• Subgradient: An extension definition of gradient for non-smooth function

• Experience: Simple heuristic implementation can achieve very good convergence rate

• Reference: Non-smooth function optimization: N. Z. Shor

Page 26: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Path Delay Formulation dd11 dd22

dd33

DD11

DD22

23

231

121

121

DdA

DddA

DddA

DddA

c

b

b

a

AAaa

AAbb

AAcc

• Exponential growing• More accurate • Can exclude false paths

Page 27: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Stage Delay Formulation

dd11 dd22

dd33

DD11

DD22

23

23

12

1

1

DdA

DdA

DdA

AdA

AdA

c

e

e

eb

ea

AAaa

AAbb

AAcc

AAee

• Polynomial size• Less accurate• Contains false paths

Page 28: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Compatible?

Stage Based Path Based

?

Page 29: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Both Multipliers Satisfy KCL(Flow Conservation)

jij input i

ikk output i

i

( ) ( )

11

22

3344

55

4343

3232

3131

5353

43 43 535331 31 3232

jij input i

ikk output i

i

( ) ( )

11

22

44

55

3,in 3,in 3,out3,out

4141

4242

5151

5252

33

Path BasedStage Based

Page 30: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Mixed Delay Formulation

Path Based

Stage Based

Stage Based

Page 31: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Compatible?

Stage Based Path Based

LagrangianRelaxation

Page 32: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Hierarchical Objective Function Decomposition

)\()()f( ii whwg ww

• Divide the Lagrangian into who terms (containing or not containing variable wi )

• Hierarchically update the Lagrangian during resizing

Page 33: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Intermediate Variables Cancellation

DD11

DD22

23

23

12

1

1

DdA

DdA

DdA

AdA

AdA

c

e

e

eb

ea

AAaa

AAbb

AAcc

AAee

aeae

bebe

e1e1

e2e2

c2c2

ae ae ++ be be == e1 e1 ++ e2e2

++

ae ae (Aa + + d1 ) + be be (Ab + + d1 ) + e1 e1 (d2 - - D1 ) + + e2 e2 (d3 - - D2 )

Page 34: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Decomposition and Pruning

• Flow Decomposition• Prune out all the gates with zero multipliers

Page 35: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Complimentary Condition Implications

• i i (Dii-Dmaxmax )= 0

• Optimal Solution– Critical Path, weight i i >= 0.0, path delay=Dmaxmax

– Non-critical path, weight i i = 0.0, path delay < Dmaxmax

Page 36: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Convergence Sequence

Lagrangian=Lower BoundWeighted Delay<=Maximum Delay

Any Feasible Maximum Delay= Upper Bound

Optimal Solution

# Iteration

Max Delay niUwLtosubject

DMinimize

i

i

m

ii

..1 ,

)( 1

w

Page 37: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Transistor Sizing Extension

Page 38: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Runtime and Storage RequirementRuntime and Storage Requirement

Circuit Name Circuit Size CPU Time (min.) Memory (MB)Adder (8 bits) 216 0.02 0.48

Adder (16 bits) 432 0.03 0.76

Adder (32 bits) 864 0.12 1.15

Adder (64 bits) 1728 0.25 1.75

Adder (128 bits) 3456 0.65 2.82

Adder (256 bits) 6912 3.08 5.37

Adder (512 bits) 13824 13.15 11.83

Adder (1024 bits) 27648 36.20 22.92

Page 39: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Runtime versus Circuit SizeRuntime versus Circuit Size

0

5

10

15

20

25

30

35

0 13824 27648# of Components

CP

U T

ime

(m

in.)

Page 40: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Storage versus Circuit SizeStorage versus Circuit Size

0

5

10

15

20

0 13824 27648# of Components

Me

mo

ry (

MB

)

Page 41: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Convergence of Subgradient Optimization

Convergence of Subgradient Optimization

0

20

40

60

80

100

120

140

0 50 100# of iterations

De

lay

(ns

)

Upper Bound

Lower Bound

Page 42: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Area vs. Delay Tradeoff CurveArea vs. Delay Tradeoff Curve

192.20

192.30

192.40

192.50

192.60

192.70

192.80

192.90

193.00

193.10

8.1 10.1 12.1 14.1 16.1 18.1 20.1Delay (ns)

Are

a (

mic

ron

sq

. x1

00

0)

Page 43: High-Speed Circuit-Tuning Techniques Based on Lagrangian Relaxation

C. Chen, ICCAD ‘99 Embedded Tutorial, Session 12AHigh-Speed Circuit-Sizing Techniques based on Lagrangian Relaxation

Conclusion

• Lagrangian Relaxation– General mathematical programming algorithm

– Optimality guarantee for convex programming problem

– Versatile

– No extra complication (no quadratic penalty function)

– Lagrangian multiplier provides connections between mathematical programming and algorithmic approaches

– Multipliers satisfy KCL (flow conservation)

– Hierarchical update objective function provides extreme efficiency

– Solution quality guaranteed (by providing lower bound)