gbpprorg/mil/warspy/dfm_boards.pdf · 2010-04-13 · u10 mc33063a vcc+5v d1 1n5819 c19 470pf-+ c22...

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ATV LCD KIT FOR DFM BOARDS

3 AUDIO IN FS2

4 LEVEL SW

5 AUDIO IN FS1

6 12V

7 VIDEO

8 SCL

9 SDA

M1

FM2400TSIM

1 RA2

2 RA3

3 T0CKI

4 MCLR/VPP

5 VSS

6 RB0

7 RB1

8 RB2

9 RB3 10RB4

11RB5

12RB6

13RB7

14VCC

15OSC2

16OSC1

18RA1

17RA0

U2

PIC16C54C

1 2 3 4 5 6 7 8910111213141516

S1 DIL_SWITCH_8

GND

R3100KR5100KR4100KR7100KR6100KR8100K

R10100KR9100K

C3

100nF

GND

GND

R2

10K

C4

22pF

GND

1

2J2

GND

1

2J3

1

2J4

GND

GND

AUDIO IN RIGHT

AUDIO IN LEFT

VIDEO INR11

1K

GND

-

+ C6

470uF/16V

1

2J1INGNDOUT

U1 7812

INGNDOUT

U3 78L05

GND

-

+ C2

220uF/25V

-

+ C5

220uF/25V

GND

INITIAL PAGE: OF:

COMPANY:

COUNTRY:

01-08-2005

01-08-2005

DFM2400TSIM

1 1

V1.00

MOBICOMM COMMUNICATIONSMAURITSKADE 25THE HAGUENETHERLANDS

P.F. VOLLEBREGT

CITY

PROJECT:

REV: DATE: ENG:

ADDRESS:

C1

220nF

GNDGND GND

GND

R1

120K

DFM2400TSIM

INGNDOUT

U4 7812

3 AUDIO IN FS2

4 LEVEL SW

5 AUDIO IN FS1

6 12V

7 VIDEO

8 SCL

9 SDA

M2

FM1200TSIM

1

2J5

GND

R12

120K

1 2 3 4 5 6 7 8910111213141516

S2 DIL_SWITCH_8

C7

220nF

GND

1

2J6

R13

10K

-

+ C8

220uF/25V1 RA2

2 RA3

3 T0CKI

4 MCLR/VPP

5 VSS

6 RB0

7 RB1

8 RB2

9 RB3 10RB4

11RB5

12RB6

13RB7

14VCC

15OSC2

16OSC1

18RA1

17RA0

U5

PIC16C54C

1

2J7

R15100K

INGNDOUT

U6 78L05C9

100nF

GND

1

2J8

GND

R17100K

C10

22pFGND

-

+ C11

220uF/25V

R14100K

GND

R19100K

-

+ C12

470uF/16V

GND

R16100K

GND

R18100K

R20100K

GND

R21100K

GND

R22

1K

GND

GND

GND

GNDINITIAL PAGE: OF:

COMPANY:

COUNTRY:

01-08-2005

01-08-2005

DFM1200TSIM

1 1

V1.00


P.F. VOLLEBREGT

CITY

PROJECT:

REV: DATE: ENG:

ADDRESS:

VIDEO IN

AUDIO IN LEFT

AUDIO IN RIGHT

DFM1200TSIM

3 AUDIO IN FS2

4 LEVEL SW

5 AUDIO IN FS1

6 12V

7 VIDEO

8 SCL

9 SDA

M3

FM900TSIM

1 2 3 4 5 6 7 8910111213141516

S3 DIL_SWITCH_8

INGNDOUT

U7 7812

1 RA2

2 RA3

3 T0CKI

4 MCLR/VPP

5 VSS

6 RB0

7 RB1

8 RB2

9 RB3 10RB4

11RB5

12RB6

13RB7

14VCC

15OSC2

16OSC1

18RA1

17RA0

U8

PIC16C54C

1

2J9

INGNDOUT

U9 78L05

1

2J10

1

2J11

C13

220nF

1

2J12

-

+ C14

220uF/25V

C15

100nF

C16

22pF

-

+ C17

220uF/25V

-

+ C18

470uF/16V

R23

120K

R24

10K

R26100K

R27100K

GND

R25100K

GND

R29100K

GND

R28100K

R30100K

GND

GND

R31100K

GND

R32100K

R33

1K

GND

GND GND

GND GND

GND

GND

GNDINITIAL PAGE: OF:

COMPANY:

COUNTRY:

01-08-2005

01-08-2005

DFM900TSIM

1 1

V1.00


P.F. VOLLEBREGT

CITY

PROJECT:

REV: DATE: ENG:

ADDRESS:

AUDIO IN RIGHT

AUDIO IN LEFT

VIDEO IN

DFM900TSIM

1 2 3 4 5 6 7 8910111213141516

S4 DIL_SWITCH_8

1 RA2

2 RA3

3 T0CKI

4 MCLR/VPP

5 VSS

6 RB0

7 RB1

8 RB2

9 RB3 10RB4

11RB5

12RB6

13RB7

14VCC

15OSC2

16OSC1

18RA1

17RA0

U12

PIC16C54C

1

2J14

1

2J15

1

2J16C37

100nF

R51

120K

R55100K

R54100K

R59100KR60100KR62100KR63100K

R65100K

R64100K

GND

GND

GND

GND

GND

GND

INITIAL PAGE: OF:

COMPANY:

COUNTRY:

01-08-2005

01-08-2005

DFM2400RTIM

1 1

V1.00


P.F. VOLLEBREGT

CITY

PROJECT:

REV: DATE: ENG:

ADDRESS:

1IN

2B

YP

AS

S3

LEV

EL

4M

UTE

5V

SS

6D

ET

7D

ET

8A

F-O

UT

9V

CC

U14

KIA

6003

S

1 RFIN

2

GND

3RFOUT

F1

FILTER 6.5 MHZ

1 RFIN

2

GND

3RFOUT

F2

FILTER 6.0 MHZ

T32SC2412

1IN

2B

YP

AS

S3

LEV

EL

4M

UTE

5V

SS

6D

ET

7D

ET

8A

F-O

UT

9V

CC

U13

KIA

6003

S

L6

6.8uH

L7?

L8?

C44

22pF

C45

220p

F

C41

470p

F C42

10nF

C46

39pF

C47

10pF

C43

10nF

C48

10nF

R53

330E

R56

100K

C49

39pF

C50

10pF

C51

10nF

R57

470E R61

10K

R58

15K

R66

470E R67

10K

R68

15K

GND

GND

GND

GND GND

GND GND

X1

4MHz

C38

22pF

C39

22pF

GND GND

R52

100K

R44

1K

D4

LED 3MM VER. RED

-

+C24

220uF

L1

220uH

L2

6.8u

H

1

2J13

1 SW-COL

2 SW-EMIT

3 CAP

4 GND

8DR-COL

7I-SENCE

6VCC

5COMP

U10

MC33063A

VCC+5V

D1

1N5819

C19

470pF

-

+ C22

220uF

GND

R34

0.33E

R37

1K2

R35

3K6GND

C36

100n

F

C40

100n

F

2NC

5AFT OUT A 65V

7B.B. 8AFT OUT B

14SDA 15SCL

11TUN

9LEVEL OUT

M4

FM2400RTIM

T22SC4081

-+C

30 470u

F/16

V

R50

390E

GND

T12SC4081

R43

47K

R48

47KC35

1nF

GND

C29

100n

F

C34

220pF

C33

220pF

C32

220pF

L5

6.8u

HL4

6.8u

H

C28

100p

F

C27

100p

F

8

1

5

4

72

36

U11 NE592D8

R47

15K

R42

91E

R38

2K

R40

10K

R46

10K

-

+ C31

10uF

R41

10K

R39

2K

R45

680E

C26

470pF

- +C

25

2.2u

F

-

+ C20

22uF

R36

10K

GND

D2

M4

D3

M4

-

+ C23

47uF

L3

6.8u

H

-

+ C21

470uF

VCC+5V

AUDIO OUT RIGHT

AUDIO OUT LEFT

VIDEO OUT

R49

390K

DFM2400RTIM

D7

LED 3MM VER. RED

X2

4MHz

1 RFIN

2

GND

3RFOUT

F3

FILTER 6.5 MHZ

T62SC2412

L11

6.8uH

1 RFIN

2

GND

3RFOUT

F4

FILTER 6.0 MHZ

L12

?

T52SC4081

L13

?

1 2 3 4 5 6 7 8910111213141516

S5 DIL_SWITCH_8

2NC

5AFT OUT A 65V

7B.B. 8AFT OUT B

14SDA 15SCL

11TUN

9LEVEL OUT

M5

FM1200RTIM

T42SC4081

L10

6.8u

HL9

6.8u

H

1 RA2

2 RA3

3 T0CKI

4 MCLR/VPP

5 VSS

6 RB0

7 RB1

8 RB2

9 RB3 10RB4

11RB5

12RB6

13RB7

14VCC

15OSC2

16OSC1

18RA1

17RA0

U18

PIC16C54C

8

1

5

4

72

36

U17 NE592D8

1

2J17

1IN

2B

YP

AS

S3

LEV

EL

4M

UTE

5V

SS

6D

ET

7D

ET

8A

F-O

UT

9V

CC

U20

KIA

6003

S

1IN

2B

YP

AS

S3

LEV

EL

4M

UTE

5V

SS

6D

ET

7D

ET

8A

F-O

UT

9V

CC

U19

KIA

6003

S

1

2J18

1

2J19

1

2J20C70

100nF

C72

22pF

C77

22pF

C80

220p

F

C74

470p

F C75

10nF

C78

39pF

C79

10pF

C76

10nF

C81

10nF

C82

39pF

C83

10pF

R76

120K

R78

100K

C84

10nF

C71

22pF

R91100K

R86100K

C69

100n

F

R90100KR92100K

C73

100n

F-+

C64 47

0uF/

16V

R94100K

C68

1nF

R96100K

R97100K

C63

100n

F

C61

100p

F

R95100K

C67

220pF

R85

330E

C66

220pF

VCC+5V

C65

220pF

R87

100K

C60

100p

F

GND

R88

470E

-

+ C62

10uF

R93

10K

GND

R89

15K

C59

470pF

R98

470E

- +C

58

2.2u

F

GND

GND

-

+ C55

22uF

R99

10K

GND

R10

0

15K

GND

R77

1K

GND

VCC+5V

R84

390E GND

R75

47K

GND

R81

15K

GND

GND

R82

47K

INITIAL PAGE: OF:

COMPANY:

COUNTRY:

01-08-2005

01-08-2005

DFM1200RTIM

1 1

V1.00


P.F. VOLLEBREGT

CITY

PROJECT:

REV: DATE: ENG:

ADDRESS:

R74

91E

R73

2K

GND

R72

10K

GND

GND

R71

10K

R80

10K

GND

R70

2K

GND

R79

680E

GND GND

R69

10K

GND

GND

INGNDOUT

U15 7809

C53

100nF

GND

-

+ C54

220uF/25V

INGNDOUT

U16 78L05

GND

-

+ C56

220uF/25V

GND GND

D6

1N4001

D5

1N4001C57

100nF

GND

-

+ C52

1000uF/10V

GND

AUDIO OUT RIGHT

AUDIO OUT LEFT

VIDEO OUT

R83

390K

DFM1200RTIM

X3

4MHz

1 RFIN

2

GND

3RFOUT

F5

FILTER 6.5 MHZ

1 RFIN

2

GND

3RFOUT

F6

FILTER 6.0 MHZ

T92SC2412

D10

LED 3MM VER. RED

2NC

5AFT OUT A 65V

7B.B. 8AFT OUT B

14SDA 15SCL

11TUN

9LEVEL OUT

M6

FM900RTIM

1 2 3 4 5 6 7 8910111213141516

S6 DIL_SWITCH_8

D9

1N4001

T82SC4081

D8

1N4001

T72SC4081

L16

6.8uH

L17

?

L18

?L1

5

6.8u

HL1

4

6.8u

H

INGNDOUT

U21 7809

1 RA2

2 RA3

3 T0CKI

4 MCLR/VPP

5 VSS

6 RB0

7 RB1

8 RB2

9 RB3 10RB4

11RB5

12RB6

13RB7

14VCC

15OSC2

16OSC1

18RA1

17RA0

U24

PIC16C54C

1

2J21

8

1

5

4

72

36

U23 NE592D8 1

2J22

1IN

2B

YP

AS

S3

LEV

EL

4M

UTE

5V

SS

6D

ET

7D

ET

8A

F-O

UT

9V

CC

U26

KIA

6003

S

1IN

2B

YP

AS

S3

LEV

EL

4M

UTE

5V

SS

6D

ET

7D

ET

8A

F-O

UT

9V

CC

U25

KIA

6003

S

1

2J23

INGNDOUT

U22 78L05

1

2J24

C89

100nF

C86

100nF

C104

100nF

C106

22pF

-

+ C87

220uF/25V

-

+ C88

220uF/25V

C10

9

22pF

C11

0

220p

F

C11

1

470p

F C107

10nF

C11

2

39pF

C11

3

10pF

C108

10nF

C114

10nF

C11

6

39pF

C11

7

10pF

C115

10nF

VCC+5V

R115

120K

R116

100K

C105

22pF

GND

R120100K

GND

C10

2

100n

F

R118100K

C10

3

100n

F

GND

R124100K

-+C

96 470u

F/16

V

GND

R123100K

C101

1nF

GND

C95

100n

F

R126100K

C93

100p

F

GND

R125100K

GND

R129100K

C100

220pF

R127100K

GND

C99

220pF

VCC+5V

C98

220pF

R117

330E

GND

C92

100p

F

R121

100K

GND

-

+ C97

10uF

C94

470pF

GND

R122

470E

GND

R128

10K

- +C

91

2.2u

F

-

+ C90

22uF

INITIAL PAGE: OF:

COMPANY:

COUNTRY:

01-08-2005

01-08-2005

DFM900RTIM

1 1

V1.00


P.F. VOLLEBREGT

CITY

PROJECT:

REV: DATE: ENG:

ADDRESS:

R11

9

15K

-

+ C85

1000uF/10V

R130

470E

GND

GND R132

10K

R13

1

15K

GND

R108

1K

GND GND

R113

390K

GND GND

R114

390E

GND

R107

47K

R111

15K

GND

R112

47K

GND

R10

6

91E

GND GND

R10

4

2K

GND

R10

5

10K

GND

R103

10K

R110

10K

R10

2

2K

R109

680E

R10

1

10K

VIDEO OUT

AUDIO OUT LEFT

AUDIO OUT RIGHT

DFM900RTIM

FM900TSIM, FM1200TSIM, FM2400TSIM

DFM900TSIM, DFM1200TSIM, DFM2400TSIM

DFM900RTIM, DFM1200RTIM, DFM2400RTIM

DFM900RTIM, DFM1200RTIM

DFM2400RTIM

FM950TSIM

Aug,15, 2001 1

This specification outlines the pertinent electrical requirements of the RF output modulator which converts the FM video and FM audio signal into the RF signal for television standard transmission system.

2-1. Output frequency 950 ~1200MHz (I2C PLL controller from outside) 2-2. Supply voltage 12V+/-0.2V 2-3. Consumption current 140+/-20mA 2-4. Operation and storage Temperature 0-50oC Conditions for guarantee Humidity 85% or less

3-1. Testing ambient conditions Defined as temperature of 25+/-2oC and humidity of 65+/-5% RH. Note : that temperatures of 5-30oC and humidity of 45-85%RH may be regarded as standard. 3-2. Unit setting conditions (1). Picture --10 step wave signal 1.0Vp-p(82Ohm load) (2). Audio -- 1.0Vp-p of sine wave 1KHz

FM950TSIM

Aug,15, 2001 2

4-1. Video system characteristics

Specification parameter Min Typ Max Unit Remark

4-1-1 Input impedance 1.7k Ohm Measure at 0.5-5MHz 4-1-2 Input signal level 1.0 Vp-p Load of 82ohm connected

Negative synchronous 4-1-3 Modulation 950 6 8 10 MHz Superimposed sinuous wave.

Sine Wave 1000 6 (3.58mhz) is 20% of the step input10KHz 1Vp-p 1050 6 level. measure under the apl of

1100 6 10-90% differential gain of 1150 6 demodulator unit is to be 1200 7 compensated

4-1-4 Differential gain -8 8 %

4-1-5 Differential phase 8 8 deg -ditto- 4-1-6 S/N 45 dB Measure with respect to standard

demodulator output. 4-1-7 Out level taper 4 6 dB fp 950~1200MHz 4-2. Audio system characteristics 4-2-1 Input impedance 1.4 KOhm Measure at 0.1-10KHz 4-2-2 Modulation 35 40 45 KHz 4-2-3 Distortion factor 3 % Audoi input signal 1.0Vp-p 1KHz

modulation 50% (sine wave) video input signal all black (sync.only) use standard demodulator of inter -carrier system. De-emphasis(50 usec) is on.

4-2-4 S/N 40 dB The same as 4-2-3

FM950TSIM

Aug,15, 2001 3

4-3. Output system characteristics

Specification Parameter Min Typ Max Unit Remark 4-3-1 Video carrier frequency 50 fp +50 KHz Test at 25OC temperature and 4-3-2 Video output level 14 16 18 dBm 65%RH of humidity

ZHM 0.6 1sF zHM0021~059 Fs2 6.5 MHz *output channel

4-3-3 Audio output level 22 27 32 dB difference(p/s ratio) fp:950~1200MHz

4-3-4 Audio carrier frequency -8 fs1 +8 KHz Input signal none the measurement is taken after 30 sec. from the

-8 fs2 +8 KHz power-on. 4-3-5 Audio modulator fs1 60 70 80 KHz Measurement difference video of

rof level tuptuo ycneuqerf reirrac 2sf 0-1ghz. except to fp. fp+/-fs .

4-3-6 Out-band spurious 45 50 dB against video carrier output level. 4-3-7 Output impedance 75 Ohm Unbalanced.

FM950TSIM

Aug,15, 2001 4

5-1. PLL section characteristics No Item Specification notes 5-2. IIC Bus

(1) SDA.SCL Under standard test condition Input voltage Condition Min Typ Max

High voltage 3 5Low voltage 0 1.5 V

(2) Address C2 (on write date format) (3) SDA.SCL SDA/SCL are in the high impedance

Input impedance and there should be no reliablity problem with 5V continually on the SDA/SCL,if power supply is switched off.

(4) Data format MSB LSB Address 1 1 0 0 0 MA1 MA0 0 A Byte1 Programmable 14 13 12 11 10 9 8 Divider 0 2 2 2 2 2 2 2 A Byte2 Programmable 7 6 5 4 3 2 1 0 Divider 2 2 2 2 2 2 2 2 A Byte3

)0( )0( pmup egrahC and test bits 1 cp t1 t0 1 1 1 os A Byte4 I/O port control bits p7 p6 p5 p4 p3 p2 p1 p0 A Byte5

Table 1 write data format (MSB is transmitted first) Address 1 1 0 0 0 MA1 MA2 1 A Byte1 Status byte POR FL I2 I1 I0 A2 A1 A0 A Byte2

Table 2 read date format A: Acknowledge bit. MA1,MA0: Voltage address bits. CP: Charge pump current select. T1: Test mode selection,T0: Charge pump disable OS: Varactor drive output disable switch. P7,P6,P5,P4,P3,P2,P1,P0: Control output states.

POR: Power on reset indicator FL: Phase lock detect flag I2,I1,I0: Digital information from ports P7,P5,and P4. A2,A1,A0: 5 level adc data from P6

FM950TSIM

Aug,15, 2001 5

FM950RTIM

Aug,15, 2001 1

1-1 Input Frequency Range1-3 One Input Connector1-4 Nominal Input Impedance1-5 Tuning Circuit1-6 IF Frequency1-7 IF Bandwidth1-8 Demodulation1-9 Video Output Polarity1-10 Operating Voltage

1-11 Operating Temperature1-12 Operating Humidity1-13 Storage Temperature1-14 Storage Humidity

900 MHz - 1650 MHzF Fe-Male75 OhmBuilt-in PLL479.50 MHz Center

Phase Locked LoopPositive Going+12V (+/-5%)+5V (+/-5%)-10oC ~ +60oCless than 80% R. H. (at 40oC)-20oC ~ +70oCless than 95% R. H. (at 40oC)

Note:SP5055(PLESSEY)Note:TA8804F

test for electrical specification shall bepreformed at following condition unlessotherwise specified.

Temperature 25oC +/- 2oCHumidity 65% +/- 5% R. H.if no doubt on test resultsTemperature +5oC ~ +30oCHumidity 45% ~ 80% R. H.could be applied

30 minutes after DC power supplied

Terminal Supply Voltage +5V +5V (+/-) 0.1V TU +12V (+/-) 0.1V SDA specified tuning SCL pulse

2-1 Ambient Condition

2-2 Measurement to Start

2-3 Power Supply

18 MHz Nominal (Selectable)

FM950RTIM

Aug,15, 2001 2

Terminal Min. Typ. Max. Unit+5V 190 240 290 mA TU 0.5 1.0 3.0 mA

Terminal Max. Supply Voltage LNB Power DC +25V+5V DC +5.25V TU DC +15V SDA,SCL OV TO The Same Voltage AS +5V Terminal

Terminal Max. Take Off CurrentLNB Power 500mAB. B. Output 0.5 mA

under standard test conditionTest Channel: DBS 20 CHInput Level: -45 dBmunless otherwise specified

5-1 Input VSWR

5-2 Noise Figure

5-3 Local Leakage at Input Terminal5-4 Tuning Voltage Curve

5-5 Local Oscillator +B Shift

5-6 Local Oscillator Temperature Drift5-7 IF 3dB Bandwidth

5-8 AFT Output (2 bit Output)

Min.

1

-2

Typ.2.0

8.0 dB

-70.0

1.62.24.05.05.79.2

18

Max.3.0

12.dB

-63.0

12

+/- 0.8

+/- 1.3

+2

Note

AGC fullgain

dBm

V

With Tuner PLLLocked

V

Condition900 ~ 2050 MHz

900 ~ 2050 MHz

1430~2530 MHz

900 MHz 950 MHz 1150 MHz 1250 MHz 1450 MHz 1650 MHz

Tuning voltage shiftwith +B +/- 5%tuning voltage shiftwith -10oC ~ +60oC3dB down

Center FrequencyError (f0)

MHz

MHz

FM950RTIM

Aug,15, 2001 3

video waveform white 100% PAL frequency deviation 16 MHz p-p with-out pre-emphasiswhite to SYNC 0.72 0.90 1.12 Vp-p

test modulation frequency: 60 Hz ~ 8 MHz without energy disposalmodulation, reference frequency 100 KHz, IF BW: 27 MHzFreuqency Response +/- 1 +/- 3 dB

test frequency: 60 Hz ~ 8 MHz without energy disposal modulation,reference frequency 100 KHz, IF BW: 27 MHzGroup Delay +/- 10 +/- 50 nsec

10 step siaircase 16MHz p-p PAL without energy disposal modulation,positive video amplifier with de-emphasis should be appliedIF BW: 27 MHzDG (APL 50%) 4.0 8.0 %DP (APL 50%) 3.0 5.0 deg

input C/N = 14 dB (Noise BW: 27 MHz)white 100% video 16 MHz p-p PAL with audio subcarrier modulation3.4 MHz p-p DEV. @6.5 MHzpositive video amplifier with de-emphasis should be applied 100 Hz ~ 5MHz unweighted S/N, POR power on reset indicatorS/N 34.0 36.0 dB

5-9 B. B. Output Characteristics

1) Video Output Level

2) Gain-Frequency Response

3) Group Delay Response

4) DG/DP

5) S/N

Condition Min. Typ. Max. Note

FM950RTIM

Aug,15, 2001 4

Address 1 1 0 0 0 MA1 MA0 0 A BYTE 1

Programmable Divider 0 214 213 212 211 210 29 28 A BYTE 2

Programmable Divider 27 26 25 24 23 22 21 20 A BYTE 3 Charge Pump and 1 CP T1 T0 1 1 1 OS A BYTE 4 Test Bits I/O Port Control Bits P7 P6 P5 P4 P3 P2 P1 P0 A BYTE 5

7-1 Signal Level Out Voltage

7-2 IIC Bus 1) SDA, SCL Input Voltage

2) Address

3) SDA, SCL Input Impedance

4) Date Format

under standard test conditionCondition Min. Typ. Max. NoteHigh Voltage 3 5 VLow Voltage 0 1.5 V

C2 (on write data format)

SDA/SCL are in the high impedance and there should be no reliablityproblem with 5V continually on the SDA/SCL if power supply is switchedoff.

MSB LSB

table 2 read data format A: acknowledge bit MA1, MA0: voltage address bits CP: charge pump current select T1: test mode selection T0: charge pump disable OS: varactor drive output disable switch P7, P6, P5, P4, P3, P2, P1, P0: control output states POR: power on reset indicator I2, I1, I0: digital information from ports P7, P5 and P4 A2, A1, A0: 5 level ADC data from P6

table 1 write data format (MSB is transmitted first) Address 1 1 0 0 0 MA1 MA0 1 A BYTE1

Status Byte FOR FL I2 I1 I0 A2 A1 A0 A BYTE 2

(V) SIGNAL LEVEL OUT

Note:

47 KOhm loaded

FM950RTIM

Aug,15, 2001 5

FM1200TSIM

Oct,15, 2001 1

This specification outlines the pertinent electrical requirements of the RF output modulator which converts the FM video and FM audio signal into the RF signal for television standard transmission system.

2-1. Output frequency 1100~1300mhz (I2C PLL controller from outside) 2-2. Supply voltage 12V+/-0.2V 2-3. Consumption current 140+/-20mA 2-4. Operation and storage Temperature 0-50oC Conditions for guarantee Humidity 85% or less

3-1. Testing ambient conditions Defined as temperature of 25+/-2oC and humidity of 65+/-5% RH. Note: That temperatures of 5-30oC and humidity of 45-85%RH may be regarded as standard. 3-2. Unit setting conditions (1). Picture --10 step wave signal 1.0Vp-p(8Ohm load) (2). Audio -- 1.0Vp-p of sine wave 1KHz

FM1200TSIM

Oct,15, 2001 2


Specification parameter Min Typ Max Unit Remark

4-1-1 Input impedance 1.7 KOhm Measure at 0.5-5MHz 4-1-2 Input signal level 1.0 Vp-p Load of 82Ohm connected

negative synchronous 4-1-3 Modulation 1100~1300 5 6 7 MHz Superimposed sinuous wave.

sine wave 10khz 1Vp-p (3.58MHz)is 20% of the step input 4-1-4 Differential gain 8 8 % level measure under the apl of

10-90% differential gain of demodulator unit is to be compensated

4-1-5 Differential phase -8 8 deg -ditto- 4-1-6 S/N 45 dB Measure with respect to standard

demodulator output. 4-1-7 Out level taper 4 6 dB fp 1100~1300MHz

4-2. Audio system characteristics 4-2-1 Input impedance 1.4 KOhm Measure at 0.1-10KHz 4-2-2 Modulation 35 40 45 KHz 4-2-3 Distortion factor 3 % Audoi input signal 1.0Vp-p 1KHz

modulation 50% (sine wave) video input signal all black (sync.only) use standard demodulator of inter -carrier system. De-emphasis(50 usec) is on.

4-2-4 S/N 40 dB The same as 4-2-3

FM1200TSIM

Oct,15, 2001 3


Specification. Parameter Min Typ Max Unit Remark 4-3-1 Video carrier frequency 50 fp +50 KHz Test at 25OC temperature and 4-3-2 Video output level 15 17 19 65%RH of humidity

zHM 5.6 1sF zHM0031~0011 Fs2 6.5 MHz *output channel

4-3-3 Audio output level 22 27 32 dB difference(p/s ratio) fp:1100~1300MHz

4-3-4 Audio carrier frequency -8 fs1 +8 KHz Input signal none the measurement is taken after 30 sec. from the power-on.

4-3-5 Audio modulator fs1 60 70 80 KHz Measurement difference video ofrof level tuptuo ycneuqerf reirrac 2sf

0-1GHz. except to fp. fp+/-fs . 4-3-6 Out-band spurious 50 55 dB against video carrier output level. 4-3-7 Output impedance 75 Ohm Unbalanced.

FM1200TSIM

Oct,15, 2001 4


(1) Sda.scl Under standard test condition Input voltage Condition Min Typ Max


(2) Address C2 (on write date format) (3) Sda scl SDA/SCLl are in the high impedance

Input impedance and there should be no reliablity problem with 5V continually on the SDA/SCL,if power supply is switched off.


)0( )0( pmup egrahC and test bits 1 cp t1 t0 1 1 1 os A Byte4 I/O port control bits p7 p6 p5 p4 p3 p2 p1 p0 A Byte5

Table 1 write data format (MSB is transmitted first) Address 1 1 0 0 0 MA1 MA2 1 A Byte1 Status byte POR fl I2 I1 I0 A2 A1 A0 A Byte2

Table 2 read date format A: Acknowledge bit. MA1,MA0: Voltage address bits. CP: Charge pump current select. T1: Test mode selection,T0:Charge pump disable OS: Varactor drive output disable switch. P7,P6,P5,P4,P3,P2,P1,P0: Control output states.

POR: Power on reset indicator PL: Phase lock detect flag I2,I1,I0: Digital information from ports P7,P5,and P4. A2,A1,A0: 5 level adc data from P6

FM1200TSIM

Oct,15, 2001 5

FM1200RTIM

Aug,15, 20011



1100 MHz - 1300 MHzF Fe-Male75 OhmBuilt-in PLL479.50 MHz Center18 MHz Nominal (Selectable)Phase Locked LoopPositive Going+12V (+/-5%)+5V (+/-5%)-10oC ~ +60oCless than 80% R. H. (at 40oC)-20oC ~ +70oCless than 95% R. H. (at 40oC)

Note:SP5055(PLESSEY)Note:TA8804F


Temperature 25oC +/- 2oCHumidity 65% +/- 5% R. H.if no doubt on test resultsTemperature +5oC ~ +30oCHumidity 45% ~ 80% R. H.could be applied


Terminal Supply Voltage +5V +5V (+/-) 0.1V TU +12V (+/-) 0.1V SDA specified tuning SCL pulse



2-3 Power Supply

FM1200RTIM

Aug,15, 20012

Terminal Min. Typ. Max. Unit+5V 190 240 290 mA TU 0.5 1.0 3.0 mA

Terminal Max. Supply Voltage LNB Power DC +25V+5V DC +5.25V TU DC +15V SDA,SCL OV TO The Same Voltage AS +5V Terminal

Terminal Max. Take Off CurrentLNB Power 500mAB. B. Output 0.5 mA


5-1 Input VSWR

5-2 Noise Figure





Min.

2.5V

-2

Typ.2.0

8.0 dB

-70.0

18

Max.3.0

12.dB

-63.0

7.0V

+/- 0.8

+/- 1.3

+2

Note

AGC fullgain

dBm

with tuingPLL locked

MHz

MHz

Condition1100 ~ 1300 MHz

1100 ~ 1300 MHz

1579.5~1779.5 MHz

1100 ~ 1300 MHz

tuning voltage shiftwith +B +/- 5%tuning voltage shiftwith -10oC ~ +60oC3dB down


FM1200RTIM

Aug,15, 20013




10 step siaircase 16MHz p-p PAL without energy disposal modulation,positive video amplifier with de-emphasis should be appliedIF BW: 27 MHzDG (APL 50%) 4.0 8.0 %DP (APL 50%) 3.0 5.0 deg

input C/N = 14 dB (Noise BW: 27 MHz)white 100% video 16 MHz p-p PAL with audio subcarrier modulation3.4 MHz p-p DEV. @6.5 MHzpositive video amplifier with de-emphasis should be applied 100 Hz ~ 5MHz unweighted S/N, for power on reset indicatorS/N 34.0 36.0 dB





4) DG/DP

5) S/N


FM1200RTIM

Aug,15, 20014






2) Address


4) Date Format




MSB LSB

table 2 read data format A: acknowledge bit MA1, MA0: voltage address bits CP: charge pomp current select T1: test mode selection T0: charge pump disable OS: varactor drive output disable switch P7, P6, P5, P4, P3, P2, P1, P0: control output states POR: power on reset indicator I2, I1, I0: digital information from ports P7, P5 and P4 A2, A1, A0: 5 level ADC data from P6



(V) SIGNAL LEVEL OUT

FM1200RTIM

Aug,15, 20015

FM2400TSIMB

Oct. 3, 2000 1

1. SCOPE

This specification outlines the pertinent electrical requirements of the RF output modulatorwhich converts the FM video and FM audio signal into the RF signal for television stan-dard transmission system.

2.CENERAL SPECIFICATIONS

2-1. Output frequency 2400~2483 MHz (I2C PLL controller from outside) 2-2. 2-3. Supply voltage 12V+/-0.2V 2-4. Consumption current 140+/-20 mA 2-5. Operation and storage temperature 0-50oC Conditions for guarantee humidity 85% or less

3.TEST CONDITIONS

3-1. Testing ambient conditions defined as temperature of 25+/-2oC and humidity of 65+/ -5% RH Note: that temperatures of 5~30oC and humidity of 45-85%rh may be regarded as standard. 3-2. Unit setting conditions 1) Picture --10 step wave signal 1.0 Vp-p(82 ohm load) 2) Audio -- 1.0Vp-p of sine wave 1KHz

FM2400TSIMB

Oct. 3, 2000 2

4. ELECTRICAL PERFORMANCE


Specification Parameter min typ max unit Remark

4-1-1 Input impedance 1.3 K measure at 0.5 ~ 5 MHz4-1-2 Input signal level 1 Vp-p load of 92 ohm connected negative

synchronous

4-1-3 Modulation fp 2480 MHz 2 3 4 MHz Superimposed sinuous wave (sine wave 300KHz 1Vp-p) (2.58 MHz) is 20% of the step input

level. Measure with under the APL 4-1-4 Differential gain 8 8 % of 10~90% differential gain of

demodulator unit is to be compensated..

4-1-5 Differential phase -8 8 deg -ditto- 4-1-6 S/N 45 dB Measure with respeot to standard

demodulator output. 4-1-7 Out level taper 4 6 dB Fp 2400~2483mhz. 4-2. Audio system characteristics 4-2-1 Input impedance 1.4 Kohm Measure at 0.1-10khz 4-2-2 Modulation 35 40 45 khz 4-2-3 Distortion factor 3 % Audoi input signal 1.0Vp-p 1khz

modulation 50% (sine wave).Video input signal all black (sync.only) use standard demodulator of inter -carrier system. De-emphasis(50 usec) is on.

4-2-4 S/n 40 dB The same as 4-2-3

FM2400TSIMB

Oct. 3, 2000 3


Specification. Parameter min typ max unit Remark 4-3-1 Video carrier frequency -50 fp +50 KHz Test at 25OC temperature and 4-3-2 Video output level 13 14 16 dBm 65% RH of humidity 4-3-3 Audio output level 22 27 32 dB Fp 2400~2483 Mhz

Zhm 5.6 1sF )oitar S/P(ecnereffid Fs2 6.5 mhz *output channel

4-3-4 Audio carrier frequency -8 fs +8 KHz Input signal none the measurement is taken after 30 sec. from the power-on.

4-3-5 Audio modulator fs1 35 50 65 KHz Measurement difference video of fs2 35 50 65 carrier frequency output level for

4-3-6 Out-band spurious 50 55 dB 2400~2483 Mhz except to fp. 4-3-7 In-band spurious 60 dB fp+/-fs against video carrier output

.level htdiwdnab nihtiw 4-3-8 Output impedance 75 ohm Unbalanced.

FM2400TSIMB

Oct. 3, 2000 4


(1) SDA SCL Under standard test condition input voltage Condition Min Typ Max


(2) Address C2 (on write date format) (3) SDA SCL SDA/SCL are in the high impedance

input impedance and there should be no reliablity problem with 5V continually on the SDA/SCL, if power supply is switched off.


)0( )0( pmup egrahC and test bits 1 CP T1 T0 1 1 1 os A Byte4 I/O port control bits P7 P6 P5 P4 P3 P2 P1 P0 A Byte5

Table 1 write data format (MSB is transmitted first) Address 1 1 0 0 0 Ma1 Ma2 1 A Byte1 Status byte POR FL I2 I1 I0 A2 A1 A0 A Byte2

Table 2 read date format A: acknowledge bit. Ma1,Ma0: voltage address bits. CP: charge pump current select. T1: test mode selection,T0:charge pump disable OS: varactor drive output disable switch. P7,P6,P5,P4,P3,P2,P1,P0:control output states POR: power on reset indicator PL: phase lock detect flag I2,I1,I0: digital information from ports P7,P5,and P4. A2,A1,A0: 5 level ADC data from P6

FM2400TSIMB

Oct. 3, 2000 5

FM2400RTIM8B

Oct. 3, 2000 1



2.4 GHz - 2.4835 GHzSMA Connector75 OhmBuilt-in PLL479.50 MHz Center18 MHz Nominal (Selectable)Phase Locked LoopNegative+28V (+/-5%)+5V (+/-5%)-10oC ~ +60oCless than 80% R. H. (at 40oC)-20oC ~ +70oCless than 95% R. H. (at 40oC)

Note:U6239B (TEMIC)

Note:TA8804F


Temperature 25oC +/- 2oCHumidity 65% +/- 5% R. H.if no doubt on test resultsTemperature 5oC +/- 30oCHumidity 45% ~ 80% R. H.could be applied


Terminal Supply Voltage +5V +5V (+/-) 0.1V +12V +12V (+/-) 0.1V SDA specified tuning SCL pulse



2-3 Power Supply

FM2400RTIM8B

Oct. 3, 2000 2

Terminal Min. Typ. Max. Unit+5V 190 240 290 mA+12V 0.5 1.0 3.0 mA

Terminal Max. Supply Voltage+5V DC +5.25V+12V DC +30V

Terminal Max. Take Off CurrentB. B. Output 0.5 mA


5-1 Input VSWR

5-2 Noise Figure





Min.

5V

-2

Typ.2.0

3.5 dB

18

Max.3.0

-63.0

10V

+/- 0.8

+/- 1.3

+2

Note

AGC fullgain

dBm

with tuingPLL locked

MHz

MHz

Condition2.4 ~ 2.4835 GHz

2.4 ~ 2.4835 GHz

1.920 ~ 2.4835 GHz

2.4 ~ 2.4835 GHz

tuning voltage shiftwith +B +/- 5%tuning voltage shiftwith -10oC ~ +60oC3dB down


H

L

400 KHz

Pin 5Typ.Pin 8

FM2400RTIM8B

Oct. 3, 2000 3




10 step siaircase 8 MHz p-p PAL without energy disposal modulation,positive video amplifier with de-emphasis should be appliedIF BW: 18 MHzDG (APL 50%) 4.0 8.0 %DP (APL 50%) 3.0 5.0 deg

input C/N = 14 dB (Noise BW: 16 MHz)white 100% video 8 MHz p-p PAL with audio subcarrier modulation 3.4MHz p-p DEV. @6.5 MHzpositive video amplifier with de-emphasis should be applied 100 Hz ~ 5MHz unweighted S/N, POR: power on reset indicatorS/N 34.0 36.0 dB





4) DG/DP

5) S/N


FM2400RTIM8B

Oct. 3, 2000 4






2) Address


4) Date Format




MSB LSB

table 2 read data format A: acknowledge bit MA1, MA0: voltage address bits CP: charge pomp current select T1: test mode selection T0: charge pump disable OS: varactor drive output disable switch P7, P6, P5, P4, P3, P2, P1, P0: control output states POR: power on reset indicator I2, I1, I0: digital information from ports P7, P5 and P4 A2, A1, A0: 5 level ADC data from P6



4321

-30 -45 -60 -80 input level(dBm)

(V)Signal Level Out

FM2400RTIM8B

Oct. 3, 2000 5

The SP5055 is a single chip frequency synthesiser designedfor TV tuning systems. Control data is entered in the standardI2C BUS format. The device contains 4 addressable currentlimited outputs and 4 addressable Bi-Directional open collectorports one of which is a 3 bit ADC. The information on theseports can be read via the I2C BUS. The device has one fixedI2C BUS address and 3 programmable addresses, programmedby applying a specific input voltage to one of the current limitedoutputs. This enables 2 or more synthesisers to be used in asystem.

FEATURES Complete 2.6GHz Single Chip System

Programmable via I2C BUS Low power consumption (5V 65mA)

Low Radiation

Phase Lock Detector

Varactor Drive Amp Disable

6 Controllable Outputs, 4 Bi-Directional

5 Level ADC

Variable I2C BUS Address For Multi Tuner Applications

Full ESD Protection*

* Normal ESD handling procedures should be observed.

Fig. 1 Pin connections – top view

APPLICATIONS Satellite TV

High IF Cable Tuning Systems

ORDERING INFORMATIONSP5055S MP - (16 lead Miniature Plastic package)

SP50552.6GHz Bidirectional I2C BUS Controlled Synthesiser

Supersedes version in April 1994 Consumer IC Handbook, HB3120 - 2.0 DS2384 - 4.4 May 1996

2

SP5055

ELECTRICAL CHARACTERISTICSTamb = -20°C to +80°C, VCC = +4.7V to 5.3V.These Characteristics are guaranteed by either production test or design. They apply within the specified ambienttemperature and supply voltage unless otherwise stated. Reference frequency = 4MHz unless otherwise stated.

VCC = 5V

500MHz to 2.6GHz Sinewave

120MHz, see Fig. 5

Input voltage = VCC

Input voltage = 0V

When VCC = 0V

Isink = 3mA

Byte 4, bit 2 = 0, pin 1 = 2V

Byte 4, bit 2 = 1, pin 1 = 2V

Byte 4, bit 4 = 1, pin 1 = 2V

Vpin 16 = 0·7V

VOUT = 12V

VOUT = 13·2V

VOUT = 0.7V

VOUT = 13·2V

Vpin 10 = 13.2V

Vpin 10 = 0V

See Table 3 for ADC Levels

Supply currentPrescaler input voltagePrescaler input voltage

Prescaler input impedancePrescaler input capacitance

SDA, SCLInput high voltageInput low voltageInput high currentInput low currentLeakage current

SDAOutput voltage

Charge pump current lowCharge pump current highCharge pump output leakage currentCharge pump drive output currentCharge pump amplifier gainRecommended crystal series resistanceCrystal oscillator drive levelCrystal oscillator negative resistance

Output PortsP0, P3 sink currentP0, P3 leakage currentP4-P7 sink currentP4-P7 leakage current

Input PortsP3 input current highP3 input current lowP4,P5,P7 input voltage lowP4,P5,P7 input voltage highP6 input current highP6 input current low

1213, 1413, 14

13, 14

4, 54, 54, 54, 54, 5

4

11116

22

10, 1110, 11

9-69-6

1010

9,8,69,8,6

77

Typ.

ValueConditionsCharacteristic Pin

50100

30

500

10

750

0.7

10

2.7

65

502

±50±170

6400

80

1

80300300

5.51.510-1010

0.4

±5

200

1.510

10

+10-100.8

+10-10

UnitsMin. Max.

mAmVRMS

mVRMS

ΩpF

VVµAµAµA

V

µAµAnAµA

ΩmVp-p

Ω

mAµAmAµA

µAµAVVµAµA

3

SP5055

FUNCTIONAL DESCRIPTIONThe SP5055 is programmed from an I2C BUS. Data and

Clock are fed in on the SDA and SCL lines respectively asdefined by the I2C BUS format. The synthesiser can eitheraccept new data (write mode) or send data (read mode). TheTables in Fig. 3 illustrate the format of the data. The devicecan be programmed to respond to several addresses, whichenables the use of more than one synthesiser in an I2C Bussystem. Table 4 shows how the address is selected byapplying a voltage to P3. The last bit of the address byte(R/W) sets the device into read mode if it is high and writemode if it is low. When the SP5055 receives a correct addressbyte it pulls the SDA line low during the acknowledge periodand during following acknowledge periods after further databytes are programmed. When the SP5055 is programmedinto the read mode the controlling device accepting the datamust pull down the SDA line during the following acknowledgeperiod to read another status byte.

WRITE MODE (FREQUENCY SYNTHESIS)When the device is in the write mode Bytes 2 + 3 select the

synthesised frequency while bytes 4 + 5 select the output portstates and charge pump information.

Once the correct address is received and acknowledged,the first Bit of the next Byte determines whether that byte isinterpreted as byte 2 or 4, a logic 0 for frequency informationand a logic 1 for charge pump and output port information.Additional data bytes can be entered without the need tore-address the device until an I2C stop condition is recognised.This allows a smooth frequency sweep for fine tuning or AFCpurposes.

If the transmission of data is stopped mid-byte (i.e., byanother device on the bus) then the previously programmedbyte is maintained.

Frequency data from bytes 2 and 3 is stored in a 15-bit shiftregister and is used to control the division ratio of the 15-bitprogrammable divider which is preceded by a divide-by-16prescaler and amplifier to give excellent sensitivity at the localoscillator input; see Fig 5. The input impedance is shown inFig 7.

The programmed frequency can be calculated bymultiplying the programmed division ratio by 16 times thecomparison frequency Fcomp.

When frequency data is entered, the phase comparator,via the charge pump and varactor drive amplifier, adjusts thelocal oscillator control voltage until the output of theprogrammable divider is frequency and phase locked to thecomparison frequency.

The reference frequency may be generated by an externalsource capacitively coupled into pin 2 or provided by an on-board 4MHz crystal controlled oscillator.

Note that the comparison frequency is 7·8125kHz when a4MHz reference is used.

Bit 2 of byte 4 of the programming data (CP) controls thecurrent in the charge pump circuit, a logic 1 for ±170µA anda logic 0 for ±50µA, allowing compensation for the variabletuning slope of the tuner and also to enable fast channelchanges over the full band. Bit 4 of byte 4 (T0) disables thecharge pump if set to a logic 1. Bit 8 of byte 4 (OS) switchesthe charge pump drive amplifier’s output off when it is set toa logic 1. Bit 3 of Byte 4 (T1) selects a test mode where thephase comparator inputs are available on P6 and P7, a logic1 connects Fcomp to P6 and Fdiv to P7.

Byte 5 programs the output ports P0 to P7; on a logic 0 fora high impedance output, logic 1 for low impedance (on).

READ MODEWhen the device is in the read mode the status data read from

the device on the SDA line takes the form shown in Table 2.Bit 1 (POR) is the power-on reset indicator and is set to a logic

1 if the power supply to the device has dropped below 3V and theprogrammed information lost (e.g., when the device is initiallyturned on). The POR is set to 0 when the read sequence isterminated by a stop command. The outputs are all set to highimpedance when the device is initially powered up. Bit 2 (FL)indicates whether the device is phase locked, a logic 1 is presentif the device is locked and a logic 0 if the device is unlocked.

Fig. 2 Block diagram

4

SP5055

A0

0

1

0

1

0

Voltage input to P6

0.6VCC to 13.2V

0·45VCC to 0·6VCC

0·3VCC to 0·45VCC

0·15VCC to 0·3VCC

0 to 0.15VCC

Bits 3, 4 and 5 (I2,I1,I0) show the status of the I/O Ports P7,P5 and P4 respectively. A logic 0 indicates a low level and a logic1 a high level. If the ports are to be used as inputs they shouldbe programmed to a high impedance state (logic 1). Theseinputs will then respond to data complying with TTL type voltagelevels. Bits 6, 7 and 8 (A2,A1,A0) combine to give the output ofthe 5 level ADC.

The 5 level ADC can be used to feed AFC information tothe microprocessor from the IF section of the receiver, asillustrated in the typical application circuit.

APPLICATIONA typical Application is shown in Fig. 4. All input/output

interface circuits are shown in Fig. 6.

Table 1 Write data format (MSB transmitted first)

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Address

Programmable divider

Programmable divider

Charge pump and test bits

I/O port control bits

1

214

26

CP

P6

0

213

25

T1

P5

0

212

24

T0

P4

0

211

23

1

P3

MA0

29

21

1

X

MA1

210

22

1

X

A

A

A

A

A

MSB

1

0

27

1

P7

LSB

0

28

20

OS

P0

Table 2 Read data format (MSB is transmitted first)

Byte 1

Byte 2

Address

Status byte

1

FL

0

I2

0

I1

0

I0

MA0

A1

MA1

A2

A

A

1

POR

1

A0

A : Acknowledge bit

MA1, MA0 : Variable address bits (see Table 4)

CP : Charge Pump current select

T1 : Test mode selection

T0 : Charge pump disable

OS : Varactor drive Output disable Switch

P7, P6, P5, P4, : Control output states

P3, P0POR : Power On Reset indicator

FL : Phase lock detect flag

I2, I1, I0 : Digital information from Ports P7, P5 and P4, respectively

A2, A1, A0 : 5 Level ADC data from P6 (see Table 3)

X : Don't care

Table 4 Address selection

MA0

0

1

0

1

MA1

0

0

1

1

Voltage input to P3

0V to 0·2VCC

Always valid

0·3VCC to 0·7VCC

0·8VCC -13.2V

A1

0

1

1

0

0

A2

1

0

0

0

0

Table 3 ADC levels

Fig. 3 Data formats

5

SP5055

APPLICATIONA typical application is shown in Fig. 4. All input/output interface circuits are shown in Fig. 6.

Fig. 5 Typical input sensitivity

Fig. 4 Typical application

TL592BDIFFERENTIAL VIDEO AMPLIFIER

SLFS001A – JUNE 1985 – REVISED APRIL 1988

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Adjustable Gain to 400 Typ

No Frequency Compensation Required

Low Noise . . . 3 µV Typ Vn

description

This device is a monolithic two-stage videoamplifier with differential inputs and differentialoutputs. It features internal series-shunt feedbackthat provides wide bandwidth, low phasedistortion, and excellent gain stability. Emitter-follower outputs enable the device to drivecapacitive loads. All stages are current-sourcebiased to obtain high common-mode and supply-voltage rejection ratios.

The differential gain is typically 400 when the gainadjust pins are connected together, oramplification may be adjusted for near 0 to 400 bythe use of a single external resistor connectedbetween the gain adjustment pins A and B. Noexternal frequency-compensating componentsare required for any gain option.

The device is particularly useful in magnetic-tapeor disk-file systems using phase or NRZ encodingand in high-speed thin-film or plated-wirememories. Other applications include general-purpose video and pulse amplifiers.

The device achieves low equivalent noise voltagethrough special processing and a new circuitlayout incorporating input transistors with lowbase resistance.

The TL592B is characterized for operation from0°C to 70°C.

Copyright 1988, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.

1

2

3

4

8

7

6

5

IN+GAIN ADJ A

VCC–OUT+

IN–GAIN ADJ BVCC+OUT–

D8† OR P PACKAGE(TOP VIEW)

1

2

3

4

5

6

7

14

13

12

11

10

9

8

IN+NCNC

GAIN ADJ AVCC–

NCOUT+

IN–NCNCGAIN ADJ BVCC+NCOUT–

D14† OR N PACKAGE(TOP VIEW)

† D8 and D14 are the codes to differentiate the 8-pin and 14-pinversions, respectively.

symbol

GAIN ADJ A

GAIN ADJ B

IN+

IN–

OUT+

OUT–



2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

schematic

1

8

2

B

IN+

IN+

A7

GainAdjust

6

4

5

3

VCC+

VCC–

OUT+

OUT–

Pin numbers are for D8 and P packages.

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

Supply voltage, VCC+ (see Note 1 ) 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage, VCC– –8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Differential input voltage ±5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage range, any input VCC+ to VCC–. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output current 10 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NOTES: 1. All voltage values except differential input voltages are with respect to the midpoint between VCC+ and VCC–.

DISSIPATION RATING TABLE

PACKAGETA ≤ 25°C DERATING DERATE TA = 70°C

PACKAGE APOWER RATING FACTOR ABOVE T A

APOWER RATING

D8 530 mW 5.8 mW/°C 59°C 464 mW

D14 530 mW N/A N/A 530 mW

N 530 mW N/A N/A 530 mW

P 530 mW N/A N/A 530 mW




recommended operating conditions

MIN NOM MAX UNIT

Supply voltage, VCC+ 3 6 8 V

Supply voltage, VCC– –3 –6 –8 V

Operating free-air temperature, TA 0 70 °C

electrical characteristics at specified free-air temperature, V CC ± = ±6 V, RL = 2 kΩ(unless otherwise noted)

PARAMETERTEST

FIGURE TEST CONDITIONS† TA MIN TYP MAX UNIT

AVDLarge-signal differential

1VOPP = 3 V, RL = 2 kΩ, 25°C 300 400 500

V/VAVDg g

voltage amplification 1 OPPRAB = 0

L0°C to 70°C 250 600

V/V

AVD2Large-signal differential

1VOPP = 3 V, RL = 2 kΩ,

25°C 13 V/VAVD2g g

voltage amplification 1 OPPRAB = 1 kΩ

L 25°C 13 V/V

BW Bandwidth ( –3 dB) 2 VOPP = 1 V, RAB = 0 25°C 50 MHz

IIO Input offset current25°C 0.4 5

µAIIO Input offset current0°C to 70°C 6

µA

IIB Input bias current25°C 9 30

µAIIB Input bias current0°C to 70°C 40

µA

VICRCommon-mode input

325°C ±1

VVICR voltage range 30°C to 70°C ±1

V

VOCCommon-mode output

1 RL = ∞ 25°C 2 4 2 9 3 4 VVOC voltage 1 RL = ∞ 25°C 2.4 2.9 3.4 V

VOO Output offset voltage 1VID = 0, RAB = ∞, 25°C 0.35 0.75

VVOO Output offset voltage 1 IDRL = ∞

AB0°C to 70°C 1.5

V

VOPPPeak-to-peak output

1 RL = 2 kΩ RAB = 025°C 3 4

VVOPP voltage swing 1 RL = 2 kΩ, RAB = 00°C to 70°C 2.8

V

ri Input resistance VOD = 1 V RAB = 025°C 4

kΩri Input resistance VOD = 1 V, RAB = 00°C to 70°C 3.6

kΩ

ro Output resistance 0°C to 70°C 30 ΩCi Input capacitance 25°C 5 pF

f = 100 kHz25°C

60 86

CMRRCommon-mode rejection

3VIC = ±1 V, f = 5 MHz

25°C60

dBCMRRj

ratio 3 ICRAB = 0 f = 100 kHz

0°C to 70°C50

dB

f = 5 MHz0°C to 70°C

60

kSVRSupply voltage rejection

4∆VCC+ = ± 0.5 V, RAB = 0 25°C 50 70

dΒkSVRy g j

ratio (∆VCC/∆VIO) 4 CC∆VCC– = ± 0.5 V,

AB0°C to 70°C 50

dΒ

VnBroadband equivalentinput noise voltage

4 BW = 1 kHz to 10 MHz 25°C 3 µV

tpd Propagation delay time 2 ∆VO = 1 V 25°C 7.5 ns

tr Rise time 2 ∆VO = 1 V 25°C 10.5 ns

I i k( )Maximum output sink

VID = 1 V VO = 3 V 3 4 mAIsink(max) current VID = 1 V, VO = 3 V 3 4 mA

ICC Supply current No load No signal25°C 18 24

mAICC Su ly current No load, No signal0°C to 70°C 27

mA

† RAB is the gain-adjustment resistor connected between gain-adjust pins A and B. If not specified for a particular parameter, its value is irrelevantto that parameter.



4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

Figure 1

+

–

AB

RAB

VID

VOD RL

VO+

VO–

50 Ω50 ΩVOC

VO VO2

Figure 2

RAB

VID

50 Ω 50 Ω

VO+

VO–

0.2 µF1 kΩ1 kΩ

0.2 µF

+

–

AB

Figure 3

0.2 µF

1 kΩ

RAB

VO+

VO–

1 kΩ

0.2 µF

50 Ω

50 Ω

VIC

+

–

AB

Figure 4

VOD

RAB

RL = 2 kΩ+

–

AB




TYPICAL CHARACTERISTICS

Figure 5

300

200

100

0

Vol

tage

Am

plifi

catio

n –

V/V

400

LARGE-SIGNAL DIFFERENTIALVOLTAGE AMPLIFICATION

vsSUPPLY VOLTAGE

500

±3 ±4 ±5 ±6 ±7 ±8VCC± – Supply Voltage – V

RAB = 0f = 1 kHzTA = 25°CSee Figure 1

Figure 6

100

70

40

101 4 10 40

400

700

1000

100 400 1 k

LARGE-SIGNAL DIFFERENTIALVOLTAGE AMPLIFICATION

vsGAIN-ADJUSTMENT RESISTANCE

Vol

tage

Am

plifi

catio

n –

V/V

RAB – Gain-Adjustment Resitance – Ω

VCC+ = 6 VVCC– = –6 Vf = 10 kHzTA = 25°CSee Figure 1

±8

15

10

5

0

20

25

SUPPLY CURRENTvs

SUPPLY VOLTAGE30

±3 ±4 ±5 ±6 ±7

No LoadNo SignalTA = 25°C

VCC± – Supply Voltage – V

ICC

– S

uppl

y C

urre

nt –

mA

CC

I

Figure 7

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright 1998, Texas Instruments Incorporated

NJM2360

MEMO

[CAUTION] The specifications on this databook are only

given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.

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