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Page 1: Full error detection and correction

McGraw-Hill ©The McGraw-Hill Companies, Inc., 2004

Data Link LayerData Link Layer

PART PART IIIIII

Page 2: Full error detection and correction

McGraw-Hill ©The McGraw-Hill Companies, Inc., 2004

Data link layer duties

Page 3: Full error detection and correction

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Chapter 10

Error Detectionand

Correction

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Data can be corrupted during transmission. For reliable

communication, errors must be detected and corrected.

NoteNote::

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10.1 Types of Error10.1 Types of Error

Single-Bit Error

Burst Error

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In a single-bit error, only one bit in the data unit has changed.

NoteNote::

Single-Bit Error

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A burst error means that 2 or more bits in the data unit have changed.

NoteNote::

Burst Error

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10.2 Detection10.2 Detection

Repetition

Redundancy

Parity Check

Cyclic Redundancy Check (CRC)

Checksum

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Repetition

The simplest form of redundancy is: Repetition!

Sender Receiver

“0” Did she say “1” ?

I said “0” Sounded like “0”

One more time: “0” Sounded like “0” again

She was sending “0”

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3-Repetition Code

• Encoding rule: Repeat each bit 3 times

Example:

1 . 0 . 1 . 111 . 000 . 111 .

• Decoding rule: Majority vote!

Examples of received codewords:

110 . 000 . 111 . 1 . 0 . 1 . Error-free!

111 . 000 . 010 . 1 . 0 . 0 . Error!

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How good is this 3-repetition code?

• The code can correct 1 bit error per 3-bit codeword.

• The price we pay in redundancy is measured by the efficiency or rate of the code, denoted by R:

R= #information bits / # bits in codeword

• For the 3-repetition code: R=33%

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How good is this 3-repetition code?

Suppose that, on average, the noisy channel flips

1 code bit in 100

Then, on average, the 3-repetition code makes

only 1 information bit error in 3333 bits!

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Can we do better?How about repeat 5 times?

On average, only 1 bit error in 100,000 bits.

How about repeat 7 times?

On average, only 1 bit error in 2,857,142 bits

If we let the number of repetitions grow and grow, we can approach perfect reliability !

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What’s the catch????The catch is:

As the number of repetitions grows to infinity, the transmission rate shrinks to zero!!!

This means: slow data transmission / low storage density.

Is there a better (more efficient) error correcting code?

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Error detection uses the concept of redundancy, which means adding

extra bits for detecting errors at the destination.

NoteNote::

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10.3 Redundancy

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10.4 Detection methods

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10.5 Even-parity concept

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In parity check, a parity bit is added to every data unit so that the total

number of 1s is even (or odd for odd-parity).

NoteNote::

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Example 1Example 1

Suppose the sender wants to send the word world. In ASCII the five characters are coded as

1110111 1101111 1110010 1101100 1100100

The following shows the actual bits sent

11101110 11011110 11100100 11011000 11001001

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Example 2Example 2

Now suppose the word world in Example 1 is received by the receiver without being corrupted in transmission.

11101110 11011110 11100100 11011000 11001001

The receiver counts the 1s in each character and comes up with even numbers (6, 6, 4, 4, 4). The data are accepted.

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Example 3Example 3

Now suppose the word world in Example 1 is corrupted during transmission.

11111110 11011110 11101100 11011000 11001001

The receiver counts the 1s in each character and comes up with even and odd numbers (7, 6, 5, 4, 4). The receiver knows that the data are corrupted, discards them, and asks for retransmission.

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Simple parity check can detect all Simple parity check can detect all single-bit errors. It can detect burst single-bit errors. It can detect burst errors only if the total number of errors only if the total number of errors in each data unit is odd.errors in each data unit is odd.

NoteNote::

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10.6 Two-dimensional parity

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Example 4Example 4

Suppose the following block is sent:

10101001 00111001 11011101 11100111 10101010

However, it is hit by a burst noise of length 8, and some bits are corrupted.

10100011 10001001 11011101 11100111 10101010

When the receiver checks the parity bits, some of the bits do not follow the even-parity rule and the whole block is discarded.

10100011 10001001 11011101 11100111 10101010

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In two-dimensional parity check, a block of bits is divided into rows and a redundant row of bits is added to the

whole block.

NoteNote::

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10.7 CRC generator and checker

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10.8 Binary division in a CRC generator

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10.9 Binary division in CRC checker

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10.10 A polynomial

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10.11 A polynomial representing a divisor

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Table 10.1 Standard polynomialsTable 10.1 Standard polynomials

Name Polynomial Application

CRC-8CRC-8 x8 + x2 + x + 1 ATM header

CRC-10CRC-10 x10 + x9 + x5 + x4 + x 2 + 1 ATM AAL

ITU-16ITU-16 x16 + x12 + x5 + 1 HDLC

ITU-32ITU-32x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10

+ x8 + x7 + x5 + x4 + x2 + x + 1LANs

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Example 5Example 5

It is obvious that we cannot choose x (binary 10) or x2 + x (binary 110) as the polynomial because both are divisible by x. However, we can choose x + 1 (binary 11) because it is not divisible by x, but is divisible by x + 1. We can also choose x2 + 1 (binary 101) because it is divisible by x + 1 (binary division).

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Example 6Example 6

The CRC-12

x12 + x11 + x3 + x + 1

which has a degree of 12, will detect all burst errors affecting an odd number of bits, will detect all burst errors with a length less than or equal to 12, and will detect, 99.97 percent of the time, burst errors with a length of 12 or more.

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10.12 Checksum

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10.13 Data unit and checksum

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The sender follows these steps:The sender follows these steps:

•The unit is divided into k sections, each of n bits.The unit is divided into k sections, each of n bits.

•All sections are added using one’s complement to get All sections are added using one’s complement to get the sum.the sum.

•The sum is complemented and becomes the checksum.The sum is complemented and becomes the checksum.

•The checksum is sent with the data.The checksum is sent with the data.

NoteNote::

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The receiver follows these steps:The receiver follows these steps:

•The unit is divided into k sections, each of n bits.The unit is divided into k sections, each of n bits.

•All sections are added using one’s complement to get All sections are added using one’s complement to get the sum.the sum.

•The sum is complemented.The sum is complemented.

•If the result is zero, the data are accepted: otherwise, If the result is zero, the data are accepted: otherwise, rejected.rejected.

NoteNote::

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Example 7Example 7

Suppose the following block of 16 bits is to be sent using a checksum of 8 bits.

10101001 00111001

The numbers are added using one’s complement

10101001

00111001 ------------Sum 11100010

Checksum 00011101

The pattern sent is 10101001 00111001 00011101

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Example 8Example 8

Now suppose the receiver receives the pattern sent in Example 7 and there is no error.

10101001 00111001 00011101

When the receiver adds the three sections, it will get all 1s, which, after complementing, is all 0s and shows that there is no error.

10101001

00111001

00011101

Sum 11111111

Complement 00000000 means that the pattern is OK.

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Example 9Example 9

Now suppose there is a burst error of length 5 that affects 4 bits.

10101111 11111001 00011101

When the receiver adds the three sections, it gets

10101111

11111001

00011101

Partial Sum 1 11000101

Carry 1

Sum 11000110

Complement 00111001 the pattern is corrupted.

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10.3 Correction10.3 Correction

Retransmission

Burst Error Correction

Automatic-repeat-request (ARQ)

Forward error correction (FEC)

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Table 10.2 Data and redundancy bitsTable 10.2 Data and redundancy bits

Number ofdata bits

m

Number of redundancy bits

r

Total bits

m + r

11 2 3

22 3 5

33 3 6

44 3 7

55 4 9

66 4 10

77 4 11

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10.14 Positions of redundancy bits in Hamming code

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10.15 Redundancy bits calculation

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10.16 Example of redundancy bit calculation

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10.17 Error detection using Hamming code

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10.18 Burst error correction example

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ARQ TechniquesAutomatic-repeat request (ARQ):

ARQ procedures require the transmitter to resend the portions of the exchange in which error have been detected.

Generally, ARQ procedures include the following actions by the receiver or the sender:

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ARQ TechniquesReceiver:

Discard those frames in which errors are detected.

For frames in which no error was detected, the receiver returns a positive acknowledgment to the sender.

For the frame in which errors have been detected, the receiver returns negative acknowledgement to the sender.

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ARQ TechniquesSender:

Retransmit the frames in which the receiver has identified errors.

After a pre-established time, the sender retransmits a frame that has not been acknowledged.

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ARQ TechniquesThree Common ARQ Techniques are:

Stop-and-WaitGo-back-nSelective-repeat

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ARQ Techniques• Stop-and-Wait The sender sends a frame and waits for

acknowledgment from the receiver. This technique is slow Suited for half-duplex connection.

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ARQ Techniques•Stop-and-Wait

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ARQ TechniquesGo-back-n:

The sender sends frames in a sequence and receives acknowledgements from the receiver.

On detecting an error, the receiver discards the corrupted frame, and ignores any further frames.

The receiver notifies the sender of the number of frame it expects to receive.

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ARQ TechniquesGo-back-n:

On receipt of information, the sender begins re-sending the data sequence starting from that frame.

This technique is faster than stop-and-wait technique.

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ARQ TechniquesSelective-repeat:

Used on duplex connections.The sender only repeats those frames for which

negative acknowledgment are received from the receiver, or no acknowledgment is received.

The appearance of a repeated frame out of sequence may provide the receiver with additional complications.

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Forward Error CorrectionForward error correction (FEC):

FEC techniques employ special codes that allow the receiver to detect and correct a limited number of errors without referring to the transmitter.

Possible for the receiver to detect and correct errors without reference to the sender.

This convenience is bought at the expense of adding more bits.

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Forward Error CorrectionFor example

If we only have two massages to send.we represent one (A) by the bits 10101010,And the other (B) by the bits 01010101.If the receiver knows that the message is A or

B and no other, and it is provided with the ability to determine the logical distance between each incoming massage and the two known messages, this strategy will allow the receiver to correct for up to three bits in error. The prove is as follows.

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Forward Error CorrectionProof:

Suppose A is in error by 1 bit, so that A’ = 00101010The logical distance between the received

pattern and A is 1And logical distance between the received

pattern and B is 7; Thus A’ is likely to be A.

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Forward Error CorrectionSuppose A is in error by 2 bit, so that A’ = 01101010The logical distance between the received

pattern and A is 2And logical distance between the received

pattern and B is 6; Thus A’ is likely to be A.

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Forward Error CorrectionSuppose A is in error by 3 bit, so that A’ = 01001010The logical distance between the received

pattern and A is 3And logical distance between the received

pattern and B is 5; Thus A’ is likely to be A.

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Forward Error CorrectionSuppose A is in error by 4 bit, so that A’ = 01011010The logical distance between the received

pattern and A is 4And logical distance between the received

pattern and B is 4; Thus A’ is likely to be A or B.

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Forward Error CorrectionContinuing the sequence to higher levels of

error makes A’ more likely to be B than A. For this particular case, the limit of

correction is 3-bits in error.

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Forward Error CorrectionCodes used to provide FEC (Forward Error

Correction) are more sophisticated than our example. They can be divided into two types.Linear Block CodesConvolutional Codes