fqpf2n70 700v n chanel mosfet

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  • 7/28/2019 Fqpf2n70 700v n Chanel Mosfet

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    2003 Fairchild Semiconductor Corporation Rev. A, March 2003

    FQPF2N70QFET

    TM

    FQPF2N70700V N-Channel MOSFET

    General Description

    These N-Channel enhancement mode power field effect

    transistors are produced using Fairchilds proprietary,

    planar stripe, DMOS technology.

    This advanced technology has been especially tailored to

    minimize on-state resistance, provide superior switching

    performance, and withstand high energy pulse in the

    avalanche and commutation mode. These devices are well

    suited for high efficiency switch mode power supply.

    Features

    2.0A, 700V, RDS(on) = 6.3 @VGS = 10 V

    Low gate charge ( typical 9.0 nC)

    Low Crss ( typical 5.0 pF)

    Fast switching

    100% avalanche tested

    Improved dv/dt capability

    Absolute Maximum Ratings TC = 25C unless otherwise noted

    Thermal Characteristics

    Symbol Parameter FQPF2N70 Units

    VDSS Drain-Source Voltage 700 VID Drain Current - Continuous (TC = 25C) 2.0 A

    - Continuous (TC = 100C) 1.3 A

    IDM Drain Current - Pulsed (Note 1) 8.0 A

    VGSS Gate-Source Voltage 30 V

    EAS Single Pulsed Avalanche Energy (Note 2) 140 mJ

    IAR Avalanche Current (Note 1) 2.0 A

    EAR Repetitive Avalanche Energy (Note 1) 2.8 mJ

    dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns

    PD Power Dissipation (TC = 25C) 28 W

    - Derate above 25C 0.22 W/C

    TJ, TSTG Operating and Storage Temperature Range -55 to +150 C

    TL

    Maximum lead temperature for soldering purposes,

    1/8" from case for 5 seconds 300 C

    Symbol Parameter Typ Max Units

    RJC Thermal Resistance, Junction-to-Case -- 4.46 C/W

    RJA Thermal Resistance, Junction-to-Ambient -- 62.5 C/W

    ! "

    !

    !

    !"

    "

    "

    ! "

    !

    !

    !"

    "

    "

    S

    D

    G

    TO-220FFQPF Series

    G SD

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    Rev. A, March 2003

    FQPF2N70

    2003 Fairchild Semiconductor Corporation

    Electrical Characteristics TC = 25C unless otherwise noted

    Notes:1. Repetitive Rating : Pulse width limited by maximum junction temperature2. L = 45mH, IAS = 2.0A, VDD = 50V, RG = 25 , Starting TJ = 25C3. ISD 2.0A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C

    4. Pulse Test : Pulse width 300s, Duty cycle 2%5. Essentially independent of operating temperature

    Symbol Parameter Test Conditions Min Typ Max Units

    Off Characteristics

    BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A 700 -- -- V

    BVDSS

    / TJBreakdown Voltage TemperatureCoefficient ID = 250 A, Referenced to 25C -- 0.4 -- V/C

    IDSSZero Gate Voltage Drain Current

    VDS = 700 V, VGS = 0 V -- -- 10 A

    VDS = 560 V, TC = 125C -- -- 100 A

    IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA

    IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA

    On CharacteristicsVGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 A 3.0 -- 5.0 V

    RDS(on) Static Drain-Source

    On-ResistanceVGS = 10 V, ID = 1.0 A -- 5.0 6.3

    gFS Forward Transconductance VDS = 50 V, ID = 1.0 A (Note 4) -- 2.45 -- S

    Dynamic CharacteristicsCiss Input Capacitance VDS = 25 V, VGS = 0 V,

    f = 1.0 MHz

    -- 270 350 pF

    Coss Output Capacitance -- 38 50 pF

    Crss Reverse Transfer Capacitance -- 5 7 pF

    Switching Characteristicstd(on) Turn-On Delay Time VDD = 350 V, ID = 2.0 A,

    RG = 25

    (Note 4, 5)

    -- -- 30 ns

    tr Turn-On Rise Time -- -- 80 ns

    td(off) Turn-Off Delay Time -- -- 50 ns

    tf Turn-Off Fall Time -- -- 70 ns

    Qg Total Gate Charge VDS = 560 V, ID = 2.0 A,

    VGS = 10 V

    (Note 4, 5)

    -- 8.1 11 nC

    Qgs Gate-Source Charge -- 1.7 -- nC

    Qgd Gate-Drain Charge -- 4.4 -- nC

    Drain-Source Diode Characteristics and Maximum RatingsIS Maximum Continuous Drain-Source Diode Forward Current -- -- 2.0 A

    ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 8.0 A

    VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.0 A -- -- 1.4 V

    trr Reverse Recovery Time VGS = 0 V, IS = 2.0 A,

    dIF / dt = 100 A/s (Note 4)

    -- 260 -- ns

    Qrr Reverse Recovery Charge -- 1.09 -- C

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    Rev. A, March 2003

    FQPF2N70

    2003 Fairchild Semiconductor Corporation

    0 1 2 3 4 50

    3

    6

    9

    12

    15

    VGS

    = 20V

    VGS

    = 10V

    Note : TJ= 25

    RDS(ON)

    [

    ],

    Drain-SourceOn-Resistance

    ID, Drain Current [A]

    0.2 0.4 0.6 0.8 1.0 1.2 1.410

    -1

    100

    25150

    Note :1. V

    GS=0V

    2. 250 s Pulse Test

    IDR,

    ReverseDrainCurrent[A]

    VSD

    , Source-Drain Voltage [V]

    Typical Characteristics

    Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

    Figure 3. On-Resistance Variation vs.

    Drain Current and Gate Voltage

    Figure 4. Body Diode Forward Voltage

    Variation vs. Source Current and

    Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics

    10-1

    100

    101

    10-1

    100

    VGS

    Top : 15.0 V10.0 V8.0 V

    7.0 V6.5 V6.0 V

    Bottom: 5.5 V

    Note :1. 250 s Pulse Test2. T

    C= 25

    ID,DrainCurrent[A]

    VDS

    , Drain-Source Voltage [V]

    2 4 6 8 1010

    -1

    100

    Note1. V

    DS= 50V

    2. 250 s Pulse Test

    -55

    150

    25

    ID,DrainCurrent[A]

    VGS

    , Gate-Source Voltage [V]

    10-1

    100

    101

    0

    100

    200

    300

    400

    500C

    iss= C

    gs+ C

    gd(C

    ds= shorted)

    Coss

    = Cds

    + Cgd

    Crss

    = Cgd

    Note ;1. V

    GS

    = 0 V2. f = 1 MHzCrss

    Coss

    Ciss

    Capacitances[pF]

    VDS

    , Drain-Source Voltage [V]

    0 2 4 6 8 100

    2

    4

    6

    8

    10

    12

    VDS

    = 350V

    VDS

    = 140V

    VDS

    = 560V

    Note : ID= 2 A

    VGS,G

    ate-SourceVoltage[V]

    QG, Total Gate Charge [nC]

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    Rev. A, March 2003

    FQPF2N70

    2003 Fairchild Semiconductor Corporation

    100

    101

    102

    103

    10-2

    10-1

    100

    101

    1 ms

    DC

    100 ms10 ms

    100s

    Operation in This Areais Limited by R

    DS(on)

    Notes :

    1. TC

    = 25oC

    2. TJ= 150

    oC

    3. Single Pulse

    ID,DrainCurrent[A]

    VDS, Drain-Source Voltage [V]

    25 50 75 100 125 1500.0

    0.5

    1.0

    1.5

    2.0

    ID,DrainCurrent[A]

    TC, Case Temperature []

    10-5

    10-4

    10-3

    10-2

    10-1

    1 00

    1 01

    1 0-2

    1 0-1

    1 00

    Notes :1. Z

    JC( t ) = 4.46 / W M a x .

    2 . Du ty Fac to r , D= t1/t

    2

    3. TJM

    - TC

    = PDM

    * Z JC

    (t)

    s ing le pu l se

    D = 0 . 5

    0 . 0 2

    0 .2

    0 . 0 5

    0 .1

    0 . 0 1

    Z

    J

    C(t),Therm

    alResponse

    t1, S q u a r e W a v e P u l s e D u r a ti o n [ s e c ]

    Typical Characteristics (Continued)

    Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

    vs. Case Temperature

    Figure 7. Breakdown Voltage Variation

    vs. Temperature

    Figure 8. On-Resistance Variation

    vs. Temperature

    Figure 11. Transient Thermal Response Curve

    t1

    PDM

    t2

    -100 -50 0 50 100 150 2000.8

    0.9

    1.0

    1.1

    1.2

    Note :1. V

    GS=0V

    2. ID=250A

    BVDSS,(Normalized)

    Drain-SourceBreakdownVoltage

    TJ, Junction Temperature [

    oC]

    -100 -50 0 50 100 150 2000.0

    0.5

    1.0

    1.5

    2.0

    2.5

    3.0

    Note:1. V

    GS= 10 V

    2. ID= 3.1 A

    RDS(ON),(Normalized)

    Drain-SourceOn-Resistance

    TJ, Junction Temperature [

    oC]

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    Rev. A, March 2003

    FQPF2N70

    2003 Fairchild Semiconductor Corporation

    Gate Charge Test Circuit & Waveform

    Resistive Switching Test Circuit & Waveforms

    Unclamped Inductive Switching Test Circuit & Waveforms

    Charge

    VGS

    10V

    Qg

    Qgs Qgd

    3mA

    VGS

    DUT

    VDS

    300nF

    50K

    200nF12V

    Same Type

    as DUT

    Charge

    VGS

    10V

    Qg

    Qgs Qgd

    3mA

    VGS

    DUT

    VDS

    300nF

    50K

    200nF12V

    Same Type

    as DUT

    VGS

    VDS

    10%

    90%

    td(on)

    tr

    t on t off

    td(off) t

    f

    VDD

    10V

    VDSRL

    DUT

    RG

    VGS

    VGS

    VDS

    10%

    90%

    td(on)

    tr

    t on t off

    td(off) t

    f

    VDD

    10V

    VDSRL

    DUT

    RG

    VGS

    EAS = L IAS2----

    2

    1--------------------

    BVDSS - VDD

    BVDSS

    VDD

    VDS

    BVDSS

    tp

    VDD

    IAS

    VDS (t)

    ID (t)

    Time

    10V DUT

    RG

    L

    I D

    tp

    EAS = L IAS2----

    2

    1EAS = L IAS

    2----2

    1----2

    1--------------------

    BVDSS - VDD

    BVDSS

    VDD

    VDS

    BVDSS

    tp

    VDD

    IAS

    VDS (t)

    ID (t)

    Time

    10V DUT

    RG

    LL

    I DI D

    tp

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    Rev. A, March 2003

    FQPF2N70

    2003 Fairchild Semiconductor Corporation

    Peak Diode Recovery dv/dt Test Circuit & Waveforms

    DUT

    VDS

    +

    _

    Driver

    RG

    Same Typeas DUT

    VGS dv/dt controlled by RG ISD controlled by pulse period

    VDD

    L

    I SD

    10VVGS

    ( Driver )

    I SD

    ( DUT )

    VDS

    ( DUT )

    VDD

    Body Diode

    Forward Voltage Drop

    VSD

    IFM , Body Diode Forward Current

    Body Diode Reverse Current

    IRM

    Body Diode Recovery dv/dt

    di/dt

    D =Gate Pulse Width

    Gate Pulse Period--------------------------

    DUT

    VDS

    +

    _

    Driver

    RG

    Same Typeas DUT

    VGS dv/dt controlled by RG ISD controlled by pulse period

    VDD

    LL

    I SD

    10VVGS

    ( Driver )

    I SD

    ( DUT )

    VDS

    ( DUT )

    VDD

    Body Diode

    Forward Voltage Drop

    VSD

    IFM , Body Diode Forward Current

    Body Diode Reverse Current

    IRM

    Body Diode Recovery dv/dt

    di/dt

    D =Gate Pulse Width

    Gate Pulse Period--------------------------D =Gate Pulse Width

    Gate Pulse Period--------------------------

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    Rev. A, March 20032003 Fairchild Semiconductor Corporation

    FQPF2N70

    Dimensions in Millimeters

    Package Dimensions

    (7.00) (0.70)

    MAX1.47

    (30

    )

    #1

    3.

    30

    0.

    10

    15.

    80

    0.

    20

    15.

    87

    0.

    20

    6.

    68

    0.

    20

    9.

    75

    0.

    30

    4.

    70

    0.

    20

    10.16 0.20

    (1.00x45)

    2.54 0.20

    0.80 0.10

    9.40 0.20

    2.76 0.200.35 0.10

    3.18 0.10

    2.54TYP

    [2.54 0.20]

    2.54TYP

    [2.54 0.20]

    0.50+0.100.05

    TO-220F

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    2003 Fairchild Semiconductor Corporation

    DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

    PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

    LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

    LIFE SUPPORT POLICY

    FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

    DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR

    CORPORATION.

    As used herein:

    1. Life support devices or systems are devices or systems

    which, (a) are intended for surgical implant into the body,

    or (b) support or sustain life, or (c) whose failure to perform

    when properly used in accordance with instructions for use

    provided in the labeling, can be reasonably expected to

    result in significant injury to the user.

    2. A critical component is any component of a life support

    device or system whose failure to perform can be

    reasonably expected to cause the failure of the life support

    device or system, or to affect its safety or effectiveness.

    PRODUCT STATUS DEFINITIONS

    Definition of Terms

    Datasheet Identification Product Status Definition

    Advance Information Formative or In

    Design

    This datasheet contains the design specifications for

    product development. Specifications may change in

    any manner without notice.

    Preliminary First Production This datasheet contains preliminary data, and

    supplementary data will be published at a later date.

    Fairchild Semiconductor reserves the right to make

    changes at any time without notice in order to improve

    design.

    No Identification Needed Full Production This datasheet contains final specifications. Fairchild

    Semiconductor reserves the right to make changes at

    any time without notice in order to improve design.

    Obsolete Not In Production This datasheet contains specifications on a product

    that has been discontinued by Fairchild semiconductor.

    The datasheet is printed for reference information only.

    Rev. I2

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